0% found this document useful (0 votes)
106 views

DLL Error Detection

This document discusses different techniques for error detection at the data link layer, including parity bits, checksums, and cyclic redundancy checks (CRCs). Parity bits can detect odd or even numbers of errors. Checksums work by adding up transmitted data and comparing to the received checksum. CRCs represent data and checksum as polynomials and use polynomial division to embed checksum in the transmitted frame such that errors can be detected upon receipt.

Uploaded by

pari verma
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
106 views

DLL Error Detection

This document discusses different techniques for error detection at the data link layer, including parity bits, checksums, and cyclic redundancy checks (CRCs). Parity bits can detect odd or even numbers of errors. Checksums work by adding up transmitted data and comparing to the received checksum. CRCs represent data and checksum as polynomials and use polynomial division to embed checksum in the transmitted frame such that errors can be detected upon receipt.

Uploaded by

pari verma
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 20

Data Link Layer:

Error Detection
Ashutosh Bhatia
BITS Pilani
[email protected]
Recap
Frame-by-Frame next-hop delivery
Covered framing and overview of error-control
Hamming distance of a code determines the error
detection and correction capabilities
Packets Packets
Frames
Data Link Data Link
Bits
PHY PHY
Node-1 Node-2
General Approach
Add redundant information to a frame
At Sender:
Add k bits of redundant data to a m bit message
k << m; k = 32; m = 12,000 for Ethernet
k derived from original message through some algorithm
At Receiver:
Reapply same algorithm as sender to detect errors; take
corrective action if necessary
Parity Bit
Even Parity: 1100, send 11000
Detects odd number of errors
1101001 0 Used by BISYNC protocol for
1011110 1 ASCII characters
1001000 0
1111001 1
0000110 0
7 bits)
Catches all 1, 2, 3 bit errors and
Parity Bits
most 4 bit errors
Data
Internet Checksum
Used at the network layer (IP header)
Algorithm:
View data to be transmitted as a sequence of 16-bit integers.
Add the integers using 16 bit one's complement arithmetic.
Take the one's complement of the result this result is the
checksum
Receiver performs same calculation on received data and
compares result with received checksum
Example
Sender: IPV4 header in hexadecimal
4500 0073 0000 4000 4011 c0a8 0001 c0a8 00c7 (16-bit words)
Sum up the words (can use 32 bits): 0002 479c
Add carry to the 16-bit sum: 479e
Take the complement: b861 checksum
Receiver:
Sum up the words including checksum (use 32 bits): 2fffd
Add carry to the 16 bit sum: ffff no error
was detected
example values from wikipedia
Internet Checksum
Not very strong in detecting errors
Pair of single-bit errors, one which increments a
word, other decrements a word by same amount
Why is it used still?
Very easy to implement in software
Majority of errors picked by CRC at link-level
(implemented in hardware)
Cyclic Redundancy Check (CRC)

Used by many link-level protocols: HDLC,


DDCMP, Ethernet, Token-Ring
Uses powerful math based on finite fields
Background: Polynomial Arithmetic
Polynomial Arithmetic
Represent a m bit message with a polynomial of
-
11000101 = x7 + x6 +x2 + 1
Arithmetic over the field of integers modulo 2
(coefficients are 1 or 0)
Addition or subtraction are identical: XOR
Polynomial Arithmetic
Polynomial division (very similar to integer
division)
X/Y is X = q*Y + r
For integers: 0<=r<Y
For polynomials: degree of r (remainder polynomial) is
less than divisor polynomial
Cyclic Redundancy Check (CRC)
Message polynomial M(x): m bit message represented with a
-
11000101 = x7 + x6 +x2 + 1
Sender and receiver agree on a divisor polynomial C(x) of degree k
k: Number of redundancy bit
E.g. C(x) = x3+x2+1 (degree k = 3)
Choice of C(x) significantly effects error detection and is derived carefully
based on observed error patterns
Ethernet uses CRC of 32 bits, HDLC, DDCMP use 16 bits
Ethernet: x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x+1
Idea
Sender sends m+k bits => Transmitted message
P(x)
Contrive to make P(x) exactly divisibly by C(x)
Received message R(x)
No errors: R(x) = P(x), exactly divisible by C(x)
Errors: R(x) ~= P(x); likely not divisible by C(x)
Generate P(x)
You have M(x) and C(x). Generate P(x)
Multiply M(x) by xk to get T(x)
Add k zeros at the end of the message
Divide T(x) by C(x) to get remainder R(x)
Subtract remainder R(x) from T(x) to get P(x)
P(x) is now exactly divisible by C(x)
Details
T(x) = x^k M(x) = Q(x) C(x) + R(x)
P(x) = x^k M(x) R(x) = x^kM(x) +R(x)
=Q(x)C(x)
Coefficients of R(x) are the redundant bits
Transmitted Bits: Messaged (n) bits, followed by
redundant bits (k)
Example
Message (M): 11001011
Divisor (C): 1101
T: 11001011000
Remainder (R): 101
Transmitted Bits (P): 11001011101
Error Detection
Received polynomial = P(x) + E(x)
E(x) captures bit map of the positions of errors
Cannot detect errors if E(x) is also divisible by
C(x)
Goal: Design C(x) such that for anticipated
error patterns, E(x) is not divisible by C(x)
Example
Detect all instances of odd number of bit errors

Implies E(1) = 1
If C(x) were a factor of E(x), then C(1) would also have to
be 1
If C(1) = 0, we can conclude C(x) does not divide E(x)
If C(x) has some factor of the form x^i+1, then C(1)=0
Capabilities
All single-bit errors, if xk and x0 have non-zero
coefficients
All double-bit errors, if C(x) has at least three
terms
All odd bit errors, if C(x) contains the factor (x +
1)
Any bursts of length <= k, if C(x) includes a
constant term (x0 term)
CRC is easily implementable on shift registers
Summary
Important to detect errors in frames
Many techniques exist (simple to complex)
Parity, Checksum, CRC
Going Forward: Error Recovery

You might also like