1066 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO.

5, MAY 2016

A Rel-12 2G/3G/LTE-Advanced
3CC Cellular Receiver
Mohyee Mikhemar, Masoud Kahrizi, Senior Member, IEEE, John C. Leete, Bernd Pregardier, Member, IEEE,
Nooshin Vakilian, Amir Hadji-Abdolhamid, Member, IEEE, Morteza Vadipour, Peihua Ye, Janice Chiu,
Behzad Saeidi, Gerasimos Theodoratos, Med Nariman, Yuyu Chang, Behnam Mohammadi, Farzad Etemadi,
Behzad Nourani, Alireza Tarighat, Paul Mudge, Zhimin Zhou, Ning Liu, Claire Guan, Kevin Juan,
Rahul Magoon, Senior Member, IEEE, Maryam Rofougaran, and Ahmadreza Rofougaran, Fellow, IEEE

Abstract—This work presents a receiver capable of receiving

three simultaneous cellular channels with an aggregate bandwidth
of 60 MHz, enabling a 300 Mb/s downlink rate. The receiver
has 16 RF LNA ports covering the cellular bands within the
572–2700 MHz frequency range. It supports LTE-advanced Rel-
12 Cat6, HSPA+ Rel-11, TD-SCDMA Rel-9, and GSM/EDGE
Rel-9. The 40 nm CMOS receiver consumes 13.7 and 17.6 mA of
battery current in 3G and LTE modes, respectively, including the
PLL, DCXO, and biasing for a single channel.
Index Terms—3CC, 25%, passive mixer, carrier aggregation
(CA), cellular, CMOS receiver, direct conversion, low power, LTE,
LTE-advanced, mobile, multimode radio, receiver, RF isolation,
RF multiplexing.
Fig. 1. CA scenarios: (a) contiguous intra-band; (b) noncontiguous intra-band;
I. I NTRODUCTION and (c) intra-band CA.

T HE proliferation of smart phones has increased the

demand for high data-rate cellular communications. As
evident from Shannon’s limit on transmission capacity, data-
[Fig. 1(b)], where there is a frequency gap between the channels
within the same band; and 3) the intra-band CA [Fig. 1(c)],
rate can be boosted either by increasing the channel’s band- where the channels are from different bands. These CA sce-
width or the SNR. The lower propagation loss and the extended narios impose stringent performance and isolation requirements
coverage range for frequency bands below 3 GHz have led to on the RF receiver, which should also be backward compatible
fierce competition among mobile operators over these bands, with various 2G and 3G modes. Moreover, to remain com-
which resulted in each operator having access to noncontigu- petitive in the marketplace, the radios are typically built in
ous and fragmented narrow bands of spectrum. Therefore, to digital CMOS technology without add-on Analog features.
enable a wider channel bandwidth access, the cellular radio In this paper, the design of a 3CC CA receiver is presented.
should be capable of combining multiple channels from various In Section II, the RX architecture will be presented to address
frequency bands using a technique called carrier aggregation the main challenges of sharing the RF filters and mitigating
(CA). In LTE-advanced, there are three CA scenarios: 1) the crosstalk when receiving multiple signals, which are discussed
intra-band contiguous CA, where two neighboring channels, in Sections II-A, and II-B, respectively. In Section III, the cir-
also known as carrier components (CCs), within the same band cuit design and optimization of key blocks are discussed. The
are combined [Fig. 1(a)]; 2) the intra-band noncontiguous CA measurement results of the prototype chip in 40 nm digital
CMOS technology are presented in Section IV, leading to the
Manuscript received September 06, 2015; revised November 18, 2015; conclusion in Section V.
accepted December 20, 2015. Date of publication March 28, 2016; date of cur-
rent version April 28, 2016. This paper was approved by Guest Editor Salvatore
Levantino.
M. Mikhemar, M. Kahrizi, J. Leete, N. Vakilian, M. Vadipour, J. Chiu, II. RX A RCHITECTURE
B. Saeidi, G. Theodoratos, Y. Chang, B. Mohammadi, F. Etemadi, B. Nourani,
A. Tarighat, P. Mudge, Z. Zhou, N. Liu, C. Guan, K. Juan, R. Magoon, The target RX architecture should be flexible enough to sup-
M. Rofougaran, and A. Rofougaran are with Broadcom Corporation, Irvine, port all 3CC CA scenarios shown in Fig. 1, while maintaining a
CA 92617 USA.
high SNR. The required peak SNR for both HSPA+ and LTE is
B. Pregardier is with Ethertronics, San Diego, CA 92121 USA.
A. Hadji-Abdolhamid is with MaxLinear, Atlanta, GA 30346 USA. 36 dB dictated by the modem to meet system throughput. The
P. Ye is with Skyworks, Irvine, CA 92617 USA. architecture should also support the 2G and 3G legacy modes.
M. Nariman is with Qualcomm, San Diego, CA 92121 USA. There are two main challenges for satisfying these require-
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
ments: 1) sharing the RF filters and 2) receiving harmonically
Digital Object Identifier 10.1109/JSSC.2016.2514438 related channels.

0018-9200 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1067

Fig. 2. Antenna interface in a cellular radio.

Fig. 4. Leakage from the 2.1G signal into RX1 is down-converted in-band by
the third harmonic of LO1.

current 3G and 1CC LTE receivers are designed to tolerate the

TX leakage through the duplexer which could be as strong as
Fig. 3. Sharing external RF filter between two receivers: (a) conventional −26 dBm modulated signal and as close as 45 MHz away [1].
topology with external LNA and splitter and (b) proposed topology. The TX leakage typically causes a sensitivity degradation of
0.1–0.3 dB depending on the band. Also since the maximum
A. RF Filter Sharing level of desired signal dictated by the standard is −25 dBm, the
The stringent blocker rejection requirements in cellular sys- coupling between desired signals should not degrade the perfor-
tems can only be met with the use of on-board SAW or BAW mance as long as they are separated by 45 MHz or more. The
filters and duplexers. These filters are connected to the antenna exception to this situation occurs when the frequencies of the
one at a time through a set of RF switches as shown in Fig. 2. two received signals are separated by more than 45 MHz but are
There is typically a separate filter for each band. These fil- harmonically related. As shown in Fig. 4, when a conventional
ters add substantial cost and area to the system. Therefore, it four-phase mixer is used, the clock driving the mixer (LO) has a
is desirable to use one filter when receiving two channels in strong third-order harmonic component only 9.6 dB below the
the same band. The conventional way of sharing an RF filter fundamental. Consequently, the mixer will down-convert any
is to add a 3 dB power splitter to connect the filter to the two signal around three times the LO frequency on top of the desired
receivers simultaneously. The splitter increases the NF of the signal at fLO . For example, in Fig. 4, the mixer will down-
system and hence degrades the sensitivity by 3 dB which is not convert the coupled signal at 2.1 GHz on top of the desired
acceptable for most applications. Therefore, an external LNA signal at 700 MHz, degrading the SNR substantially. One solu-
is typically inserted before the splitter to maintain a good NF, tion to this problem is to use a harmonic rejection mixer driven
as shown in Fig. 3(a). This is the conventional way of shar- by eight phases [2]. Such arrangement was proven to reject the
ing the filters that are currently used in the first generation of third and fifth harmonics by 40 dB or more [3], leaving the sev-
2CC CA LTE receivers, where a legacy 1CC LTE transceiver enth harmonic and higher where there is no cellular signals. The
is used along a helper RX-only chip that enables the 2CC CA harmonic rejection achieved by the extra phases comes at the
capability. The drawback of such topology is that an extra LNA expense of extra power consumption and complexity. To gener-
and splitter are needed for each CA RX port which increases ate the nonoverlapping eight phases, the PLL and the VCO have
the cost, power consumption, and area substantially. In our pro- to run at four times the LO frequency, and two extra dividers
posed architecture, we eliminate the external LNA and splitter are needed, one inside the PLL and the other in the LO chain.
by doing the splitting inside the chip and in voltage mode with- Moreover, the routing of the LO signals will become more chal-
out NF penalty. This is possible because of a special matching lenging as the number of lines double, resulting in more routing
arrangement where the LNA input impedance is mostly reac- capacitance and thus higher power consumption.
tive and plays a minor role in the overall matching. Therefore, In our design, we decided to use four-phase clocks to meet
the input impedance looking into the chip remains fairly stable the power consumption target, and to guarantee by design that
whether one LNA is active or both of them are used in noncon- the coupling between the two receivers is low enough not to
tiguous CA. More details on the LNA design are presented in affect the SNR. We achieve the low coupling by using two sets
Section III-A. Note that by moving the splitting on-chip, only of mixers such that there are no harmonically related inputs
one RF-port is used for both LNAs, which reduces the number within each group as illustrated in Fig. 5. The first group has
of RF balls by half. Moreover, all off-chip splitters and LNAs six low band (LB) ports and two midband (MB) ports; the sec-
are eliminated simplifying the RF filtering interface similar to ond group is connected to the high band (HB) and the higher
that of the 1CC LTE case. band (HRB), each with four ports. In total, there are 16 differ-
ential RF ports, each port is connected to two LNAs A and B for
intra-band noncontiguous. All A LNAs from all six LB ports are
B. Concurrent Reception of Harmonically Related Signal connected at the output to a tunable tank that covers the entire
The second major challenge in realizing the CA receiver LB frequency range. The outputs can then be demultiplexed to
is the inevitable coupling between two received signals espe- any of the mixers within the group. The same arrangement is
cially if one of them is much stronger than the other. The repeated eight times, leading to a total of eight load inductors.
1068 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

Fig. 5. Proposed RF frontend architecture with two mixer groups.

Fig. 6. RX architecture with 32 LNAs, 6 mixers, 3 PLLs, and 3 basebands.

Since the LNAs do not use degeneration inductors, eight more has two LC-VCOs to cover the entire tuning range with low
inductors are saved. power. The three PLLs are physically placed next to each other
The number of LNAs and band groups in the prototype was with the middle one operating at twice the frequency to mitigate
chosen as target for a very high-end and flexible handset plat- pulling. The LO is routed at twice the final LO frequency and a
form. It is expected that for most smart phones, only a subset of local divider-by-2 and 25% generation circuit is placed next to
these bands and band groups will be needed. This can be easily each mixer.
done by eliminating some of the LNAs and the LNA loads from The baseband architecture starts with a real pole P0 which
our proposed architecture. filters out-of-band (OOB) blockers, mainly TX leakage for 3G
The block diagram of the complete RX architecture is shown and LTE, and then a common-gate (CG) current-mode buffer
in Fig. 6. The baseband outputs of the two mixer groups are that isolates the input impedance of 100 Ω from the output
combined and applied to three identical analog basebands, impedance of 4 kΩ enabling both signal amplifications and low
where the down converted signals are filtered and amplified. capacitance filtering in the tighter second real pole P1. Then,
Three PLLs generate the clocks for the three LOs. Each PLL a pair of complex conjugate poles P2 and P3 completes the
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1069

Fig. 7. RX active blocks when tuned to 1CC in HB2 band. Fig. 8. Active blocks when receiving two noncontiguous channels from HB2
band.

Chebyshev filter with a tunable BW from 300 kHz for 2G to

30 MHz for 3CC contiguous CA. The biquad (BQ) stage is
bypassed for 2G and 3G modes. Finally, a buffer is used to
drive the analog interface used for testing in the prototype. This
buffer resembles the input stage of the continuous-time delta
sigma ADC that was used in system calculation and verified
separately in [4].

C. Typical Use Case Scenarios of the Receiver

In the following sections, some typical use cases of the
architecture will be presented.
1) 1CC: For the legacy mode, when the receiver is tuned
to a single channel or two contiguous channels from the same
band, e.g., HB2 band as shown in Fig. 7, only the blocks in the
signal path are active. The input is amplified in LNA HB2_A
and then goes through HB_A load. Then, it goes through the Fig. 9. RX active blocks for 3CC harmonically related configuration from LBx,
demux to mixer 4, which is driven by PLL1, and into BB1. HBy, and HRBz bands.
2) 2CC: If another noncontiguous channel is available in
HB2 band for aggregation, then more blocks are activated to
spur that is −50 dBc at an offset equal to the frequency sepa-
support Ch2, as illustrated in Fig. 8. Both A and B LNAs are
ration between the two signals, along with two desired signals
now active and amplifying the same RF signal. The signal from
one at PR×1 = −80 dBm and the other at PR×2 = −40 dBm,
the first channel goes through the same path as the 1CC case
would limit the SNR of the RX1 to 10 dB, well below the target
in Fig. 7. The signal from the second channel is demuxed and
of SNR = 25 dB for the −80 dBm power level. We mitigated
down-converted by mixer 5 which is driven by PLL2 to BB2.
this problem in our design by routing the LO lines at twice
All major LO routing runs at twice the LO frequency before the
the LO frequency. The measured LO1-to-LO2 isolation is bet-
final division by two which is local to each mixer. Therefore, the
ter than 80 dB, and the 2LO1-to-2LO2 isolation is 60 dB and
inevitable coupling between LO lines results in a spur at twice
limited by the coupling of the LO routing.
the LO frequency separation 2 × (fLO2 − fLO1 ), which creates
3) 3CC: The stress test for the architecture is the 3CC case
weak OOB distortion. This is important because a spur at the
with two harmonically related channels. As shown in Fig. 9,
LO frequency separation (fLO2 − fLO1 ) would down-convert
the first channel at 2.1 GHz is red, the second one at 2.3 GHz
the coupled signals between the two receivers on top of each
is blue, and the third one at 700 MHz is green. The frequency
other at both outputs, limiting the SNR of the victim weaker
of channel one is at three times that of channel three, so they
signal
are harmonically related. The two signals are connected to two
SNRvictim = − (Paggressor − Pvictim ) − PLO,spur
dBc
(1) different mixer groups. The isolation of the demux is better
than 40 dB across the frequency range. The isolation of the off-
where Paggressor is the power of the aggressor in dBm, Pvictim is mixer is more than 60 dB, so the isolation of the direct path
the power of the victim signal in dBm, and PLO,spur
dBc
is the LO is sufficient. The dominant leakage mechanism is through the
spur level in dBc at the LO-port of the mixer. For example, a package and into the RX3 LNA. The FCBGA package was
1070 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

Fig. 11. LNA simplified circuit for noise analysis.

but without cascode devices in [9] yielded a wideband match-

ing that was sensitive to the LNA load impedance, caused by
poor reverse isolation. Moreover, it required more power con-
Fig. 10. LNA schematic (bias not shown). sumption to achieve the same noise performance as the LNA in
[8]. Therefore, we use the complementary topology in Fig. 10
carefully designed to isolate the routing of the LB and MB with the cascode devices to stabilize the input impedance and
LNAs from that of the HB and HRB LNAs. The return paths of enable a low-power low-noise operation in a narrow band. The
the RF currents of the two groups were prudently designed to NMOS devices are biased through a current mirror, while a
meet the isolation requirements. EM simulations of the package common-mode feedback circuit biases the PMOS devices to set
and the PCB showed more than 60 dB of isolation. In addition the output common-mode to midrail. An external LC match-
to the package isolation, the 2.1 GHz leakage is subjected to an ing transforms the LNA input impedance to the desired value.
extra filtering of 20–30 dB by the LNA input and output tuning System simulations and laboratory measurements showed that
and another 10 dB from the mixer. A total of more than 90 dB of noise-matching of the LNA yields better receiver sensitivity.
isolation is enough to bury the coupled signal below the noise For example, when noise-matching the LNA of band 2, which
floor of the RX3. Finally, other secondary leakage mechanisms occupies the 1.93–1.99 GHz frequency band, the noise figure
like substrate and magnetic coupling were difficult to simulate (NF) and sensitivity improve by 0.4 dB for an antenna return
accurately. Instead, common engineering sense was applied to loss (RL) of −7 dB, compared to RL = −12 dB for the power-
maximize isolation and was proven sufficient by measurements matching case. The higher RL does not affect the in-band
in Section IV. ripples of the duplexer and degrade the TX leakage rejection
by less than 1 dB, which has a negligible effect on sensitivity.
III. C IRCUIT D ESIGN AND O PTIMIZATION Although noise-matching helps reduce noise-figure, the LNA
should have a good NF to begin with. To achieve a sub-3 dB
The circuit design of each block in the architecture shown NF LNA, some form of feedback [10], or noise cancellation
in Fig. 6 is essential to achieve the RX target performance. [11], [12] should be used. Noise-cancelling LNAs tend to have
The design objective is to meet the design specifications with higher noise and lower gain compared to their feedback coun-
minimum power and area, while reducing calibration time. terparts because of higher matching network gain in the latter.
The receiver does not require IIP2 calibration, or analog filter The common-source LNA with inductive degeneration is the
response calibration. Only two LNA gain settings are cali- most common feedback LNA in use today. But other feedback
brated, all other gain steps are guaranteed by design. The I/Q topologies like capacitive shunt feedback are also possible. In
correction and dc-offset cancellation are done in digital, similar the simplified LNA circuit in Fig. 11, the NMOS transistor M1
to [5]. In the following sections, the design and optimization of has a shunt feedback between its input and output realized by its
the three main sections of the receiver will be discussed. gate-to-drain capacitance Cgd1 . This feedback creates the real
part of the input impedance, which is necessary for impedance
A. LNA Design matching. The input impedance of the LNA (excluding Cgs )
and the noise factor (F) of the simplified circuit in Fig. 11 under
The LNA provides low-noise amplification of the input sig- power-matching condition are given in [13] as
nal while presenting suitable impedance to the RF filter [6].  
The LNA topology is a complementary capacitive feedback Cp g2
gm 2 + Cgd1 − ωCmgd1 + ω (Cp + Cgd1 )
with cascode devices (Fig. 10). The use of both NMOS and Zin  2 −j 2 (2)
PMOS devices increases the gain by close to 2x for the same |gm + jωCgd1 | |gm + jωCgd1 |
current. The LNA topology is an evolution of the design in [7], γ
F ≈1+ Cp
(3)
where a degeneration inductor is used for matching. In [8], we 1 + 2Cgd1
realized that the degeneration inductor is playing a minor role
in matching and that removing it results in area saving with- where gm is the transconductance of both the input and the
out performance penalty. A similar inverter-based LNA design cascode device, γ is the NMOS channel thermal noise factor,
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1071

and Cp is the total capacitance at the drain of M1 and

includes the following capacitances: 1) gate-to-source of M2;
2) drain-to-bulk of M1; 3) source-to-bulk of M2 in addition to
other routing and parasitic capacitances. For a typical device in
Cp
40 nm, the value of the ratio Cgd1 is greater than 4 and the value
of γ  0.8 yields an LNA NF of less than 1 dB for a complete
complementary design with bias and cascode devices. The NF
goes up to 1.5–1.8 dB, depending on the frequency, when the
Fig. 12. Simplified LNA load circuit model for analysis.
losses of the package, matching network, and PCB are included.
The effect of those losses is more prominent here because the
LNA input impedance is mostly reactive and lies on a large |Γ| and circulates in the inductor and capacitor. This current gain
circle on the Smith chart [14], in the range 0.7–0.85. During is maximized when the reactance of the capacitor Cmix is the
the design phase, the LNA is optimized with package, PCB, geometrical mean of the two resistors Rin and RL [15]
and matching components models. If the external loss starts to 
XCmix ,opt = RL Rin . (4)
dominate the NF, the channel length of the input device and the
cascode device are increased to boost the real part of the input The resistor RL is typically limited by the loss of the inductor
impedance and thus reduce the contribution of external loss. and therefore can be expressed as
In the laboratory, a source-pull measurement is performed on
each LNA port to find the optimal matching components. With R L = QL ωo L (5)
proper modeling, the simulation and measurement results are
typically close. where QL is the quality factor of the inductor and ωo is the tank
The linearity of the LNA is dominated by the input N and P resonance frequency. From (4) and (5), the capacitance Cmix can
devices. The drain-to-source bias voltage of the input devices be written in the form
should be kept at or above 400 mV per device to achieve 1
IIP3 ≥ +1 dBm, which is why the LNA runs from a 1.4 V sup- Cmix = √ . (6)
ωo Rin QL ωo L
ply generated by an internal LDO shared among all LNAs. The
differential LNA draws 5 mA from the 1.4 V supply. The LNA On the other hand, at resonance, the inductor will resonate
is built from 24 units that are used for gain control and to adjust with the sum of Ct and the net capacitance of the series branch
for band-to-band gain variations. formed by Cmix and Rin
1
L(Ct + Cmix,net ) = (7)
B. LNA Load Design and Optimization ωo2
The multiband support is achieved in our receiver by con- the net capacitance is given by
necting the outputs of the LNAs together and using one dif-
ferential inductor to resonate with the total capacitance. A Q2mix
Cmix,net = Cmix 2 (8)
dc-blocking capacitor is used after the tank to ensure that mixer Qmix + 1
switches are operating in triode region and thus the mixer is pas-
sive. It has been shown in [15] that the value of this capacitor where Qmix is the quality factor of the impedance formed by
Cmix can be adjusted to achieve passive gain from the tank. In Cmix and Rin defined as
older designs, the capacitor was sized large enough to appear  2
2 XCmix ,opt RL
as an RF short circuit. We have found that maximizing the Qmix = = (9)
gain from Cmix degrades the mixer IIP2 by reducing the RF Rin Rin
source impedance driving the mixer. In the following section, and since for most practical cases RL >> Rin , then Q2mix >> 1,
we will derive an expression for the RF source impedance under and thus from (8): Cmix,net  Cmix . Therefore, we can rewrite
maximum gain condition. (7) as follows:
1) RF Source Impedance Under Maximum Gain Condition:
To understand the tradeoff on the value of Cmix , the simplified 1
L(Ct + Cmix )  . (10)
LNA load circuit in Fig. 12 is analyzed. The LNA is mod- ωo2
eled with a transconductor Gm,RF , and the resistor RL models
the output resistance of the LNA and the loss of the inductor. Now, we have two equations: (6) and (10) in two unknowns:
The inductor L represents the tank inductor, and the capacitor L and Cmix . The values of L and Cmix are function of Rin , the
Ct represents the total capacitance including the LNA out- resonance frequency, and the quality factor of the inductor. If
put capacitance and other tuning and parasitic capacitors. The we solve (6) and (10) for Cmix , we obtain
total input resistance looking into the mixer is Rin = Rsw + √
1 + 1 + 4Rin QL ωo Ct
2
π 2 RTIA , where Rsw represents the mixer switch ON -resistance
Cmix = . (11)
2Rin QL ωo
and RTIA is TIA input resistance [15]. From basic RLC circuit
theory [16], the current applied to a shunt RLC resonant cir- In the case of multiband operation where multiple LNAs are
cuit is amplified at resonance by the quality factor of the tank connected to the same tank and contribute to Ct , the second
1072 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

Fig. 13. Simultaneous shunt and series resonances from the two ends of the
LNA load.

term under the square root is 4Rin QL ωo Ct >> 1, and Cmix can
be simplified in the form
Fig. 14. Calculated values of ZS and Cmix compared to simulations.

1 Ct
Cmix = + . (12)
2Rin QL ωo Rin QL ωo maximum gain. To validate the analysis, the calculated values
of Cmix and ZS from (11) and (16) are plotted versus simula-
From (12), it is clear that the optimal value for Cmix is
tions in Fig. 14. It is clear that the derived equations are accurate
inversely proportional to Rin and that for large LNA output
over wide range of mixer input resistance. In the next section,
capacitance Ct , the value of Cmix is also larger. Moreover, since
we will use the results of the analysis to find a good compromise
L and Cmix are related by (10), the value of L will monotonically
between NF and IIP2 in an optimal design.
increase with Rin .
2) LNA Load Optimization for IIP2: The mixer IIP2 is
So far, we have analyzed the circuit in Fig. 12 to examine
maximized when the equivalent RF source impedance driving
the dependence of the optimal values of L and Cmix on the
the mixer is also maximized as stated in [17]–[19]. The effect of
input resistance Rin . At this point, it is useful to examine the
source impedance on mixer linearity can be intuitively under-
LNA load circuit from the two directions in Fig. 13. There
stood by realizing that a nonlinear resistor, representing the
are two concurrent resonances occurring at the same time: the
mixer switch resistance, in series with an ideal current source
well-known and understood shunt resonance, and a subtle series
does not create nonlinear components because KCL has to be
resonance in the opposite direction as shown in Fig. 13(b). Like
satisfied for all harmonics and the ideal current source has no
any series resonance, the impedance ZS is minimized at reso-
harmonic components. In contrast, when the current source has
nance. As we have proved above that Cmix,net  Cmix , then in
a finite source resistance, the value of the nonlinear resistor is a
both resonances, the same inductor and capacitors are involved.
part of the current transfer function to the output and therefore
Therefore, the resonance frequencies are very close for both
the output current will have nonlinear components.
shunt and series resonances
Now that the tradeoff on the value of Cmix is clear, the

RL designer has one of the following paths to follow: first to use a
ωseries  ωo  ωo . (13) large Cmix and lose the resonance gain which could mean higher
RL + Rin
power consumption in the LNA to get the same gain. Second,
The effective resistance of the series resonance is determined one might choose to maximize the current gain by using the
from the tank components RL , L, and Ct because Cmix is optimal Cmix and rely on IIP2 calibration to meet the speci-
assumed lossless. At resonance, the inductance L and capaci- fications [20]. The IIP2 calibration is now mature enough for
tance Ct will have an effective inductance Leff that resonates production, but it adds to the factory calibration time which
with the capacitance Cmix increases the chip cost. Moreover, for our architecture with six
1 mixers and various LNA/mixer combinations, the number of
ωo Leff = . (14) calibration points could become prohibitively large. Finally, we
ωo Cmix
chose the third path which is to use a CG TIA with moderate
The quality factor of the tank can be written in the form input impedance to increase the RF source impedance ZS and
 to make the mixer nonlinear switch resistance a smaller part of
RL RL Rin . This way we could meet the IIP2 requirement without cal-
Qt = = RL ωo Cmix = . (15)
ωo Leff Rin ibration. As for Cmix , it is optimized for maximum gain, which
is now lower because of higher RTIA , but still is 3–5 dB higher
Therefore, the source resistance of the series resonance is
than the large Cmix case.
given by
As an example of the effect of LNA load tuning on receiver
RL RL Rin performance, the measured gain and NF in response to a two-
Zs (ωo ) = = (16)
Q2t + 1 RL + Rin dimensional (2-D) capacitors sweep of Ct and Cmix are shown
= Rin  RL  Rin . (17) in Fig. 15, and the measured receiver IIP2 in Fig. 16. The mea-
surements are for band 3 at 1.85 GHz. It is evident from the
In other words, the source impedance driving the mixer is measurement that the optimal gain and NF are achieved for
always equal to Rin for an LNA load, optimally designed for the same Cmix setting, while the optimal IIP2 is achieved when
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1073

Fig. 17. Current-mode CG TIA.

Fig. 15. Measured NF and gain for a 2-D capacitance sweep of Ct and
Cmix .

both common-mode and differential blockers. The single-ended

capacitors are implemented using PMOS devices, while the dif-
ferential capacitors are MOM physically placed on top of the
single-ended ones. As explained in Section III-B, the pole P0
plays a major role in meeting the receiver linearity targets. For
3G and LTE, the impedance of the capacitor C0 is designed to
be low enough at the TX-leakage blocker frequency to limit the
blocker swing and reject its current. The cutoff frequency of
P0 is programmable from 8.5 to 40 MHz. The 8.5 MHz setting
is used for 2G, 3G, and LTE up to 10 MHz. The pole is set
to 11 MHz for LTE 20 MHz channel and equivalent CA sce-
narios. The pole cutoff frequency increases for wider channel
bandwidth until it reaches 40 MHz for contiguous 3CC CA.
The TIA is a CG-TIA topology as shown in Fig. 17. It has
many advantages over the more popular operation amplifier-
based TIA (OA-TIA). First, the TIA input impedance is set by
1/gm of the input device which is on the order of 100 Ω and is
constant over wide frequency range, unlike the OA-TIA where
the input impedance is typically around 10 Ω and is set by the
Fig. 16. Measured receiver IIP2 for a 2-D sweep of Ct and Cmix .
frequency-dependent loop gain. This means that in the case of
a close-in strong blocker like TX-leakage, the blocker current
Cmix is maximized. The optimal LNA load setting is found for coming out of the mixer will mostly circulate in capacitor C0
each band from the 2-D capacitors sweep to meet both IIP2 and for the CG-TIA leaving only small fraction of the blocker cur-
NF specifications. This optimization is done once in the labo- rent going to the TIA. This enables a low current design, which
ratory and the same settings are used for all chips over all PVT is about 1 mA for the differential CG-TIA in Fig. 17. On the
conditions. other hand, in an OA-TIA, the low input impedance is realized
Therefore, in our design with proper choice of the value of using feedback, so the OA has to provide the blocker current at
Cmix and sizing of the mixer switches the IIP2 of the mixer and the output to cancel the incoming blocker current at the input.
consequently the receiver meets the target spec of +52 dBm This typically sets the power consumption in the output stage of
without calibration. As for IIP3, the passive mixer is typically the OA, while noise and stability sets the current consumption
not the bottleneck. The in-band IIP3 of the receiver is set by the of the input stage, making a low-power OA design challenging.
linearity of the baseband circuits, which is the input of the TIA Moreover, the CG-TIA, being a feedforward circuit, can handle
in our architecture. The OOB IIP3 is limited by the IIP3 of the a wide range of input signal bandwidths without a problem. In
LNA and the input of the TIA. That is why the cutoff frequency fact, we keep the CG-TIA bias current the same over all modes
of the pole P0, in Fig. 6, has to be properly set to attenuate the and channel bandwidths.
blockers sufficiently before the TIA and thus eliminate any TIA The second advantage of the CG-TIA is the ability to imple-
contribution to OOB IIP3. ment a wide range of accurate gain control using current
steering as explained in [7]. In this design, the TIA has a pro-
grammable attenuation range of 24 dB in steps of 3 dB with
C. Analog Baseband Circuit Design
a step accuracy of 0.2 dB. This wide range of gain control
The baseband section starts with the real pole P0 formed comes at no additional area penalty because it does not affect
by the capacitor C0 and the equivalent parallel resistance of the output pole P1. Gain back-off in OA-TIA can only be
the TIA input impedance and the source impedance look- achieved by reducing the feedback resistance which requires
ing into the mixer. The capacitor C0 is implemented as a a similar increase in the feedback capacitance to keep the pole
mix of single-ended and differential capacitors to attenuate frequency intact as shown in Fig. 18. The third benefit of using
1074 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

Fig. 18. Two common TIA topologies.

Fig. 19. Die photo.

TABLE I
S UMMARY OF M EASUREMENT R ESULTS
the CG-TIA is the area saving achieved by using one differential
capacitor at the output instead of two single-end capacitors in
the OA-TIA. This is 4× areas saving in the output capacitor C1
which typically dominates the area of the TIA to support the
280 KHz pole for 2G mode.
Despite its advantages, there are two main challenges in the
design of the CG-TIA. First, the voltage headroom is tight
because many devices are stacked. That is why the TIA runs
∗ No IIP2 or filter response calibration is needed.
from a 1.5 V supply. Second, the large-signal noise perfor-
∗∗ DG09 battery current includes RX, PLL, LO, DCXO, and
mance of the TIA is dominated by the bias and supply noise.
bias circuits.
This issue is particularly challenging for a 3 MHz GSM blocker
because it does not experience any filtering in P0. The large TABLE II
differential blocker swing at the internal nodes of the CG-TIA SNR M EASUREMENT FOR 3CC C ASE
pushes the devices on one side out of saturation, and con-
verts the common-mode bias and supply noise into differential
noise at the output. To alleviate this issue, all bias circuits were
carefully designed to minimize the common-mode noise, and
the headroom on each transistor in the CG stack was adjusted
to tolerate maximum blocker swing. It should be noted that for
all 3G and 4G blockers, the CG-TIA does not suffer from any
blocker swing limitations because of the filtering from P0. At
the output of the TIA in Fig. 17, the output current is filtered
with a tight RC pole implemented using C1 and R1. Resistor
R1 has 30 dB of gain control with 1 dB step using resistor
ladder current steering. The output current of R1 goes to the IV. M EASUREMENT R ESULTS
virtual ground at the input of the BQ stage. The BQ is a conven- To validate the architecture and circuits, a prototype chip was
tional Tow–Thomas design [21], with low-power operational fabricated in 40 nm low power digital process. The receiver
amplifiers. It is bypassed in 2G and 3G modes because of suffi- occupies an area of 7.8 mm2 for 32 LNAs, 8 LNA loads, and 3
cient dynamic range in the ADC [4]. The BQ adds two complex complete basebands (Fig. 19). The three PLLs are shown in the
conjugate poles to form a cascaded transfer function of a third- right side of the photo, and occupy 3.5 mm2 .
order Chebyshev filter, in addition to P0. The filter response A summary of key measured results is shown in Table I. The
does not need the typical dedicated cutoff frequency calibra- measured NF is 2.1 dB in LB and 2.5 dB in HB. The OOB IIP2
tion. The capacitors used in P1 and the BQ are replicas of a is +55 dBm without calibration. The OOB IIP3 is +1 dBm.
unit capacitor calibrated with a unit resistor against the crystal The 2G 3 MHz blocker NF meets the requirements with 6 dB
oscillator clock. This RC calibration is done every time the chip margin. The peak SNR is 41 dB in LB and 38 dB in HB. The
starts up and is not a factory calibration and does not add to the receiver consumes a DG09 battery current of 13.7 mA for 3G
testing cost. The 3–5% residual error of the RC calibration is and 17.6 mA for LTE including RX, PLL, LO, DCXO, and bias
more than enough for the LTE case because the OFDM demod- circuits. For the 3CC case with two harmonically related chan-
ulator can tolerate large in band ripples. As for 3G, the group nels, the measurement conditions and the measured SNR are
delay requirements for the HSPA+ mode is more challenging, summarized in Table II. The SNR is estimated from the EVM
but since in 3G mode the BQ is bypassed and the analog filter of the modulated signals. The measured EVM of the aggressor
is reduced to a simple real pole, the target group delay is met signal, at the output of the receiver, is shown in Fig. 20, and
over process and temperature. the EVM of the victim channel at 717 MHz is given in Fig. 21.
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1075

Fig. 20. Measured EVM of the aggressor channel.

Fig. 21. Measured EVM of the victim channel.

1076 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

The EVM of the source is 0.63%. The EVM of the victim chan- [16] C. A. Desoer and E. S. Kuh, Basic Circuit Theory. New York, NY, USA:
nel remains almost the same with and without the aggressor, McGraw-Hill, 2009.
[17] H. Khatri, P. Gudem, and L. Larson, “Distortion in current commutating
even when the aggressor is at −25 dBm which is the maximum passive CMOS downconversion mixers,” IEEE Trans. Microw. Theory
allowed level by the standard. This verifies the architectural and Techn., vol. 57, no. 11, pp. 2671–2681, Nov. 2009.
circuit choices made in this prototype. [18] D. Manstretta, M. Brandolini, and F. Svelto, “Second-order intermod-
ulation mechanisms in CMOS downconverters,” IEEE J. Solid-State
Circuits, vol. 38, no. 3, pp. 394–406, Mar. 2003.
[19] M. Brandolini, P. Rossi, D. Sanzogni, and F. Svelto, “A +78 dBm
V. C ONCLUSION IIP2 CMOS direct downconversion mixer for fully integrated UMTS
receivers,” IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 552–559, Mar.
In conclusion, an LTE-advanced Rel-12 Cat6 3CC CA capa- 2006.
ble receiver was presented. A capacitive-feedback LNA enables [20] K. Dufrene, Z. Boos, and R. Weigel, “Digital adaptive IIP2 calibration
the sharing of RF filters for intra-band CA without external scheme for CMOS downconversion mixers,” IEEE J. Solid-State Circuits,
vol. 43, no. 11, pp. 2434–2445, Nov. 2008.
splitters or LNAs. An RF multiplexing scheme with two mixer [21] R. Schaumann, Design of Analog Filters. London, U.K.: Oxford Univ.
groups was verified by measurement for the reception of three Press, 2001.
harmonically related channels without performance degrada-
tion. The prototype chip in 40 nm meets all the requirements Mohyee Mikhemar (M’99–SM’14) received the
B.S. and M.S. degrees (hons.) in electrical engi-
while consuming 13.7 mA for 3G and 17.6 mA for LTE. neering from Ain Shams University, Cairo, Egypt,
and the Ph.D. degree in electrical engineering from
University of California, Los Angeles (UCLA), CA,
ACKNOWLEDGMENT USA, in 2009.
Currently, he is a Senior Principal Scientist
The authors would like to thank Dr. A. Mirzaei and with the RF Group, Broadcom Corporation, Irvine,
Dr. D. Murphy from Broadcom for many useful discussions. CA, USA, working on the design of the next-
generation low power and multiband radios. He has
50 issued/pending patent applications in the field of
RF-CMOS design.
R EFERENCES Dr. Mikhemar is a member of the TPC of the IEEE RFIC Symposium. He
was the recipient of the 2013 CICC Best Invited Paper Award, the 2012 JSSCC
[1] D. Kaczman et al., “A single-chip 10-band WCDMA/HSDPA 4-band
Best Paper Award, the 2012 Jack Kilby Award for Outstanding Student Paper at
GSM/EDGE SAW-less CMOS receiver with DigRF 3G interface and
+90 dBm IIP2,” IEEE J. Solid-State Circuits, vol. 44, no. 3, pp. 718–739, ISSCC, and the Distinguished Technical Paper Award from the ISSCC in 2012.
Mar. 2009.
[2] J. Weldon et al., “A 1.75-GHz highly integrated narrow-band CMOS Masoud Kahrizi (SM’06) received the B.Sc. degree
transmitter with harmonic-rejection mixers,” IEEE J. Solid-State Circuits, from Isfahan University of Technology, Isfahan, Iran,
vol. 36, no. 12, pp. 2003–2015, Dec. 2001. the M.Sc. degree from the University of Tehran,
[3] Z. Ru, E. Klumperink, and B. Nauta, “A discrete-time mixing receiver Tehran, Iran, and the Ph.D. degree from Syracuse
architecture with wideband harmonic rejection,” in IEEE Int. Solid-State University, Syracuse, NY, USA, all in electrical
Circuits Conf. (ISSCC) Dig. Tech. Papers, 2008, pp. 322–616. engineering.
[4] S. Loeda, J. Harrison, F. Pourchet, and A. Adams, “A 10/20/30/40 MHz He served as an Associate Professor with Tarbiat
feed-forward FIR DAC continuous-time ΔΣ ADC with robust blocker Modares University, Tehran, Iran, and is currently
performance for radio receivers,” in Proc. Symp. VLSI Circuits, 2015, an Associate Technical Director with Broadcom
pp. C262–C263. Corporation, Irvine, CA, USA. He has been the Radio
[5] I. Elahi, K. Muhammad, and P. Balsara, “I/Q mismatch compensation System Architect and RF System Lead for multi-
using adaptive decorrelation in a low-IF receiver in 90-nm CMOS pro- ple chips including 2G, 3G, 4G, and 802.11ad standards. He has filed more
cess,” IEEE J. Solid-State Circuits, vol. 41, no. 2, pp. 395–404, Feb. than 25 patents and has authored or coauthored more than 35 publications in
2006. the area of wireless communications. His research interests include wireless
[6] B. Razavi, RF Microelectronics, 2nd ed. Englewood Cliffs, NJ, USA: communication, RF system, antenna, and high-frequency design in mmWave.
Prentice Hall, 2011, vol. 1.
[7] M. Mikhemar, A. Mirzaei, A. Hadji-Abdolhamid, J. Chiu, and H. Darabi, John C. Leete received the B.S. degree in elec-
“A 13.5 mA sub-2.5 dB NF multi-band receiver,” in Proc. IEEE Symp. trical engineering from the North Carolina State
VLSI Circuits, 2012, pp. 82–83. University, Raleigh, NC, USA, in 1995, and the M.S.
[8] A. Mirzaei, M. Mikhemar, D. Murphy, and H. Darabi, “A 2 dB NF degree in electrical engineering from the University
receiver with 10 mA battery current suitable for coexistence applica- of California, Los Angeles, CA, USA, in 1999.
tions,” IEEE J. Solid-State Circuits, vol. 49, no. 4, pp. 972–983, Apr. He is currently with Broadcom Corporation, Irvine,
2014. CA, USA. His research interests include CMOS RF
[9] M. Mikhemar, D. Murphy, A. Mirzaei, and H. Darabi, “A cancellation transceiver design.
technique for reciprocal-mixing caused by phase noise and spurs,” IEEE
J. Solid-State Circuits, vol. 48, no. 12, pp. 3080–3089, Dec. 2013.
[10] T. Lee, The Design of CMOS Radio-Frequency Integrated Circuits.
Cambridge, U.K.: Cambridge Univ. Press, 2004.
[11] F. Bruccoleri, E. Klumperink, and B. Nauta, “Wide-band CMOS low- Bernd Pregardier (M’08) received the M.S. and
noise amplifier exploiting thermal noise canceling,” IEEE J. Solid-State Ph.D. degrees in electrical engineering from the
Circuits, vol. 39, no. 2, pp. 275–282, Feb. 2004. Ruhr-University Bochum, Bochum, Germany, in
[12] S. Chehrazi, A. Mirzaei, R. Bagheri, and A. Abidi, “A 6.5 GHz wideband 1990 and 1996, respectively.
CMOS low noise amplifier for multi-band use,” in Proc. IEEE Custom During his career, he worked in various companies
Integr. Circuits Conf., 2005, pp. 801–804. on RFIC design for wireless communications. He was
[13] H. Darabi, Radio Frequency Integrated Circuits and Systems. Cambridge, with Broadcom Corp., Irvine, CA, USA, from 2010
U.K.: Cambridge Univ. Press, 2015. to 2014. In October 2014, he joined Ethertronics,
[14] D. M. Pozar, Microwave Engineering. Hoboken, NJ, USA: Wiley, 2005. San Diego, CA, USA, which specializes in active
[15] A. Mirzaei, H. Darabi, J. C. Leete, and Y. Chang, “Analysis and optimiza- antenna systems, where he leads an RFIC Design
tion of direct-conversion receivers with 25% duty-cycle current-driven Team for active antenna applications. His research
passive mixers,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 57, no. 9, interests include RF design in SOI technologies, RF FEMs, and active antenna
p. 2523–2366, Sep. 2010. systems.
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1077

Nooshin Vakilian received the M.S. degree in elec- Janice Chiu received the B.S. degree in electrical
trical engineering from the University of Southern engineering from National Taiwan University, Taipei,
California, Los Angeles, CA, USA, in 1996. Taiwan, in 1997 and the M.S. degree in electrical
From 1993 to 1996, she was an RF Engineer engineering from the University of California, Los
with M/A-COM Power Hybrids Inc., Lowell, MA, Angeles, CA, USA, in 1999.
USA, responsible for the development of high power From 1999 to 2000, she was with Raytheon, El
RF amplifiers for base station cellular applications. Segundo, CA, USA. Since 2000, she has been with
From 1996 to 2009, she was an RF System Engineer Broadcom Corporation, Irvine, CA, USA, where she
with Rockwell Semiconductor, which spun off to is currently an Associate Technical Director. Her
Conexant Systems and later to Skyworks Solutions. research interests include analog and RFIC design
She was responsible for RF system design and devel- for wireless communications; Broadcom’s wireless
opment of multiple cellular standards such as GSM, Edge, and WCDMA. Since connectivity combo chips and cellular projects in the past few years.
2009, she has been with Broadcom Corporation, Irvine, CA, USA, where she
has worked as Principal System Engineer and System Lead for 2G/3G/LTE cel-
lular transceivers. She is currently a Senior Principal System Engineer, working
on the development of 60 GHz wireless applications. Behzad Saeidi received the B.Sc. and M.Sc. degrees
in electrical engineering from Amirkabir University
of Technology (Tehran Polytechnic), Tehran, Iran,
and Sharif University of Technology, Tehran, Iran, in
1995 and 1997, respectively.
In 1997, he joined Valence Semiconductor, Irvine,
Amir Hadji-Abdolhamid (M’04) received the B.Sc. CA, USA. His employments also include Globepsan
and M.Sc. degrees in electrical engineering from the Virata, Red Bank, NJ, USA, Conexant Systems,
University of Tehran, Tehran, Iran, and the Ph.D. Irvine, CA, USA, Skyworks Solutions, Woburn, MA,
degree in electrical engineering from the University USA, Marvell Semiconductor, Hamilton, Bermuda,
of Toronto, Toronto, ON, Canada, in 1990, 1995, and and Broadcom, Irvine, CA, USA. He has authored
2004, respectively. several IEEE papers of his designs. His research interests include analog,
He was with Cirrus Logic Inc., Austin, TX, USA, mixed-signal, RF, and microwave circuit designs for various communication
from 2004 to 2005, and then he was with Broadcom systems.
Corporation, Irvine, CA, USA, as a Sr. Principal
Scientist, from 2005 to 2013. He is currently a Sr.
Principal MS/RFIC Team Member with MaxLinear
Co., Carlsbad, CA, USA. His research interests include mixed analog and RF Gerasimos Theodoratos received the Diploma and
circuit and system design, transceivers, data converters, filters, and high-speed Ph.D. degrees in electrical engineering from the
serial data interfaces. National Technical University of Athens, Athens,
Greece, in 2001 and 2007, respectively.
From 2007 to 2010, he was with Theon Sensors
S.A., Athens, Greece, designing integrated signal
conditioning electronics for MEMS sensors. From
2011 to 2015, he was with Broadcom Corporation,
Morteza Vadipour received the B.Sc. degree Irvine, CA, USA, working on RFICs for cellular and
in electrical engineering from Sharif University Wi-Fi applications. In 2015, he co-founded Adveos
of Technology, Tehran, Iran, in 1989, and the P.C., Greece, designing ICs for RF/mmWave and
M.Sc. degree in electrical engineering from Tehran sensor applications.
University, Tehran, Iran, in 1990.
From 1990 to 1992, he was with RADAR Lab,
Tehran Polytechnic University, Tehran, Iran. In 1993,
he was with ITRC, Tehran, Iran, designing communi- Med Nariman received the B.S. degree in electrical
cation circuitry. From 1993 to 1996, he was with ZAG engineering and electronics from Sharif University
Co., Tehran, Iran, as a Co-Founder, designing vari- of Technology, Tehran, Iran, in 1997, and the M.S.
ous instrumentation equipment. From 1996 to 1997, degree in electrical engineering from the University
he was with Hughes Communication Products, Torrance, CA, USA, design- of Southern California, Los Angeles, CA, USA.
ing high-speed data converters. In 1997, he joined Teradyne, Agoura Hills, CA, Since May 2000, he worked as an RFIC Design
USA, designing high-speed pin electronics for ATE business. In 2002, he joined Engineer and Lead in different companies and on
Sierra Monolithics, Redondo Beach, CA, USA, designing high-speed analog different wireless transceivers products including
and RF circuits. Since 2006, he has been with Broadcom Corporation, Irvine, cellular, WiGig, WLAN, Bluetooth, FM, ZigBee,
CA, USA, working on cellular and RF circuits. His research interests include FRS, UWB, and GPS. He worked with Valence
analog and RF circuits and systems. Semiconductor Inc., Irvine, CA, USA, from May
2000 to April 2003, as a Senior Staff RFIC Design Engineer. He was an RFIC
Group Lead at Jaalaa Inc., San Diego, CA, USA, from May 2003 to October
2004, where he led the design of the new generation of single-chip triple-
band transceiver for wireless PC peripherals. He started two IC design teams
in Irvine, CA, USA, and Kuala Lumpur, Malaysia, for the company. He was
Peihua Ye received the B.S. degree from Nanjing a Principal Staff RFIC Design Engineer with Broadcom Corporation, Irvine,
University of Science and Technology, Nanjing, CA, USA, from October 2004 to December 2013, where he was part of the
China, in 1983, the M.S. degree from Science design of several very high volume wireless connectivity and cellular products.
Academy of China, Beijing, China, in 1986, and the Since January 2014, he has been working as a Senior Staff Engineer with the
Ph.D. degree from Arizona State University, Tempe, RFIC Department, Qualcomm Inc., San Diego, CA, USA, as a Member of the
AZ, USA, in 1995, all in electrical engineering. Analog/RF Team, which designs multimode multiband cellular transceivers in
In 1995, he joined National Semiconductor, CMOS technology. He has authored and coauthored several technical papers in
Coppell, TX, USA, where he was engaged in non- IEEE journals and conferences and is the patent holder for a number of radio
volatile memory development. In 1998, he joined frequency integrated circuit design inventions.
Rockwell Semiconductor, CA, USA (Conexant and Mr. Nariman was a Technical Committee Member of the IEEE International
Skyworks Solutions), where he was engaged in wire- Millennium Seminar in Electrical Engineering (IMSEE), which was held in
less RFIC designs. In 2006, he joined BECEEM, Santa Clara, CA, USA, Tehran, Iran, in March 2000. He was the recipient of the Teaching Assistantship
(acquired by BROADCOM in 2010), where he was engaged in WiMAX and Award for ten different courses and laboratories at Sharif University and USC
LTE RFIC designs. He is currently with Skyworks Solutions doing wireless from September 1997 to December 2000. He was a Finalist of the Nation-Wide
FEM and RFIC designs. Mathematics Olympiad in 1993.
1078 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 5, MAY 2016

Yuyu Chang received the B.S. degree in electronics Paul Mudge received the B.S. and M.S. degrees
engineering from Chung Yuan University, Taoyuan, (hons.) in electrical engineering from the University
Taiwan, and the Ph.D. degree in electrical engineer- of California, Santa Barbara, CA, USA, in 1998 and
ing from the University of Southern California, Los 1999, respectively, and the MBA degree from the
Angeles, CA, USA, in 1992 and 2002, respectively. University of California, Irvine, CA, USA.
After graduation, he joined Advanced Design, Intel From 2000 to 2004, he was with Skyworks
Corporation, Hillsboro, OR, USA. Since 2005, he Solutions (formerly Conexant Systems, Irvine, CA,
has been with Broadcom Corporation, Irvine, CA, USA), Newport Beach, CA, USA, where he worked
USA. He has been involved in various RF and analog on 2G/3G cellular transceivers. From 2004 to 2010,
transceiver circuit designs for cellular 2G/3G/LTE/ he was with Beceem Communications (acquired by
LTE-Advanced and WLAN applications. Broadcom) focusing on RFICs for WiMAX and LTE.
Since 2010, he has been working on RF transceivers in the Mobile and Wireless
Group, Broadcom, Irvine, CA, USA.

Behnam Mohammadi received the B.S. and M.S.

Zhimin Zhou received the B.S. degree in electrical
degrees in electrical engineering from the University
engineering from Beijing University, Beijing, China,
of Toronto, Toronto, ON, Canada, in 2000 and 2003, the M.S. degree in physics from the University of
respectively.
Pennsylvania, Philadelphia, PA, USA, and the Ph.D.
He is currently a Senior Principal Engineer with
degree in electrical engineering from the University
Broadcom Corporation, Irvine, CA, USA, where he
of California, Los Angeles (UCLA), Los Angeles,
has held key design and lead roles on multiple wire- CA, USA, in 1997.
less products. His interests include analog and RF IC
He has been with Broadcom, Irvine, CA,
design for wireless communication.
USA, since June 2000, and is currently a Senior
Engineering Manager with the RFIC Design. Prior to
Broadcom, he has been a Co-Founder, Engineering
Manager, and Director with PixArt Technology, Fremont, CA, USA, from
April 1997 to May 2000. He was a Research Scientist with the Jet Propulsion
Laboratory, Pasadena, CA, USA, from December 1993 to 1997. He has exten-
Farzad Etemadi received the B.Sc. degree from
Sharif University of Technology, Tehran, Iran, and sive experience in research and product development in the fields of RFIC,
analog and mixed-signal IC, and CMOS imaging technology.
the M.Sc. and Ph.D. degrees from the University
of California, Irvine, CA, USA, in 1991, 1998, and
2007, respectively, all in electrical engineering.
From 1998 to 2002, he was with Broadcom Ning Liu received the B.E. and M.E. degrees in
Corporation, Irvine, CA, USA, involved in the design communication engineering from Xidian University,
of broadband digital transceivers for cable setup box, Xi’an, China, in 2000 and 2003, respectively, and
cable modem, and satellite applications. Since 2007, the Ph.D. degree in electrical engineering from the
he has been working as DSP System Designer of University of California, Riverside, CA, USA, in
2G/3G/LTE cellular and wireless connectivity chips 2010.
at the Mobile and Connectivity Groups of Broadcom. From 2003 to 2006, he was a System Engineer
with Datang Mobile Communications Equipment
Company, Beijing, China. He is currently a Software
Systems Scientist with Broadcom Corporation,
Irvine, CA, USA.
Behzad Nourani received the B.Sc. and M.Sc.
degrees from Sharif University of Technology,
Tehran, Iran, in 1997 and 2000, respectively, and
the Ph.D. degree from the University of Waterloo, Claire Guan received the B.S. degree in engineer-
Waterloo, ON, Canada, in 2009, all in electrical ing from Tongji University, Shanghai, China, the
engineering. M.S. degree in physical chemistry from the Chinese
He held different startup positions from 2000 to Academy of Science, Beijing, China, and Ph.D.
2005 working on 802.11a and power-line communi- degree in engineering from the University of Irvine,
cations. From 2009 to 2011, he worked with Nortel Irvine, CA, USA. She is now with the Mobile and
Networks, NC, on long haul fiber optic transceivers. Wireless Group, Broadcom, Irvine, CA, USA, as an
In 2011, he joined Broadcom, Irvine, CA, USA, and RF System Engineer.
has been involved in a number of projects including LTE and 802.11ad
modems. His research interests include information theory, communication
system design, and channel coding.

Kevin Juan received the B.S. degree in electri-

Alireza Tarighat received the B.Sc. degree in cal engineering from the National Cheng Kung
electrical engineering from Sharif University of University, Taiwan, in 1988, and the M.S. degree in
Technology, Tehran, Iran, in 1998, and the M.Sc. electrical engineering from the University of Texas at
and Ph.D. degrees in electrical engineering from the Austin, TX, USA, in 1996.
University of California, Los Angeles (UCLA), CA, He held various engineering positions with
USA, in 2001 and 2005, respectively. Raytheon Systems (formerly Texas Instruments),
From 2001 to 2002, he was with Innovics Wireless, Telaxis Communications (formerly Millitech), in the
Los Angeles, CA, USA, where he worked on sys- development area of Local Multi-point Distribution
tem and ASIC development of 3G WCDMA modem. Systems (LMDS), and Skyworks Solutions (formerly
From 2005 to 2009, he was with WiLinx, Los part of Conexant) in the area of cellular transceiver
Angeles, CA, USA, working on systems and ASIC development. He is currently a Senior Principal Systems Engineer with
development of UWB PHY. Since 2009, he has been with Mobile and Wireless Broadcom Corporation, Irvine, CA, USA. His research interests include RF
Group, Broadcom, Irvine, CA, USA. IC system design for cellular and wireless communications.
MIKHEMAR et al.: REL-12 2G/3G/LTE-ADVANCED 3CC CELLULAR RECEIVER 1079

Rahul Magoon (M’98–SM’10) received the B.Tech. Ahmadreza (Reza) Rofougaran (F’10) received the
degree in electrical engineering from the Indian B.S.E.E., M.S.E.E. and Ph.D. degrees in electrical
Institute of Technology, Bombay, India, in 1995, and engineering from UCLA in 1986, 1988, and 1998,
the M.S. degree in electrical engineering from the respectively.
University of California, Santa Barbara, CA, USA, in He joined Broadcom, Irvine, CA, USA, in July
1997. 2000, through Innovent System’s acquisition, which
From 1997 to 2002, he was with Rockwell he founded in 1999. Since the acquisition of his com-
Semiconductor Systems, Conexant Systems, and pany by Broadcom in 2000, he has been in charge of
Skyworks Solutions, where he was responsible for all RF CMOS radios for all Broadcom wireless and
the GSM RF transceiver design team and develop- cellular. He has led Broadcom to be among the top
ment activities. From 2002 to 2009, he was with the market share holders in both Bluetooth and WLAN.
venture-backed start-up company, Axiom Microdevices, Irvine, CA, USA, as He also pioneered the development of a single chip combo wireless system
one of the initial founding team and worked on the development of monolithic used in majority of smart phone and tablets. His technical contributions in RF
watt level power amplifier and integrated radio products in commercial CMOS CMOS have been recognized worldwide by both industry and academia. He
processes for the cellular market. Since 2009, he has been with Broadcom, has authored over 60 technical papers and is a named inventor on more than
Irvine, CA, USA, where he is currently a Sr. Director of Engineering, and has 780 issued US patents.
been responsible for all cellular RF development activities. He holds a num- Dr. Rofougaran was the recipient of several premium international IEEE
ber of U.S. and foreign patents and has given several invited presentations at Awards, such as 1998 Design Automation Conference Best Paper Award,
various academic and industrial forums, in addition to having published and 1997 ISSCC Jack Raper Award for Outstanding Technology Direction Paper,
presented several well-received IEEE journal and conference papers. 1996 ISSCC Jack Kilby Outstanding Student Paper Award, and 1996 New
Technology Award by Wireless Design & Development Magazine, 1995 Best
Paper Award, and IEEE European Solid-State Circuits Conference. In 2006, he
was recognized as a Broadcom Fellow for his contribution to development of
Maryam Rofougaran was born in Esfahan, Iran. RF CMOS.
She received the M.S. and B.S. degrees in electri-
cal engineering from the University of California, Los
Angeles, CA, USA, in 1992 and 1995, respectively.
She is a Senior Vice President of Engineering at
Broadcom Corporation, Irvine, CA, USA, where she
manages radio development and products. She is a
coauthor of more than 35 conference and journal
papers and holds more than 200 patents.
She was the recipient of the 1995 European Solid-
State Circuits Conference Best Paper Award, the 1996
International Solid-State Circuits Conference ISSCC Jack Kilby Award for
Outstanding Paper, and the 1997 ISSCC Jack Raper Award for Outstanding
Technology Direction.