Embedded Design PGA
Embedded Design PGA
Embedded Design PGA
Embedded Design Using Programmable Gate Arrays features the Xilinx Spartan-3E FPGA on
the Digilent Basys Board and the Spartan-3E Starter Board evaluation hardware, the Xilinx
Integrated Synthesis Environment (ISE) WebPACK™ electronic design automation (EDA)
software tool in the Verilog HDL, the Xilinx CORE Generator for LogiCORE™ blocks and the
auxiliary EDA software for the Xilinx PicoBlaze™ soft core processor. The complete Xilinx ISE
WebPACK projects and Verilog HDL modules as described in the Chapters are available as
Archived Project Files.
Embedded Design Using Programmable Gate Arrays is intended as a supplementary text and
laboratory manual for undergraduate students in a contemporary course in digital logic and
embedded systems. Professionals who have not had an exposure to the fine grained FPGA, the
Verilog HDL, an EDA software tool or the new paradigm of the controller and datapath and the
FSM will find that this text facilitates an expansive experience with the tenets of DSP,
communications and control in embedded design. The Reference section at the end of each
Chapter contains a list of suitable undergraduate and graduate texts and reference books.
KEY FEATURES
• A complete description of the Xilinx ISE WebPACK™ v9.2i electronic design automation
environment suitable for undergraduate and graduate students and professionals
• Intended as a supplementary text and laboratory manual for undergraduate students in a
contemporary course in digital logic and embedded systems
• Professionals can benefit from the hands-on experience of real-time embedded projects in
DSP, digital communications and digital control for the Spartan-3E Starter Board
• Introduces the controller and datapath construct and the FSM in the Verilog HDL for high-
speed embedded design using the soft core peripherals and the Xilinx LogiCORE blocks
• Describes the Xilinx PicoBlaze 8-bit soft core processor architecture, software development
tools and applications for the Spartan-3E Starter Board
• Provides an Archived Project File for the complete Xilinx ISE WebPACK™ projects
described in the text with new projects available for download with further development
TABLE OF CONTENTS
Chapter 1: Verilog Hardware Description Language: Verilog syntax and concepts, structural
and behavioral models in the Verilog HDL, FSM, controller and datapath construct, C to
Verilog translation, FPGA and microprocessor comparison
Chapter 2: Verilog Design Automation: Xilinx ISE WebPACK, Xilinx CORE Generator,
Xilinx Floorplanner, Xilinx Simulator, Xilinx Architecture Wizard, Xilinx LogiCORE
blocks, warnings and errors in synthesis
Chapter 3: Programmable Gate Array Hardware: Digilent Basys Board, Spartan-3E Starter
Board, evaluation board hardware components, digital-to-analog converters, analog-to-
digital converters, auxiliary ports and peripherals
Chapter 4: Digital Signal Processing, Communications and Control: sampling and
quantization, discrete time sequences, discrete frequency response, DSP embedded
system, FIR digital filter, FIR Compiler LogiCORE block, Sine-Cosine Look-Up Table
LogiCORE block, DTMF generator, Direct Digital Synthesis Compiler LogiCORE block,
frequency generator, FSK, PSK and QPSK modulators, LFSR, RS-232 standard UART,
Manchester encoder-decoder, pulse width modulation, DC servomotor speed control
Chapter 5: Embedded Soft Core Processors: FPGA soft core processors, Xilinx PicoBlaze
development tools, architecture and reference projects
AUTHOR BIOGRAPHY
Dennis Silage (Philadelphia, PA) is a Professor in the Department of Electrical and Computer
Engineering at Temple University. He has a Ph.D. in Electrical Engineering from the University
of Pennsylvania. He is a senior member of the IEEE and director of the System Chip Design
Center www.temple.edu/scdc, which researches the application of Xilinx field programmable
gate arrays in digital signal processing and digital communication.