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Experiment-5 Simplification Using Karnaugh Map 5-1 Object:: Electrical Power Technical Engineering Dept

This document describes an experiment using Karnaugh maps to simplify Boolean functions with 3 to 4 variables. It provides background on Karnaugh maps and how they can be used to group logical terms together in rectangular blocks to find a minimum sum of products expression. The experiment involves using Karnaugh maps to simplify 3-variable and 4-variable Boolean functions from truth tables, drawing the resulting logic circuits, and comparing input and output truth tables. Students are also asked to use Karnaugh maps to find minimum expressions and implement functions using only NAND or NOR gates.

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Mohammed Dyhia Ali
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495 views3 pages

Experiment-5 Simplification Using Karnaugh Map 5-1 Object:: Electrical Power Technical Engineering Dept

This document describes an experiment using Karnaugh maps to simplify Boolean functions with 3 to 4 variables. It provides background on Karnaugh maps and how they can be used to group logical terms together in rectangular blocks to find a minimum sum of products expression. The experiment involves using Karnaugh maps to simplify 3-variable and 4-variable Boolean functions from truth tables, drawing the resulting logic circuits, and comparing input and output truth tables. Students are also asked to use Karnaugh maps to find minimum expressions and implement functions using only NAND or NOR gates.

Uploaded by

Mohammed Dyhia Ali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Middle Technical University Digital Electronic Lab.

Electrical Engineering Technical College First Stage


Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Experiment- 5
Simplification using Karnaugh Map
5-1 Object:

Usage of K-map to simplify Boolean function.

5-2 Theory:

Karnaugh maps or K-maps for short, provide another means of simplifying and
optimizing logical expressions. This is a graphical technique that utilizes a sum of
product (SOP) form.
SOP forms combine terms that have been ANDed together that then get ORed
together. This format lends itself to the use of De Morgan's law which allows the final
result to be built with only NAND gates. The K-map is best used with logical functions
with four or less input variables.
One of the advantages of using K-maps for reduction is that it is easier to see when a
circuit has been fully simplified. Another advantage is that using K-maps leads to a more
structured process for minimization.
In order to use a K-map, the truth table for a logical expression is transferred to a
K-map grid. The grid for two, three, and four input expressions are provided in the tables
below. Each cell corresponds to one row in a truth table or one given state in the logical
expression. The order of the items in the grid is not random at all; they are set so that any
adjacent cell differs in value by the change in only one variable. Because of this, items
can be grouped together easily in rectangular blocks of two, four, and eight to find the
minimal number of groupings that can cover the entire expression.
Note that diagonal cells require that the value of more than two inputs change, and
that they also do not form rectangles.

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

5-3 Procedures:
Part 1: 3 variables K-Map:

Now we get the following truth table and we want to simplify it.

Table (5-1)

1. Find POS (Product Of Sum), and then connect the result circuit practically.
2. Simplify the Boolean function result in (a) by using K-map
3. Draw the result logic function and then connect it practically, and find its truth
table..

Part 2: Four-variable K-Map:

4. Find the truth table of the above logic equation.


5. Simplify the Boolean function above by using K-map.
6. Draw the result logic circuit, and then connect it practically, and find its truth
table.

MD
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

5-4 Discussion:

1. Compare truth table that you got in step 3 with table (5-1), what is your notes?
2. Compare truth tables in steps 6 and 4, what is your notes?
3. Use a Karnaugh map to find the minimum (SOP) form for the expression:

4. Use a Karnaugh map to find the minimum (SOP) & (POS) form for the
expression:

5. Implement the following Boolean function with NAND gates only:


F = (1, 2 , 3 , 4 , 5 , 7 )
6. Implement the following Boolean function with NOR gates only:
F = (0,6)

MD

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