Digital Logic Circuit and Switching Theory
Digital Logic Circuit and Switching Theory
INPUTSOUTPUT
A B C F
0 0 0
A 0 0 1
0 1 0
B F
0 1 1
1 0 0
C 1 0 1
1 1 0
1 1 1
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Canonical Forms
Allows comparison for equality.
Has a correspondence to the truth tables
Minterms
Minterms are AND terms with every variable present in either true or
complemented form. It is also known as Sum of Products (SOP) terms.
Maxterms
Maxterms are OR terms with every variable in true or complemented form.
It is also known as Product of Sums (POS) terms.
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Standard Order
Minterms and maxterms are designated with a subscript.
The subscript is a number, corresponding to a binary pattern
The bits in the pattern represent the complemented or normal state
of each variable listed in a standard order.
All variables will be present in a minterm or maxterm and will be
listed in the same order (usually alphabetically)
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Purpose of the Index
The index for the minterm or maxterm, expressed as a binary number, is used to
determine whether the variable is shown in the true form or complemented
form.
For Minterms:
1 means the variable is Not Complemented and
0 means the variable is Complemented.
For Maxterms:
0 means the variable is Not Complemented and
1 means the variable is Complemented.
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SOP and POS Derivation from
Truth Table
SOP Equation
A B C F all combinations with output level 1.
0 0 0 1 write the terms in product form.
0 0 1 1 if the variable is 1 write it in true form.
0 1 0 0 if the variable is 0 write in complement.
0 1 1 1 POS Equation
1 0 0 0 all combinations with output level 0.
1 0 1 0 write the terms in sum form.
if the variable is 1 write it in complement.
1 1 0 0
if the variable is 0 write in true form.
1 1 1 1
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Combinational Logic Circuit
Design Process
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Combinational Logic Circuits
Why Simplify?
Reduction in the hardware of a logic circuit can be achieved by simplifying its
Boolean expression(s). Main benefits are:
Reduction in the number of gates or ICs and interconnection wires/tracks.
Smaller physical space (in PCB or IC) is occupied by the design.
Higher circuit speed.
Lower power consumption and heat generated.
Easier testing and finding fault.
Lower cost.
Improved reliability of the circuit due to lower gate count as well as number of
interconnections.
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Logic Simplification Techniques
Algebraic method
Simplify the expression using Boolean theorems. Mainly two steps involved:
Convert original expression into sum-of products (SOP) form (DeMorgan
theorem, ...).
Check product term for common factors and perform factoring.
Karnaugh Map (K-map)
Map Entered Variable (MEV)
Tabular Methods
Quine-McClusky (Q-M) Method
Suitable for computer implementation.
Partially heuristic method where optimal solution is not guaranteed.
Petricks Algorithm
A modified Quine-McClusky method.
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Example
A light(L) is placed at the center of a T corridor and wished to be
controlled in the three locations(S1,S2,and S3). Design a control
circuit that will turn ON and OFF the light every time a switch
change status in any of the three location. The initial position of the
three switches is OFF and the light status is OFF.
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Illustration
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Answer
Truth Table SOP Equation
S1 S2 S3 L L S1S 2S 3 S1S 2S 3 S1S 2S 3 S1S 2S 3
0 0 0 0
0 0 1 1
0 1 0 1 Simplified SOP Equation
0 1 1 0
1 0 0 1 L S1 (S 2 S 3)
1 0 1 0
1 1 0 0
1 1 1 1
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Answer
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Universal Gates
NAND Equivalents
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Universal Gates
NOR Equivalents
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XOR
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