NAME OF

DATE CAPABILITIES ARCHITECTURE

PROCESSOR
 Maximum clock speed was 740 kHz[1][7]
 Instruction cycle: 92.6 kHz [8] (740 kHz /8 =
92.6 kHz, 10.8 µs instruction period)
 Data moving instructions.  Number of transistors: 2,300
 Arithmetic - add, subtract, increment,  Memory: Program Memory, Data, Stack
decrement.  Interrupts: None
 Logic - rotate.  I/O ports: 16 4-bit input ports & 16 4-bit output ports
1971 4004 (intel)  Control transfer - conditional (limited to  Registers: 12-bit Program Counter, Stack Registers, 4-bit
current ROM), unconditional, call subroutine Accumulator, Index Registers
and return from subroutine.  Instruction set: 46
 Input/Output instructions.  Addressing modes: Register, Memory Direct, Register
 Other - carry flag operations, decimal adjust, Indirect, Immediate
etc.
 Instruction length can be one or two bytes.

 Ran at 200KHz

 Data moving instructions.
 Number of transistors: 3,500
 Arithmetic - add, subtract, increment and
 Memory: Program Memory, Data, Stack
decrement.
 Interrupts: Suppport non-maskable interrupt
 Logic - AND, OR, XOR, compare and rotate.
 I/O ports: 8 input ports & 24 output ports
 Control transfer - conditional, unconditional,
July 1972 8008 (intel)  Registers: Accumulator, Data Registers, Program Counter,
call subroutine, return from subroutine and
Stack Register
restarts.
 Instruction set: 48
 Input/Output instructions.
 Other - Halt instruction.
 Addressing modes: Register, Register Indirect, Immediate
 Instruction length can be from 1 to 3 bytes.

December 8080 
1974  Maximum clock speed was 2Mhz  Number of transistors: 6,000
 The total addressable memory size is 64 KB.  Memory: Program Memory, Data, Stack
 The interrupt can be enabled or disabled  Interrupts: Suppport maskable interrupt
using EI and DI instructions.
 I/O ports: 256 input ports & 256 output ports
 Data moving instructions.  Registers: Accumulator, Flag, Stack Pointer, Program
 Arithmetic - add, subtract, increment and Counter
 decrement.
 Logic - AND, OR, XOR and rotate.
 Control transfer - conditional, unconditional,
call subroutine, return from subroutine and
restarts.
 Input/Output instructions.
 Other - setting/clearing flag bits,  Addressing modes: Register, Register Direct, Immediate
enabling/disabling interrupts, stack
operations, etc.

 Maximum clock speed was 6MHz

 Data moving instructions.
 Arithmetic - add, subtract, increment and  Number of transistors: 6,500
decrement.
 Memory: Program Memory, Data, Stack
 Logic - AND, OR, XOR and rotate.
 Interrupts: 5 interrupts
 Control transfer - conditional, unconditional,
 I/O ports: 256 input ports & 256 output ports
August call subroutine, return from subroutine and
8085 (intel)  Registers: Accumulator, Flag, Program Counter, Stack
1976 restarts.
Pointer
 Input/Output instructions.
 Instruction set: 48
 Other - setting/clearing flag bits,
 Addressing modes: Register, Register Indirect, Direct,
enabling/disabling interrupts, stack
Immediate
operations, etc.

September 8086 (intel)  Maximum clock speed was 10MHz  Number of transistors: 29,000

1978  Data moving instructions.  Memory: Program Memory, Data, Stack
 Arithmetic - add, subtract, increment,  Interrupts: INTR, NMI
decrement, convert byte/word and compare.  I/O ports: 65,536 8-bit I/O ports Registers: Code Segment,
 Logic - AND, OR, exclusive OR, shift/rotate Stack Segment, Data Segment, Extra Segment,
and test. Accumulator, Base, Count, Data, Stack Pointer, Base
 String manipulation - load, store, move, Pointer, Source Index, Destination Index, Instruction
compare and scan for byte/word. Pointer, Flags
 Control transfer - conditional, unconditional,  Addressing modes: Implied, Register, Register Indirect,
call subroutine and return from subroutine. Direct, Immediate, Based, Indexed, Based Indexed, Based
 Input/Output instructions. Indexed w/ displacement
  Other - setting/clearing flag bits, stack
operations, software interrupts, etc.

 Number of transistors: 134,000

February  16-bit Internal Registers
1982
80286 (intel)  Maximum clock speed was 12MHz
16-bit External Data Bus
24-bit Address Bus
 Number of transistors: 275,000
 32-bit Internal Registers
October
1985
80386(intel)  Maximum clock speed was 40MHz 32-bit External Data Bus
32-bit Address Bus

 Number of transistors: 1,200,000

 32-bit Internal Registers
32-bit External Data Bus
April 1989 80486 (intel)  Maximum clock speed was 100MHz
32-bit Address Bus
8 KB Cache

 Number of transistors: 3.1 million

 32-bit Internal Registers
64-bit External Data Bus
March 1993 Pentium  Clock speed: 60 MHz 
32-bit Address Bus
8 + 8 KB Cache

November Pentium Pro  Maximum clock speed was 200MHz  Number of transistors: 3.3 million 
1995
 Quad-pumped Front Side Bus. With the initial Banias core,
Intel adopted the 400 MHz FSB first used in the Pentium 4.
The Dothan core moved to the 533 MHz FSB, following the
Pentium 4's evolution.
 Larger L2 cache. Initially 1 MB in the Banias core, then 2
MB in the Dothan core. Dynamic cache activation by
quadrant selector from sleep states.
 SSE2 support.
  A 12-14-stage instruction pipeline to achieve higher clock
speeds than the Pentium III-M.
 Dedicated register stack management.
 Addition of global history to branch prediction table.
 Micro-ops Fusion of certain sub-instructions mediated by
decoding units. x86 commands can be combined into
fewer RISC micro operations.

 Number of transistors: 7.5 million 

 SDR32-bit Internal Registers
64-bit External Data Bus
May 1997 Pentium II  Clock speed: 300 MHz 
36-bit Address Bus
16 +16 KB Cache

 Number of transistors: 7.5 million 

 SDR32-bit Internal Registers
64-bit External Data Bus
April 1988 Celeron  Clock speed: 400 MHz 
36-bit Address Bus
0 Cache

 Number of transistors: 9.5 million 

Feb 1999 Pentium III  Maximum clock speed is 1.4GHz  SDRAM and RDRAM
256/512 Level 2 Cache
 Number of transistors: 42 million
November  RDRAM, SDRAM, DDR SDRAM, DDR2 SDRAM
Pentium 4  Clock speed: 1.5 GHz
2000 265/512 Level 2 Cache

 Number of transistors: 42 million 

 128 64-bit general purpose registers
2001 Itanium  Maximum clock speed is 1.73GHz
 128 82-bit floating-point registers
 64 1-bit predicate registers
  Maximum clock speed is 1.73GHz
 The Pentium M (Mobile) is a CPU for
March 2003 Pentium M laptops.It uses throttling, or adjusting the
clock speed to the lowest rate necessary, to  Number of transistors: 55 million 
conserve power to the laptop.

 Maximum clock speed is 3.73GHz  Number of transistors: 55 million 

May 2005 Pentium D
 Based on Core microarchitecture

 Maximum clock speed is 3.33GHz  Number of transistors: 253 million 

July 2006 Core2Duo
 Level 2 cache 4 MB

 Maximum clock speed is 3.33GHz  Number of transistors: 582 million

Nov 2006 Core 2 Extreme
 Level 2 cache 8 MB