ACS709

ACS709
High Bandwidth, Fast Fault Response Current Sensor IC

In Thermally Enhanced Package
Features and Benefits Description
Industry-leading noise performance with 120kHz The Allegro ACS709 current sensor IC provides economical
bandwidth through proprietary amplifier and filter and precise means for current sensing applications in industrial,
design techniques automotive, commercial, and communications systems. The
Integrated shield greatly reduces capacitive coupling device is offered in a small footprint surface mount package
from current conductor to die due to high dV/dt, and that allows easy implementation in customer applications.
prevents offset drift in high-side applications
The ACS709 consists of a precision linear Hall sensor integrated
Small footprint surface mount QSOP24 package
circuit with a copper conduction path located near the surface
High isolation voltage, suitable for line-powered
of the silicon die. Applied current flows through the copper
applications
conduction path, and the analog output voltage from the Hall
1.1 m primary conductor resistance for low power loss
sensor IC linearly tracks the magnetic field generated by the
User-settable Overcurrent Fault level
applied current. The accuracy of the ACS709 is maximized
Overcurrent Fault signal typically responds to an
with this patented packaging configuration because the Hall
overcurrent condition in < 2 s
element is situated in extremely close proximity to the current
Filter pin capacitor sets analog signal bandwidth
to be measured.
2% typical output error
3 to 5.5 V, single supply operation High level immunity to current conductor dV/dt and stray
Factory trimmed sensitivity, quiescent output voltage, electric fields, offered by Allegro proprietary integrated shield
and associated temperature coefficients technology, provides low output ripple and low offset drift in
Chopper stabilization results in extremely stable high-side applications.
quiescent output voltage
The voltage on the Overcurrent Input (VOC pin) allows
Ratiometric output from supply voltage
customers to define an overcurrent fault threshold for the
device. When the current flowing through the copper conduction
Package: 24 pin QSOP (suffix LF) path (between the IP+ and IP pins) exceeds this threshold,
Continued on the next page
Approximate Scale
Typical Application
1
IP+ NC 24
2 VCC
IP+ NC 23
3 Fault_EN RH
22
IP+ FAULT_EN
4 21
RH, RL Sets resistor divider reference for VOC
IP+ VOC
5 ACS709 20 RL CF Noise and bandwidth limiting filter capacitor
IP+ VCC
6 19 330 k
IP
IP+ FAULT COC Fault delay setting capacitor, 22 nF maximum
7 18 COC 0.1 F
IP VIOUT B
8 17 VIOUT A Use of capacitor required
IP FILTER
9
IP VZCR
16 CF B Use of resistor optional
10 15 1 nF
IP GND A
11
IP NC 14
12
IP NC 13
ACS709A-DS, Rev. 3
ACS709 In Thermally Enhanced Package
Description (continued)
the open drain Overcurrent Fault pin will transition to a logic low outputs. This allows the ACS709 family of sensor ICs to be used
state. Factory programming of the linear Hall sensor IC inside of in applications requiring electrical isolation, without the use of
the ACS709 results in exceptional accuracy in both analog and opto-isolators or other costly isolation techniques.
digital output signals. Applications include:
The internal resistance of the copper path used for current sensing is Motor control and protection
typically 1.1 m, for low power loss. Also, the current conduction Load management and overcurrent detection
path is electrically isolated from the low voltage device inputs and Power conversion and battery monitoring / UPS systems
Selection Guide
IP(LIN) Sens (Typ) TA
Part Number Packing*
(A) (mV/A) (C)
ACS709LLFTR-35BB-T 75 28 (VCC=5V)
ACS709LLFTR-20BB-T 37.5 56 (VCC=5V)
40 to 150 Tape and Reel, 2500 pieces per reel
ACS709LLFTR-10BB-T 24 85 (VCC=5V)
ACS709LLFTR-6BB-T 15 90 (VCC=3.3V)
*Contact Allegro for packing options.
Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units
Supply Voltage VCC 8 V
Filter Pin VFILTER 8 V
Analog Output Pin VIOUT 32 V
Overcurrent Input Pin VOC 8 V
A
Overcurrent F ULT
Pin V FAULT 8 V
Fault Enable (FAULT_EN) Pin VFAULTEN 8 V
Voltage Reference Output Pin VZCR 8 V
DC Reverse Voltage: Supply Voltage, Filter, Analog
Output, Overcurrent Input, Overcurrent Fault, Fault VRdcx 0.5 V
Enable, and Voltage Reference Output Pins
Output Current Source IIOUT(Source) 3 mA
Output Current Sink IIOUT(Sink) 1 mA
Operating Ambient Temperature TA Range L 40 to 150 C
Junction Temperature TJ(max) 165 C
Storage Temperature Tstg 65 to 170 C
Isolation Characteristics
Characteristic Symbol Notes Rating Unit
Agency type-tested for 60 seconds per
Dielectric Strength Test Voltage* VISO 2100 VAC
UL standard 1577
For basic (single) isolation per UL standard 1577;
Working Voltage for Basic Isolation VWFSI for higher continuous voltage ratings, please contact 277 VAC
Allegro
* Allegro does not conduct 60-second testing. It is done only during the UL certification process.
Allegro MicroSystems, LLC 2

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Functional Block Diagram
VCC
D Q
CLK
R
Hall POR
POR
Bias
FAULT_EN FAULT Reset
Drain
FAULT
VOC
+
2VREF
Control
Logic
3 mA
Fault
Comparator
VZCR
Sensitivity
IP+
Trim
+
Signal VIOUT
Recovery
RF(INT)
Hall
IP Amplifier
VOUT(Q)
Trim
GND FILTER
Terminal List Table

Number Name Description
Sensed current copper conduction path pins. Terminals for current being sensed;
1 through 6 IP+
fused internally, loop to IP pins; unidirectional or bidirectional current flow.
Pin-out Diagram Sensed current copper conduction path pins. Terminals for current being sensed;
7 through 12 IP
fused internally, loop to IP+ pins; unidirectional or bidirectional current flow.
IP+ 1 24 NC 13, 14, 23, 24 NC No connection
IP+ 2 23 NC 15 GND Device ground connection.
IP+ 3 22 FAULT_EN Voltage Reference Output pin. Zero current (0 A) reference; output voltage on this
21 VOC 16 VZCR
IP+ 4 pin scales with VCC.
IP+ 5 20 VCC
Filter pin. Terminal for an external capacitor connected from this pin to GND to set
IP+ 6 19 FAULT 17 FILTER
the device bandwidth.
IP 7 18 VIOUT
Analog Output pin. Output voltage on this pin is proportional to current flowing
IP 8 17 FILTER 18 VIOUT
through the loop between the IP+ pins and IP pins.
IP 9 16 VZCR
A Overcurrent Fault pin. When current flowing between IP+ pins and IP pins
IP 10 15 GND 19 F ULT

exceeds the overcurrent fault threshold, this pin transitions to a logic low state.
IP 11 14 NC
13 NC
20 VCC Supply voltage.
IP 12
Overcurrent Input pin. Analog input voltage on this pin sets the overcurrent fault
21 VOC
threshold.
22 A
FAULT_EN Enables overcurrent faulting when high. Resets F ULT
when low.

COMMON OPERATING CHARACTERISTICS Valid at TA = 40C to 150C, VCC= 5 V, unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Units
ELECTRICAL CHARACTERISTICS
Supply Voltage1 VCC 3 5.5 V
Nominal Supply Voltage VCCN 5 V
Supply Current ICC A
VIOUT open, F ULT
pin high 11 14.5 mA
Output Capacitance Load CLOAD VIOUT pin to GND 10 nF
Output Resistive Load RLOAD VIOUT pin to GND 10 k
Magnetic Coupling from Device Conductor
MCHALL Current flowing from IP+ to IP pins 9.5 G/A
to Hall Element
Internal Filter Resistance2 RF(INT) 1.7 k
Primary Conductor Resistance RPRIMARY TA = 25C 1.1 m
ANALOG OUTPUT SIGNAL CHARACTERISTICS
Full Range Linearity3 ELIN IP = IP0A 0.75 0.25 0.75 %
Symmetry4 ESYM IP = IP0A 99.1 100 100.9 %
Bidirectional Quiescent Output VOUT(QBI) IP = 0 A, TA = 25C VCC0.5 V
TIMING PERFORMANCE CHARACTERISTICS
TA = 25C, Swing IP from 0 A to IP0A,
VIOUT Signal Rise Time tr no capacitor on FILTER pin, 100 pF from 3 s
VIOUT to GND
TA = 25C, no capacitor on FILTER pin,
VIOUT Signal Propagation Time tPROP 1 s
100 pF from VIOUT to GND
TA = 25C, Swing IP from 0 A to IP0A,
VIOUT Signal Response Time tRESPONSE no capacitor on FILTER pin, 100 pF from 4 s
VIOUT to GND
3 dB, TA = 25C, no capacitor on FILTER
VIOUT Large Signal Bandwidth5 f3dB 120 kHz
pin, 100 pF from VIOUT to GND
Output reaches 90% of steady-state level,
Power-On Time tPO 35 s
no capacitor on FILTER pin, TA = 25C
OVERCURRENT CHARACTERISTICS
Setting Voltage for Overcurrent Switchpoint6 VOC VCC0.25 VCC0.4 V
Signal Noise at Overcurrent
INCOMP 1 A
Comparator Input
Switchpoint in VOC safe operating area;
Overcurrent Fault Switchpoint Error7,8 EOC 5 %
assumes INCOMP = 0 A
A
Overcurrent F ULT
Pin Output Voltage V FAULT A
1 mA sink current at F ULT
pin 0.4 V
Fault Enable (FAULT_EN Pin) Input Low
VIL 0.1VCC V
Voltage Threshold
Fault Enable (FAULT_EN Pin) Input High
VIH 0.8 VCC V
Voltage Threshold
Fault Enable (FAULT_EN Pin) Input
RFEI 1 M
Resistance
Continued on the next page

COMMON OPERATING CHARACTERISTICS (continued) Valid at TA = 40C to 150C, VCC= 5 V, unless otherwise specified
OVERCURRENT CHARACTERISTICS (continued)
Set FAULT_EN to low, VOC = 0.25 VCC,
COC = 0F; then run a DC IP exceeding the
corresponding overcurrent threshold; then
Fault Enable (FAULT_EN Pin) Delay9 tFED 15 s
reset FAULT_EN from low to high and
measure the delay from the rising edge of
FAULT_EN to the falling edge of F A
ULT

FAULT_EN set to high for a minimum
of 20s before the overcurrent event;
switchpoint set at VOC = 0.25 VCC;
Overcurrent Fault Response Time tOC 1.9 s
delay from IP exceeding overcurrent
fault threshold to V FAULT <0.4V, without
external COC capacitor
Time from VFAULTEN < VIL to
Overcurrent Fault Reset Delay tOCR 500 ns
VFAULT > 0.8VCC , RPU = 330 k
Time from VFAULTEN pin < VIL to reset of
Overcurrent Fault Reset Hold Time tOCH 250 ns
fault latch; see Functional Block Diagram
Overcurrent Input Pin Resistance ROC TA = 25C, VOC pin to GND 2 M
VOLTAGE REFERENCE CHARACTERISTICS
Voltage Reference Output VZCR TA = 25 C 0.5 VCC V
Source current 3 mA
Voltage Reference Output Load Current IZCR
Sink current 50 A
Voltage Reference Output Drift VZCR 10 mV
1Devices are trimmed for maximum accuracy at V
CC = 5 V. The ratiometry feature of the device allows operation over the full VCC range; however, accuracy
may be slightly degraded for VCC values other than 5 V. Contact the Allegro factory for applications that require maximum accuracy for VCC = 3.3V.
2R
F(INT) forms an RC circuit via the FILTER pin.
3This parameter can drift by as much as 0.25% over the lifetime of this product.
4This parameter can drift by as much as 0.3% over the lifetime of this product.
5Calculated using the formula f
3dB = 0.35 / tr.
6See page 8 on how to set overcurrent fault switchpoint.
7Switchpoint can be lower at the expense of switchpoint accuracy.
8This error specification does not include the effect of noise. See the I
NCOMP specification in order to factor in the additional influence of noise on the
fault switchpoint.
9Fault Enable Delay is designed to avoid false tripping of an Overcurrent (OC) fault at power-up. A 15s (typical) delay will always be needed, every
time FAULT_EN is raised from low to high, before the device is ready for responding to any overcurrent event.

X6BB PERFORMANCE CHARACTERISTICS, TA Range L, valid at TA = 40C to 150C, VCC = 3.3 V, unless otherwise specified
Optimized Accuracy Range IP(OA) 6.5 6.5 A
Linear Sensing Range IP(LIN) 15 15 A
Performance Characteristics at VCC = 3.3 V
Noise1 VNOISE(rms) TA = 25C, Sens = 90 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open 2.5 mV
IP = 6.5 A, TA = 25C 90 mV/A
Sensitivity2,3 Sens IP = 6.5 A, TA = 25C to 150C 85 95 mV/A
IP = 6.5 A, TA = 40C to 25C 83 97 mV/A
IP = 0 A, TA = 25C 5 mV
Electrical Offset Voltage2 VOE IP = 0 A, TA = 25C to 150C 30 30 mV
IP = 0 A, TA = 40C to 25C 45 45 mV
Tested at IP = 6.5 A, IP applied for 5 ms, TA = 25C to 150C 2 %
Total Output Error2,4 ETOT
Tested at IP = 6.5 A, IP applied for 5 ms, TA = 40C to 25C 4 %
1V
pk-pk noise (6 sigma noise) is equal to 6 VNOISE(rms). Lower noise levels than this can be achieved by using Cf for applications requiring narrower
bandwidth. See Characteristic Performance page for graphs of noise versus Cf and bandwidth versus Cf.
2See Characteristic Performance Data graphs for parameter distribution over ambient temperature range.
3This parameter can drift by as much as 1.75% over lifetime of the product.
X10BB PERFORMANCE CHARACTERISTICS, TA Range L, valid at TA = 40C to 150C, VCC = 5 V, unless otherwise specified
Optimized Accuracy Range IP(OA) 10 10 A
Performance Characteristics at VCC = 5 V
IP = 10 A, TA = 25C 85 mV/A
Sensitivity2,3 Sens IP = 10 A, TA = 25C to 150C 82 85 88 mV/A
IP = 10 A, TA = 40C to 25C 80 85 90 mV/A
IP = 0 A, TA = 25C 5 mV
IP = 0 A, TA = 40C to 25C 45 45 mV
Tested at IP =10 A, IP applied for 5 ms, TA = 25C to 150C 2 %
Tested at IP =10 A, IP applied for 5 ms, TA = 40C to 25C 4 %
1V

Optimized Accuracy Range IP(OA) 20 20 A
Linear Sensing Range IP(LIN) 37.5 37.5 A
IP = 12.5 A, TA = 25C 56 mV/A
Sensitivity2,3 Sens IP = 12.5 A, TA = 25C to 150C 54.5 58 mV/A
IP = 12.5 A, TA = 40C to 25C 54.5 58.5 mV/A
IP = 0 A, TA = 25C 5 mV
IP = 0 A, TA = 40C to 25C 40 40 mV
Tested at IP =12.5 A, IP applied for 5 ms, TA = 25C to 150C 2 %
Tested at IP =12.5 A, IP applied for 5 ms, TA = 40C to 25C 3 %
1V
Optimized Accuracy Range IP(OA) 37.5 37.5 A
Noise1 VNOISE(rms) TA = 25C, Sens = 28 mV/A, Cf = 0, CLOAD = 4.7 nF, RLOAD open 1 mV
IP = 25 A, TA = 25C 28 mV/A
Sensitivity2,3 Sens IP = 25 A, TA = 25C to 150C 27 29.5 mV/A
IP = 25 A, TA = 40C to 25C 27 29.5 mV/A
IP = 0 A, TA = 25C 5 mV
IP = 0 A, TA = 40C to 25C 40 40 mV
Tested at IP = 25 A, IP applied for 5 ms, TA = 25C to 150C 3 %
Tested at IP = 25 A, IP applied for 5 ms, TA = 40C to 25C 3 %
1V noise (6 sigma noise) is equal to 6 VNOISE(rms). Lower noise levels than this can be achieved by using Cf for applications requiring narrower
pk-pk

Thermal Characteristics
Characteristic Symbol Test Conditions Value Units
Tested with 30A DC current and based on ACS709 demo
board in 1 cu. ft. of still air. Please refer to product FAQs
Steady State Package Thermal Resistance RJA 21 C/W
page on Allegro web site for detailed information on
ACS709 demo board.
Tested with 30A DC current and based on ACS709 demo
board in 1 cu. ft. of still air. Please refer to product FAQs
Transient Package Thermal Resistance RTJA See graph C/W
page on Allegro web site for detailed information on
ACS709 demo board.
ACS709 Transient Package Thermal Resistance

On 85--0444 Demo Board (No Al Plate)
22
20
18
Thermal Resistance (C/W)
16
14
12
10
0
0.01 0.1 1 10 100 1000
Time (Sec)

Characteristic Performance
ACS709 Bandwidth versus External Capacitor Value, CF
Capacitor connected between FILTER pin and GND
1000
100
Bandwidth (kHz)
10
0.1
0.01 0.1 1 10 100 1000
Capacitance (nF)
ACS709 Noise versus External Capacitor Value, CF

Capacitor connected between FILTER pin and GND
ACS709x-35B ACS709x-35B
V CC = 5 V V CC = 3.3 V
1000 900
900 800
RMS Noise (V)
RMS Noise (V)
800 700
700 600
600 500
500 400
400 300
0 10 20 30 40 50 0 10 20 30 40 50
Capacitance (nF) Capacitance (nF)
ACS709x-20B ACS709x-20B
V CC = 5 V V CC = 3.3 V
1600 1600
1400 1400
1200 1200
RMS Noise (V)
RMS Noise (V)
1000 1000
800 800
600 600
400 400
200 200
0 0
0 10 20 30 40 50 0 10 20 30 40 50
Capacitance (nF) Capacitance (nF)

Characteristic Performance Data

Data taken using the ACS709-6BB, VCC = 3.3 V
Accuracy Data
Electrical Offset Voltage versus Ambient Temperature Sensitivity versus Ambient Temperature
30 93.0
20 92.0
91.0
Sens (mV/A)
10
90.0
VOE (mV)
0
89.0
-10
88.0
-20 87.0
-30 86.0
-40 85.0
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)
Nonlinearity versus Ambient Temperature Symmetry versus Ambient Temperature

0.50 100.4
0.40 100.3
0.30 100.2
0.20 100.1
ESYM (%)
ELIN (%)
0.10 100.0
0 99.9
-0.10 99.8
-0.20 99.7
-0.30 99.6
-0.40 99.5
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)
Total Output Error versus Ambient Temperature

4
0
ETOT (%)
-2
-4
-6
-8
50 -25 0 25 50 75 100 125 150
TA (C)
Typical Maximum Limit Mean Typical Minimum Limit


Data taken using the ACS709-10BB, VCC = 5 V
Accuracy Data
30 86.5
86.0
20
85.5
Sens (mV/A)
10
85.0
VOE (mV)
0 84.5
-10 84.0
83.5
-20
83.0
-30
82.5
-40 82.0
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

0.30 100.5
0.20 100.4
100.3
0.10
100.2
0
ESYM (%)
ELIN (%)
100.1
-0.10 100.0
-0.20 99.9
99.8
-0.30
99.7
-0.40
99.6
-0.50 99.5
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

3.00
2.00
1.00
0
-1.00
ETOT (%)
-2.00
-3.00
-4.00
-5.00
-6.00
50 -25 0 25 50 75 100 125 150
TA (C)


Accuracy Data
20 58.0
15
10 57.5
Sens (mV/A)
5
57.0
0
VOE (mV)
-5 56.5
-10
-15 56.0
-20
-25 55.5
-30
-35 55.0
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

0.20 100.8
0.15
100.6
0.10
0.05 100.4
ESYM (%)
ELIN (%)
0 100.2
-0.05
100.0
-0.10
-0.15 99.8
-0.20
99.6
-0.25
-0.30 99.4
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

4
3
2
1
ETOT (%)
0
-1
-2
-3
-4
50 -25 0 25 50 75 100 125 150
TA (C)


Accuracy Data
20 29.0
15 28.8
10 28.6
Sens (mV/A)
5
28.4
VOE (mV)
0
28.2
-5
28.0
-10
-15 27.8
-20 27.6
-25 27.4
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

0.30 101.0
100.8
0.20
100.6
0.10 100.4
ESYM (%)
ELIN (%)
100.2
0 100.0
99.8
-0.10
99.6
-0.20 99.4
99.2
-0.30 99.0
50 -25 0 25 50 75 100 125 150 50 -25 0 25 50 75 100 125 150
TA (C) TA (C)

4
3
2
1
ETOT (%)
0
-1
-2
-3
-4
50 -25 0 25 50 75 100 125 150
TA (C)

Setting Overcurrent Fault Switchpoint
Setting 20BB and 35BB Versions

The VOC needed for setting the overcurrent fault |Ioc | is the overcurrent fault switchpoint for a bi-
switchpoint can be calculated as follows: directional (AC) current, which means a bi-directional
VOC = Sens |IOC| , device will have two symmetrical overcurrent fault
switchpoints, +IOC and IOC.
where VOC is in mV, Sens in mV/A, and IOC (overcur-
rent fault switchpoint) in A.
See the following graph for IOC and VOC ranges.
IOC versus VOC

(20BB and 35BB Versions)
IOC
0.4 VCC / Sens

Not in Valid Range
In Valid Range
0.25 VCC / Sens
0
0. 25 VCC VOC
0. 4 VCC
0.25 VCC / Sens
0.4 VCC / Sens
Example: For ACS709LLFTR-35BB-T, if required overcurrent fault switchpoint is 50 A, and VCC = 5 V, then the
required VOC can be calculated as follows:
VOC = Sens IOC = 28 50 = 1400 (mV)

Setting 10BB and 6BB Versions

The VOC needed for setting the overcurrent fault |Ioc | is the overcurrent fault switchpoint for a bi-
switchpoint can be calculated as follows: directional (AC) current, which means a bi-directional
sensor will have two symmetrical overcurrent fault
VOC = 1.17 Sens |IOC| ,
switchpoints, +IOC and IOC.
where VOC is in mV, Sens in mV/A, and IOC (overcur-
rent fault switchpoint) in A. See the following graph for IOC and VOC ranges.
IOC versus VOC

(10BB and 6BB Versions)
IOC
0.4 VCC / (1.17 Sens)

Not Valid Range
Valid Range
0.25 VCC / (1.17 Sens)
0
0.25 VCC VOC
0.4 VCC
0.25 VCC / (1.17 Sens)
0.4 VCC / (1.17 Sens)
Example: For ACS709LLFTR-6BB-T, if required overcurrent fault switchpoint is 10 A, and VCC = 3.3 V, then the
required VOC can be calculated as follows:
VOC = 1.17 Sens IOC = 1.17 90 10 = 1053 (mV)

Functional Description
Overcurrent Fault Operation 2. When the FAUL
T pin voltage reaches approximately 2V, the
The primary concern with high-speed fault detection is that noise fault is latched, and an internal NMOS device pulls the FAUL
T

may cause false tripping. Various applications have or need to pin voltage to approximately 0V. The rate at which the FAUL
T

be able to ignore certain faults that are due to switching noise
pin slews downward (see [4] in the figure) is dependent on the
or other parasitic phenomena, which are application dependant.
external capacitor, COC, on the FAUL
T pin.
The problem with simply trying to filter out this noise up front is
that in high-speed applications, with asymmetric noise, the act of 3. When the FAULT_EN pin is brought low, the FAUL
T pin starts
filtering introduces an error into the measurement. To get around resetting if no OC Fault condition exists. The internal NMOS
this issue, and allow the user to prevent the fault signal from pull-down turns off and an internal PMOS pull-up turns on (see
being latched by noise, a circuit was designed to slew the FAUL
T
[7] if the OC Fault condition still exists).
pin voltage based on the value of the capacitor from that pin to
ground. Once the voltage on the pin falls below 2 V, as estab- 4. The slope, and thus the delay, on the fault is controlled by the
lished by an internal reference, the fault output is latched and capacitor, COC, placed on the FAUL
T pin to ground. During this
pulled to ground quickly with an internal N-channel MOSFET. portion of the fault (when the FAUL
T pin is between VCC and
Fault Walk-through 2V), there is a 3mA constant current sink, which discharges
The following walk-through references various sections and COC. The length of the fault delay, t, is equal to:
attributes in the figure below. This figure shows different COC ( VCC 2 V )
fault set/reset scenarios and how they relate to the voltages on t= (1)
3 mA
the FAUL
T pin, FAULT_EN pin, and the internal Overcurrent
(OC) Fault node, which is invisible to the customer. where VCC is the device power supply voltage.
5. The FAUL
T pin did not reach the 2V latch point before the
1. Because the device is enabled (FAULT_EN is high for a mini-
mum period of time, the Fault Enable Delay, tFED, 15s typical) OC fault condition cleared. Because of this, the fixed 3mA
and there is an OC fault condition, the device FAUL
T pin starts current sink turns off, and the internal PMOS pull-up turns on to
discharging. recharge COC through the FAUL T
pin.
1 1 1
VCC
4 6
tFED
4 4 8
FAULT
(Output) 6 5 4
2 2 6 2
2V
7
3
0V
Time
FAULT_EN
(Input)
OC Fault
Condition
(Active High)

6. This curve shows VCC charging external capacitor COC technique is based on a signal modulation-demodulation process.
through the internal PMOS pull-up. The slope is determined Modulation is used to separate the undesired dc offset signal from
by COC.
the magnetically induced signal in the frequency domain. Then,
7. When the FAULT_EN pin is brought low, if the fault condi- using a low-pass filter, the modulated DC offset is suppressed
tion still exists, the latched FAUL
T pin will stay low until
the fault condition is removed, then it will start resetting. while the magnetically induced signal passes through the filter.
8. At this point there is a fault condition, and the part is enabled As a result of this chopper stabilization approach, the output
before the FAUL
T pin can charge to VCC. This shortens the voltage from the Hall IC is desensitized to the effects of tempera-
user-set delay, so the fault is latched earlier. The new delay ture and mechanical stress. This technique produces devices that
time can be calculated by equation 1, after substituting the have an extremely stable Electrical Offset Voltage, are immune to
voltage seen on the FAULT
pin for VCC.
thermal stress, and have precise recoverability after temperature
Chopper Stabilization Technique
cycling.
Chopper Stabilization is an innovative circuit technique that is
used to minimize the offset voltage of a Hall element and an asso- This technique is made possible through the use of a BiCMOS
ciated on-chip amplifier. Allegro patented a Chopper Stabiliza- process that allows the use of low-offset and low-noise amplifiers
tion technique that nearly eliminates Hall IC output drift induced in combination with high-density logic integration and sample
by temperature or package stress effects. This offset reduction and hold circuits.
Regulator
Clock/Logic
Low-Pass
Hall Element
Filter
Sample and
Hold
Amp
Concept of Chopper Stabilization Technique

Definitions of Accuracy Characteristics

Sensitivity (Sens). The change in device output in response to a Accuracy is divided into four areas:
1A change through the primary conductor. The sensitivity is the
0 A at 25C. Accuracy of sensing zero current flow at 25C,
product of the magnetic circuit sensitivity (G/A) and the linear
without the effects of temperature.
IC amplifier gain (mV/G). The linear IC amplifier gain is pro-
grammed at the factory to optimize the sensitivity (mV/A) for the 0 A over temperature. Accuracy of sensing zero current
full-scale current of the device. flow including temperature effects.
Noise (VNOISE). The product of the linear IC amplifier gain Full-scale current at 25C. Accuracy of sensing the full-scale
(mV/G) and the noise floor for the Allegro Hall effect linear IC current at 25C, without the effects of temperature.
(1 G). The noise floor is derived from the thermal and shot Full-scale current over temperature. Accuracy of sensing full-
noise observed in Hall elements. Dividing the noise (mV) by the scale current flow including temperature effects.
sensitivity (mV/A) provides the smallest current that the device is
Ratiometry. The ratiometric feature means that its 0 A output,
able to resolve.
VIOUT(Q), (nominally equal to VCC/2) and sensitivity, Sens, are
Linearity (ELIN). The degree to which the voltage output from proportional to its supply voltage, VCC.The following formula is
the device varies in direct proportion to the primary current
used to derive the ratiometric change in 0 A output voltage,
through its full-scale amplitude. Nonlinearity in the output can be
attributed to the saturation of the flux concentrator approaching VIOUT(Q)RAT (%).
the full-scale current. The following equation is used to derive the

VIOUT(Q)VCC / VIOUT(Q)5V

linearity: 100
VCC / 5 V
{ [
100 1
VIOUT_full-scale amperes VIOUT(Q)
2 (VIOUT_1/2 full-scale amperes VIOUT(Q) ) [{ The ratiometric change in sensitivity, SensRAT (%), is defined as:
SensVCC / Sens5V

where VIOUT_full-scale amperes = the output voltage (V) when the
100
sensed current approximates full-scale IP . VCC / 5 V
Symmetry (ESYM). The degree to which the absolute voltage
output from the device varies in proportion to either a positive Output Voltage versus Sensed Current
Accuracy at 0 A and at Full-Scale Current
or negative full-scale primary current. The following formula is
used to derive symmetry: Increasing VIOUT(V)
Accuracy
VIOUT_+ full-scale amperes VIOUT(Q)
VIOUT(Q) VIOUT_full-scale amperes

Over Temp erature
100
Accuracy
25C Only
Quiescent output voltage (VIOUT(Q)). The output of the device

Average
when the primary current is zero. For a unipolar supply voltage, VIOUT
it nominally remains at 0.5VCC. For example, in the case of a Accuracy
bidirectional output device, VCC = 5 V translates into VIOUT(Q) = Over Temp erature
2.5 V. Variation in VIOUT(Q) can be attributed to the resolution of Accuracy

the Allegro linear IC quiescent voltage trim and thermal drift. IP(min)
25C Only
Electrical offset voltage (VOE). The deviation of the device out- IP (A) +IP (A)
put from its ideal quiescent voltage due to nonmagnetic causes. To Full Scale
IP(max)
convert this voltage to amperes, divide by the device sensitivity,
Sens. 0A
Accuracy (ETOT). The accuracy represents the maximum devia-

tion of the actual output from its ideal value. This is also known
as the total ouput error. The accuracy is illustrated graphically in Accuracy
25C Only
the output voltage versus current chart at right. Note that error is Accuracy
directly measured during final test at Allegro. Over Temp erature
Decreasing VIOUT(V)

Definitions of Dynamic Response Characteristics
I (%) Primary Current
Propagation delay (tPROP). The time required for the device

90
output to reflect a change in the primary current signal. Propaga-
tion delay is attributed to inductive loading within the linear IC
package, as well as in the inductive loop formed by the primary Transducer Output
conductor geometry. Propagation delay can be considered as a
fixed time offset and may be compensated. 0
t
Propagation Time, tPROP
90
Response time (tRESPONSE). The time interval between a)when
the primary current signal reaches 90% of its final value, and b)
when the device reaches 90% of its output corresponding to the Transducer Output
applied current.
0
t
Response Time, tRESPONSE

Rise time (tr). The time interval between a) when the device
90
reaches 10% of its full scale value, and b) when it reaches 90%
of its full scale value. The rise time to a step response is used to
derive the bandwidth of the current sensor IC, in which (3 dB)
Transducer Output
= 0.35/tr. Both tr and tRESPONSE are detrimentally affected by
10
eddy current losses observed in the conductive IC ground plane. 0
t
Rise Time, tr

Package LF, 24-pin QSOP
8
8.66 0.10 0
24
0.25 2.30
0.15
5.00
3.91 0.10 5.99 0.20
1.27 1.04 REF

0.41
1 2
Branded Face 0.25 BSC 0.40 0.635
SEATING PLANE B PCB Layout Reference View

24X 1.75 MAX C
SEATING GAUGE PLANE
0.20 C PLANE
0.30 0.635 BSC

0.20 0.25 MAX NNNNNNNNNNNNN
TLF-AAA
For Reference Only, not for tooling use (reference JEDEC MO-137 AE)
Dimensions in millimeters LLLLLLLLLLL
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
C Standard Branding Reference View
B Reference pad layout (reference IPC7351 SOP63P600X175-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary N = Device part number
to meet application process requirements and PCB layout tolerances T = Temperature code
LF = (Literal) Package type
C Branding scale and appearance at supplier discretion
A = Amperage

Revision History
Revision Revision Date Description of Revision
3 June 6, 2014 Added 10BB and 6BB parts
Copyright 2008-2014, Allegro MicroSystems, LLC

The products described herein are protected by U.S. patents: 7,166,807; 7,425,821; 7,573,393; and 7,598,601.
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegros products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegros product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:

www.allegromicro.com


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ACS709

High Bandwidth, Fast Fault Response Current Sensor IC

Continued on the next page

Absolute Maximum Ratings

Allegro MicroSystems, LLC 2

Functional Block Diagram

Terminal List Table

Allegro MicroSystems, LLC 3

Continued on the next page

Allegro MicroSystems, LLC 4

Allegro MicroSystems, LLC 5

Allegro MicroSystems, LLC 6

Allegro MicroSystems, LLC 7

ACS709 Transient Package Thermal Resistance

Allegro MicroSystems, LLC 8

ACS709 Noise versus External Capacitor Value, CF

RMS Noise (V)

Capacitance (nF) Capacitance (nF)

RMS Noise (V)

Capacitance (nF) Capacitance (nF)

Allegro MicroSystems, LLC 9

Characteristic Performance Data

Nonlinearity versus Ambient Temperature Symmetry versus Ambient Temperature

Total Output Error versus Ambient Temperature

Typical Maximum Limit Mean Typical Minimum Limit

Allegro MicroSystems, LLC 10

Characteristic Performance Data

Nonlinearity versus Ambient Temperature Symmetry versus Ambient Temperature

Total Output Error versus Ambient Temperature

Typical Maximum Limit Mean Typical Minimum Limit

Allegro MicroSystems, LLC 11

Characteristic Performance Data

Nonlinearity versus Ambient Temperature Symmetry versus Ambient Temperature

Total Output Error versus Ambient Temperature

Typical Maximum Limit Mean Typical Minimum Limit

Allegro MicroSystems, LLC 12

Characteristic Performance Data

Nonlinearity versus Ambient Temperature Symmetry versus Ambient Temperature

Total Output Error versus Ambient Temperature

Typical Maximum Limit Mean Typical Minimum Limit

Allegro MicroSystems, LLC 13

Setting Overcurrent Fault Switchpoint

Setting 20BB and 35BB Versions

IOC versus VOC

0.4 VCC / Sens

0.25 VCC / Sens

0.4 VCC / Sens

VOC = Sens IOC = 28 50 = 1400 (mV)

Allegro MicroSystems, LLC 14

Setting 10BB and 6BB Versions

IOC versus VOC

0.4 VCC / (1.17 Sens)

0.25 VCC / (1.17 Sens)

0.4 VCC / (1.17 Sens)

VOC = 1.17 Sens IOC = 1.17 90 10 = 1053 (mV)

Allegro MicroSystems, LLC 15

Allegro MicroSystems, LLC 16

Concept of Chopper Stabilization Technique

Allegro MicroSystems, LLC 17

Definitions of Accuracy Characteristics