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VLSI Design and Embedded Systems Scheme

The document outlines the course scheme and structure for an M.Tech in VLSI Design and Embedded Systems program. It details the subjects, credits, teaching hours, examination details for each semester. Core subjects include Digital VLSI Design, Low Power VLSI Design, VLSI Testing and Verification. Electives include Digital System Design Using Verilog, Nanoelectronics, ASIC Design.

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0% found this document useful (0 votes)
149 views4 pages

VLSI Design and Embedded Systems Scheme

The document outlines the course scheme and structure for an M.Tech in VLSI Design and Embedded Systems program. It details the subjects, credits, teaching hours, examination details for each semester. Core subjects include Digital VLSI Design, Low Power VLSI Design, VLSI Testing and Verification. Electives include Digital System Design Using Verilog, Nanoelectronics, ASIC Design.

Uploaded by

Lohith
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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in
VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELGAUM
CHOICE BASED CREDIT SYSTEM (CBCS)
SCHEME OF TEACHING AND EXAMINATION 2016-2017
M.Tech in VLSI DESIGN AND EMBEDDED SYSTEMS

I SEMESTER

Teaching Hours /Week Examination


Sl. Subject Practical/Fi Theory/
Title Dura I.A. Total Credit
No Code Theory eld Work/ Practical
tion Marks Marks
Assignment Marks
1 16ELD11 Advanced Engineering Mathematics 4 - 3 20 80 100 4

2 16EVE12 Digital VLSI Design 4 - 3 20 80 100 4

3 16EVE13 Advanced Embedded System 4 - 3 20 80 100 4

4 16EVE14 Low Power VLSI Design 4 - 3 20 80 100 4

5 16EXX15X Elective-1 3 - 3 20 80 100 3

16EVEL16 VLSI and ES Lab -1


6 3 3 20 80 100 2
7 16EVE17 Seminar on advanced topics from refereed - 3 - 100 - 100 1
journals
TOTAL 19 6 18 220 480 700 22

Elective -1
16 EVE151 Digital System Design Using Verilog
16 EVE152 Nanoelectronics
16 EVE153 ASIC Design
16 ELD154 Advanced Computer Architecture

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VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELGAUM
CHOICE BASED CREDIT SYSTEM (CBCS)
SCHEME OF TEACHING AND EXAMINATION 2016-2017
M.Tech inVLSI DESIGN AND EMBEDDED SYSTEMS

II SEMESTER

Teaching Hours /Week Examination Credit


Theory/
Sl. Subject Practical/Fi Practical
Title Dura I.A. Total
No Code Theory eld Work/ Marks
tion Marks Marks
Assignment

1 Design of Analog and Mixed mode VLSI 4


16EVE21 4 - 3 20 80 100
Circuits

2 16EVE22 VLSI Testing and Verification 4 - 3 20 80 100 4

3 16EVE23 Advances in VLSI Design 4 - 3 20 80 100 4

4 16EVE24 Real Time Operating System 4 - 3 20 80 100 4

5 16EXX25X Elective 2 3 - 3 20 80 100 3

6 16EVEL26 VLSI and ES Lab -2 3 3 20 80 100 2

7 16EVE27 Seminar on Advanced topics from - 3 - 100 - 100 1


refereed journals
TOTAL 19 6 18 220 480 700 22

Elective -2
16EVE251 System Verilog
16EVE252 VLSI for Signal processing
16ELD253 MEMS
16EVE254 SoC Design

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VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELGAUM
CHOICE BASED CREDIT SYSTEM (CBCS)
SCHEME OF TEACHING AND EXAMINATION 2016-2017

M.Tech inVLSI DESIGN AND EMBEDDED SYSTEMS

III SEMESTER: Internship

Teaching Hours /Week Examination Credit


Sl. Subject Practical/Fi Theory/
Title Dura I.A. Total
No Code Theory eld Work/ Practical
tion Marks Marks
Assignment Marks
1 16EVE31 Seminar / Presentation on Internship (After - - - 25 - 25
8 weeks from the date of commencement)
2 16EVE32 Report on Internship - - - 25 - 25 20

3 16EVE33 Evaluation and Viva-Voce of Internship - - - - 50 50

4 16EVE34 Evaluation of Project phase -1 - - - 50 - 50 1

TOTAL - - - 100 50 150 21

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www.universityupdates.in || www.android.universityupdates.in || www.ios.universityupdates.in
VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELGAUM
CHOICE BASED CREDIT SYSTEM (CBCS)
SCHEME OF TEACHING AND EXAMINATION 2016-2017

M.Tech. VLSI DESIGN AND EMBEDDED SYSTEMS


IV SEMESTER

Teaching Hours /Week Examination Credit


Sl. Subject Practical/Fi Theory/
Title Dura I.A. Total
No Code Theory eld Work/ Practical
tion Marks Marks
Assignment Marks
1 16ELD41 Synthesis and Optimization of Digital 4 - 3 20 80 100 4
Circuits
2 16EXX42X Elective-3 3 - 3 20 80 100 3

3 16EVE43 Evaluation of Project phase -2 - - - 50 - 50 3

4 16EVE44 Evaluation of Project and Viva-Voce - - - - 100+100 200 10

TOTAL - - 6 90 360 450 20

Elective -3
16EVE421 CMOS RF Circuit Design
16ECS422 Advances in Image Processing
16ECS423 Software Defined Radio
16EVE424 High Speed VLSI Design

Note:
1. Project Phase-1: 6-week duration shall be carried out between 2nd and 3rd Semester vacation. Candidates in consultation with the guide shall carry out literature survey/ visit
industries to finalize the topic of Project.
2. Project Phase-2: 16-week duration during 4th semester. Evaluation shall be done by the committee constituted comprising of HoD as Chairman, Guide and Senior faculty of the
department.
3. Project Evaluation: Evaluation shall be taken up at the end of 4thsemester. Project work evaluation and Viva-Voce examination shall be conducted.
a. Internal Examiner shall carry out the evaluation for 100 marks.
b. External Examiner shall carry out the evaluation for 100 marks.
c .The average of marks allotted by the internal and external examiner shall be the final marks of the project evaluation.
d. Viva-Voce examination of Project work shall be conducted jointly by Internal and External examiner for 100 marks.

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