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Power Planning

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0% found this document useful (0 votes)
69 views4 pages

Power Planning

k

Uploaded by

sneha96669
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Power Planning

There are two types of power planning and management. They are core cell power
management and I/O cell power management. In former one VDD and VSS power
rings are formed around the core and macro. In addition to this straps and trunks are
created for macros as per the power requirement. In the later one, power rings are formed
for I/O cells and trunks are constructed between core power ring and power pads. Top to
bottom approach is used for the power analysis of flatten design while bottom up approach
is suitable for macros.
The power information can be obtained from the front end design. The synthesis tool
reports static power information. Dynamic power can be calculated using Value Change
Dump (VCD) or Switching Activity Interchange Format (SAIF) file in conjunction
with RTL description and test bench. Exhaustive test coverage is required for

Below are the calculations for flattened design of the SAMM. Only static power reported by

the Synthesis tool (Design Compiler) is used instead of dynamic power.

No.of core power pad required for each side of the chip

= total core power / [number of side*core voltage*maximum allowable current for a I/O pad]

= 236.2068mW/ [4 * 1.08 V * 24mA] (Considering design SAMM)

= 2.278

~2

Therefore for each side of the chip 2 power pads (2 VDD and 2 VSS) are added.

Total dynamic core current (mA)

= total dynamic core power / core voltage ( from P=VI )

= 236.2068mW / 1.08V

= 218.71 mA

Core PG ring width

= (Total dynamic core current)/ (No. of sides * maximum current density of the metal layer

used (Jmax) for PG ring)=218.71 mA/(4*49.5 mA/m)~1.1 m~2 m

Pad to core trunk width (m)

= total dynamic core current / number of sides * Jmax where Jmax is the maximum current

density of metal layer used

= 218.71 mA / [4 * 49.5 mA/m]


= 1.104596 m

Hence pad to trunk width is kept as 2m.

Using below mentioned equations we can calculate vertical and horizontal strap width and

required number of straps for each macro.

Block current:

Iblock= Pblock / Vddcore

Current supply from each side of the block:

Itop=Ibottom= { Iblock *[Wblock / (Wblock +Hblock)] }/2

Ileft=Iright= { Iblock *[Hblock / (Wblock +Hblock)] }/2

Power strap width based on EM:

Wstrap_vertical =Itop / Jmetal

Wstrap_horizontal =Ileft / Jmetal

Power strap width based on IR:

Wstrap_vertical >= [ Itop * Roe * Hblock ] / 0.1 * VDD

Wstrap_horizontal >= [ Ileft * Roe * Wblock ] / 0.1 * VDD

Refresh width:

Wrefresh_vertical =3 * routing pitch +minimum width of metal (M4)

Wrefresh_horizontal =3 * routing pitch +minimum width of metal (M3)

Refresh number

Nrefresh_vertical = max (Wstrap_vertical ) / Wrefresh_vertical

Nrefresh_horizontal = max (Wstrap_horizontal ) / Wrefresh_horizontal


Refresh spacing

Srefresh_vertical = Wblock / Nrefresh_vertical

Srefresh_horizontal = Hblock / Nrefresh_horizontal

/*******************************************************
Calculation Related to power Planning
Power Calculations

1. Number Of The Core Power Pad Required For Each Side Of Chip=(Total Core
Power)/{(Number Of Side)*(Core Voltage)*Maximum Allowable Current For A I/O Pad)}

2. Core Current(mA)=(CORE Power)/(Core Voltage )

3. Core P/G Ring Width=(Total Core Current)/{(N0.Of.Sides)*(Maximum Current Density Of The


Metal Layer Used For Pg Ring)}

4. Total Current =Total Power Consumption Of Chip(P)/Voltage(V)

5. No.Of Power Pads(Npads) = Itotal/Ip

6. No.Of Power Pins=Itotal/Ip

Where,
Itotal =TOTAL Current
Ip Obtained From Io Library Specification.

7. Total Power=Static Power+Dynamic Power


=Leakage Power+[Internal Power+Ext Switching Power]
=Leakage Power+[{Shortckt+Int Power}]+Ext Switching Power]
=Leakage Power+[{(Vdd*Isc)+(C*V*V*F)+(1/2*C*V*V*F)]

/**************************************************************************

IR Drop
Voltage transfer in metal a drop occurs due to resistance of metal this is known as IR drop.
IR drops are two types

1. Static IR drop
Independent of the cell switching the drop is calculated with the help of
wire resistance. Methods to Improve static IR drop
1. Increase the width of wire
2. Provide more number of wire

2 . Dynamic Power Drop


Dynamic IR drop:ir drop is calculated with the help of the switching of the cells. We can
improve dynamic IR drop by below methods:
1. Placing dcap cells in between them
2. Increase the no of straps.

Calculation related to IR drop

1. Average Current Through Each Strap=Istrapavg=(Itotal)/(2*Nstraps)mA

2. Appropriate Ir Drop At The Center Of The Strap=Vdrop or IRdrop


=IstrapAvg*Rs*(W/2)*(1/Wstrap)

3. Number Of Straps Between Two Power Pads

Nstrappinspace=Dpadspacing/Lspace.
MIN Ring Width = wring = Ip/Rj Microm

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