Clause 50: Wis Overview: Andy Baldman Unh Interoperability Lab Dec 13, 2000
Clause 50: Wis Overview: Andy Baldman Unh Interoperability Lab Dec 13, 2000
Clause 50: Wis Overview: Andy Baldman Unh Interoperability Lab Dec 13, 2000
Andy Baldman
UNH InterOperability Lab
Dec 13, 2000
Overview
aWIS Objectives
aSummary of Functions
aWIS Service Interface
aThe SPE: A Closer Look
aScrambling
aFault Processing
aSynchronization
WIS Main Objectives
a Support full duplex Ethernet MAC
a Support PCS, PMA, and PMD as defined for 10GBASE-W
a Support a 10GB/s effective signaling rate at the MAC layer, with MAC in
pace mode
a Provide a 9.95328 GB/s data rate at the PMA service interface
a Provide SONET STS-192c and SDH VC-4-64c compatible frame rates
a Implement the framing, scrambling, and defect/anomaly detection to allow
minimal compatibility with the requirements of SONET/SDH networks
a Preserve the duplex and BER objectives of the PCS and PMD sublayers with
which it may be used
In the transmit direction...
a Mapping of data-units from the PCS into the payload capacity of a
STS-192c SPE
a Addition of Path overhead and fixed stuff to create SPE
a Creation of frames by adding Line and Section OH to SPE
a Generation of BIP octets in the Section, Line, and Path overheads
a Scrambling of the WIS frames
a Transmission of the frames to the PMA via the PMA service
interface
and at the other end
a Reception of data from the PMA
a Delineation of octet boundaries (if no SUPI, i.e. WWDM PMA) and
STS-192c frame boundaries within the data stream from the PMA
a Descrambling of the payload and OH fields within the frames
a Processing of the pointers in the line OH to delineate the SPE
boundaries within the received WIS frames
a Checking the Bit-Interleaved-Parity (BIP) octets at the Section,
Line, and Path levels
a Removal of the SOH, LOH, POH, and fixed stuff
a Handling errors and exception conditions and reporting to Layer
Management
a Mapping of the octets extracted from the payload into data-units to
be passed up to the PCS
Keeping track of your bits...
a SONET:
` Numbered 1 to 8 inclusive
` 1 is MSB, 8 is LSB
` Transmitted MSB to LSB, 1 to 8, left to right, just like you read them
a Ethernet:
` Numbered 0 thru 7 inclusive
` 0 is LSB, 7 is MSB
` Transmitted LSB to MSB, 0 to 7, like youre reading them backwards
a Clause 50 uses the SONET numbering scheme, except for the WIS service
interface
WIS Service Interface
a Allows the 10GBASE-R PCS to get info to and from the WIS
a WIS_UNITDATA.request(tx_data-unit<15:0>)
` 16 bit vector = single data unit prepared by the PCS for transmit
` 16 bits represented by tx_data-unit<15:0> where 0 is the LSB of the vector,
and bits <7:0> are the LSO, which is generated first by the PCS
` When the WIS transfers the data from the PCS to the PMA, it is mapped s.t. the
LSO is transmitted first to the PMA
` The 16-bit words are transmitted down into the WIS at 599.04 MHz, which
corresponds to the STS-192c PAYLOAD rate of 9.58464 GB/s
WIS Service Interface cont.
a WIS_UNITDATA.indicate(rx_data-unit<15:0>)
` 16 bit vector = single data unit prepared by the WIS, going up to the PCS
` 16 bits represented by tx_data-unit<15:0> where 0 is the LSB of the vector,
and bits <7:0> are the LSO, which is processed first by the PCS
` When the WIS obtains the data from the PMA, it is mapped s.t. the LSO is
received first by the PCS
` The 16-bit words are transmitted up to the PCS at 599.04 MHz
a WIS_SIGNAL.request(FRAME_LOCK)
` Sent by PCS down to WIS to indicate that it has/doesnt have delineation of the
code words present in the received data stream, via OK or FAIL status
` This causes the WIS to verify the presence/absence of a LCWD condition, and
report to peer via LCD-P defect indication
WIS Service Interface cont.
a WIS_SIGNAL.indicate(SIGNAL_DETECT)
` Sent by WIS up to PCS to indicate status of the Receive process
` Used to propagate detection of severe error conditions to the PCS (e.g., no valid
signal being received from the PMA) via OK or FAIL status
` OK = Rx process is delineating valid payload info from the PMA stream and it is
being passed to the PCS via WIS_UNITDATA.indicate
` FAIL = Errors detected that prevent valid data from being passed up to PCS. In
this case WIS_UNITDATA.indicate(rx_data-unit<15:0>) are meaningless
` Generated whenever there is a change of value of SIGNAL_DETECT
` Effect of receipt not specified by WIS
A pretty picture
Review
a Transmit
` Get data units from PCS
` Map to payload
` Add POH and fixed stuff to complete SPE
` Add LOH and SOH
` Scramble with frame-synchronous scrambler
` Do all of this once every 125us (i.e., 8000 frames/s). No gaps between frames.
` Send to PMA
a Receive
` Get stream from PMA
` Delineate octet and frame boundaries (i.e., sync)
` Descramble
` Strip off SOH and LOH. Get payload pointer in LOH
` Find start of SPE and extract POH
` Strip off Fixed Stuff and pass the resulting data stream up to the PCS
Inside the SPE (with a little math)
9 rows x 16704 cols. 1 col = POH. 63 cols = fixed stuff. Rest is free.
16704-64 = 16640 x 9 rows = 149,760 octets x 8 bits x 8000 fps = 9.58464GB/s
Free bytes are numbered 0 - 149759. Tx order is left-right, top-bottom.
Also, 149,760 / 2 = 74880 16-bit words per WIS frame.
Bit remapping revisited
a Bit 0 of tx_data_unit<15:0> becomes bit 1 of the lower numbered (even) SPE octet
a Bit 15 of becomes bit 8 of the higher numbered (odd) SPE octet
a This is done because SONET transmits MSB-LSB, 1-8, just like you read them while
ethernet transmit order is LSB-MSB, 0-7, like reading them backwards
a Remapping causes payload of SPE to be sent LSB to MSB wrt data accepted from
WIS service interface, but the POH, LOH, and SOH are MSB-LSB as required by
SONET
Reception Process
a End result is that bits get received in the proper order from an
Ethernet perspective
Path Overhead in Detail
a J1 = STS Path trace (used
to send 16-octet repeating
trace pattern) - extracted
and placed in WIS JI Rx
register set.
a B3 = Path BIP octet
a C2 = STS Path signal label
(00011010 = Selector
Field defined for 10GB
ethernet)
a G1 = Path status (Used for
RF indication
a Rest are fixed at 00000000
Section and Line Overhead
a Used to provide DC balance (equal 1s and 0s), and sufficient transition density
a Frame-synchronous 127-bit repeating pattern. (Scrambler seed is reset at start of
every frame to 1111111.)
a Covers all except A1, A2, J0, and Z0 octets. Starts with MSB, bit 1 of leftmost octet,
and works left to right (...just like you read them).
Fault Processing - SONET Terms
aANSI
a802.3
a Reporting to PCS must happen ASAP, and recovery must provide valid data
to PCS within 125us of the removal of all error conditions
a WIS must also be able to identify when the PCS signals Loss of Code Group
Delineation via WIS_SIGNAL.request(FRAME_LOCK)
` If this persists for >3ms, an LCD-P defect shall be reported to far-end WIS
` Reporting shall cease when PCS reports lock for at least 1ms.
PMA Service Interface
a(Not Today)
Conclusion
aReview
aQuestions