Task 1

8x3 Encoder
Patients ward

1 I0
2 I1
D0 A 7 segment driver/decoder
3
I2 0
4 D1 B 7447 Common anode
I3
5 D2 C 4511 Common cathode
I4
6 I5 D
7 I6
8
I7

7 segment
1 digit

Inputs for encoder Outputs from encoder

I7 I6 I5 I4 I3 I2 I1 I0 D2 D1 D0
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0 0 0 1
0 0 0 0 0 1 0 0 0 1 0
0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1

* 7 segment driver has 4 inputs, but in this case dont need to connect 4th input, only 3 inputs.

Inputs from Patient ward Output 7 segment value

1( I0 activate) 0
2( I1 activate) 1
3( I2 activate) 2
4( I3 activate) 3
5( I4 activate) 4
6( I5 activate) 5
7( I6 activate) 6
8( I7 activate) 7
Task 2
>> Design an 8 x 3 encoder with OR gates
OR gates

D2 = I 1 + I 3 + I 5 + I 7
I0
I1
I2
I3
D1 = I 2 + I 3 + I 6 + I 7
I4
I5
I6
I7

D0 = I 4 + I 5 + I 6 + I 7

Simulation Results:

Input I0 activate
 Input I1 activate

Input I2 activate
 Input I3 activate

Input I4 activate
 Input I5 activate

Input I6 activate
 Input I7 activate
Task 3
Devices used:
>> 8 inputs

>> Encoder 47F148D

>> 7 segment decoder 7447(common anode)

>> 7 segment (common anode)

47F148D Encoder Truth Table (from data sheet)

This encoder accepts data from 8 active LOW inputs. Theretofore for relevant outputs
from encoder or relevant inputs for 7 segment driver, NOT gates were used.

INPUTS OUTPUTS OUTPUTS after NOT

I0 I1 I2 I3 I4 I5 I6 I7 D2 D1 D0 D2 D1 D0
H H H H H H H H H H H L L L
X X X X X X X L L L L H H H
X X X X X X L H H L L L H H
X X X X X L H H L H L H L H
X X X X L H H H H H L L L H
X X X L H H H H L L H H H L
X X L H H H H H H L H L H L
X L H H H H H H L H H H L L
L H H H H H H H H H H L L L
Simulation Results:

Input I0 activate

Input I1 activate
Input I2 activate

Input I3 activate
Input I4 activate

Input I5 activate
Input I6 activate

Input I7 activate
Task 4
In task 3, used IC is 74F148D encoder and when looking at its outputs starting with zero (0).
But practically it should display one (1) in 7 segment display when activate input i 0 although
this ic is priority encoder
For choose most relevant IC for this situation:

74LS147D encoder:
Accepts data from 9 active LOW inputs, and 4 outputs. Most important part in
this is when activating LSB (i0) the output is different than 74F148D IC, which
is MSB-> H H H L <- LSB. That means when i0 activated the output of this
encoder is H H H L and after through NOT gates output is MSB-> L L L H <-
LSB , thus we can display 7 segment output value as 1.

Truth Table of 74LS147D

I0 I1 I2 I3 I4 I5 I6 I7 I8 D3 D2 D1 D0 D3 D2 D1 D0 Decimal
value
H H H H H H H H H H H H H L L L L 0
X X X X X X X X L L H H L H L L H 9
X X X X X X X L H L H H H H L L L 8
X X X X X X L H H H L L L L H H H 7
X X X X X L H H H H L L H L H H L 6
X X X X L H H H H H L H L L H L H 5
X X X L H H H H H H L H H L H L L 4
X X L H H H H H H H H L L L L H H 3
X L H H H H H H H H H L H L L H L 2
L H H H H H H H H H H H L L L L H 1
H High logic level
L Low logic level
X Irrelevant

*** After analyze above two ICS characteristics, the most relevant encoder is 74LS147D.
Task 5
The most significant encoder for this project is 74LS147D, which is priority encoder, that
means the priority is given to the most significant (MSB) input, therefore for an example
when if both i5 and i7 both activated, the priority is given to the i7. Therefore if more than
one inputs activated, only most priority input will be activate, in this case i8. So the MSB
switches can be arrange from most priority patients wards.
Simulation for above priority scenario:

Other reason for choosing this ic is it gives practical, relevant 7 segment output , such as if
patient ward 5 Switch is activated, the 7 segment output displays 5.
Simulation Results ( 74LS147D) :

Input I0 activate

Input I1 activate
Input I2 activate

Input I3 activate
Input I4 activate

Input I5 activate
Input I6 activate

Input I7 activate
Input I8 activate