9-Small Signal Analysis of Amplifiers
9-Small Signal Analysis of Amplifiers
OF AMPLIFIERS
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Topics covered in this module
Graphical analysis of CE configuration
Two-port devices and hybrid model
Transistor hybrid model
Formula conversions for all three configurations
Analysis of a transistor amplifier circuit using h
parameters
Thevenins and Nortons theorems
Simplified CE hybrid model
Simplified calculations for the CC configuration
The CE amplifiers with emitter resistance (Fixed bias)
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Student Learning Outcomes
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Graphical analysis of CE configuration
The large-signal response of transistors are obtained graphically. For
small signals the transistor operates with reasonable linearity, and we
inquire into small-signal linear models which represent the operation
of the transistor in the active region.
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Graphical Analysis of the CE Configuration
Notation instantaneous values are
represented by lowercase letters (i for
current, v for voltage, and p for power).
Maximum, average (dc), and effective, or
root-mean-square (rms), values are
represented by the uppercase letter (dc)
values instantaneous total values are
indicated by the uppercase subscript of
the proper electrode varying components
from some quiescent value are indicated
by the lowercase subscript.
IC f I B ,VCE
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I/P and O/P Characteristics
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The Waveforms
Since the dynamic curve is not a straight line, the waveform of vb (Fig. 8.3d ) will
not, in general, be the same as the waveform of ib. This change in waveform is
known as input nonlinear distortion.
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Two-port Devices and the Hybrid Model
If the current i1 and the voltage v2 are independent and if the two-port is
linear.
The quantities h11, h12, h21, and h22 are called the h, or hybrid, parameters.
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Hybrid Parameter Model
Ii Io
Linear Two port
Vi Device Vo
Ii Io
1 2
hi
Vi hrVo hfI i ho Vo
1' 2'
Vi Vi
h11 h12
Ii Vo 0 Vo Ii 0
Io Io
h21 h22
Ii Vo 0 Vo Ii 0
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The Model
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Transistor Hybrid Model
CE- configuration
vB f1 (iB , vC )
iC f 2 (iB , vC )
f1 f1
vB iB vC
iB VC
vC IB
f 2 f 2
iC iB vC
iB VC
vC IB
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For small signal (incremental analysis)
vb hieib hre vc
ic h feib hoe vc
Where
f1 vB f1 vB
hie hre
iB iB VC
vC vC IB
f 2 iC f 2 iC
h fe hoe
iB iB VC
vC vC IB
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If a parameter is constant, its incremental change is zero.
For example: if VC is constant, then it is equivalent to vc=0.
if IB is constant, then it is equivalent to ib=0.
vB vb Vb
hre or hre
vC IB
vc ib 0
Vc Ib 0
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Formula conversions for all three configurations
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Analysis of a Transistor Amplifier Circuit using h-parameters
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The Current Gain,
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The Voltage Gain, The ratio of output voltage V2 to input voltage V1
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The Current Amplification AIS, Taking into Account the Source
Resistance Rs
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Thevenins and Nortons Theorems
THEVENINS THEOREM:
A
Network Network
1 B 2
Coupled networks
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Suppose Network 2 is detached from Network 1, and we focus
temporarily only on Network 1.
Network A
1
B
Figure: Network 1, open-circuited.
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Network A
1 B
Now place a voltmeter across terminals A-B and read the voltage.
We call this the open-circuit voltage.
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I2
V3
_+ A
R1 R3
R2
R4
_+ V1 _ I1
V2 +
A
B
RTH
+
_ VTH
B
The Thevenin equivalent structure
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We can now tie (reconnect) Network 2 back to terminals A-B.
A
RTH
+ Network
_ VTH
2
B
A
RTH 1 RTH 2
+
_ VTH 1 VTH 2 _+
B
The network system is replaced by Thevenin voltages and resistances.
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NORTONS THEOREM:
Network
I R
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In the Norton circuit, the current source is the short circuit current
of the network, that is, the current obtained by shorting the output of
the network. The resistance is the resistance seen looking into the
network with all sources deactivated. This is the same as RTH.
ISS RN = RTH
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We recall the following from source transformations.
R
+ V
_ V R I=
R
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Simplified CE Hybrid Model
Two of the four h parameters, hie and hfe, are sufficient for the approximate
analysis of low frequency transistor circuits, provided that the load resistance is
small enough to satisfy the condition hoe RL< 0.1
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Current Gain
h fe
AI h fe If, hoeRL<0.1
1 hoc RL
Input Impedance
hre h fe AI
Ri hie 1
hie hoe h fe oe L
h R
Ri hie hre AI RL ; hre h fe hie hoe 0.5
Vb
Ri hie
Ib
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Voltage Gain
RL h fe RL
AV AI
Ri hie
For, hoeRL<0.1
dAI dRi
0.1 and 0.05
AI Ri
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Simplified Calculations for the CC configuration
The Current Gain,
Input Resistance,
hie 1 h fe RL
Vb
Ri
Ib
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The CE Amplifier with an Emitter resistance
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Looking into the Base and Emitter of a Transistor
Vs
Ib
Rs hie 1 h fe Re
Ven Ve 1 h fe I b Re
Vs Re
Rs hie 1 hfe Re
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The effect of a Collector-circuit Resistor in an Emitter Follower
AIc 1 AIe
Ie Ic
AIc and AIe
Ib Ib
1 hoe Rc h fe
AIc
1 hoe Rc Re
Vo R
AV AIc e
Vi Ri
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Example
Q1. For the circuit of Fig. 8.9, determine the modified output h parameters
(hob and hfb) in terms of Rb and the CB h parameters of the intrinsic
transistor.
ic'
h '
'
ob
vc ie 0
ic' hob
h '
'
vc 1 hob Rb
ob
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ic' Here, Rb and (1/hob) are in parallel in this circuit,
h '
'
fb
ie vc 0
and a current (ie + hfbie) flows through this
parallel combination. Thus, we can write;
1 ie (1 h fb ) Rb
vb' ie (1 h fb ) Rb
hob (1 hob Rb )
hob (1 h fb ) Rb
ic' h fbie vb' hob ie h fb
(1 hob Rb )
hob (1 h fb ) Rb
Therefore, h h fb ; if Rb 0 (as it should be), h'fb h fb .
'
(1 hob Rb )
fb
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Transistor Biasing
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The Operating Point
Capacitive Coupling: In Fig. 8.1, neither side of the signal generator is
grounded, and also that an auxiliary biasing supply VBB is used. Both of these
difficulties are avoided by using a capacitor Cb1 to couple the input signal to the
transistor, as indicated in Fig. 9.1. In this diagram one end of vi is grounded, and
the VCC also provides the biasing IB. The coupling capacitors Cb1 and Cb2 blocks
dc voltages but freely pass signal voltages.
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The Static and Dynamic Load Lines
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The Fixed-bias Circuit
VCC VBE
IB IB2
Rb
VCC
IB
Rb
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Bias Stability
In spite of the tremendous strides that have been made in the technology
of the manufacture of semiconductor devices, transistors of a particular
type still come out of production with a wide spread in the values of some
parameters. For example a range hFE =b of about 3 to 1. IB should be
allowed to change so as to maintain IC and VCE constant as changes.
Thermal Instability
ICO doubles for every 10C
rise in temperature. The
collector current IC causes the
collector-junction temperature
to rise, which in turn increases
ICO. As a result IC will increase
which may further increase the
junction temperature, and
consequently ICO.
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Self or Emitter Bias
VCC I C ( Rc R e ) I B R e VCE 0
The physical reason for an improvement in stability with this circuit is the
following: If IC tends to increase the current in Re increases due to rise in ICO
with temperature. Increase in voltage drop across Re, the base current is
decreased. Hence IC will increase less than it would have, had there been no
self-biasing resistor Re.
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Example
Q1. A silicon transistor whose CE O/P characteristics are shown in fig. 9.6b is
used in the circuit of Fig. 9.6a, with VCC = 22.5 V, RC = 5.6 k, R2 = 10 k, and R1 =
90 k. For this transistor, = 55.
(a) Find the Q point graphically, and
(b) from the known value of .
(c) Also, find VCE if, = 200.
Solution: (a) V = (10 x 22.5) / 100 = 2.25 V, and Rb = (10 x 90) / 100 = 9.0 K
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Thank You
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