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2SCOMPLIMNT

The document describes several combinational logic circuit design problems: 1. Design a circuit to take a 4-bit binary number as input and output its 2's complement. 2. Construct a 5-to-32 line decoder using four 3-to-8 decoders with an enable input and one 2-to-4 decoder. 3. Build a 7-to-1 multiplexer using 2-to-1 multiplexers.

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Sarferaz Ahamed
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57 views2 pages

2SCOMPLIMNT

The document describes several combinational logic circuit design problems: 1. Design a circuit to take a 4-bit binary number as input and output its 2's complement. 2. Construct a 5-to-32 line decoder using four 3-to-8 decoders with an enable input and one 2-to-4 decoder. 3. Build a 7-to-1 multiplexer using 2-to-1 multiplexers.

Uploaded by

Sarferaz Ahamed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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5.

(15 points) Design a combinational circuit whose input is a four-bit number and
whose output is the 2 s complement of the input number.

A 3A 2A 1A 0 F 3F 2F 1F 0
0 0 0 0 0 0 0 0
0 0 0 1 1 1 1 1
0 0 1 0 1 1 1 0
0 0 1 1 1 1 0 1
0 1 0 0 1 1 0 0
0 1 0 1 1 0 1 1
0 1 1 0 1 0 1 0
0 1 1 1 1 0 0 1
1 0 0 0 1 0 0 0
1 0 0 1 0 1 1 1
1 0 1 0 0 1 1 0
1 0 1 1 0 1 0 1
1 1 0 0 0 1 0 0
1 1 0 1 0 0 1 1
1 1 1 0 0 0 1 0
1 1 1 1 0 0 0 1
F3 F2
A1 A1

1 1 1 1 1 1
1 1 1 1 1
A2 A2
1
A3 A3
1 1 1 1

A0 A0

F1 F0
A1 A1

1 1 1 1
1 1 1 1
A2 A2
1 1 1 1
A3 A3
1 1 1 1

A0 A0
F3 = A3 A2 + A3 A1 + A3 A0 + A3 A2 A1 A0
F2 = A2 A0 + A2 A1 + A2 A1 A0
F1 = A1 A0 + A1 A0
F1 = A0
6. (10 points) Construct a 5-to-32-line decoder with four 3-to-8 decodes with enable
input and one 2-to-4-line decoder.
0 0
1 1
2 2
C 3 3
D 4 4
E 5 5
6 6
EN 7 7

0 8
1 9
2 10
C 3 11
D 4 12
E 5
6
13
14
EN 7
15

0 16
1 17
C 2 18
3 19
D 4 20
0 E 5 21
A 6
22
1
EN 7
23
B 2
3

0 24
1 25
2 26
C 3 27
D 4 28
E 5
6
29
30
EN 7 31

7. (10 points) Construct a 7-to1 line multiplexer with as many 2-to-1 line
multiplexers as are needed.

s1

w0 0
s0 1

w1 0
s2
w2 1

s0 0
f
1
s1
w3 0
w4 1 0
s0 1

w5 0
w6 1

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