HP Ze2000 - Quanta CT8 - Rev 3B PDF

1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
CT8 BLOCK DIAGRAM
LAYER 2 : GND
DDR CPU THERMAL CLAW HAMMER / RS480 / SB400
LAYER 3 : IN1 DDR-SODIMM1 266,333,400MHz SENSOR
GMT-781
A
LAYER 4 : IN2 CPU CLAW HAMMER 14.318MHz A
SYSTEM POWER MAX1845

LAYER 5 : VCC CPUCLK, (1.2V/NB_CORE/1.25V)
DDR-SODIMM2 754 Pins (uPGA) CPUCLK#
LAYER 6 : BOT CLOCK GEN
CY28RS480/ ICS951412 CPU CORE MAX1544
SBLINKCLK, SBLINKCLK#
POWER 1.2V
HyperThansport I/O BUS NBSRCCLK, NBSRCCLK#
Link 16x16 HTREFCLK
CABLE DOCK
SYSTEM MAX1999
POWER(3/5V)
R.G,B OSC14M
Daughter Board CRT port
TV, USB, BLUE TOOTH NORTH BRIDGE SYSTEM POWER MAX1845
LVDS X1 RS480M (2.5VSUS/1.8VSUS)
LCD Panel
705 BGA
Power Board INTEGRADED VGA FUNCTION
B TV-OUT Based on Redeon 9600 B
S-VIDEO BATT CHARGER
MAX1722
A-LINK
32.768KHz 2X
PCI-E DISCHARGE
NBSRCCLK, NBSRCCLK#
USB PORT 0, 1, 2 USB 2.0
33MHZ, 3.3V PCI
PCLK_7411
PCLK_MINI
1st IDE - HDD ATA 66/100/133 SB400 24.576MHz 48MHz
PCLK_LAN
564 BGA AC97
2nd IDE - CDROM
ATA 66/100/133
PWRCLKP AC97 LAN MINI-PCI CARDBUS / IEEE 1394
PWRCLKN CX20468-31 Realtek CONTROLLER/CF
C DIB_DATAN C
DIB_DATAP MBAMC20493-010 8100CL TI 7411
PCI DEVICES IRQ ROUTING 32.768KHz PCLK_591

24.576MHz 25MHz
3.3V LPC, 33MHz
DEVICE IDSEL # REQ/GNT # PCI_INT
GBIT ETHERNET AD16 2 C
MINIPCI SLOT AD18 1 E,F SMARTDAA AMP 5 IN 1 CARDBUS 1394
CardBus/1394 AD25 4 B,D,G MODEM, CARD SLOT X1 CONN
PC97551 TPA0312 READER
SD/MMC,
TQFP 176 SM, MS,
XD
WIRE
RJ11 JACK RJ45

D FAN Touchpad Keyboard FLASH HEADPHONE, D
JACK JACK
2ND HEADPHONE,
MIC
PROJECT : CT8
Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 1A
Date: Thursday, April 14, 2005 Sheet 1 of 42

1 2 3 4 5 6 7 8
5 4 3 2 1
CLK +3V CLK_VDD 20 Mils

NBSRCCLK
NBSRCCLK#
SBSRCCLK
NBSRCCLK 7
NBSRCCLK# 7
SBSRCCLK 12
L39 40 Mils +3V SBSRCCLK#
SBSRCCLK# 12
TI201209G121
CLK_VDDA L42 SBLINKCLK
SBLINKCLK 7
C478 C485 C497 C496 C488 C480 C483 C491 C498 TI201209G121 SBLINKCLK#
22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U SBLINKCLK# 7
C492 C494
0.1U 22U
D D
CLK_VDD
U23
43 VDDCPU VDDA 39
14 VDDSRC3 GNDA 38
21 VDDSRC2
EMI 32 45 CPUCLK8T0 R288 15/F
+3V VDDSRC1 CPUCLK8T0 CPUCLK 3
REV.C 35 44 CPUCLK8C0 R291 15/F
VDD_SRC0 CPUCLK8C0 CPUCLK# 3
51 VDD_PCI CPUCLK8T1 41 T128
3 VDD48 CPUCLK8C1 40 T297
SBK160808T-301Y-S 48
L40 VDDHTT SRCCLKT7 R286 33 SBSRCCLK R285 49.9/F
56 VDDREF SRCCLKT7 12
C482 13 SRCCLKC7 R290 33 SBSRCCLK# R289 49.9/F
C749 C750 SRCCLKC7 SRCCLKT6 R296 33 NBSRCCLK R295 49.9/F
5 GND1 SRCCLKT6 16
0.1U 2.2U 0.1U 55 17 SRCCLKC6 R298 33 NBSRCCLK# R297 49.9/F
GND2 SRCCLKC6 SRCCLKT5 R301 33 SBLINKCLK R300 49.9/F
36 GNDSRC0 SRCCLKT5 18
SRCCLKC5 R303 33 SBLINKCLK# R302 49.9/F
REV.B 31
26
GNDSRC1
GNDSRC2
SRCCLKC5
SRCCLKT4
19
22 T131
20 GNDSRC3 SRCCLKC4 23 T299
C320 27P 15 24
GNDSRC4 SRCCLKT3 T301
49 GNDPCI SRCCLKC3 25 T306
1
Parallel Resonance Crystal Y2 R83
46
42
GNDHTT SRCCLKT2 27
28
T305
T302
GNDCPU SRCCLKC2
Tolerance: 35ppm (max) *1M
1
SRCCLKT1 30
29
T304
X1 SRCCLKC1 T303
C
Load: 20pf 14.318MHZ C
2
SRCCLKT0 34 T298
C479 27P 2 33
X2 SRCCLKC0 T300
REV.B CLK_VDD
6 50 R283 *4.7K CLK_VDD
T296 NC SEL75#/100/PCICLK0
1.Remove R84.
7 R274 R277 R276

9,10,13 SCLK SCLK
8 10K 10K 10K
9,10,13 SDATA SDATA R273 *22 CLK FREQ
SB_OSC_INT 7,13
R281 33 SELECT
7 OSC14M 52 REF2
54 R275 *10K
FS0/REF0 R280 *10K
37 IREF FS1/REF1 53
9 R279 *10K
Ioh = 5 * Iref R304 FS2
(2.32mA)
475/F 4 R278 33
USB_48MHz USBCLK_EXT 13
Voh = 0.71V @ 60 ohm 47 R284 33
HTTCLK0 HTREFCLK 7
11 CLKREQB#
10 R287
CLKREQA#
51.1
ICS951412
R292 R282
*10K *10K
B
Operating Current: 400mA B
Layout Note:
1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE AS
CKG. AS POSSIBLE
EXT CLK FREQUENCY SELECT TABLE(MHZ)
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, SBSRCCLK/#, SBLINKCLK/# AS
DIFFERENT PAIR RULE FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT
[2:1]
3- PUT DECOUPLING CAPS CLOSE TO CKG. POWER PIN
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved
0 0 1 X 100.00 X/3 X/6 48.00 Reserved
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
A
1 1 1 200.00 100.00 66.66 33.33 48.00 Normal HAMMER operation A
PROJECT : CT8
Custom EXT CLOCK GENERATOR 3A

5 4 3 2 1
5 4 3 2 1
CPU VDDA_1V2 U22A

AMD K8
LDT
VDDA_1V2
20 Mils width to pin
100 Mils width to capacitor
250 Mils width to PWM T124 U22C
AMD K8
CTL & DBG
R76
169/F
Near Socket754
CPU_CLK C295 3900P

CPUCLK 2
B27 AF25 CPU_CLK# C296 3900P
V_HT0_A0 V_HT0_B0 CPUCLK# 2
B29 AE28 LDT_RST# AF20 A20 THERMTRIP#
V_HT0_A1 V_HT0_B1 12 LDT_RST# RESET# THERMTRIP#
C26 AF29 CPUPWRGD AE18 FBCLKOUT# R78 80.6/F FBCLKOUT
V_HT0_A2 V_HT0_B2 LDTSTOP# PWROK THERMDA
C28 V_HT0_A3 V_HT0_B3 AG26 7,12 LDTSTOP# AJ27 HT_STOP# THERMDA A26
D25 AG28 A27 THERMDC
V_HT0_A4 V_HT0_B4 L0_REF1 THERMDC
D27 V_HT0_A5 V_HT0_B5 AH27 AF27 L0_REF1
CADIP[0..15] D29 AH29 CADOP[0..15] L0_REF0 AE26 AJ28
5 CADIP[0..15] V_HT0_A6 V_HT0_B6 CADOP[0..15] 5 L0_REF0 KEY0 T294
D KEY1 A28 T97 D
CADIP15 T25 N26 CADOP15 COREFB A23
HT_RXD15 HT_TXD15 40 COREFB COREFB
CADIP14 U27 L25 CADOP14 COREFB# A24
HT_RXD14 HT_TXD14 40 COREFB# COREFB#
CADIP13 V25 L26 CADOP13 B23
HT_RXD13 HT_TXD13 T96 CORE_SENSE
CADIP12 W27 J25 CADOP12 AG18
HT_RXD12 HT_TXD12 NC_BP3 T118
CADIP11 AA27 G25 CADOP11 AE12 AH18
HT_RXD11 HT_TXD11 T121 VDDIOFB NC_BP2 T295
CADIP10 AB25 G26 CADOP10 AF12 AG17 NC_AG17
HT_RXD10 HT_TXD10 T120 VDDIOFB# NC_BP1
CADIP9 AC27 E25 CADOP9 VDDIO_SENSE AE11 AJ18 NC_AJ18
CADIP8 HT_RXD9 HT_TXD9 CADOP8 VDDIO_SENSE NC_BP0
AD25 HT_RXD8 HT_TXD8 E26
CADIP7 T27 N29 CADOP7 CPU_CLK AJ21 AJ23 NC_AJ23
CADIP6 HT_RXD7 HT_TXD7 CADOP6 CPU_CLK# CLKIN NC_BPSCLK NC_AH23 680-8P4R
V29 HT_RXD6 HT_TXD6 M28 AH21 CLKIN# NC_BPSCLK# AH23 RN1
CADIP5 V27 L29 CADOP5 1 2 NC_D20 VCC_CORE
CADIP4 HT_RXD5 HT_TXD5 CADOP4 FBCLKOUT NC_C19
Y29 HT_RXD4 HT_TXD4 K28 AH19 FBCLKOUT NC_PLLCHZ AE24 T122 3 4
CADIP3 AB29 H28 CADOP3 FBCLKOUT# AJ19 AF24 5 6 NC_B19 R42 51 COREFB
HT_RXD3 HT_TXD3 FBCLKOUT# NC_PLLCHZ# T123
CADIP2 AB27 G29 CADOP2 7 8 NC_C21
CADIP1 HT_RXD2 HT_TXD2 CADOP1 NC_D20 R41 51 COREFB#
AD29 HT_RXD1 HT_TXD1 F28 VDDA_2.5V AH25 VDDA1 NC_SCANCLK1 D20
CADIN[0..15] CADIP0 AD27 E29 CADOP0 CADON[0..15] AJ25 C21 NC_C21 R34 680 NC_D18
5 CADIN[0..15] HT_RXD0 HT_TXD0 CADON[0..15] 5 VDDA2 NC_SCANCLK2
D18 NC_D18 R265 680 NC_AG17
CADIN15 CADON15 NC_SCANEN NC_C19 R256 680 NC_AJ18
R25 HT_RXD#15 HT_TXD#15 N27 NC_SCANSHENB C19
CADIN14 U26 M25 CADON14 VID0 AE15 B19 NC_B19 VDDA_1V2
HT_RXD#14 HT_TXD#14 40 VID0 VID0 NC_SCANSHENA
CADIN13 U25 L27 CADON13 VID1 AF15
HT_RXD#13 HT_TXD#13 40 VID1 VID1
CADIN12 W26 K25 CADON12 VID2 AG14 D22 R262 44.2/F L0_REF1
HT_RXD#12 HT_TXD#12 40 VID2 VID2 NC_RSVD_SCL T93
CADIN11 AA26 H25 CADON11 VID3 AF14 C22
HT_RXD#11 HT_TXD#11 40 VID3 VID3 NC_RSVD_SDA T82
CADIN10 AA25 G27 CADON10 VID4 AG13 STUFF WHEN CONFIGURED AS 16-BIT LINK R261 44.2/F L0_REF0
HT_RXD#10 HT_TXD#10 40 VID4 VID4
CADIN9 AC26 F25 CADON9 A19 NC_A19
CADIN8 HT_RXD#9 HT_TXD#9 CADON8 NC_BRN# VDDA_1V2 C762 C763
AC25 HT_RXD#8 HT_TXD#8 E27 REV.D
CADIN7 T28 P29 CADON7 C15
HT_RXD#7 HT_TXD#7 NC_DCLKTWO T68 +2.5V
CADIN6 U29 M27 CADON6 DBRDY AH17 R56 49.9/F CTLIP1 ESD
HT_RXD#6 HT_TXD#6 JTAG6 DBRDY
CADIN5 V28 M29 CADON5 DBREQ# AE19 C18 NC_C18 *330p *330p
HT_RXD#5 HT_TXD#5 JTAG7 DBREQ# NC_SINCHN
CADIN4 W29 K27 CADON4 R57 49.9/F CTLIN1 R268 680 LDT_RST#
CADIN3 HT_RXD#4 HT_TXD#4 CADON3 TMS
AA29 HT_RXD#3 HT_TXD#3 H27 JTAG5 E20 TMS
CADIN2 AB28 H29 CADON2 TCK E17 AF21 R260 680 LDTSTOP#
C HT_RXD#2 HT_TXD#2 JTAG1 TCK NC_ANALOG0 C
CADIN1 AC29 F27 CADON1 TRST# B21 AF22 R90 680 THERMTRIP#
HT_RXD#1 HT_TXD#1 JTAG2 TRST# NC_ANALOG1
CADIN0 AD28 F29 CADON0 TDI A21 AF23
HT_RXD#0 HT_TXD#0 JTAG4 TDI NC_ANALOG2 2.5VSUS
TDO A22 AE23 R48 680 NC_A19
JTAG3 TDO NC_ANALOG3
CLKIP1 Y25 J26 CLKOP1 R49 680 NC_C18
5 CLKIP1 HT_RXCLK1 HT_TXCLK1 CLKOP1 5
CLKIP0 Y27 J29 CLKOP0 R40 *680 TDO
5 CLKIP0 HT_RXCLK0 HT_TXCLK0 CLKOP0 5
A25 NC_A25 NC_K1 K1
CLKIN1 W25 J27 CLKON1 B7 R2 R66 51.1 VDDIO_SENSE R258 *680 DBREQ#
5 CLKIN1 HT_RXCLK#1 HT_TXCLK#1 CLKON1 5 NC_B7 NC_R2
CLKIN0 Y28 K29 CLKON0 B13 R3 R266 *680 DBRDY
5 CLKIN0 HT_RXCLK#0 HT_TXCLK#0 CLKON0 5 NC_B13 NC_R3 2.5VSUS
B18 NC_B18 NC_AA2 AA2
CTLIP1 R27 N25 CTLOP1 C1 AA3 R33 *680 TCK
HT_RXCTL1 HT_TXCTL1 T101 NC_C1 NC_AA3
CTLIP0 T29 P28 CTLOP0 C3 AE9 R259 820 NC_AJ23 R54 *680 TMS
5 CTLIP0 HT_RXCTL0 HT_TXCTL0 CTLOP0 5 NC_C3 NC_AE9
C6 AE21 R50 *680 TDI
CTLIN1 NC_C6 NC_AE21
R26 HT_RXCTL#1 HT_TXCTL#1 P25 CTLON1 T102 C9 NC_C9 NC_AE22 AE22 R267 820 NC_AH23 R46 *680 TRST#
CTLIN0 R29 P27 CTLON0 C20 AG2
5 CTLIN0 HT_RXCTL#0 HT_TXCTL#0 CTLON0 5 NC_C20 NC_AG2
C23 NC_C23 NC_AG4 AG4
C24 NC_C24 NC_AG6 AG6
D3 NC_D3 NC_AG7 AG7
F3 AG9 NC_A19 DBREQ#
NC_F3 NC_AG9
add c154,c283,c284,c285 4.7u J3 NC_J3 NC_AH1 AH1
AF18 R77 0 ESD C764 ESD C765
2.5VSUS
c9,c277 100u change to 220u NC_AF18
REV.B +3V REV.D *.1U REV.D *.1U
VDDA_1V2 VDDA_1V2
+3V
C277 220U/6.3V C9 220U
+
R32 R35 R38

C154 4.7U C284 4.7U
100/F
2
Q28 2N7002E 10K 10K

C285 4.7U C283 4.7U
1 THDAT_SMB
B C161 4.7U C168 4.7U
30,36 MBDATA 3
6657VCC H/W MONITOR CON1 REV.B B
DBREQ# 1
C146 4.7U C286 4.7U +3V DBRDY DBREQ_L
2 DBRDY
C111 U18 TCK 3
C141 0.22U C126 0.22U .1U/16V/0402 TMS TCK
4 TMS
2
1 8 THCLK_SMB TDI 5
C465 0.22U C470 0.22U Q8 2N7002E VCC SMCLK TRST# TDI
6 TRST_L
30,36 MBCLK 3 1 THCLK_SMB THERMDA 2 DXP SMDATA 7 THDAT_SMB TDO 7 TDO
C473 0.22U C175 0.22U 8 +2.5V
3 DXN -ALT 6 TEMP_ALARM# 13 +2.5V 9 +2.5V
C466 0.22U C171 0.22U C431 10
2200P/50V KEY-NC
4 -OVT GND 5 REV.B 10 RES
C469 0.22U C184 0.22U THERMDC LDT_RST# 11 RES
C117 0.22U C187 0.22U
MAX6657/GMT-781 12 RES
37 1999_RST# 13 RES
14 RES
C119 0.22U C472 0.22U
*HDT
1.Remove R386,Q33, connect
U18 pin 6 to TEMP_ALARM#.
50 Mils, routing as 15 mils width if the
distance from bead to cpu pin less than 1000 Output current(Max):
mils. 300mA
+3V VDDA_2.5V
U6 L21
REV.C
3 VIN VOUT 4
TI201209G121
1
+2.5V
A Ra C311 A
2
C308 1 R80 C721 C722 C723 C724 +2.5V 3V_S5

SHDN 100U/6.3V REV.B
10U/10V 100K/F 100P 4.7U 0.22U R257
2
1
680
2 5 3300P R89 R86
GND SET CPUPWRGD 1K 10K
REV.B CPUPWRGD 12
PROJECT : CT8
2
G923 R79 C766

2. Change C311 from 10u to 100u, ESD
100K/F remove C304. REV.D *.1U THERMTRIP# 1 3 THERM_CPUDIE#
THERM_CPUDIE# 13,30
Q14 Size Document Number Rev
Rb Vout=1.25(1+Ra/Rb) MMBT3904 Custom CPU H.T/CTL I/F 3A
5
Ra=Rb(Vout/1.25-1) 4 3 2
Date: Thursday, April 14, 2005
1
Sheet 3 of 42
5 4 3 2 1
CPU VTT_DDR U22B

AMD K8
MEMORY
VTT_DDR
20 mils width to CPU pins.
VCC_CORE
U22D
AMD K8
POWER
2.5VSUS 2.5VSUS
C148 220U
VCC_CORE
C267 330U
+
A18 VTT_A1 VTT_B1 AF16
B17 VTT_A2 VTT_B2 AG15 B20 VDD1 VDDIO1 D5
U22E C163 220U C225 330U
+
C16 VTT_A3 VTT_B3 AG16 B24 VDD2 VDDIO2 D7
AMD K8 C17 AH16 D24 D9
GROUND VTT_A4 VTT_B4 VDD3 VDDIO3 C243 330U
REV.B
+
B2 VSS1 VSS110 R28 D17 VTT_A5 VTT_B5 AJ17 E19 VDD4 VDDIO4 D11
B4 VSS2 VSS111 T2 41 VTT_SENSE AE13 VTT_SENSE E21 VDD5 VDDIO5 D13
B6 VSS3 VSS112 T7 E23 VDD6 VDDIO6 D15 REV.B
B8 T9 E28 E4 C178 *4.7U
VSS4 VSS113 MEMZN VDD7 VDDIO7
B10 VSS5 VSS114 T21 D14 MEMZN MEMRESET# AG10MEMRST# T119 F18 VDD8 VDDIO8 F6
B12 T23 MEMZP C14 AG121.25VREF F20 F8 C177 *4.7U C451 4.7U
D VSS6 VSS115 MEMZP MEMVREF1 VDD9 VDDIO9 D
B14 VSS7 VSS116 T26 F22 VDD10 VDDIO10 F10
B16 U6 MD63 A16 N3 F24 F12 C182 4.7U C207 4.7U
VSS8 VSS117 MEMDATA63 MEMCHECK7 T289 VDD11 VDDIO11
B22 U8 MD62 B15 N1 F26 F14
B25 U10 MD61 A12 U3 G11 F16 C180 4.7U C456 4.7U
B26 U20 MD60 B11 V1 G13 G4
B28 U22 MD59 A17 N2 G15 G7 C179 4.7U C237 4.7U
C25 U24 MD58 A15 P1 G17 G9
C27 V2 MD57 C13 U1 G19 H6 C314 4.7U C444 4.7U
C29 V7 MD56 A11 U2 G21 H8
D2 V9 MD55 A10 G23 J4 C181 4.7U C238 4.7U
VSS16 VSS125 MD54 MEMDATA55 CS#7 VDD19 VDDIO19
D16 VSS17 VSS126 V21 B9 MEMDATA54 MEMCS#7 D8 T87 H10 VDD20 VDDIO20 J7
D19 V23 MD53 C7 C8 CS#6 H12 K6 C313 4.7U C457 4.7U
VSS18 VSS127 MEMDATA53 MEMCS#6 T79 VDD21 VDDIO21
D21 W6 MD52 A6 E8 CS#5 H14 L4
D23 W8 MD51 C11 E7 CS#4 H16 M6 C258 1U C223 4.7U
D26 W10 MD50 A9 D6 CS#3 CS#3 10,11 H18 N4
VSS21 VSS130 MD49 MEMDATA50 MEMCS#3 CS#2 VDD24 VDDIO24 C262 1U C224 4.7U
D28 VSS22 VSS131 W20 A5 MEMDATA49 MEMCS#2 E6 CS#2 10,11 H20 VDD25 VDDIO25 P6
E15 W22 MD48 B5 C4 CS#1 CS#1 9,11 H22 R4
VSS23 VSS132 MD47 MEMDATA48 MEMCS#1 CS#0 VDD26 VDDIO26 C268 1U C208 4.7U
E16 VSS24 VSS133 W24 C5 MEMDATA47 MEMCS#0 E5 CS#0 9,11 H24 VDD27 VDDIO27 T6
E18 W28 MD46 A4 J9 U4
VSS25 VSS134 MD45 MEMDATA46 VDD28 VDDIO28
E22 VSS26 VSS135 Y2 E2 MEMDATA45 MEMCKEB AE7 CKE1 J11 VDD29 VDDIO29 V6 C450 4.7U
E24 Y7 MD44 E1 AE8 CKE0 J13 W4 C324 0.22U
VSS27 VSS136 MD43 MEMDATA44 MEMCKEA VDD30 VDDIO30 C445 4.7U
F2 VSS28 VSS137 Y9 A3 MEMDATA43 J15 VDD31 VDDIO31 Y6
F7 Y11 MD42 B3 C10 DCLK#7 DCLK#7 9 J17 AA4 C226 0.22U
VSS29 VSS138 MD41 MEMDATA42 MEMCLK#7 VDD32 VDDIO32
F9 VSS30 VSS139 Y13 E3 MEMDATA41 MEMCLK7 D10 DCLK7 DCLK7 9 DCLK#7 R53 120/F DCLK7 J19 VDD33 VDDIO33 AA7 C248 0.22U
F11 Y15 MD40 F1 E11 DCLK#6 DCLK#6 10 DCLK#6 R52 120/F DCLK6 J21 AB6 C336 0.22U
F13 VSS32 VSS141 Y17 G2 MEMDATA39 MEMCLK6 E12 DCLK6 DCLK6 10 DCLK#5 R69 120/F DCLK5 J23 VDD35 VDDIO35 AB8 C240 0.22U
F15 Y19 MD38 G1 AG8 DCLK#5 DCLK#5 9 DCLK#4 R75 120/F DCLK4 J28 AC4 C299 0.22U
F17 VSS34 VSS143 Y21 L3 MEMDATA37 MEMCLK5 AF8 DCLK5 DCLK5 9 K8 VDD37 VDDIO37 AC7 C192 0.22U
F19 Y23 MD36 L1 AE10 DCLK#4 DCLK#4 10 K10 AC9 C166 0.22U
F21 VSS36 VSS145 Y26 G3 MEMDATA35 MEMCLK4 AF10 DCLK4 DCLK4 10 LAYOUT: Place close to CPU. K12 VDD39 VDDIO39 AD6 C229 0.22U
F23 AA6 MD34 J2 V4 DCLK#3 K14 AD8 C176 0.22U
C VSS37 VSS146 MEMDATA34 MEMCLK#3 T111 VDD40 VDDIO40 C
G6 AA8 MD33 L2 V3 DCLK3 K16 AD10 C190 0.22U
VSS38 VSS147 MEMDATA33 MEMCLK3 T110 VDD41 VDDIO41
G8 AA10 MD32 M1 K4 DCLK#2 K18 AD12 C288 0.1U
VSS39 VSS148 MEMDATA32 MEMCLK#2 T99 VDD42 VDDIO42
G10 AA12 MD31 W1 K5 DCLK2 K20 AD14 C256 0.22U
VSS40 VSS149 MEMDATA31 MEMCLK2 T100 VDD43 VDDIO43
G12 AA14 MD30 W3 P5 DCLK#1 K22 AD16 C307 0.1U
G14 VSS42 VSS151 AA16 AC1 MEMDATA29 MEMCLK1 R5 DCLK1 K24 VDD45 VDDIO45 AE4 C253 0.22U
G16 AA18 MD28 AC3 P4 DCLK#0 K26 AF5
G18 VSS44 VSS153 AA20 W2 MEMDATA27 MEMCLK0 P3 DCLK0 L7 VDD47 VDDIO47 AF7 C247 1U C448 0.22U
G20 AA22 MD26 Y1 L9 AF9
VSS45 VSS154 MD25 MEMDATA26 MEMBAA1 VDD48 VDDIO48 C272 1U C454 0.22U
G22 VSS46 VSS155 AA24 AC2 MEMDATA25 MEMBANKA1 K3 MEMBAA1 9,11 L21 VDD49 VDDIO49 AF11
G24 AB2 MD24 AD1 H3 MEMBAA0 MEMBAA0 9,11 L23 AF13
VSS47 VSS156 MD23 MEMDATA24 MEMBANKA0 RAS#A VDD50 VDDIO50
G28 VSS48 VSS157 AB7 AE1 MEMDATA23 MEMRASA# H5 RAS#A 9,11 M8 VDD51
H2 AB9 MD22 AE3 D4 CAS#A M10 Y12 VCC_CORE
VSS49 VSS158 MEMDATA22 MEMCASA# CAS#A 9,11 VDD52 VDD93
H7 AB11 MD21 AG3 G5 WE#A WE#A 9,11 M20 Y14
VSS50 VSS159 MD20 MEMDATA21 MEMWEA# VDD53 VDD94
H9 VSS51 VSS160 AB13 AJ4 MEMDATA20 M22 VDD54 VDD95 Y16
H11 AB15 MD19 AE2 E13 MAA15 M24 Y18 C194 0.1U
VSS52 VSS161 MEMDATA19 NC_MEMADDA15 T86 VDD55 VDD96
H13 AB17 MD18 AF1 C12 MAA14 N7 Y20
VSS53 VSS162 MEMDATA18 NC_MEMADDA14 T95 VDD56 VDD97
H15 AB19 MD17 AH3 E10 MAA13 N9 Y22 C254 0.1U
VSS54 VSS163 MD16 MEMDATA17 MEMADDA13 MAA12 VDD57 VDD98
H17 VSS55 VSS164 AB21 AJ3 MEMDATA16 MEMADDA12 AE6 N21 VDD58 VDD99 Y24
H19 AB23 MD15 AJ5 AF3 MAA11 N23 AA9 C193 0.1U
H21 VSS57 VSS166 AC6 AJ6 MEMDATA14 MEMADDA10 M5 N28 VDD60 VDD101 AA11
H23 AC8 MD13 AJ7 AE5 MAA9 P8 AA13 C216 0.1U
H26 VSS59 VSS168 AC10 AH9 MEMDATA12 MEMADDA8 AB5 CKE0 P10 VDD62 VDD103 AA15
J6 AC12 MD11 AG5 AD3 MAA7 CKE0 9,11 P20 AA17 C205 0.1U
VSS60 VSS169 MEMDATA11 MEMADDA7 CKE1 CKE1 10,11 VDD63 VDD104
J8 AC14 MD10 AH5 Y5 MAA6 P22 AA19
VSS61 VSS170 MD9 MEMDATA10 MEMADDA6 MAA5 VDD64 VDD105 C244 0.1U
J10 VSS62 VSS171 AC16 AJ9 MEMDATA9 MEMADDA5 AB4 P24 VDD65 VDD106 AA21
J12 AC18 MD8 AJ10 Y3 MAA4 P26 AA23
VSS63 VSS172 MEMDATA8 MEMADDA4 MD[63..0] MD[63..0] 11 VDD66 VDD107
J14 AC20 MD7 AH11 V5 MAA3 R7 AA28 C231 0.1U
J16 VSS65 VSS174 AC22 AJ11 MEMDATA6 MEMADDA2 T5 DQS[7..0] R9 VDD68 VDD109 AB10
J18 AC24 MD5 AH15 T3 MAA1 DQS[7..0] 11 R21 AB12 C206 0.1U
J20 VSS67 VSS176 AC28 AJ15 MEMDATA4 MEMADDA0 N5 DM[7..0] R23 VDD70 VDD111 AB14
J22 AD2 MD3 AG11 DM[7..0] 11 T8 AB16 C245 0.1U
B VSS68 VSS177 MD2 MEMDATA3 MEMBAB1 VDD71 VDD112 B
J24 VSS69 VSS178 AD7 AJ12 MEMDATA2 MEMBANKB1 L5 MEMBAB1 10,11 MAA[13..0] T10 VDD72 VDD113 AB18
K2 AD9 MD1 AJ14 J5 MEMBAB0 MAA[13..0] 9,11 T20 AB20 C222 0.1U
VSS70 VSS179 MEMDATA1 MEMBANKB0 MEMBAB0 10,11 VDD73 VDD114
K7 AD11 MD0 AJ16 H4 RAS#B RAS#B 10,11 T22 AB22
VSS71 VSS180 MEMDATA0 MEMRASB# MAB[13..0] MAB[13..0] 10,11 VDD74 VDD115
K9 AD13 F5 CAS#B CAS#B 10,11 T24 AB24 C257 0.1U
VSS72 VSS181 MEMCASB# WE#B VDD75 VDD116
K11 VSS73 VSS182 AD15 T104 R1 MEMDQS17 MEMWEB# F4 WE#B 10,11 U7 VDD76 VDD117 AB26
K13 AD17 DM7 A13 U9 AC11 C199 0.1U
VSS74 VSS183 DM6 MEMDQS16 MAB15 VDD77 VDD118
K15 VSS75 VSS184 AD19 A7 MEMDQS15 NC_MEMADDB15 E14 T98 U21 VDD78 VDD119 AC13
K17 AD21 DM5 C2 D12 MAB14 U23 AC15 C455 0.1U
VSS76 VSS185 MEMDQS14 NC_MEMADDB14 T75 VDD79 VDD120
K19 AD23 DM4 H1 E9 MAB13 U28 AC17
VSS77 VSS186 DM3 MEMDQS13 MEMADDB13 MAB12 VDD80 VDD121 C215 0.1U
K21 VSS78 VSS187 AD26 AA1 MEMDQS12 MEMADDB12 AF6 V8 VDD81 VDD122 AC19
K23 AE14 DM2 AG1 AF4 MAB11 V10 AC21
VSS79 VSS188 DM1 MEMDQS11 MEMADDB11 MAB10 VDD82 VDD123 C198 0.1U
L6 VSS80 VSS189 AE16 AH7 MEMDQS10 MEMADDB10 M4 V20 VDD83 VDD124 AC23
L8 AE20 DM0 AH13 AD5 MAB9 V22 AD18
VSS81 VSS190 MEMDQS9 MEMADDB9 MAB8 VDD84 VDD125 C232 0.1U
L10 VSS82 VSS191 AE29 T103 T1 MEMDQS8 MEMADDB8 AC5 V24 VDD85 VDD126 AD20
L20 AF2 DQS7 A14 AD4 MAB7 V26 AD22
VSS83 VSS192 DQS6 MEMDQS7 MEMADDB7 MAB6 VDD86 VDD127 C255 0.1U
L22 VSS84 VSS193 AF17 A8 MEMDQS6 MEMADDB6 AA5 W7 VDD87 VDD128 AD24
L24 AF19 DQS5 D1 AB3 MAB5 W9 AE17
L28 VSS86 VSS195 AF26 J1 MEMDQS4 MEMADDB4 Y4 W21 VDD89 VDD130 AE25
M2 AF28 DQS3 AB1 W5 MAB3 W23 AE27
M7 VSS88 VSS197 AG20 AJ2 MEMDQS2 MEMADDB2 U5 Y8 VDD91 VDD132 AG19
M9 AG21 DQS1 AJ8 T4 MAB1 Y10 AH24
M21 VSS90 VSS199 AG22 AJ13 MEMDQS0 MEMADDB0 M3
M23 VSS91 VSS200 AG23
M26 AG24 C447 0.1U
VSS92 VSS201
N6 VSS93 VSS202 AG25
N8 AG27 C246 0.1U
VSS94 VSS203
N10 VSS95 VSS204 AG29
N20 AH2 2.5VSUS C191 0.1U
VSS96 VSS205 2.5VSUS
N22 VSS97 VSS206 AH4
N24 AH6 DCLK#1 R58 10K C213 0.1U
VSS98 VSS207
P2 VSS99 VSS208 AH8
A P7 AH10 DCLK#0 R59 10K A
VSS100 VSS209 R254
P9 VSS101 VSS210 AH12
VTT_DDR
W/S 15/20 mils
P21 AH14 60 mils DCLK0 R60 10K C468
VSS102 VSS211 100/F
P23 VSS103 VSS212 AH20
R6 AH22 DCLK1 R62 10K 0.1U
VSS104 VSS213 1.25VREF
R8 VSS105 VSS214 AH26
R10 AH28 C142 C292 C293 C139
VSS106 VSS215 C475
R20 AJ20
R22
VSS107 VSS216
AJ22 0.22U 0.22U 4.7U 4.7U 2.5VSUS R255 C471 C467 C474 PROJECT : CT8
VSS108 VSS217 100/F 0.1U 1000P 0.01U *100P
R24 AJ24
VSS109 VSS218
VSS219 AJ26 MEMZN R45 34.8/F Quanta Computer Inc.
MEMZP R47 34.8/F Size Document Number Rev
Custom CPU DDR/POWER I/F 2A

5 4 3 2 1
5 4 3 2 1
CLG Link 0 Is Clawhammer <--> RS480
CADOP15 T26
U17A
HT_RXCAD15P HT_TXCAD15P R24 CADIP15

CADON15 CADIN15
CADOP14
R26 HT_RXCAD15N PART 1OF6 HT_TXCAD15N R25
CADIP14
U25 HT_RXCAD14P HT_TXCAD14P N26
CADON14 U24 P26 CADIN14
CADOP13 HT_RXCAD14N HT_TXCAD14N CADIP13
V26 HT_RXCAD13P HT_TXCAD13P N24
CADON13 U26 N25 CADIN13
W25 HT_RXCAD12P HT_TXCAD12P L26
CADON12 W24 M26 CADIN12
AA25 HT_RXCAD11P HT_TXCAD11P J26
D CADON11 AA24 K26 CADIN11 D
AB26 HT_RXCAD10P HT_TXCAD10P J24
CADON10 AA26 J25 CADIN10
AC25 HT_RXCAD9P HT_TXCAD9P G26
CADON9 AC24 H26 CADIN9
AD26 HT_RXCAD8P HT_TXCAD8P G24
CADOP[0..15] CADON8 AC26 G25 CADIN8 CADIP[0..15]
3 CADOP[0..15] HT_RXCAD8N HT_TXCAD8N CADIP[0..15] 3
CADON[0..15] CADOP7 R29 L30 CADIP7 CADIN[0..15]
3 CADON[0..15] HT_RXCAD7P HT_TXCAD7P CADIN7 CADIN[0..15] 3
CADON7 R28 M30
T30 HT_RXCAD6P HT_TXCAD6P L28
CADON6 R30 L29 CADIN6
HT_RXCAD6N HT_TXCAD6N
HYPER TRANSPORT CPU

CADOP5 T28 J29 CADIP5
CADON5 HT_RXCAD5P HT_TXCAD5P CADIN5
T29 HT_RXCAD5N HT_TXCAD5N K29
CADOP4 V29 H30 CADIP4
U29 HT_RXCAD4N HT_TXCAD4N H29
CADOP3 Y30 E29 CADIP3
W30 HT_RXCAD3N HT_TXCAD3N E28
CADOP2 Y28 D30 CADIP2
Y29 HT_RXCAD2N HT_TXCAD2N E30
CADOP1 AB29 D28 CADIP1
AA29 HT_RXCAD1N HT_TXCAD1N D29
CADOP0 AC29 B29 CADIP0
AC28 HT_RXCAD0N HT_TXCAD0N C29
3 CLKOP1 Y26 HT_RXCLK1P HT_TXCLK1P L24 CLKIP1 3

3 CLKON1 W26 HT_RXCLK1N HT_TXCLK1N L25 CLKIN1 3
3 CLKOP0 W29 HT_RXCLK0P HT_TXCLK0P F29 CLKIP0 3

3 CLKON0 W28 HT_RXCLK0N HT_TXCLK0N G29 CLKIN0 3
3 CTLOP0 P29 HT_RXCTLP HT_TXCTLP M29 CTLIP0 3

C C
3 CTLON0 N29 HT_RXCTLN HT_TXCTLN M28 CTLIN0 3
R233 49.9/F HT_RXCALP D27 B28 HT_TXCALP R235 100/F
VDDA_1V2 HT_RXCALN HT_TXCALP
I/F
R234 49.9/F HT_RXCALN E27 A28 HT_TXCALN
HT_RXCALP HT_TXCALN
RS480M
U17B
PART 2 OF 6
GFX_RX0P D8 A7 GFX_TX0P_C
T32 GFX_RX0P GFX_TX0P T228
GFX_RX0N D7 B7 GFX_TX0N_C
T226 GFX_RX0N GFX_TX0N T227
GFX_RX1P D5 B6 GFX_TX1P_C
GFX_RX1N D4 B5 GFX_TX1N_C
GFX_RX2P E4 A5 GFX_TX2P_C
GFX_RX2N F4 A4 GFX_TX2N_C
GFX_RX3P G5 B3 GFX_TX3P_C
GFX_RX3N G4 B2 GFX_TX3N_C
GFX_RX4P H4 C1 GFX_TX4P_C
GFX_RX4N J4 D1 GFX_TX4N_C
GFX_RX5P H5 D2 GFX_TX5P_C
GFX_RX5N H6 E2 GFX_TX5N_C
GFX_RX6P G1 F2 GFX_TX6P_C
GFX_RX6N G2 F1 GFX_TX6N_C
GFX_RX7P K5 H2 GFX_TX7P_C
T29 GFX_RX7P
PCIE I/F TO GFX_TX7P T181
GFX_RX7N K4 J2 GFX_TX7N_C
GFX_RX8P L4 J1 GFX_TX8P_C
B T177 GFX_RX8P GFX_TX8P T180 B
GFX_RX8N M4 K1 GFX_TX8N_C
GFX_RX9P N5 K2 GFX_TX9P_C
GFX_RX9N N4 L2 GFX_TX9N_C
T166 T167
VIDEO
GFX_RX10P GFX_RX9N GFX_TX9N GFX_TX10P_C
T168 P4 GFX_RX10P GFX_TX10P M2 T169
GFX_RX10N R4 M1 GFX_TX10N_C
GFX_RX11P P5 N1 GFX_TX11P_C
GFX_RX11N P6 N2 GFX_TX11N_C
GFX_RX12P P2 R1 GFX_TX12P_C
GFX_RX12N R2 T1 GFX_TX12N_C
GFX_RX13P T5 T2 GFX_TX13P_C
GFX_RX13N T4 U2 GFX_TX13N_C
GFX_RX14P U4 V2 GFX_TX14P_C
GFX_RX14N V4 V1 GFX_TX14N_C
GFX_RX15P W1 Y2 GFX_TX15P_C
GFX_RX15N W2 AA2 GFX_TX15N_C
GPP_RX0P AE1 AD2 GPP_TX0P_C

T193 GPP_RX0P GPP_TX0P T163
GPP_RX0N AE2 AD1 GPP_TX0N_C
T190 GPP_RX0N GPP_TX0N T171
GPP_RX1P AB2 AA1 GPP_TX1P_C
GPP_RX1N AC2 AB1 GPP_TX1N_C
GPP_RX2P
PCIE I/F TO SLOT GPP_TX2P_C
T339 AB5 GPP_RX2P GPP_TX2P Y5 T17
GPP_RX2N AB4 Y6 GPP_TX2N_C
GPP_RX3P Y4 W5 GPP_TX3P_C
GPP_RX3N AA4 W4 GPP_TX3N_C
A_RX0P AG1 AF2 A_TX0P_C C16

12 A_RX0P SB_RX0P SB_TX0P 0.1U A_TX0P 12
A_RX0N AH1 AG2 A_TX0N_C C17
A 12 A_RX0N SB_RX0N SB_TX0N 0.1U A_TX0N 12 A
A_RX1P
PCIE I/F TO SB A_TX1P_C C14
12 A_RX1P AC5 SB_RX1P SB_TX1P AC4 A_TX1P 12
A_RX1N AC6 AD4 A_TX1N_C 0.1U C15
12 A_RX1N SB_RX1N SB_TX1N 0.1U A_TX1N 12
R14 10K/F AH3 AH2 R9 150/F
R16 8.25K/F AJ3 PCE_ISET PCE_PCAL
PCE_TXISET PCE_NCAL AJ2 R12 82.5/F
VDDA_1V2
REV.B
REV.C REV.C PROJECT : CT8
RS480M

Custom RS480M-HT A-LINK0 3A

5 4 3 2 1
5 4 3 2 1
CLG
U17C
D MEMAA0 AF17 AF28 MDA0 D
T57 MEM_A0 MEM_DQ0 T279
MEMAA1 MDA1
T246
MEMAA2
AK17 MEM_A1 PART 3 OF 6 MEM_DQ1 AF27
MDA2
T81
T241 AH16 MEM_A2 MEM_DQ2 AG28 T85
MEMAA3 AF16 AF26 MDA3
MEMAA4 AJ22 AE25 MDA4
MEMAA5 AJ21 AE24 MDA5
MEMAA6 AH20 AF24 MDA6
MEMAA7 AH21 AG23 MDA7
MEMAA8 AK19 AE29 MDA8
MEMAA9 AH19 AF29 MDA9
MEMAA10 AJ17 AG30 MDA10
MEMAA11 AG16 AG29 MDA11
MEMAA12 AG17 AH28 MDA12
MEMAA13 AH17 AJ28 MDA13
MEMAA14 AJ18 AH27 MDA14
AJ27 MDA15
MEM_DQ15 T274
DQMA#0 AG26 AE23 MDA16
T88 MEM_DM0 MEM_DQ16 T69
DQMA#1 AJ29 AG22 MDA17
DQMA#2 AE21 AF23 MDA18
DQMA#3 AH24 AF22 MDA19
DQMA#4 AH12 AE20 MDA20
DQMA#5 AG13 AG19 MDA21
DQMA#6 AH8 AF20 MDA22
DQMA#7 AE8 AF19 MDA23
AH26 MDA24
MEM_DQ24 T273
QSP0 AF25 AJ26 MDA25
T83 MEM_DQS0P MEM_DQ25 T272
QSP1 AH30 AK26 MDA26
QSP2 AG20 AH25 MDA27
QSP3 AJ25 AJ24 MDA28
QSP4 AH13 AH23 MDA29
C T238 MEM_DQS4P MEM_DQ29 T263 C
QSP5 AF14 AJ23 MDA30
QSP6 AJ7 AH22 MDA31
QSP7 AG8 AK14 MDA32
MDA33
MEM_A I/F
MEM_DQ33 AH14 T36
M_QSN0 AG25 AK13 MDA34
T265 MEM_DQS0N MEM_DQ34 T239
M_QSN1 AH29 AJ13 MDA35
M_QSN2 AF21 AJ11 MDA36
M_QSN3 AK25 AH11 MDA37
M_QSN4 AJ12 AJ10 MDA38
M_QSN5 AF13 AH10 MDA39
M_QSN6 AK7 AE15 MDA40
M_QSN7 AF9 AF15 MDA41
AG14 MDA42
MEM_DQ42 T49
RASA# AE17 AE14 MDA43
T50 MEM_RAS# MEM_DQ43 T45
CASA# AH18 AE12 MDA44
T250 MEM_CAS# MEM_DQ44 T41
WEA# AE18 AF12 MDA45
T53 MEM_WE# MEM_DQ45 T40
CSA#0 AJ19 AG11 MDA46
T254 MEM_CS# MEM_DQ46 T35
M_CKEA AF18 AE11 MDA47
T58 MEM_CKE MEM_DQ47 T39
AJ9 MDA48
MEM_DQ48 T230
M_CLKA0 AK16 AH9 MDA49
T244 MEM_CKP MEM_DQ49 T229
M_CLKA#0 AJ16 AJ8 MDA50
T243 MEM_CKN MEM_DQ50 T222
AK8 MDA51
MEM_DQ51 T223
AH7 MDA52
MEM_DQ52 T224
+2.5V AJ6 MDA53
MEM_DQ53 T212
AH6 MDA54
MEM_DQ54 T209
C130 0.47U MEM_CAP1 AE28 AJ5 MDA55
MEM_CAP1 MEM_DQ55 T205
C23 0.47U MEM_CAP2 AJ4 AG10 MDA56
MEM_CAP2 MEM_DQ56 T26
AF11 MDA57
MEM_DQ57 T20
AF10 MDA58
MEM_DQ58 T33
R29 AE9 MDA59
B MEM_DQ59 T34 B
C62 R31 1K MEM_VMODE AJ20 AG7 MDA60
0.1U MEM_VMODE MEM_DQ60 T217
1K AF8 MDA61
MEM_DQ61 T21
Stuff AF7 MDA62
MEM_DQ62 T14
MEM_VREF AK20 AE7 MDA63
MEM_VREF MEM_DQ63 T24
Side-Port not used AJ15 MPVDD MEM_COMPP AH5 MEM_COMPP R22 *61.9/F
R30 MEM_VREF to 2.5VSUS AJ14 AD30MEM_COMPN R43 *61.9/F +2.5V
MPVSS MEM_COMPN
1K
C72 RS480M
0.1U
L5 MPVDD_PLL
+1.8V
TI201209G121
C45
Side-Port not used 1U
MPVDD to 1.8V
Decouple to MPVSS near the ball
A A
PROJECT : CT8
Custom RS480M-SIDE PORT MEM I/F 1A

5 4 3 2 1
5 4 3 2 1
CLG EMI
+3V
C711
0.1U
C712
0.1U
C713
0.1U
C714
0.1U
C715
0.1U
C716
0.1U
C745
0.1U
C746
0.1U
C747
0.1U
+3V
L14
*BK2125HS220
AVDD
(2.5V)
40 mils JOINT
JOINT
AVSSN
C118 AVSSQ
REV.B
1U
JOINT
AVSSN AVSSDI
U17D
D +1.8V D
B27 AVDD1 PART 4 OF 6
C717 C718 C719 C720 20 mils +1.8V 20 mils JOINT
EMI C27
D26
AVDD2
AVSSN1
TXOUT_U0P
TXOUT_U0N
D18
C18
T63
T59
PLLVSS
REV.B 0.1U 0.1U 0.1U 0.1U R36 0 AVDDDI D25 B19
AVSSN2 TXOUT_U1P T247
C24 AVDDDI TXOUT_U1N A19 T251
AVDDQ C98 B24 D19
AVSSDI TXOUT_U2P T54
C19 JOINT
1U TXOUT_U2N T252
(1.8V) E24 D20 LPVSS
CRT/TVOUT
AVDDQ TXOUT_U3P T60
D24 AVSSQ TXOUT_U3N C20 T257
C102 DO NOT SHARE GND VIA ON JOINT
1U
AVSSDI 32 S-CD1 B25 C TXOUT_L0P B16 TXLOUT0+ 18
32 S-YD1 A25 Y TXOUT_L0N A16 TXLOUT0- 18
32 S-CVBS1 A24 COMP TXOUT_L1P D16 TXLOUT1+ 18
AVSSQ TXOUT_L1N C16 TXLOUT1- 18
31 CRT_R C25 RED TXOUT_L2P B17 TXLOUT2+ 18
+1.8V A26 A17
AVDDQ AVDD +2.5V 31 CRT_G GREEN TXOUT_L2N TXLOUT2- 18
31 CRT_B B26 BLUE TXOUT_L3P E17 T43
D17
LVDS
TXOUT_L3N T55
L16 L18 A11
31 VSYNC DAC_VSYNC
TI201209G121 TI201209G121 B11 B20
31 HSYNC DAC_HSYNC TXCLK_UP T259
C158 R37 715/F C26 A20
RSET TXCLK_UN T258 +1.8V +1.8V
C137 C120 C143 E11 B18
31 DDCCLK DAC_SCL TXCLK_LP TXLCLKOUT+ 18
1U F11 C17 25 mils
1U 31 DDCDAT DAC_SDA TXCLK_LN TXLCLKOUT- 18
10U 10U
E18 LPVDD L8
PLLVDD LPVDD TI201209G121
AVSSQ AVSSN 20 mils LPVSS F17 25 mils
(1.8V) A14 E19 LVDDR18D L11
PLL PWR
PLLVDD PLLVDD LVDDR18D TI201209G121 LVDDR18A L10
B14 PLLVSS LVDDR18A_1 G20
C51 20 mils H20 TI201209G121
HTPVDD LVDDR18A_2 C80 C91
+1.8V
M23 HTPVDD 25 mils
C L6 1U (1.2V) L23 G19 LPVSS C65 C64 C81 C75 C
TI201209G121 C90 HTPVSS LVSSR1 0.1U 1U
PLLVSS LVSSR2 E20
1U
F20 0.1U 0.1U 4.7U
C56 C37 1U LVSSR3
12,34 NB_RST# LVSSR4 H18
R17 HTPVSS D14 G18
PM
10U 1U R404 0 NB_PWRGD_R SYSRESET# LVSSR5
REV.B 4.7K 18,30 PWROK B15 POWERGOOD LVSSR6 F19
3,12 LDTSTOP# B12 LDTSTOP# LVSSR7 H19
12 ALLOW_LDTSTOP C12 ALLOW_LDTSTOP LVSSR8 F18
PLLVSS 13 SUS_STAT# AH4 SUS_STAT#
+3V L3 VDDR3 E14
LVDS_DIGON DISP_ON 18
TI201209G121 C44 F14
+1.8V LVDS_BLON LCD_BLON 18
H13 VDDR3_1 LVDS_BLEN F13 CPIS_BLEN 18
HTPVDD 1U H12
NB_PWRGD_R VDDR3_2
GFX_CLKP B8 NBSRCCLK 2
LDTSTOP# A13 A8
2 OSC14M OSCIN GFX_CLKN NBSRCCLK# 2
L17 R26 22 SB_OSC_INT_R B13
2,13 SB_OSC_INT OSCOUT
150/F REV.B P23 R44 10K/F
C138 C121
REV.C C740 C741 CLOCKs HTTSTCLK
HTREFCLK N23 HTREFCLK 2
REV.C
EMI *330p 1000P E8
1U SB_CLKP SBLINKCLK 2
10U RS480_TVCLKIN B9 E7
TVCLKIN SB_CLKN SBLINKCLK# 2
ESD
HTPVSS REV.D
R221 SPMEM_EN# F12 C13 DFT_GPIO3 R226 *3K
LOAD_ROM# DFT_GPIO0/RSV DFT_GPIO3/RSV DFT_GPIO4 R224 *3K
10K E13 DFT_GPIO1/RSV DFT_GPIO4/RSV C14
R227 *3K DFT_GPIO2 D13 C15 DFT_GPIO5 R229 *3K
DFT_GPIO2/RSV DFT_GPIO5/RSV
AVDD DAC VDD (2.5V) A10 R222 1K
TMDS_HPD
12 BMREQ# F10 BMREQb
AVDDDI DIGITAL VDD (1.8V) EDIDCLK C10 E10
B 18 EDIDCLK I2C_CLK STRP_DATA POWER_PLAY B
I2C_DATA C11
AVDDQ DAC2 BANDGAP REF (1.8V) T6 AF4
I2C_DATA
THERMALDIODE_P
MIS. DDC_DATA B10 EDIDDATA 18
T8 AE4 THERMALDIODE_N
PLLVDD PLL VDD (1.8V) TESTMODE E12
ROUTING H_THRMDA AND HW_AGND AS DIFFERENTIAL PAIR
HTPVDD HT PLL VDD (1.8V) R225 +3V
RS480M
4.7K
R23
PUT AVDD, AVDDDI, AVDDQ,PLVDD,HTPVDD 2K
DECOUPLING CAPS ON THEBOTTOM, CLOSE
TO BALLS
REV.B DEL Y1 AND U3 CIRCUIT. R21

JOINT *2K
AVSSN
JOINT
AVSSQ
JOINT LOAD_ROM#:LOAD ROM STRAP ENABLE strap

AVSSDI
+3V
High, LOAD ROM STRAP DISABLE
JOINT Low, LOAD ROM STRAP ENABLE
A PLLVSS LOAD_ROM# R27 *3K A
R20 R228 R223

SPMEM_EN#:SIDE PORT MEMORY ENABLE strap 4.7K 4.7K 4.7K
SPMEM_EN# R28 *3K
JOINT
HTPVSS NC, SIDE PORT MEMORY DISABLE EDIDCLK
PROJECT : CT8
Low, SIDE PORT MEMORY ENABLE I2C_DATA
DO NOT SHARE GND VIA ON JOINT Quanta Computer Inc.
EDIDDATA
Custom RS480M-VIDEO & CLKGEN 3A

5 4 3 2 1
5 4 3 2 1
CLG
VSSA22
VSSA59
NB RS480 POWER STATES
AG3
AD3
AD5
AD6
M24
M27
AE5
AA6
AA3
AB3
AE3
AB7
AA5
AB8
AF3
H28
N19
H24
N28
U28
R23
K28
P25
P28
E26
K25
V25
V28
AJ1
F28
T23
L27
J28
W3
M6
M8
M5
M3
M7
G3
R5
N3
R3
C5
C3
D3
C6
C8
C9
C7
R6
D6
C4
H7
H8
C2
U5
U6
V5
Y8
V3
K8
A2
P8
V8
B4
P7
K3
Y7
K7
V6
V7
E6
E5
F7
F5
T3
F8
F3
T7
F6
T8
Power Signal S0 S1 S3 S4/S5 G3
L6
L5
J6
J5
J3
U17F VDDHT ON ON OFF OFF OFF
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
RS480M
VDDR,VDDRCK ON ON ON ON OFF
D D
VDD18 ON ON OFF OFF OFF
VDDC ON ON OFF OFF OFF
PAR 6 OF 6
GROUND VDDA18 ON ON OFF OFF OFF

VDDA12 ON ON OFF OFF OFF
AVDD ON ON OFF OFF OFF
AC13VSS100
AD21VSS101
AK22VSS102
AK29VSS103
W19 VSS104
AE26VSS105
AE27VSS106
T27 VSS107
R27 VSS108
AD28VSS109
F24 VSS110
F27 VSS111
G28 VSS112
AVDDDI ON ON OFF OFF OFF
E9 VSS10
D15 VSS11
D9 VSS12
AD9 VSS13
G11 VSS14
F16 VSS15
G30 VSS16
AB28VSS17
AB25VSS18
D12 VSS19
AD24VSS20
AA28VSS21
G17 VSS22
Y23 VSS23
AC9 VSS24
R19 VSS25
Y27 VSS26
C28 VSS27
G16 VSS28
F25 VSS29
B30 VSS30
T24 VSS31
F26 VSS32
W27 VSS33
D11 VSS34
H11 VSS35
AD25VSS36
H17 VSS37
H10 VSS38
H16 VSS39
H14 VSS40
E16 VSS41
D10 VSS42
E15 VSS43
F15 VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
U19 VSS73
AC16VSS74
AG18VSS75
AC23VSS76
AD8 VSS77
AD11VSS78
AD13VSS79
AD16VSS80
AD19VSS81
AD23VSS82
AG5 VSS83
AG6 VSS84
AG21VSS85
AD17VSS86
AG15VSS87
AG12VSS88
AF30 VSS89
AG24VSS90
AG9 VSS91
AC19VSS92
AG27VSS93
AC11VSS94
AD7 VSS95
AJ30 VSS96
AC21VSS97
AK5 VSS98
AK10VSS99
G10 VSS1
G12 VSS2
AD29VSS3
AD27VSS4
AC27VSS5
G15 VSS6
G14 VSS7
Y24 VSS8
G13 VSS9
PLLVDD ON ON OFF OFF OFF
W13
W17
W15
M18
M14
M12
M16
U15
R15
N15
N13
U17
R17
R13
U13
N17
V14
V12
P14
P12
P18
V18
V16
P16
T14
T16
T12
T18
HTPVDD ON ON OFF OFF OFF
VDDR3 ON ON OFF OFF OFF
LPVDD ON ON OFF OFF OFF
VSS30
VSS89
LVDDR18D ON ON OFF OFF OFF
REV.B
LVDDR18A ON ON OFF OFF OFF
VDDA_1V2 VDDHT
U17E VDDA12 VDDA_1V2
L15 120 mils PART 5 OF 6 VDDA12_14 H9 120 mils L55
N27 VDD_HT1 VDDA12_1 AA7
U27 G9 FBMJ2125HM330-T
FBMJ2125HM330-T VDD_HT2 VDDA12_2
V27 VDD_HT3 VDDA12_3 U8
C C152 C105 C84 C101 C107 G27 N7 C34 C28 C26 C
22U 0.1U 0.1U 0.1U 0.1U VDD_HT4 VDDA12_4 1U C27 0.1U C32 0.1U C10
REV.B V24 VDD_HT5 VDDA12_5 N8
H27 U7 0.1U 0.1U 22U
VDD_HT6 VDDA12_6
K24 VDD_HT7 VDDA12_7 F9
AB24 AA8 VDDA12_13
VDD_HT8 VDDA12_8
P27 VDD_HT9 VDDA12_9 G8
L15,L55 TI201209G121 J27 VDD_HT10 VDDA12_10 G7
AA27 J8 C13
CHANGE TO C99 C94 C104 C110 C95 VDD_HT11 VDDA12_11
K27 VDD_HT12 VDDA12_12 J7 4.7U
FBMJ2125HM330-T 0.1U 0.1U 0.1U 0.1U 0.1U P24 B1 VDDA12_13 VSSA22
VDD_HT13 VDDA12_13 VDDA18 +1.8V
AB27 VDD_HT14 VDDA18_1 AG4 20 mils L4
AB23 R8 VDDA18_13
VDD_HT15 VDDA18_2
V23 VDD_HT16 VDDA18_3 AC8
G23 AC7 TI201209G121
VDD_HT17 VDDA18_4 C12
E23 VDD_HT18 VDDA18_5 AF6
W23 AE6 C29 C24 C25 C33 C22
C96 C88 C87 C83 VDD_HT19 VDDA18_6 22U 0.1U 0.1U 0.1U 0.1U VSSA59 4.7U
K23 VDD_HT20 VDDA18_7 L8
0.1U 0.1U 0.1U 0.1U J23 W8
VDD_HT21 VDDA18_8 VDDHT30
H23 VDD_HT22 VDDA18_9 W7
U23 VDD_HT23 VDDA18_10 L7
AA23 VDD_HT24 VDDA18_11 R7
D23 AF5 VDDA_1V2 C144
VDD_HT25 VDDA18_12 VDDA18_13
F23 VDD_HT26 VDDA18_13 AK2 4.7U
C23 N16 VSS30
VDD_HT27 VDD_CORE1
B23 VDD_HT28 VDD_CORE2 M13
A23 M15 VDDHT31
VDDHT30 VDD_HT29 VDD_CORE3 C114 C59 C58 C46 C47
A29 VDD_HT30 VDD_CORE4 W16
VDDHT31 AC30 N18 22U 0.1U 0.1U 0.1U 0.1U
VDD_HT31 VDD_CORE5 C122
VDD_CORE6 P19
+2.5V AK23 VDD_MEM1 VDD_CORE7 N12 4.7U
B AK28 P15 VSS89 B
VDD_MEM2 VDD_CORE8
AK11 VDD_MEM3 VDD_CORE9 N14
C115 C52 C74 C50 C70 C31 C21 AK4 M17
22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U VDD_MEM4 VDD_CORE10 C67 C41 C48 C49 C69
AE30 VDD_MEM5 VDD_CORE11 T19
AC14 G22 0.1U 0.1U 0.1U 0.1U 0.1U PUT DECOUPLING CAPS ON THE TOP, CLOSE
VDD_MEM6 VDD_CORE12
AD12 VDD_MEM7 VDD_CORE13 R12 TO BALLS
AC18 VDD_MEM8 VDD_CORE14 P13
AC20 VDD_MEM9 VDD_CORE15 R14 CONNECT VSSA22,VSSA59,VSS30,VSS89
C85 C55 C116 C113 C93 C35 AD10 V19
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U VDD_MEM10 VDD_CORE16 to the ground.
AD14 VDD_MEM11 VDD_CORE17 R18
AD15 U16 C103 C61 C39 C40
VDD_MEM12 VDD_CORE18 22U 0.1U 0.1U 0.1U
AD20 VDD_MEM13 VDD_CORE19 U12
AC10 VDD_MEM14 VDD_CORE20 T13
C77 C42 C43 C73 C89 C36 AC12 T17
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U VDD_MEM16 VDD_CORE22
AC22 VDD_MEM18 VDD_CORE24 E22
AH15 R16 C38 C66 C60 C68
VDD_MEMCK VDD_CORE25 0.1U 0.1U 0.1U 0.1U
VDD_CORE26 V13
VDD18
POWER
H15 VDD18_1 VDD_CORE27 T15

+1.8V 20 mils AC17 P17
L7 VDD18_2 VDD_CORE28
AC15 VDD18_3 VDD_CORE29 W18
TI201209G121 D22
VDD_CORE30 + C18
B21 VDD_CORE47 VDD_CORE31 W12
C54 C63 C57 C76 C71 C21 V15 C100 C97 C78 C79
0.1U 0.1U 0.1U 0.1U 1U VDD_CORE46 VDD_CORE32 0.1U 0.1U 0.1U 0.1U *220U
A22 VDD_CORE45 VDD_CORE33 W14
B22 VDD_CORE44 VDD_CORE34 V17
C22 VDD_CORE43 VDD_CORE35 M19
D2 D1 F21 H22
VDD_CORE42 VDD_CORE36
+3V 2 1 2 1 F22 VDD_CORE41 VDD_CORE37 H21
A E21 D21 A
BAV99 3.3V_2.7 BAV99 VDD_CORE40 VDD_CORE38
G21 VDD_CORE39
3
RS480M
Notice the trace width.
PROJECT : CT8
Custom RS480M-POWER 2A

5 4 3 2 1
5 4 3 2 1
DDR Unbuffered DDR Near SODIMM Socket

ALLEGRO ROOM PROPERTY
AMD CPU
2.5VSUS
D D
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
4,11 MAA[13..0]
9
CN13 MD_[63..0]
MD_[63..0] 10,11
MAA0 112 5 MD_5
VDD
VDD#10
VDD#21
VDD#22
VDD#33
VDD#34
VDD#36
VDD#45
VDD#46
VDD#57
VDD#58
VDD#69
VDD#70
VDD#81
VDD#82
VDD#92
MAA1 A0 DQ0 MD_1
111 A1 DQ1 7
MAA2 110 13 MD_6
MAA3 A2 DQ2 MD_3
109 A3 DQ3 17
MAA4 108 6 MD_4
MAA5 A4 DQ4 MD_0
107 A5 DQ5 8
MAA6 106 14 MD_7
MAA7 A6 DQ6 MD_2
105 A7 DQ7 18
MAA8 102 19 MD_12
MAA9 A8 DQ8 MD_13
101 A9 DQ9 23
MAA10 115 29 MD_15
MAA11 A10 DQ10 MD_10
100 A11 DQ11 31
MAA12 99 20 MD_9
MAA13 A12 DQ12 MD_8
123 A13 DQ13 24
30 MD_11
DQ14 MD_14
4,11 MEMBAA0 117 BA0 DQ15 32
116 41 MD_16
4,11 MEMBAA1 BA1 DQ16
98 43 MD_21
T112 BA2 DQ17
DM_[7..0] 49 MD_19
10,11 DM_[7..0] DQ18
DM_0 12 53 MD_23
DM_1 DM0 DQ19 MD_17
26 DM1 DQ20 42
DM_2 MD_20 Test point need place another side
NOTE: BA2 is not used and it is left open. DM_3
48
62
DM2 DQ21 44
50 MD_18
DM_4 DM3 DQ22 MD_22
134 DM4 DQ23 54
DM_5 148 55 MD_28
DM_6 DM5 DQ24 MD_29
170 DM6 DQ25 59
DM_7 184 65 MD_31
DM7 DQ26 MD_30
78 DM8 DQ27 67
C DQS_[7..0] 56 MD_24 C
10,11 DQS_[7..0] DQ28
DQS_0 11 60 MD_25
DQS_1 DQS0 DQ29 MD_27
25 DQS1 DQ30 66
DQS_2 47 68 MD_26
61 DQS3 DQ32 127
DQS_4 133 129 MD_33 2.5VSUS
147 DQS5 DQ34 135
DQS_6 169 139 MD_35
183 DQS7 DQ36 128
77 130 MD_37
DQS8 DQ37 MD_38 C203 C449 C325 C217 C209 C331 C156
DQ38 136
DCLK5 35 140 MD_34 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
4 DCLK5 CK0 DQ39
DCLK#5 37 141 MD_41
4 DCLK#5 CK0 DQ40
DCLK7 160 145 MD_44
4 DCLK7 CK1 DQ41
DCLK#7 158 151 MD_43
4 DCLK#7 CK1 DQ42
R71 10K 89 153 MD_46
R72 10K CK2 DQ43 MD_40 2.5VSUS
2.5VSUS 91 CK2 DQ44 142
146 MD_45
DQ45 MD_42
4,11 CKE0 96 CKE0 DQ46 152
95 154 MD_47
CKE1 DQ47 MD_52
DQ48 163
118 165 MD_49 C315 C301 C464 C332 C443 C263 C477
4,11 RAS#A RAS DQ49 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
120 171 MD_55
4,11 CAS#A CAS DQ50
119 175 MD_50
4,11 WE#A WE DQ51
CS#0 121 164 MD_48
4,11 CS#0 S0 DQ52
CS#1 122 166 MD_53
4,11 CS#1 S1 DQ53
86 172 MD_51
T116 RSET DQ54
176 MD_54
DQ55 MD_56
194 SA0 DQ56 177
(REVERSE)
196 181 MD_61

B SA1 DQ57 MD_62 B
198 SA2 DQ58 187
189 MD_58
DQ59
SO-DIMM
193 178 MD_60

2,10,13 SDATA SDA DQ60
195 182 MD_57
2,10,13 SCLK SCL DQ61
188 MD_59
DQ62 MD_63
+3V 197 VDDspd DQ63 190
T92 199 VDDid
C150 20 mils 71
0.1U CB0
2.5VSUS 93 VDD#93 CB1 73
94 VDD#94 CB2 79
113 VDD#113 CB3 83
NOTE: VDDid is a no connect for 2.5V DDR SDRAM. 114
131
VDD#114 CB4 72
74
VDD#131 CB5
It is only used for 3.3V SDRAM. 132
143
VDD#132 CB6 80
84
VDD#143 CB7
144 VDD#144
155 VDD#155 VREF 1 40 mils
NOTE: Pin 10 (RESET_L) is not 156
157
VDD#156 VREF#2 2 VREF_DDR_MEM
VDD#157 C340 C339 C338
used by unbuffered DIMM's. 167
168
VDD#167 DU 85
97
T117
VDD#168 DU#97 T113 0.22U 1000P
179 124 4.7U
VDD#179 DU#124 T105
180 VDD#180 DU#200 200 T90
191 VDD#191
192 40 2.5VSUS
VDD#192 VSS#40
VSS#51 51
3 VSS VSS#52 52
4 VSS#4 VSS#63 63
15 VSS#15 VSS#64 64
16 75 R88 C195
A VSS#16 VSS#75 1K C341 C172 A
27 76
VSS#186
VSS#185
VSS#174
VSS#173
VSS#162
VSS#161
VSS#159
VSS#150
VSS#149
VSS#138
VSS#137
VSS#126
VSS#125
VSS#104
VSS#103
VSS#27 VSS#76 0.01U 4.7U 0.22U

28 VSS#28 VSS#87 87
38 VSS#38 VSS#88 88
39 VSS#39 VSS#90 90 VREF_DDR_MEM
186
185
174
173
162
161
159
150
149
138
137
126
125
104
103
R87
1K C337 PROJECT : CT8
0.01U
Socket_SO_DIMM_200_pin,_RVS H5.2
Custom DDR NEAR SO-DIMM 1A

5 4 3 2 1
5 4 3 2 1
DDR Unbuffered DDR Far SODIMM Socket

ALLEGRO ROOM PROPERTY
AMD CPU
2.5VSUS
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92
9
D CN12 MD_[63..0] D
4,11 MAB[13..0] MD_[63..0] 9,11
MAB0 112 5 MD_5
VDD
VDD#10
VDD#21
VDD#22
VDD#33
VDD#34
VDD#36
VDD#45
VDD#46
VDD#57
VDD#58
VDD#69
VDD#70
VDD#81
VDD#82
VDD#92
MAB1 A0 DQ0 MD_1
111 A1 DQ1 7
MAB2 110 13 MD_6
MAB3 A2 DQ2 MD_3
109 A3 DQ3 17
MAB4 108 6 MD_4
MAB5 A4 DQ4 MD_0
107 A5 DQ5 8
MAB6 106 14 MD_7
MAB7 A6 DQ6 MD_2
105 A7 DQ7 18
MAB8 102 19 MD_12
MAB9 A8 DQ8 MD_13
101 A9 DQ9 23
MAB10 115 29 MD_15
MAB11 A10 DQ10 MD_10
100 A11 DQ11 31
MAB12 99 20 MD_9
MAB13 A12 DQ12 MD_8
123 A13 DQ13 24
30 MD_11
DQ14 MD_14
4,11 MEMBAB0 117 BA0 DQ15 32
116 41 MD_16
4,11 MEMBAB1 BA1 DQ16
98 43 MD_21
T292 BA2 DQ17
DM_[7..0] 49 MD_19
9,11 DM_[7..0] DQ18
DM_0 12 53 MD_23
DM_1 DM0 DQ19 MD_17
26 DM1 DQ20 42
DM_2 MD_20
NOTE: BA2 is not used and it is left open. DM_3
48
62
DM2 DQ21 44
50 MD_18
DM_4 DM3 DQ22 MD_22
134 DM4 DQ23 54
DM_5 148 55 MD_28
DM_6 DM5 DQ24 MD_29
170 DM6 DQ25 59
DM_7 184 65 MD_31
DM7 DQ26 MD_30
78 DM8 DQ27 67 Test point need place another side
DQS_[7..0] 56 MD_24
C 9,11 DQS_[7..0] DQ28 C
DQS_0 11 60 MD_25
25 DQS1 DQ30 66
DQS_2 47 68 MD_26
61 DQS3 DQ32 127
DQS_4 133 129 MD_33
147 DQS5 DQ34 135
DQS_6 169 139 MD_35
183 DQS7 DQ36 128
77 130 MD_37
DQS8 DQ37 MD_38
DQ38 136
DCLK4 35 140 MD_34
4 DCLK4 CK0 DQ39
DCLK#4 37 141 MD_41
4 DCLK#4 CK0 DQ40 2.5VSUS
DCLK6 160 145 MD_44
4 DCLK6 CK1 DQ41
DCLK#6 158 151 MD_43
4 DCLK#6 CK1 DQ42
R68 10K 89 153 MD_46
R74 10K CK2 DQ43 MD_40
2.5VSUS 91 CK2 DQ44 142
146 MD_45
DQ45 MD_42 C316 C440 C279 C463 C438 C476 C294
4,11 CKE1 96 CKE0 DQ46 152
95 154 MD_47 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
CKE1 DQ47 MD_52
DQ48 163
118 165 MD_49
4,11 RAS#B RAS DQ49
120 171 MD_55
4,11 CAS#B CAS DQ50
119 175 MD_50
4,11 WE#B WE DQ51 2.5VSUS
CS#2 121 164 MD_48
4,11 CS#2 S0 DQ52
CS#3 122 166 MD_53
4,11 CS#3 S1 DQ53
86 172 MD_51
T293 RSET DQ54
176 MD_54
DQ55 MD_56
2.5VSUS 194 SA0 DQ56 177
(REVERSE)
196 181 MD_61 C453 C306 C461 C159 C434 C212

SA1 DQ57 MD_62 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
198 SA2 DQ58 187
B 189 MD_58 B
DQ59
SO-DIMM
193 178 MD_60

2,9,13 SDATA SDA DQ60
195 182 MD_57
2,9,13 SCLK SCL DQ61
188 MD_59
DQ62 MD_63
+3V 197 VDDspd DQ63 190
T91 199 VDDid
C149 20 mils 71
0.1U CB0
2.5VSUS 93 VDD#93 CB1 73
94 VDD#94 CB2 79
113 VDD#113 CB3 83
NOTE: VDDid is a no connect for 2.5V DDR SDRAM. 114
131
VDD#114 CB4 72
74
VDD#131 CB5
It is only used for 3.3V SDRAM. 132
143
VDD#132 CB6 80
84 40 mils
VDD#143 CB7
144 VDD#144
155 VDD#155 VREF 1 VREF_DDR_MEM
156 VDD#156 VREF#2 2
157 VDD#157
167 VDD#167 DU 85 T115
168 VDD#168 DU#97 97 T114
179 VDD#179 DU#124 124 T291
180 VDD#180 DU#200 200 T285
191 VDD#191
192 VDD#192 VSS#40 40
VSS#51 51
3 VSS VSS#52 52
4 VSS#4 VSS#63 63
15 VSS#15 VSS#64 64
NOTE: Pin 10 (RESET_L) is not 16
27
VSS#16 VSS#75 75
76
VSS#186
VSS#185
VSS#174
VSS#173
VSS#162
VSS#161
VSS#159
VSS#150
VSS#149
VSS#138
VSS#137
VSS#126
VSS#125
VSS#104
VSS#103
A VSS#27 VSS#76 A
28 87
used by unbuffered DIMM's. 38
VSS#28 VSS#87
88
VSS#38 VSS#88
39 VSS#39 VSS#90 90
186
185
174
173
162
161
159
150
149
138
137
126
125
104
103
PROJECT : CT8
Socket_SO_DIMM_200_pin,_RVS H9.2 Quanta Computer Inc.
Custom DDR FAR SO-DIMM 1A

5 4 3 2 1
5 4 3 2 1
VTT_DDR
DDR MD62
MD58
RN46 1
3
2
4
10X2 MD_62
MD_58
9,10 MD_[63..0]
MD_2
MD_7
MD_6
MD_3
MD_5
RN33 1
3
5
7
RN35 1
2
4
6
8
2
68X4
68X4
4,9 MAA[13..0]
MAA0
MAA2
MAA8
RN18 1
3
5
2 47X4
4
6
VTT_DDR
MD56 RN48 1 2 10X2 MD_56 MD_1 3 4 MAA11 7 8

MD61 3 4 MD_61 MD_0 5 6 MAA1 RN20 1 2 47X4
MD59 RN47 1 2 10X2 MD_59 MD_4 7 8 MAA3 3 4
MD63 3 4 MD_63 MD_14 RN30 1 2 68X4 MAA5 5 6
MD60 RN49 1 2 10X2 MD_60 MD_11 3 4 7 8
4,9 MEMBAA0
4 MD[63..0] MD[63..0] MD57 3 4 MD_57 MD_15 5 6 MAA7 RN22 1 2 47X4
MD55 RN50 1 2 10X2 MD_55 MD_10 7 8 MAA9 3 4
D DQS[7..0] MD50 3 4 MD_50 MD_8 RN32 1 2 68X4 MAA4 5 6 D
4 DQS[7..0]
MD48 RN53 1 2 10X2 MD_48 MD_9 3 4 MAA6 7 8
4 DM[7..0] DM[7..0] MD53 3 4 MD_53 MD_12 5 6 MAA12 R70 47
MD51 RN51 1 2 10X2 MD_51 MD_13 7 8 MAA13
MD54 3 4 MD_54 MD_18 RN27 1 2 68X4
R73 47
MD49 RN52 1 2 10X2 MD_49 MD_22 3 4 4,9 CKE0
R64 47
MD52 3 4 MD_52 MD_23 5 6 4,10 CKE1
MD42 RN55 1 2 10X2 MD_42 MD_19 7 8
MD47 3 4 MD_47 MD_16 RN29 1 2 68X4
RN16 1 2 47X4
MD45 RN58 1 2 10X2 MD_45 MD_21 3 4 4,9 WE#A MAA10
MD40 MD_40 MD_17 3 4
3 4 5 6 MAA13
MD43 RN54 1 10X2 MD_43 MD_20 5 6
2 7 8 CS#0
MD46 MD_46 MD_26 RN24 1 68X4 4,9 CS#0 7 8
3 4 2
MD41 RN56 1 2 10X2 MD_41 MD_31 3 4 RN15 1 2 47X4
MD44 3 4 MD_44 MD_30 5 6 4,9 MEMBAA1
MD38 RN59 1 10X2 MD_38 MD_27 4,9 RAS#A 3 4
2 7 8 CS#1
MD34 MD_34 MD_29 RN26 1 68X4 4,9 CS#1 5 6
3 4 2
MD32 RN61 1 10X2 MD_32 MD_28 4,9 CAS#A 7 8
2 3 4
MD37 3 4 MD_37 MD_25 5 6
MD39 RN57 1 2 10X2 MD_39 MD_24 7 8
MD35 3 4 MD_35 MD_39 RN11 1 2 68X4 VTT_DDR
MD36 RN60 1 2 10X2 MD_36 MD_35 3 4
MD33 3 4 MD_33 MD_38 5 6 MAB2 RN21 1 2 47X4
MD27 RN63 1 2 10X2 MD_27 MD_34 7 8 4,10 MAB[13..0]
MAB4 3 4
MD26 3 4 MD_26 MD_36 RN13 1 2 68X4
MAB6 5 6
MD25 RN65 1 2 10X2 MD_25 MD_33 3 4 MAB5 7 8
MD24 3 4 MD_24 MD_32 5 6 MAB3 RN19 1 2 47X4
MD31 RN62 1 2 10X2 MD_31 MD_37 7 8 MAB1 3 4
MD30 3 4 MD_30 MD_47 RN8 1 2 68X4
MAB10 5 6
MD28 RN64 1 2 10X2 MD_28 MD_42 3 4
C MD29 MD_29 MD_46 4,10 MEMBAB0 7 8 C
3 4 5 6 MAB11 RN23 1
MD22 RN67 1 10X2 MD_22 MD_43 2 47X4
2 7 8 MAB8
MD18 MD_18 MD_44 RN10 1 68X4 3 4
3 4 2 MAB9
MD17 RN69 1 10X2 MD_17 MD_41 5 6
2 3 4 MAB7
MD20 MD_20 MD_45 7 8
3 4 5 6 MAB12 R65 47
MD19 RN66 1 2 10X2 MD_19 MD_40 7 8
MD23 3 4 MD_23 MD_55 RN5 1 2 68X4
MD16 RN68 1 2 10X2 MD_16 MD_50 3 4
MD21 3 4 MD_21 MD_51 5 6 RN14 1 2 47X4
MD11 RN71 1 2 10X2 MD_11 MD_54 7 8 4,10 RAS#B CS#3
MD14 MD_14 MD_52 RN7 1 68X4 4,10 CS#3 3 4
3 4 2 CS#2
MD9 RN73 1 10X2 MD_9 MD_49 4,10 CS#2 5 6
2 3 4 MAB13
MD8 MD_8 MD_48 7 8
3 4 5 6
MD10 RN70 1 2 10X2 MD_10 MD_53 7 8
MD15 3 4 MD_15 MD_63 RN2 1 2 68X4
RN17 1 2 47X4
MD12 RN72 1 2 10X2 MD_12 MD_59 3 4 4,10 CAS#B
MD13 MD_13 MD_62 4,10 WE#B 3 4
3 4 5 6
MD7 RN75 1 10X2 MD_7 MD_58 4,10 MEMBAB1 5 6
2 7 8 MAB0
MD2 MD_2 MD_61 RN4 1 68X4 7 8
3 4 2
MD4 RN77 1 2 10X2 MD_4 MD_56 3 4
MD0 3 4 MD_0 MD_57 5 6
MD6 RN74 1 2 10X2 MD_6 MD_60 7 8
DQS_[7..0] 03/19 Modify ->Quanta stock haven't 68x4 (8P4R-0402)
MD3 3 4 MD_3 9,10 DQS_[7..0]
MD5 RN76 1 2 10X2 MD_5 DM_7 RN3 1 2 68X2
DM_[7..0]
MD1 3 4 MD_1 9,10 DM_[7..0] DQS_7 3 4
DM_5 RN9 1 2 68X2
DQS_5 3 4
DM_3 RN25 1 2 68X2
DQS0 R271 10-0402 DQS_0 DQS_3 3 4
DQS1 R269 10-0402 DQS_1 DM_1 RN31 1 68X2
B DQS2 R263 10-0402 DQS_2
Place on each end of DQS_1 3
2
4
LAYOUT: Locate close to Clawhammer socket. B
DQS3 R252 10-0402 DQS_3 the VTT island. VTT_DDR
C280
2.5VSUS
DQS4 R243 10-0402 DQS_4 DQS_6 RN6 1 2 68X2 REV.B
VTT_DDR
+
DQS5 R241 10-0402 DQS_5 DM_6 3 4
DQS6 R238 10-0402 DQS_6 DQS_4 RN12 1 2 68X2
DQS7 R236 10-0402 DQS_7 DM_4 3 4
DM_2 RN28 1 68X2 + C145 + C481 C128 *220U
2
C127 C129 DQS_2 3 4 100U/6.3V100U/6.3V C265
DM0 R272 10-0402 DM_0 DM_0 RN34 1 2 68X2 4.7U 0.22U
DM1 R270 10-0402 DM_1 10U 10U DQS_0 3 4
DM2 R264 10-0402 DM_2
DM3 R253 10-0402 DM_3
DM4 R245 10-0402 DM_4
DM5 R242 10-0402 DM_5
DM6 R239 10-0402 DM_6
DM7 R237 10-0402 DM_7
LAYOUT: Place on VTT fill near LAYOUT: Place a cap every 1 in. on VTT
VTT_DDR
Clawhammer and near DIMMs VTT_DDR traces between Clawhammer and DDR.
C188 C169 C260 C157 C218 C186 C261 C459 C343 C125 C347 C348 C342 C349 C134 C124 C133
C250 C319 C326 C228 C230 C236 C278 C204 C305
1000P 100P 100P 1000P 1000P 100P 100P 1000P 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U 0.22U 4.7U
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS
VTT_DDR in a single line along VTT_DDR_SUS island.
A A
C233 C287 C335 C266 C219 C201 C302 C162 C442 C312 C327 C270 C170 C220 C275 C147 C282 C446 C241 C289 C235 C330 C202 C436 C151 C276 C259 C264 C174 C183 C291 C160 C334 C290
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
VTT_DDR
PROJECT : CT8
2.5VSUS
C300 C210 C298 C346 C322 C274 C185 C227 C344 C309 C239 C317 C165 C132 C323 C211 C167 C153 C189 C173 C252 C333 C310 C345 C131 C249 C135 C197 C273 C242 C251 C269 C271 Quanta Computer Inc.
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U Size Document Number Rev
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
Custom DDR SO-DIMM TERMINATION 2A

5 4 3 2 1
5 4 3 2 1
CLG 32K_X1
Y4 PLACE THESE CAPS CLOSE
1 4 32K_X2 TO THE CONNECTOR
2 3
R158 32.768KHZ
R143 20M
20M
D D
C387 C388
18P REV.B 18P
R114
1 2 8.2K
PLACE THESE COMPONENTSCLOSE TO U600, AND U7A

USE GROUND GUILD FOR 32K_X1 AND 32K_X2
SB_RST# AH8
SB400 SB PCICLK0 L4
L3
T329
A_RST# PCICLK1 T333
Part 1 of 4 L2 PCI_MINI R163 22
PCICLK2 PCLK_MINI 16,17
L27 L1 PCI_591 R149 22
2 SBSRCCLK PCIE_RCLKP PCICLK3 PCLK_591 16,30
M27 M4 PCI_7411 R152 22
2 SBSRCCLK# PCIE_RCLKN PCICLK4 PCI_CLK_7411 16,20
M3 PCI_5 R151 22
PCICLK5 PCLK_5 16,30
C360 .01U_0402 M30 M2 PCI_6 R164 22
5 A_RX0P PCIE_TX0P PCICLK6 PCLK_6 16
PCI CLKS
C361 .01U_0402 N30 M1 PCI_LAN R150 22
5 A_RX0N PCIE_TX0N PCICLK7 PCLK_LAN 16,26
REV.C C358 .01U_0402 K30 N4 PCI_8 R154 22 LENGTH OF (PCI_CLK9_R + PCI_CLK9_FB)
5 A_RX1P PCIE_TX1P PCICLK8 PCICLK8 16
C359 .01U_0402 L30 N3 PCICLK9 R153 22
5 A_RX1N PCIE_TX1N PCICLK9 SHOULD BE AS SHORT AS POSSIBLE
H30 N2 PCI_CLK9_FB C391 *100P
T134 PCIE_TX2P PCICLK_FB
T135 J30 PCIE_TX2N REV.B
F30 AJ7 R_PCIRST# AD[0..31]
T340 PCIE_TX3P PCIRST# AD[0..31] 16,17,20,26
G30 W3 AD0
T139 PCIE_TX3N AD0/ROMA18 3V_S5
Y2 AD1
A_TX0P AD1/ROMA17 AD2 C381
5 A_TX0P M29 PCIE_RX0P AD2/ROMA16 W4
A_TX0N N29 Y3 AD3
5 A_TX0N PCIE_RX0N AD3/ROMA15
A_TX1P M28 V1 AD4
5 A_TX1P PCIE_RX1P AD4/ROMA14
5
A_TX1N N28 Y4 AD5 0.1U
5 A_TX1N PCIE_RX1N AD5/ROMA13
J29 V2 AD6 2
T132 PCIE_RX2P AD6/ROMA12
K29 W2 AD7 4 PCIRST#
T140 PCIE_RX2N AD7/ROMA11 PCIRST# 17,20,26,30
J28 AA4 AD8 R_PCIRST# 1
T310 PCIE_RX3P AD8/ROMA9
K28 V4 AD9
T311 PCIE_RX3N AD9/ROMA8
AA3 AD10
R311 150/F AD10/ROMA7 AD11 U10
G27 PCIE_CALRP AD11/ROMA6 U1
R312 150/F H27 AA2 AD12 R123 TC7SH08FU
PCIE_VDDR PCIE_CALRN AD12/ROMA5
PCI EXPRESS INTERFACE

U2 AD13
R306 4.12K AD13/ROMA4 AD14 8.2K
G28 PCIE_CALI AD14/ROMA3 AA1
C U3 AD15 C
L44 PCIE_PVDD AD15/ROMA2 AD16
+1.8V R30 PCIE_PVDD AD16/ROMD0 T4
SBK160808T-301Y-S AC1 AD17
C354 C362 AD17/ROMD1 AD18
PCIE_VDDR F26 PCIE_VDDR_1 AD18/ROMD2 R2
C355 R29 AD4 AD19
1U 0.1U PCIE_VDDR_2 AD19/ROMD3 AD20
22U G26 PCIE_VDDR_3 AD20/ROMD4 R3
P26 AD3 AD21
PCIE_VDDR_4 AD21/ROMD5 AD22
K26 PCIE_VDDR_5 AD22/ROMD6 R4
L26 AD2 AD23 +3V
PCIE_VDDR_6 AD23/ROMD7 AD24
C610 AND C611 CLOSE P28 PCIE_VDDR_7 AD24 P2
THE BALL R30 OF U600 N26 AE3 AD25 INTA# R398 8.2K
PCIE_VDDR_8 AD25 AD26 INTB# R132 8.2K
P27 PCIE_VDDR_9 AD26 P3
PCIE_VDDR AE2 AD27 INTC# R136 8.2K
L24 AD27 AD28 INTD# R384
40 mils H28 PCIE_VSS_1 AD28 P4 1 2 8.2K
+1.8V F29 AF2 AD29 INTE# R125 1 2 8.2K
TI201209G121 PCIE_VSS_2 AD29 AD30 INTF# R128
H29 PCIE_VSS_3 AD30 N1 1 2 8.2K
C356 C525 C502 C521 C524 C522 C523 C527 C526 C501 H26 AF1 AD31 INTG# R371 1 2 8.2K
PCIE_VSS_4 AD31
PCI INTERFACE
F27 V3 C/BE0# INTH# R380 1 2 8.2K
PCIE_VSS_5 CBE0#/ROMA10 C/BE0# 17,20,26
22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U G29 AB4 C/BE1# PLOCK# R428 1 2 8.2K
PCIE_VSS_6 CBE1#/ROMA1 C/BE1# 17,20,26
L29 AC2 C/BE2#
PCIE_VSS_7 CBE2#/ROMWE# C/BE2# 17,20,26 +3V
J26 AE4 C/BE3#
PCIE_VSS_8 CBE3# C/BE3# 17,20,26
L28 T3 FRAME#
PCIE_VSS_9 FRAME# FRAME# 17,20,26
J27 AC4 DEVSEL# R173 8.2K
PCIE_VSS_10 DEVSEL#/ROMA0 DEVSEL# 17,20,26
N27 AC3 IRDY# CLKRUN# 1 2
PCIE_VSS_11 IRDY# IRDY# 17,20,26
M26 T2 TRDY#
3V_S5 PCIE_VSS_12 TRDY#/ROMOE# TRDY# 17,20,26
K27 U4 PAR RN42 8.2KX4
C382 PCIE_VSS_13 PAR/ROMA19 PAR 17,20,26
P29 T1 STOP# PERR# 2 1
PCIE_VSS_14 STOP# STOP# 17,20,26
*0.1U P30 AB2 PERR# SERR# 4 3
PCIE_VSS_15 PERR# PERR# 17,20,26
AB3 SERR# TRDY# 6 5
SERR# SERR# 17,20,26
5
U9 CPU_STP# AJ8 AF4 REQ0# PAR 8 7

T155 CPU_STP#/DPSLP# REQ0#
2 SB_RST# PCI_STP# AK7 AF3 REQ1# STOP# 2 1
T157 PCI_STP# REQ1# REQ1# 17
NB_RST# 4 INTA# AG5 AG2 REQ2# REQ3# 4 3
7,34 NB_RST# INTA# REQ2# REQ2# 26
1 INTB# AH5 AG3 REQ3# REQ5# 6 5
20 INTB# INTB# REQ3#/PDMA_REQ0#
INTC# AJ5 AH1 REQ4# GNT4# 8 7
26 INTC# INTC# REQ4#/PLL_BP33/PDMA_REQ1# REQ4# 20
*TC7SH08FU INTD# AH6 AH2 REQ5#
20 INTD# INTD# REQ5#/GPIO13 REQ5# 16
INTE# AJ6 AH3 REQ6# REV.B RN41 8.2KX4
17 INTE# INTE#/GPIO33 REQ6#/GPIO31
R520 22 INTF# AK6 AJ2 GNT0# RN40 8.2KX4
17 INTF# INTF#/GPIO34 GNT0#
INTG# AG7 AK2 GNT1# GNT1# 2 1
B 20 INTG# INTG#/GPIO35 GNT1# GNT1# 17 B
REV.B INTH# AH7 AJ3 GNT2# REQ6# 4 3
INTH#/GPIO36 GNT2# GNT2# 26
AK3 GNT3# GNT3# 6 5
GNT3#/PLL_BP66/PDMA_GNT0# GNT4# GNT2#
GNT4#/PLL_BP50/PDMA_GNT1# AG4 GNT4# 20 8 7
AH4 GNT5# 2 1
VDDA_1V2 GNT5#/GPIO14 GNT5# 16
AJ4 GNT6# REQ2# 4 3
32K_X1 GNT6#/GPIO32 CLKRUN# GNT0#
B2 X1 CLKRUN# AG1 CLKRUN# 17,20,26 6 5
AB1 REQ1# 8 7
LOCK# PLOCK# 20
R155 33
XTAL
R305 32K_X2 B1 RN43 8.2KX4
X2
*1K AG25 LAD0 IRDY# 1 R475 2 8.2K
LAD0 LAD0 30
VCCRTC AH25 LAD1
LAD1 LAD1 30 R174
REV.C 30 mils C29 AJ25 LAD2 REQ4# 1 2 8.2K
T143 CPU_PG/LDT_PG LAD2 LAD2 30
D3 A28 AH24 LAD3 R107 100K
T144 INTR/LINT0 LAD3 LAD3 30
REV.B 2 1 R528 1.2K R126 1K C28 AG24 LFRAME# LAD3
LPC
3VPCU VCCRTC 30 T338 NMI/LINT1 LFRAME# LFRAME# 30
B29 AH26 LDRQ#0
T136 INIT# LDRQ0# LDRQ#0 30 R108 100K
DEL D3 RB500 D29 AG26 LPC_DRQ1# LAD2
T138 SMI# LDRQ1#
Remove charge circuit C670 E4
3,7 LDTSTOP# SLP#/LDT_STP# R106 100K
CPU
1U/16V B30 AK27 SERIRQ LAD1

Q16, R129, R133, R137, T137 IGNNE# SERIRQ SERIRQ 17,20,30
3VRTC_1
T133 F28 A20M# R103 100K

R140 C485 Placement closed to SB E28 LAD0
T309 FERR#
1
7 ALLOW_LDTSTOP E29 STPCLK#/ALLOW_LDTSTP R452 100K

G1 D25 C2 FRAME#
3 CPUPWRGD SSMUXSEL/GPIO0 RTCCLK RTC_CLK 16
SHORT_ PAD1 E27 F3
T313 DPRSLPVR RTC_IRQ#/ACPWR_STRAP AUTO_ON# 16 8.2KX4
30 mils D27 RN36
7 BMREQ# BMREQ#
RTC
SERIRQ
2
3 LDT_RST# D28 LDT_RST# VBAT A2 VCCRTC 2 1

A1 LFRAME# 4 3
RTC_GND LPC_DRQ1# 6 5
1
C667 LDRQ#0 8 7
BT1 SB400 REQ0# 2 1
RTC-BAT 0.1U GNT6# 4 3
GNT5# 6 5
PCLK_LAN DEVSEL#
2
8 7
RTC PCLK_591
PCLK_MINI RN44 8.2KX4
PCI_CLK_7411
A A
C674 C683 C676 C675

33P 33P 33P 33P
EMI REV.C PROJECT : CT8

C SB400-PCIE/PCI/CPU/LPC 3A

5 4 3 2 1
5 4 3 2 1
CLG 3V_S5
Please double check SB400 pin D5 & pin A27 define,
because cann't meet ATI library/symbols.
R361
R362
0
*0
USBCLK_EXT 2
C609 *20P
1
GPM6# R376 4.7K R356
SUSB# R336 4.7K U7D *10M Y8
SUSC# R144 4.7K *XTAL-48MHZ
DNBSWON# R135 4.7K Part 4 of 4
2
TEMP_ALARM# R369 4.7K TEMP_ALARM# C6
SB400 SB 48M_X1/USBCLK A15
B15 R355 *0
3 TEMP_ALARM# TALERT#/TEMP_ALERT#/GPIO10 48M_X2
PCI_PME# R385 4.7K GPM6# D5 C15 USB_RCOMP R111 11.8K C570 *20P
D RI# R178 10K PCI_PME# BLINK/GPM6# USB_RCOMP 3V_S5 D
17,20,26 PCI_PME# C4 PCI_PME#/GEVENT4# USB_VREFOUT D16 T320
BATLOW# R377 4.7K RI# D3 C16
20 RI# RI#/EXTEVNT0# USB_ATEST1 T316
GPM7# R379 4.7K SUSB# B4 D15 T317 RN38 10KX4
ACPI / WAKE UP EVENTS

30 SUSB# SLP_S3# USB_ATEST0
SUSC# E3 B8 KBSMI# USB_OCP_1# 2 1
30 SUSC# SLP_S5# USB_OC0#/GPM0# KBSMI# 30 BT_OFF#
REV.B DNBSWON# USB_OCP_1# REV.D
1. Remove R400. +3V 30 DNBSWON#
PWROK_SB
B3
C3
PWR_BTN# USB_OC1#/GPM1# C8
C7 BATLOW# USB_OCP_5#
4
6
3
5
30 PWROK_SB PWR_GOOD USB_OC2#/FANOUT1/GPM2# BATLOW# 30
D4 B7 BT_OFF# USB_OCP_4# 8 7
7 SUS_STAT# SUS_STAT# USB_OC3#/GPM3#
CRT_SENSE# R313 4.7K R145 10K F2 B6 USB_OCP_4# REV.D
AGP_BUSY# R330 4.7K R159 10K TEST1 USB_OC4#/GPM4# USB_OCP_5#
E2 TEST0 USB_OC5#/GPM5# A6
AGP_STP# R324 4.7K AJ26 B5 USB_OCP_6# REV.D USB_OCP_5# R533 *10K
30 GATEA20 GA20IN USB_OC6#/FAN_ALERT#/GEVENT6#
SDATA R96 2.2K AJ27 A5 USB_OCP_7# USB_OCP_4# R534 *10K
30 RCIN# KBRST# USB_OC7#/CASE_ALERT#/GEVENT7#
SCLK R97 2.2K D6
3,30 THERM_CPUDIE# SMBALERT#/THRMTRIP#/GEVENT2#
SWI#_1 C5 A11 T151
LPC_PME#/GEVENT3# USB_HSDP7+
T145 A25 LPC_SMI#/EXTEVNT1# USB_HSDM7- B11 T150
PWROK_SB is 33ms ~ T328 D8 VOLT_ALERT#/GEVENT5#
GPM7# D7 A10 T154
500ms after NB_PWRGD SCI_# SYS_RESET#/GPM7# USB_HSDP6+
D2 WAKE#/GEVENT8# USB_HSDM6- B10 T153
USB INTERFACE
RSMRST_# D1 A14
30 RSMRST_# RSMRST# USB_HSDP5+ USBP5+ 33
USB_HSDM5- B14 USBP5- 33
A23 3V_S5
2,7 SB_OSC_INT 14M_X1/OSC
USB_HSDP4+ A13 USBP4+ 32
SB_14M_X2 B23 B13 USB_OCP_6# R127 10K
CLK / RST
T146 14M_X2 USB_HSDM4- USBP4- 32
USB_OCP_7# R131 10K
REV.B T147 AK24 SIO_CLK USB_HSDP3+ A18 T149
REV.C REV.B REV.D B18 KBSMI# R102 4.7K
USB_HSDM3- T148
R503 10K R99 10K B25
+3V RF_OFF# ROM_CS#/GPIO1
R503 STUFF IS FULL FEATURE. R318 10K C25 A17
+3V MB_ID GHI#/GPIO6 USB_HSDP2+ USBP2+ 33
R504 *10K C23 B17
R504 STUFF IS DE-FEATURE. AGP_STP# D24
VGATE/GPIO7 USB_HSDM2- USBP2- 33
C AGP_BUSY# AGP_STP#/GPIO4 C
D23 AGP_BUSY#/GPIO5 USB_HSDP1+ A21 USBP1+ 22
R316 10K A27 B21
FANOUT0/GPIO3 USB_HSDM1- USBP1- 22
23 SPK C24 SPKR/GPIO2
3V_S5 A26 A20
GPIO
2,9,10 SCLK SCL0/GPOC0# USB_HSDP0+ USBP0+ 22
2,9,10 SDATA B26 SDA0/GPOC1# USB_HSDM0- B20 USBP0- 22
CRT_SENSE# B27 3VSUS
31 CRT_SENSE# DDC1_SCL/GPIO9 AVDDTX_USB
30 mils 18 LCDID0 C26 DDC1_SDA/GPIO8 20 mils
C27 C21 L27
18 LCDID1 DDC2_SCL/GPIO11 AVDDTX_0 AVDDTX_USB
18 LCDID2 D26 DDC2_SDA/GPIO12 AVDDTX_1 C18
D13 TI201209G121
R419 R418 AVDDTX_2 C372 C545 C555 C612 C589 C566 C571
AVDDTX_3 D10
10K 10K AVDDRX_0 D20 AVDDRX_USB
J2 D17 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
T158 NC1 AVDDRX_1
T331 K3 NC4 AVDDRX_2 C14
(NOT USED)
1SS355 D4 J3 C11
T330 NC3 AVDDRX_3
1 2 SCI_# K2
30 SCI# T159 NC2
AVDDC A16 3.3V_AVDDC 04/06 Modify
1SS355 D15 B16 AVDDRX_USB 20 mils L28
SWI#_1 AVSSC
30 SWI# 1 2 REV.B DEL R161
A9 TI201209G121
AVSS_USB_1 C599 C553 C575 C563 C581 C574 C552
17,23 BITCLK G1 AC_BITCLK AVSS_USB_2 A12
R146 33 AC_DATA_OUT_R G2 A19
16,17,23 SDOUT1 AC_SDOUT AVSS_USB_3
AC_SDIN2 R432 8.2K SDINA H4 A22 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 22U
23 SDINA AC_SDIN0 AVSS_USB_4
SDINB R412 10K SDINB G3 B9
17 SDINB AC_SDIN1 AVSS_USB_5
AC_SDIN2 G4 B12
BITCLK R446 10K R148 33 AC_SYNC_R AC_SDIN2 AVSS_USB_6
H1 B19
AC97
USB PWR
17,23 SYNC1 #CODEC_RST AC_SYNC AVSS_USB_7
REV.B R442 33 H3 B22
17,23 -CODEC_RST AC_RST# AVSS_USB_8 3.3V_AVDDC
16 SPDIF_OUT H2 SPDIF_OUT AVSS_USB_9 C9 20 mils L29
AVSS_USB_10 C10
B +3V R147 10K C12 B
AVSS_USB_11 SBK160808T-301Y-S
REV.B AVSS_USB_12 C13
C17 C374
AVSS_USB_13 C376 C569
AVSS_USB_14 C19
C20 22U 1U 0.1U
AVSS_USB_15
AVSS_USB_16 C22
BT_OFF# D9
BT_OFF# 33 AVSS_USB_17
AVSS_USB_18 D11
RF_OFF# D12
RF_OFF# 17 AVSS_USB_19
AVSS_USB_20 D14
REV.B AVSS_USB_21 D18 C641 AND C642 CLOSE
AVSS_USB_22 D19 THE BALL A16 OF U600
AVSS_USB_23 D21
AVSS_USB_24 D22
SB400
A A
PROJECT : CT8
Custom SB400-ACPI/GPIO/USB/AC97 3A

5 4 3 2 1
5 4 3 2 1
CLG
D D
U7B
AK22
AJ22
SATA_TX0+ SB400 SB AD30 PIORDY SDA[0..2]
SATA_TX0- PIDE_IORDY IRQ14 34 SDA[0..2]
Part 2 of 4 PIDE_IRQ AE28
AK21 AD27 PDA0 SDD[0..15]
SATA_RX0- PIDE_A0 PDA1 34 SDD[0..15]
AJ21 SATA_RX0+ PIDE_A1 AC27
AD28 PDA2
PIDE_A2 PDDACK# SDIOW#
AK19 SATA_TX1+ PIDE_DACK# AD29 34 SDIOW#
AJ19 AE27 PDDREQ SDDREQ
SATA_TX1- PIDE_DRQ 34 SDDREQ
AE30 PDIOR# SIORDY
PIDE_IOR# PDIOW# 34 SIORDY SDIOR#
AK18 SATA_RX1- PIDE_IOW# AE29 34 SDIOR#
AJ18 AC28 PDCS1# IRQ15
SATA_RX1+ PIDE_CS1# PDCS3# 34 IRQ15 SDDACK#
PIDE_CS3# AC29 34 SDDACK#
AK14 SDCS1#
SATA_TX2+ 34 SDCS1#
AJ14 AF29 PDD0 SDCS3#
SATA_TX2- PIDE_D0 34 SDCS3#
PRIMARY ATA 66/100

AF27 PDD1
SERIAL ATA
PIDE_D1 PDD2
AK13 SATA_RX2- PIDE_D2 AG29
AJ13 AH30 PDD3
SATA_RX2+ PIDE_D3 PDD4
PIDE_D4 AH28
AK11 AK29 PDD5
SATA_TX3+ PIDE_D5 PDD6 PDA[0..2]
AJ11 SATA_TX3- PIDE_D6 AK28 34 PDA[0..2]
AH27 PDD7
PIDE_D7 PDD8 PDD[0..15]
AK10 SATA_RX3- PIDE_D8 AG27 34 PDD[0..15]
AJ10 AJ28 PDD9
SATA_RX3+ PIDE_D9 PDD10
PIDE_D10 AJ29
AJ15 AH29 PDD11 PDIOW#
SATA_CAL PIDE_D11 34 PDIOW#
AG28 PDD12 PDDREQ
PIDE_D12 34 PDDREQ
AJ16 AG30 PDD13 PIORDY
C SATA_X1 PIDE_D13 PDD14 34 PIORDY PDIOR# C
PIDE_D14 AF30 34 PDIOR#
AK16 AF28 PDD15 IRQ14
SATA_X2 PIDE_D15 34 IRQ14 PDDACK#
16,34 PDDACK#
AK8 V29 SIORDY PDCS1#
SATA_ACT# SIDE_IORDY 34 PDCS1#
T27 IRQ15 PDCS3#
SIDE_IRQ 34 PDCS3#
AH15 T28 SDA0
PLLVDD_SATA SIDE_A0 SDA1
SIDE_A1 U29
AH16 T29 SDA2
XTLVDD_SATA SIDE_A2 SDDACK#
SIDE_DACK# V30
AG10 U28 SDDREQ
AVDD_SATA_1 SIDE_DRQ SDIOR#
AG14 AVDD_SATA_2 SIDE_IOR# W29
AH12 W30 SDIOW#
AVDD_SATA_3 SIDE_IOW# SDCS1#
AG12 AVDD_SATA_4 SIDE_CS1# R27
AG18 R28 SDCS3#
AVDD_SATA_5 SIDE_CS3#
AG21 AVDD_SATA_6
AH18 V28 SDD0
AVDD_SATA_7 SIDE_D0/GPIO15 SDD1
AG20 AVDD_SATA_8 SIDE_D1/GPIO16 W28
SECONDARY ATA 66/100
Y30 SDD2
SIDE_D2/GPIO17 SDD3
AG9 AVSSP_SATA_1 SIDE_D3/GPIO18 AA30
AF10 Y28 SDD4
AVSSP_SATA_2 SIDE_D4/GPIO19 SDD5
AF11 AVSSP_SATA_3 SIDE_D5/GPIO20 AA28
AF12 AB28 SDD6
AF13 AB27
SERIAL ATA POWER

AF14 AVSSP_SATA_6 SIDE_D8/GPIO23 AB29
AF15 AA27 SDD9
AF16 AVSSP_SATA_8 SIDE_D10/GPIO25 Y27
AF17 AA29 SDD11
AF18 AVSSP_SATA_10 SIDE_D12/GPIO27 W27
AF19 Y29 SDD13
AF20 AVSSP_SATA_12 SIDE_D14/GPIO29 V27
B AF21 U27 SDD15 B
AVSSP_SATA_13 SIDE_D15/GPIO30
AF22 AVSSP_SATA_14
AH9 AVSSP_SATA_15
AG11 AVSSP_SATA_16 AVSST_SATA_1 AG13
AG15 AVSSP_SATA_17 AVSST_SATA_2 AH22
AG17 AVSSP_SATA_18 AVSST_SATA_3 AK12
AG22 AVSSP_SATA_20 AVSST_SATA_5 AJ17
AF9 AVSSP_SATA_22 AVSST_SATA_7 AH19
AH17 AVSSP_SATA_23 AVSST_SATA_8 AJ20
AH23 AVSSP_SATA_24 AVSST_SATA_9 AH21
AH13 AVSSP_SATA_25 AVSST_SATA_10 AJ9
AH20 AVSSP_SATA_26 AVSST_SATA_11 AG16
AK9 AVSSP_SATA_27 AVSST_SATA_12 AK15
AJ12 AVSSP_SATA_28 AVSST_SATA_13 AK20
AK17 AVSSP_SATA_29
AK23 AVSSP_SATA_30
AH10 AVSSP_SATA_31
AJ23 AVSSP_SATA_32
SB400
A A
PROJECT : CT8
Custom SB400-SATA/IDE 1A

5 4 3 2 1
5 4 3 2 1
CLG +3V U7C
A30
D30
VDDQ_1 SB400 SB VSS_12 E19
E22
VDDQ_2 VSS_13
PLACE ALL THE DECOUPLING E24 VDDQ_3 Part 3 of 4 VSS_14 E23
E25 VDDQ_4 VSS_15 E26
CAPS ON THIS SHEET CLOSE J5 E30
VDDQ_5 VSS_16
TO SB AS POSSIBLE. K1 VDDQ_6 VSS_17 F1
D K5 F4 D
VDDQ_7 VSS_18
N5 VDDQ_8 VSS_19 G5
P5 VDDQ_9 VSS_20 H5
R1 VDDQ_10 VSS_21 J1
U5 VDDQ_11 VSS_22 J4
U26 VDDQ_12 VSS_23 K4
U30 VDDQ_13 VSS_24 L5
V5 VDDQ_14 VSS_25 M5
+3V V26 P1
VDDQ_15 VSS_26
Y1 VDDQ_16 VSS_27 R5
Y26 VDDQ_17 VSS_28 R26
AA5 VDDQ_18 VSS_29 T5
+ C548 AA26 T26
C535 C529 C530 C531 C514 C499 C500 C628 C623 VDDQ_19 VSS_30
AB5 VDDQ_20 VSS_31 T30
22U 1U 1U 1U 1U 1U 1U 0.1U 0.1U AC30 W1
*100U VDDQ_21 VSS_32
AD5 VDDQ_22 VSS_33 W5
AD26 VDDQ_23 VSS_34 W26
AE1 VDDQ_24 VSS_35 Y5
AE5 VDDQ_25 VSS_36 AB26
AE26 VDDQ_26 VSS_37 AB30
+3V AF6 AC5
VDDQ_27 VSS_38
AF7 VDDQ_28 VSS_39 AC26
AF24 VDDQ_29 VSS_40 AD1
AF25 VDDQ_30 VSS_41 AF5
AK1 VDDQ_31 VSS_42 AF8
C634 C629 C627 C625 C622 C504 C626 C624 C618 AK4 AF23
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U VDDQ_32 VSS_43
AK26 VDDQ_33 VSS_44 AF26
+1.8V AK30 AG8
POWER
VDDQ_34 VSS_45
VSS_46 AJ1
M12 VDD_1 VSS_47 AJ24
C M13 AJ30 C
VDD_2 VSS_48
M18 VDD_3 VSS_49 AK5
M19 VDD_4 VSS_50 AK25
+1.8V N12 M14
VDD_5 VSS_51
N13 VDD_6 VSS_52 M15
V12 VDD_9 VSS_55 N14
C495 C607 C559 C540 C593 C561 C544 V13 N15
22U 1U 1U 1U 1U 0.1U 0.1U VDD_10 VSS_56
V18 VDD_11 VSS_57 N16
V19 VDD_12 VSS_58 N17
W12 VDD_13 VSS_59 P12
W13 VDD_14 VSS_60 P13
W18 VDD_15 VSS_61 P14
3V_S5 W19 P15
+1.8V VDD_16 VSS_62
VSS_63 P16
A3 S5_3.3V_1 VSS_64 P17
A7 S5_3.3V_2 VSS_65 P18
E6 S5_3.3V_3 VSS_66 P19
E7 S5_3.3V_4 VSS_67 R12
C604 C541 C605 C603 C542 C582 C602 C591 C551 E1 R13
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 1.8V_S5 S5_3.3V_5 VSS_68
F5 S5_3.3V_6 VSS_69 R14
VSS_70 R15
E9 S5_1.8V_1 VSS_71 R16
E10 S5_1.8V_2 VSS_72 R17
E20 S5_1.8V_3 VSS_73 R18
1.8VSUS E21 R19
S5_1.8V_4 VSS_74
VSS_75 T12
E13 USB_PHY_1.8V_1 VSS_76 T13
B E16 T15 B
+1.8V USB_PHY_1.8V_3 VSS_78
20 mils AVDD_CK 15 mils C357 0.1U T17
L26 VSS_80
R95 0 CPU_PWR C30 T18
VDDA_1V2 CPU_PWR VSS_81
15 mils VSS_82 T19
SBK160808T-301Y-S R393 1K V5_VREF AG6 U12
+5V V5_VREF VSS_83
C369 U13
C370 C520 VSS_84
AVDD_CK A24 AVDDCK VSS_85 U14
10U 1U 0.1U 2 1 B24 U15
+3V AVSSCK VSS_86
VSS_87 U16
D17 RB751V-40 A4 U17
C642 C633 VSS_1 VSS_88
A8 VSS_2 VSS_89 U18
*1U 0.1U A29 U19
VSS_3 VSS_90
B28 VSS_4 VSS_91 V14
C1 VSS_5 VSS_92 V15
REV.B E5 VSS_6 VSS_93 V16
E8 VSS_7 VSS_94 V17
E11 VSS_8 VSS_95 W14
E12 VSS_9 VSS_96 W15
E15 VSS_10 VSS_97 W16
E18 VSS_11 VSS_98 W17
3V_S5 1.8V_S5 30 mils 1.8VSUS 30 mils

SB400
C655 C617
C630 C637 C645 C631 C632 C610 C547 C606 C588 C594 C587 C558
10U 0.1U 0.1U 0.1U 0.1U 0.1U 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
A A
PROJECT : CT8
Custom SB400-POWER & DECOUPLING 2A

5 4 3 2 1
5 4 3 2 1
CLG 3V_S5 +3V 3V_S5 +3V +3V +3V +3V +3V +3V +3V +3V
R181 R319 R180 R182 R185 R165 R443 R431 R167 R172 R444
REV.B
10K *10K 10K *10K *10K 10K 10K 10K *10K *10K *10K
D D
12 AUTO_ON#
13,17,23 SDOUT1
12 RTC_CLK
13 SPDIF_OUT PCICLK4
12,20 PCI_CLK_7411
12,30 PCLK_5
12 PCLK_6 PCICLK7
12,26 PCLK_LAN
12 PCICLK8 PCICLK3
12,30 PCLK_591 PCICLK2
12,17 PCLK_MINI
R160 R441 R179 R162 R166 R184 R183 R430 R186 R171 R445
REV.B
*10K 10K *10K 10K 10K *10K *10K *10K 10K 10K 10K
REQUIRED STRAPS
PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7 PCI_CLK8 PCI_CLK3
ACPWRON AC_SDOUT RTC_CLK SPDIF_OUT PCI_CLK_7411PCLK_5 PCLK_6 PCLK_LAN PCI_CLK8 PCLK_591
PULL MANUAL USE INTERNAL SIO 24MHz 48MHz OSC 14MHz OSC CPU I/F = K8 ROM TYPE USB PHY
HIGH PWR ON DEBUG RTC MODE MODE PWRDOWN
H,H = PCI ROM OVERLAP COMMON PADS WHERE
STRAPS DISABLE
C
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
H,L = PMC LPC ROM
DEFAULT POSSIBLE FOR DUAL-OP C
RESISTORS.
PULL AUTO IGNORE EXTERNAL SIO 48MHz 48MHz XTAL 14MHz XTAL CPU I/F = P4 USB PHY
LOW PWR DEBUG RTC (NOT MODE MODE L,H = NORMAL LPC ROM PWRDOWN
DEFAULT
ON STRAPS SUPPORTED ENABLE
DEFAULT W/ IT8712 ) DEFAULT L,L = FWH ROM
Need to check
+3V +3V +3V +3V +3V +3V +3V +3V +3V +3V
PDDACK# for A21 pull high

R314 R411 R189 R478 R448 R479 R449 R424 R187 R426
10K 10K 10K 10K 10K *10K *10K *10K *10K *10K
14,34 PDDACK#
12,17,20,26 AD31
12,17,20,26 AD30
12,17,20,26 AD29
12,17,20,26 AD28
12,17,20,26 AD27
12,17,20,26 AD26
12,17,20,26 AD25 +3V
12,17,20,26 AD24
B 12,17,20,26 AD23 B
R168 *1K
05/05 Modify
R310 R477 R188 R403 R447 R425 R429 R423 R450 R427 C395
DEBUG STRAPS *10K *10K *10K *10K *10K 10K 10K 10K 10K *10K
12 REQ5#
*0.1U
5
U15
SDA A0 1
12 GNT5# 6 SCL A1 2
A2 3
8 VCC
4 GND WP 7
PDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
*AT24C32N-10SI-2.7
PULL USE PLL CHARGE PLL CHARGE PLL VCO PLL VCO BYPASS BYPASS BYPASS IDE USE EEPROM BY PASS
HIGH SHORT PUMP CTRL PUMP CTRL CTRL BIT CTRL BIT PCI PLL ACPI PLL PCIE STRAPS USB PLL
RESET BIT 1 HI BIT 0 HI 1 HI 0 HI BCLK
DEFAULT DEFAULT DEFAULT DEFAULT SB PCIE EEPROM STRAPS
PULL USE PLL CHARGE PLL CHARGE PLL VCO PLL VCO USE PCI USE USE IDE USE DEFAULT USE USB
LOW LONG PUMP CTRL PUMP CTRL CTRL BIT CTRL BIT PLL ACPI PLL PCIE STRAPS PLL
RESET BIT 1 LO BIT 0 LO 1 LO 0 LO BCLK
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
Need to check
A A
PROJECT : CT8
Custom SB400-STRAPS 2A

5 4 3 2 1
5 4 3 2 1
+3V
D D
CN22
1 TIP RING 2
R476 3 4 +3V
10K 5
7
9
LAN1
LAN3
LAN5
LAN7
LAN2
LAN4
LAN6
LAN8
6
8
10
MINI PCI TYPE III SLOT
33 RF_LINK 11 LED_GP LED_YP 12
D7 1 21SS355 13 14
13 RF_OFF# LED_GN LED_YN
REV.C 15 NC1 NC2 16
12 INTF# 17 -INTB +5V 18 +5V
19 +3V -INTA 20 INTE# 12
21 R(IRQ3) R(IRQ4) 22
23 GND +3VAUX 24 LANVCC
12,16 PCLK_MINI 25 PCICLK -RST 26 PCIRST# 12,20,26,30
27 GND +3V 28
2
12 REQ1# 29 -REQ -GNT 30 GNT1# 12
R474 31 32
+3V GND
*33 12,16,20,26 AD31 33 AD31 -PME 34 PCI_PME# 13,20,26 REV.B
35 36 R176 1K
12,16,20,26 AD29 AD29 (V) BC0EX2 33
1 37 GND AD30 38 AD30 12,16,20,26
12,16,20,26 AD27 39 AD27 +3V 40
12,16,20,26 AD25 41 AD25 AD28 42 AD28 12,16,20,26
C705 R199 43 44
33 BC0EX1 (V) AD26 AD26 12,16,20,26
*18P 1K 45 46
12,20,26 C/BE3# -CBE3 AD24 AD24 12,16,20,26
47 48 R451 100 AD18
12,16,20,26 AD23 AD23 IDSEL
49 GND GND 50
C 51 52 AD22 C
12,20,26 AD21 AD21 AD22 AD22 12,20,26
12,20,26 AD19 53 AD19 AD20 54 AD20 12,20,26
55 GND PAR 56 PAR 12,20,26
12,20,26 AD17 57 AD17 AD18 58 AD18 12,20,26
12,20,26 C/BE2# 59 -CBE2 AD16 60 AD16 12,20,26
12,20,26 IRDY# 61 -IRDY GND 62
63 +3V -FRAME 64 FRAME# 12,20,26
12,20,26 CLKRUN# 65 -CLKRUN -TRDY 66 TRDY# 12,20,26
12,20,26 SERR# 67 -SERR -STOP 68 STOP# 12,20,26
69 GND +3V 70
12,20,26 PERR# 71 -PERR -DEVSEL 72 DEVSEL# 12,20,26
12,20,26 C/BE1# 73 -CBE1 GND 74
12,20,26 AD14 75 AD14 AD15 76 AD15 12,20,26
77 GND AD13 78 AD13 12,20,26
12,20,26 AD12 79 AD12 AD11 80 AD11 12,20,26
12,20,26 AD10 81 AD10 GND 82
83 GND AD9 84 AD9 12,20,26
12,20,26 AD8 85 AD8 -CBE0 86 C/BE0# 12,20,26
12,20,26 AD7 87 AD7 +3V 88
+3V 89 90 +3V
+3V AD6 AD6 12,20,26
12,20,26 AD5 91 AD5 AD4 92 AD4 12,20,26
93 (V) AD2 94 AD2 12,20,26
12,20,26 AD3 95 AD3 AD0 96 AD0 12,20,26
97 98 R191
R197 +5V +5V (V)
12,20,26 AD1 99 AD1 SERIRQ 100 SERIRQ 12,20,30 *10K
*10K 101 GND GND 102
13,23 SYNC1 103 SYNC M66EN 104
R195 33 SDIN1 105 106 SDOUT1 13,16,23
13 SDINB SDIN0 SDOUT
13,23 BITCLK 107 BITCLK SDIN1 108
B
109 -AC_PRIMARY -RESET 110 B
111 112 -CODEC_RST 13,23
BEEP -MPCICACK
113 AGND AGND 114
115 116 R190
R198 +MIC +SPK
REV.B 117 -MIC -SPK 118 1K
*10K DEL C402, R196. 119 AGND AGND 120
121 122 R439 2 1 10K
-RI NC4
+5V 123 +5VA +3VAUX 124 LANVCC
125 GND
126 GND
MINIPCI_TYPE_III
+3V
+5V +5V +5V
C528 C702 C396 C704 C701 C696 C706 C684

C685 C697 C698 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402
.1U/16V/0402 .1U/16V/0402 .1U/16V/0402
LANVCC REV.B
A
1. Remove R175, Q19. A
2. CN22 pin 34 connect to PCI_PME#.

C703 C686
.1U/16V/0402 .1U/16V/0402
PROJECT : CT8
Custom 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
VADJ_R
CN1 R211 +5V BLON
VADJ_R 1K +3V
31 30 VADJ 30
VIN
32 29 LCDVIN
1
Q1
33 28 +3V
1
LCD_VCC L31
A 34 27 LCDVCC A
PBY201209T-4A 2 C409 C412 C410 C1
26 RF_LED# 28,33
.1U/16V/0402 .1U/16V/0402
25 EDIDDATA 7
C411
24 EDIDCLK 7
BLON DTA124EUA
2
23 .1U_0603_25V .1U/16V/0402
3
22
21 R216 10K 5VPCU
20 10U/25V
19 REV.D
LCDID2 Q23
18 LCDID2 13
LCDID1 SI3443DV
17 LCDID1 13
LCDID0
16 LCDID0 13
R507 10K 3 4
15 G S +3V
14 25 mils
2 5
13 D D 500mA
3
C413 C415 C416 REV.B C730 1 6 LCDVCC
12 TXLOUT0+ 100P 100P 100P .47U D D
11 TXLOUT0+ 7
TXLOUT0- R508 4.7K 2
10 TXLOUT0- 7 7 DISP_ON
9 EMI
TXLOUT1+ R215 Q25
8 TXLOUT1+ 7
TXLOUT1- REV.C C414 C2
7 TXLOUT1- 7 D19 DTC144EU REV.D
1
6 TXLOUT2+ *1K 10U/10V .1U
5 TXLOUT2+ 7 7,30 PWROK 1 2
TXLOUT2-
4 TXLOUT2- 7
B 3 +3V
REV.B B
TXLCLKOUT+ 1SS355
2 TXLCLKOUT+ 7
TXLCLKOUT- RN45
1 TXLCLKOUT- 7
LCDID2 1 2
LCDID1 3 4
LCD_CON30 LCDID0 5 6 3VPCU R4 100K
7 8
Q4
8P4R-10K SI3457DV
R464
33K 3 4
G S VIN
D9 Close to EC 2 5
R212 1K BLON +3V D D
7 LCD_BLON 2 1 LID_EC# 30
R3
1 D D 6
30mils
REV.B 1SS355
20K LCDVIN
R1
3 1
3
R214 *1K 4 2 10K
7 CPIS_BLEN
SW1 LID R213 *0 2
7,30 PWROK
3
REV.B Q2
C C
DTC144EU
1
30 FPBACK 2
Q24
*DTC144EUA
REV.B
1
D D
PROJECT : CT8
B 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
CardBus Connector
3VSUS 5VSUS A_VCC 30 mils
5VSUS 5VSUS
U13
1
C519 C565 1 24
C562 C564 + C579 5V_0 5V_2
2 5V_1 NC_3 23
1
C672 C680 .01U_0402 .01U_0402 10U/10V/0805 TPS_DATA 3 22
20 TPS_DATA DATA NC_2
C669 C678 .1U_0603_25V 1000P TPS_CLOCK TPS_CLOCK 4 21
20 TPS_CLOCK CLOCK SHDN#
4.7U/10V 4.7U/10V TPS_LATCH
2
20 TPS_LATCH 5 LATCH 12V_1 20
2
6 NC_0 BVPP/BVCORE 19
7 12V_0 BVCC1 18
R434 AVPP 8 17
.1U_0603_25V .1U_0603_25V AVPP/AVCORE BVCC0
D A_VCC 9 AVCC0 NC_1 16 D
*43K 10 15
AVCC1 OC#
11 GND 3.3VIN0 14 3VSUS
NC
20,30 RPCICGRST# 12 RESET# 3.3VIN1 13
TPS2224A/2220A (PWR)
25
U26-3 U26-2 A_VCC
VCCB D19 VCCA A5
VCCB K19 VCCA A11
B15 D1 A_D10
B_CAD31/B_D10
B_CAD30/B_D9 A16
A_CAD31/A_D10
A_CAD30/A_D9 C1 A_D9 CN4
B16 D3 A_D1 A_D3 2
B_CAD29/B_D1 A_CAD29/A_D1 A_D8 A_D4 SKTAAD0/D3
B_CAD28/B_D8 A17 A_CAD28/A_D8 C2 3 SKTAAD1/D4
C16 B1 A_D0 A_D11 37
B_CAD27/B_D0 A_CAD27/A_D0 A_A0 A_D5 SKTAAD2/D11
B_CAD26/B_A0 D17 A_CAD26/A_A0 B4 4 SKTAD3/D5
C19 A4 A_A1 A_D12 38 REV.B
B_CAD25/B_A1 A_CAD25/A_A1 A_A2 A_D6 SKTAD4/D12
B_CAD24/B_A2 D18 A_CAD24/A_A2 E6 5 SKTAD5/D6
E17 B5 A_A3 A_D13 39 REMOVE PCI1510 CIRCUIT AND PARTS.
B_CAD23/B_A3 A_CAD23/A_A3 A_A4 A_D7 SKTAAD6/D13
B_CAD22/B_A4 E19 A_CAD22/A_A4 C6 6 SKTAAD7/D7
G15 B6 A_A5 A_D15 41
B_CAD21/B_A5 A_CAD21/A_A5 A_A6 A_A10 SKTAAD8/D15
B_CAD20/B_A6 F18 A_CAD20/A_A6 G9 8 SKTAAD9/A10
H14 C7 A_A25 A_CE2# 42
B_CAD19/B_A25 A_CAD19/A_A25 A_A7 A_OE# SKTAAD10/CE2#
B_CAD18/B_A7 H15 A_CAD18/A_A7 B7 9 SKTABAD11/OE# SKTA/VCC1 17
G17 A7 A_A24 A_A11 10 51 A_VCC
B_CAD17/B_A24 A_CAD17/A_A24 A_A17 A_IORD# SKTAAD12/A11 SKTA/VCC2
B_CAD16/B_A17 K17 A_CAD16/A_A17 A10 44 SKTAAD13/IORD#
L13 E11 A_IOWR# A_A9 11
B_CAD15/B_IOWR A_CAD15/A_IOWR A_A9 A_IOWR# SKTAAD14/A9
B_CAD14/B_A9 K18 A_CAD14/A_A9 G11 45 SKTAAD15/IOWR#
L15 C11 A_IORD# A_A17 46
B_CAD13/B_IORD A_CAD13/A_IORD A_A11 A_A24 SKTAAD16/A17
B_CAD12/B_A11 L17 A_CAD12/A_A11 B11 55 SKTAAD17/A24
L18 C12 A_OE# A_A7 22
B_CAD11/B_OE A_CAD11/A_OE A_CE2# A_A25 SKTAAD18/A7
B_CAD10/B_CE2 L19 A_CAD10/A_CE2 B12 56 SKTAAD19/A25
M17 A12 A_A10 A_A6 23
B_CAD9/B_A10 A_CAD9/A_A10 A_D15 A_A5 SKTAAD20/A6
B_CAD8/B_D15 M14 A_CAD8/A_D15 E12 24 SKTAAD21/A5 30 mils
M15 C13 A_D7 A_A4 25
B_CAD7/B_D7 A_CAD7/A_D7 A_D13 A_A3 SKTAAD22/A4 AVPP
B_CAD6/B_D13 N19 A_CAD6/A_D13 F12 26 SKTAAD23/A3 SKTA/VPP1 18
N18 A13 A_D6 A_A2 27 52
B_CAD5/B_D6 A_CAD5/A_D6 A_D12 A_A1 SKTAAD24/A2 SKTA/VPP2
B_CAD4/B_D12 N15 A_CAD4/A_D12 C14 28 SKTAAD25/A1
C M13 E13 A_D5 A_A0 29 C597 C580 C
B_CAD3/B_D5 A_CAD3/A_D5 A_D11 A_D0 SKTAAD26/A0
B_CAD2/B_D11 P18 A_CAD2/A_D11 A14 30 SKTAAD27/D0
P17 B14 A_D4 A_D8 64 10U/10V/0805 .001U_0402
B_CAD1/B_D4 A_CAD1/A_D4 A_D3 A_D1 SKTAAD28/D8
B_CAD0/B_D3 P19 A_CAD0/A_D3 E14 31 SKTAAD29/D1
A_D9 65
A_REG# A_D10 SKTAAD30/D9
B_CC/BE3/B_REG F15 A_CC/BE3/A_REG C5 66 SKTAAD31/D10
G18 F9 A_A12
B_CC/BE2/B_A12 A_CC/BE2/A_A12 A_A8 A_CE1#
B_CC/BE1/B_A8 K14 A_CC/BE1/A_A8 B10 7 -SKTACBE0/CE1# GND1 1
M18 G12 A_CE1# A_A8 12 34
B_CC/BE0/B_CE1 A_CC/BE0/A_CE1 A_A12 -SKTACBE1/A8 GND2
21 -SKTACBE2/A12 GND3 35
K13 G10 A_A13 A_REG# 61 68
B_CPAR/B_A13 A_CPAR/A_A13 -SKTACBE3/REG# GND4
GND5 69
G19 C8 A_A23 19 70
B_CFRAME/B_A23 A_CFRAME/A_A23 A_A22 A_A23 SKTAPCLK/A16 GND6
B_CTRDY/B_A22 H17 A_CTRDY/A_A22 A8 54 -SKTAFRAME/A23 GND7 71
J13 B8 A_A15 A_A15 20 72
B_CIRDY/B_A15 A_CIRDY/A_A15 A_A20 A_A22 -SKTAIRDY/A15 GND8
B_CSTOP/B_A20 J17 A_CSTOP/A_A20 A9 53 -SKTATRDY/A22 GND9 73
H19 C9 A_A21 A_A21 50 74
B_CDEVSL/B_A21 A_CDEVSL/A_A21 A_A19 A_A20 -SKTADEVSEL/A21 GND10
B_CBLOCK/B_A19 J19 A_CBLOCK/A_A19 E10 49 -SKTASTOP/A20 GND11 75
A_A13 13 76
A_A14 A_A14 SKTAPAR/A13 GND12
B_CPERR/B_A14 J18 A_CPERR/A_A14 F10 14 -SKTAPERR/A14 GND13 77
B18 B3 A_WAIT# A_WAIT# 59 78
B_CSERR/B_WAIT A_CSERR/A_WAIT A_INPACK# 0SKTASERR/WAIT# GND14
60 -SKTAREQ/INPACK# GND15 79
E18 E7 A_INPACK# A_WE# 15 80
B_CREQ/B_INPACK A_CREQ/A_INPACK A_WE# A_IREQ# -SKTAGNT/WE# GND16
B_CGNT/B_WE J15 A_CGNT/A_WE B9 16 -SKTAINT/RDY GND17 81
A_A19 48 82
A_STSCHG_P A_IOIS16# -SKTALOCK/A19 GND18
B_CSTSCHG/B_BVD1(STSCHG/RI) F14 A_CSTSCHG/A_BVD1(STSCHG/RI) B2 33 -SKTACLKRUN/WP GND19 83
A18 C3 A_IOIS16# A_RESET 58 84
B_CCLKRUN/B_WP(IOIS16) A_CCLKRUN/A_WP(IOIS16) A_A16 15 A_D14 -SKTARST/RESET GND20
B_CCLK/B_A16 H18 A_CCLK/A_A16 E9 40 SKTARSVD/D14 GND21 85
R342 REV.D A_A18 47 86
A_IREQ# A_VS1# -SKTRSVD/A18 GND22
B_CINT/B_READY(IREQ) B19 A_CINT/A_READY(IREQ) C4 43 -SKTAVS1/VS1#
C743 A_VS2# 57
A_RESET *22P A_CD1# -SKTAVS2VS2#
B_CRST/B_RESET F17 A_CRST/A_RESET A6 36 -SKTACD1/CD1# GND 87
A_CD2# 67 88 ESD
A_SPKR_P A_SPKR_P -SKTACD2/CD2# GND
B_CAUDIO/B_BVD2(SPKR) C17 A_CAUDIO/A_BVD2(SPKR) A2 62 SKTAAUDIO/BVD2
REV.B A_STSCHG_P 63
A_CD1# A_D2 -SKTASTSCHG/BVD1
B_CCD1/B_CD1 N13 A_CCD1/A_CD1 C15 32 SKTARSVD/D2
B17 E5 A_CD2#
B_CCD2/B_CD2 A_CCD2/A_CD2 A_VS1#
B_CVS1/B_VS1 C18 A_CVS1/A_VS1 A3
B
F19 E8 A_VS2# B
B_CVS2/B_VS2 A_CVS2/A_VS2
B_RSVD/B_D14 N17 A_RSVD/A_D14 B13 A_D14 CARDBUS SLOT

A15 D2 A_D2
B_RSVD/B_D2 A_RSVD/A_D2 A_A18
K15 C10
B_RSVD/B_A18 A_RSVD/A_A18 FOX=WZ21131-G2
PCI7411GHK PCI7411GHK
A A
PROJECT : CT8
C 2A

5 4 3 2 1
5 4 3 2 1
CardBus
3VSUS
3VSUS
U26-1 U26-5 3VSUS
R390 U31
W3 VCCP
W10 M3 8 1 SCL R415 2.7K 3VSUS
VCCP 10K SCL VCC A0 R529 *2.7K
D
12,16,17,26 AD[0..31] 7 NC A1 2 REV.C D
AD31 U2 SCL 6 3
AD30 AD31 SDA SCL A3 SDA R420 2.7K 3VSUS
V1 AD30 SDA M2 5 SDA GND 4
AD29 V2 R2 R530 *2.7K
AD28 AD29 SUSPEND
U3 AD28
AD27 W2 PCI7411GHK 24LC08
AD26 AD27 TPS_DATA
V3 AD26 DATA N1 TPS_DATA 19
AD25 U4 L6 TPS_CLOCK
AD25 CLOCK TPS_CLOCK 19
AD24 V4 N2 TPS_LATCH
AD24 LATCH TPS_LATCH 19
AD23 V5 AD23
AD22
AD21
U5
R6
AD22
AD21 SPKROUT L7 PCMSPK 23
PCIXX21 Power Terminals
AD20 P6
AD19 AD20 3VSUS
W6 AD19
AD18 V6 N3 U26-4
AD18 MFUNC0 INTB# 12
AD17 U6 M5 H8
AD17 MFUNC1 INTD# 12 VCC
AD16 R7 P1 H9 3VSUS
AD16 MFUNC2 INTG# 12 VCC
AD15 V9 P2 H10
AD14 AD15 MFUNC3 SERIRQ 12,17,30 VCC
U9 AD14 MFUNC4 P3 PLOCK# 12 H11 VCC
AD13 R9 N5 CARD_LED 21,28 H12
AD12 AD13 MFUNC5 VCC
N9 AD12 MFUNC6 R1 CLKRUN# 12,17,26 J8 VCC
AD11 V10 M7 C643 C651 C590 C616
AD10 AD11 VCC
U10 AD10 J12 VCC
AD9 R10 M9 .001U_0402 .1U 1U_0402_6.3V
AD8 AD9 VCC .01U_0402
N10 AD8 M10 VCC
AD7 V11 REV.B M12 C509 1U_0402_6.3V
AD6 AD7 VCC
U11 AD6 CLK_48 M1 K8 VCC
AD5 R11 K12
C
AD4 AD5 VCC C
W12 AD4 N7 VCC 1.5V M19

AD3 V12 H1
AD2 AD3 1.5V
U12 AD2 G7 GND
AD1 N11 G8 C647 1U_0402_6.3V 3VSUS
AD0 AD1 R515 C742 GND
W13 AD0 REV.C G13 GND VR_EN H2
H13 GND
W4 22 22p J9
12,17,26 C/BE3# C/BE3 GND
12,17,26 C/BE2# W7 C/BE2 J10 GND
W9 J11 C554 C560 C636 C659
12,17,26 C/BE1# C/BE1 GND
12,17,26 C/BE0# W11 C/BE0 K9 GND
K10 .001U_0402 .1U 1U_0402_6.3V
CLK48M
GND .01U_0402
12,17,26 PAR P9 PAR K11 GND
48MHz Clock L8 GND
V7 +3V L9
12,17,26 FRAME# FRAME Y9 GND
R8 L47 L10
12,17,26 TRDY# TRDY GND
12,17,26 IRDY# U7 IRDY 3 OUT VDD 4 L11 GND
W8 FCM1608K221 L12
12,17,26 STOP# STOP GND
N8 2 1 R407 4.7K M8 3VSUS
12,17,26 DEVSEL# DEVSEL GND OE GND
AD25 R360 100 W5 IDSEL SG-8002CA 48M C663 C649 PCI7411GHK
V8 L48
12,17,26 PERR# PERR
U8 .01U_0402 .01U_0402
12,17,26 SERR# SERR 0
REV.B C383 C660
U1 .1U .1U
12 REQ4# REQ
T2 U26-6
12 GNT4# GNT
PCI_CLK_7411 P5 W17
B 12,16 PCI_CLK_7411 PCIRST# PCLK NC B
12,17,26,30 PCIRST# R3 PRST

RPCICGRST# T1 P12
19,30 RPCICGRST# GRST TEST0
T3 3VSUS T19
13,17,26 PCI_PME# RI_OUT/PME VCO_LF
PCI7411GHK
R391 *0 PCI7411GHK
13 RI# PCIRST# RPCICGRST#
R402 0 C754 C755
3VSUS
EMI *.1U *.1U U26-10
PCI_CLK_7411
E2 R387 *10K
A_USB_EN
REV.C
R315 E1 R388 *10K
*22 B_USB_EN
PCI7411GHK
1. Change R402 from no stuff to 0 ohm.
C505 REV.B
*22P
2. Remove R392, Q36.
3. U26 pin T3 connect to PCI_PME#
4. Add RC circuit on CLK48M.
5. Change R407 to 4.7k.
A
6. Change L48 to 0 ohm. A
PROJECT : CT8
Custom 3A

5 4 3 2 1
8 7 6 5 4 3 2 1
CARD POWER CONTROL VCC_XD
U26-8 MS_BS_SD_CMD_SM_WEZ R516 10K

MC_PWR_CTRL_0# F1 REV.B SM_REZ R517 10K
MC_PWR_CTRL_0 SD_CDZ SD_WP_SM_CEZ R518 2.2K
F2 MC_PWR_CTRL_1 SD_CD E3
F5 MS_CDZ SM_RBZ R519 2.2K
MS_CD
SM_CD F6 SM_CDZ
R499 22 SD_CLK
REV.B REV.C
MS_CLK_SD_CLK R406 22 MS_CLK REV.B
D
MS_CLK/SD_CLK/SM_EL_WP G5
F3 MS_BS_SD_CMD_SM_WEZ 1. Remove R397, D16, R489. D
MS_BS/SD_CMD/SM_WE MS_DATA3_SD_DAT3_SM_D3
MS_DATA3/SD_DAT3/SM_D3 H5
G3 MS_DATA2_SD_DAT2_SM_D2 2. Add a Quick Switch U34 to
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1 G2 MS_DATA1_SD_DAT1_SM_D1 isolate clock. VCC_XD
MS_DATA0_SD_DAT0_SM_D0
MS_SDIO(DATA0)/SD_DAT0/SM_D0 G1 3. Change R501 to 0 ohm.
SM_REZ R421 0 XD-RE#
SD_CLK/SM_RE/SC_GPIO1 J5
J3 SM_ALE R383 0 XD-ALE 4. CN5 pin 35, 43 connect to
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6 H3 SM_D4 the same net. C725 C726 C727 C728
J6 SM_D5 0.1U 0.1U 0.1U 0.1U
SD_DAT1/SM_D5/SC_GPIO5 SM_D6
SD_DAT2/SM_D6/SC_GPIO4 J1
J2 SM_D7 5. ADD R516, R517, R518,
SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE H7 SD_WP_SM_CEZ R519. REV.B
J7 SM_CLE R375 0 XD-CLE
SM_CLE/SC_GPIO0 SM_RBZ_B
SM_R/B/SC_RFU K1
K2 REV.C R531 0
SM_PHYS_WP/SC_FCB 3VSUS
3VSUS
PCI7411GHK REV.C 3VSUS
R499,421,383,375 move to chip side.
5
R399
U26-9 VCC
5VSUS
L5 SM_RBZ 3
C SC_PWR_CTRL U34 A Y SM_RBZ_B C
SC_CD L2 VCC_XD 4
1
SM_CDZ 6 5 6 B 8.2K
3VSUS SEL VCC ORGND Q35
K5 R500 43K XD-WP# 4 1 GND U36
SC_CLK COM IN_B1 *NC7SZ58 MC_PWR_CTRL_0# AO3403
SC_RST K3 2
R389 10K REV.C MS_CLK
1
SC_VCC_5V K7 IN_B0 3
2 GND
SC_DATA L1 30 mils
R532 *10K *NC7SB3157
3
SC_OC L3
REV.C VCC_XD
3
PCI7411GHK Q32 R396 C664
VCC_XD VCC_XD *2N7002E 10U/10V/0805

20,28 CARD_LED 2
CLOSE TO XD
100K
CN5 3VSUS SOCKET
1 23 XD-D6 R440 0 SM_D6
5IN1_GND SM/XD-D6 XD-D7 R433 0 SM_D7
REV.B
1
2 SM-CD-COM SM/XD-D7 24
SM_CDZ D14
3 SM-CD-SW SM-LVD 25
4 26 SM_RBZ SD_CDZ 1 2 R359
SD_WP_SM_CEZ NC #SM/XD-R/B XD-RE#
5 SD-WP-SW #SM/XD-RE 27
MS_DATA1_SD_DAT1_SM_D1 R487 22 SD-DAT1 6 28 XD-CE# R416 0 SD_WP_SM_CEZ *100K
MS_DATA0_SD_DAT0_SM_D0 R488 22 SD-DAT0 SD-DAT1 #SM/XD-CE *1SS355
B 7 SD-DAT0 SM-VCC 29 B
SD_CLK 8 30 VCC_XD
SD-CLK #SM-CD XD-D3 R457 0 MS_DATA3_SD_DAT3_SM_D3 D13
9 SD-VCC SM/XD-D3 31
MS_BS_SD_CMD_SM_WEZ R490 22 SD-CMD 10 32 XD-D2 R461 0 MS_DATA2_SD_DAT2_SM_D2 SM_CDZ 1 2
MS_DATA3_SD_DAT3_SM_D3 R491 22 SD-DAT3 SD-CMD SM/XD-D2 XD-D1 R460 0 MS_DATA1_SD_DAT1_SM_D1
11 SD-DAT3 SM/XD-D1 33
MS_DATA2_SD_DAT2_SM_D2 R492 22 SD-DAT2 12 34 XD-D0 R472 0 MS_DATA0_SD_DAT0_SM_D0
MS_BS_SD_CMD_SM_WEZ R493 0 MS-BS SD-DAT2 SM-D0 XD-WP# *1SS355 R494
13 MS-BS SM/XD-WP-IN 35
MS_DATA1_SD_DAT1_SM_D1 R495 22 MS-DATA1 14 36 XD-WE# R463 0 MS_BS_SD_CMD_SM_WEZ
MS_DATA0_SD_DAT0_SM_D0 R496 22 MS-DATA0 MS-DATA1 #SM/XD-WE XD-ALE 22
15 MS-DATA0 #SM/XD-ALE 37
MS_DATA2_SD_DAT2_SM_D2 R497 22 MS-DATA2 16 38 XD-CLE
MS_CDZ MS-DATA2 ##SM/XD-CLE SM_CDZ
17 MS-INS XD-CD 39
3
MS_DATA3_SD_DAT3_SM_D3 R498 22 MS-DATA3 18 40
MS_CLK MS-DATA3 XD-VCC Q39
19 MS-CLK SD-CD-COM 41
20 42 SD_CDZ
SM_D4 R455 0 XD-D4 MS-VCC SD-CD-SW XD-WP# R501 0 MS_CLK MC_PWR_CTRL_0# 2N7002E
21 SM/XD-D4 SM-WP-SW 43 REV.B 2
SM_D5 R453 0 XD-D5 22 44
SM/XD-D5 5IN1_GND
5IN1_GND 45 REV.C
5IN1_GND 46 REV.B
1
TAITWUN-R007-020-N5-44P VCC_XD
rev.f REV.C
5 IN1 CARD READER
A A
C758 C759 C760 C761
0.47U 0.47U 0.47U 0.47U

PROJECT : CT8
Custom 3A

8 7 6 5 4 3 2 1
5 4 3 2 1
IEEE 1394a L46

IEEE 1394 CONNECTOR
3VSUS
U26-7 20 mils
R13 FBM1608 TPBIAS0
AVDD 1394_AVDD
AVDD R14
AVDD V17
V19 C546 C556
AVDD C621 C567 C572 C576 *270P 1U/16V
VDPLL T18
C508 R339 R345
5
6
U18 R0 .001U_0402 .01U 1U_0402_6.3V 56.2/F 56.2/F
D R0 .1U D
5
6
R322 4
CML1 *MCM3216-S 4
6.34K .1U/16V/0402 TPA0P 1 2 L1394_TPA0+ 3 REV.C
R1 TPA0N L1394_TPA0- 3
R1 U19 4 3
U15 TPBIAS0 2 REV.D
TPBIAS0 TPB0P L1394_TPB0+ 2
1 2
V15 TPA0P TPB0N 4 3 L1394_TPB0- 1
1
TPA0+ TPA0N 1
TPA0- W15
CML2 *MCM3216-S
V14 TPB0P R349 R353
TPB0+ CN19
W14 TPB0N 56.2/F 56.2/F
TPB0- R323 4.7K
PHY_TEST_MA 1394_CONN
R17
PHY_TEST_MA
TPB0_DF
Closed
Phy IC
R320 390K R357
M11 CPS 5.11K/F C601
CPS R321 390K 270P
P15 CNA
CNA
C511
XO R19 1394_XOUT
22P
2
40 mils
C Y7 C
24.576MHZ 5VSUS Iout=1A

U33
C510 USB0PWR
1
5 IN OUT 1
XI R18 1394_XIN
1
4 ON# SET 3
R12 22P C709
PC0 (TEST1) C692
PC1 (TEST2) U13 100U/10V
V13 C693 2 R473 470P
PC2 (TEST3) GND 6.8K
2
T17 .1U/16V/0402 AAT4610A
VSPLL
AGND N12
AGND P14
U14
AGND
AGND U16
U17 TPBIAS1 REV.C
USB 1
TPBIAS1 R509 0
V18 1394_TPA1+ CN23
TPA1+ 1394_TPA1+ 32 L54
W18 1394_TPA1- 8
TPA1- 1394_TPA1- 32 1 GND
1 2 USBP0-1 7
13 USBP0- USBP0+1 2 GND
TPB1+ V16 1394_TPB1+ 32 13 USBP0+ 4 3 3 GND 6
TPB1- W16 1394_TPB1- 32 4 GND 5
*WCM2012-90
PCI7411GHK COM-CHOKE-WCM2012-4P Suyin_020016MR004S100ZU
R510 0
R331 R335 10 mils
1
56.2/F 56.2/F Closed Phy IC REV.B
TPBIAS1
2
C695 C694
B TPB1_DF C515 C513 40 mils *Clamp-Diode *Clamp-Diode B
*270P 1U/16V
R325 R326 Iout=1A
R333 56.2/F 56.2/F 5VSUS
5.11K/F C533 U24
270P 5 1 USB1PWR
IN OUT
REV.B
1
1394_TPA1+ 4 3
ON# SET C484
1394_TPA1- C493 C487
.1U/16V/0402 R293 470P 150U/6.3V
2 GND 6.8K
2
AAT4610A
REV.C
R511 0
CN16
L43
1 GND 8
4 3 USBP1-1 7
13 USBP1- USBP1+1 2 GND
13 USBP1+ 1 2 3 GND 6
4 GND 5
*WCM2012-90
COM-CHOKE-WCM2012-4P Suyin_020016MR004S100ZU
R512 0
USB 2
1
REV.B
2
C490 C489
*Clamp-Diode *Clamp-Diode
A A
PROJECT : CT8
Custom 3A

5 4 3 2 1
1 2 3 4 5 6 7 8
For Layout:
3VSUS Place decoupling caps near the
MC16
0.1U
power pins of SmartAMC
device.
AMCVDD
GND
MC19 MC15
0.1U 0.1U
MC14 MC25 MC39 MC27
MC35
10U 0.1U 10U 0.1U
GND GND 0.1U
A A
AGND
GND MC17
0.1U
AGND FROM CD-ROM
MC26 MC30 MC24
GND 0.1U 10U 1U

CDAUDL C595 1U/16V CDINL2
CDINL2 34
18
10
23
33
44
5
For Layout:
Place these resistors close MR28 MIC_BIAS CDAUDR C614 1U/16V CDINR2
VDD_CLK
VDD5
VDDC18
VDDC10
AVDD33
AVDD44
MIC_BIAS 24 CDINR2 34
249K AGND
to SmartAMC device. RC0603
RC_OSC 1 MR26 CDGND C583 1U/16V CDGND1
15:20:15 to other signal 50 REV.B RCOSC1 CDGND1 34
GND *3K REV.B
1
MR27 0 RC0603 DIB_DATAN_A 3 MC21 10U

15:5:15 to other signal MC23 25 DIB_DATAN DIB_DATAN
MIC_IN 29 MIC1 24
50 150P MR24 0 RC0603 DIB_DATAP_A 4 R351 R374 R363
25 DIB_DATAP DIB_DATAP CDAUDR 10K 20K
2
CD_IN_R 32 20K
MR20 0 DIB_PWRP 7 31 CDGND
25 PWRCLKP PWRCLKP CD_IN_GND
30 CDAUDL
MR18 0 DIB_PWRN CD_IN_L
25 PWRCLKN 8 PWRCLKN
27 LINEINL_PR
LINE_IN_L T141
15 28 LINEINR_PR AGND AGND AGND
13,16,17 SDOUT1 SDATA_OUT LINE_IN_R T142
1
13,17 SYNC1 16 SYNC

MC20 17 39
13,17 -CODEC_RST AC_RESET# LINE_OUT_L AMPL 24
150P 40
LINE_OUT_R AMPR 24
MODEM_PRES
2
20 AC_ONLY HP_OUT_L 42 T4
HP_OUT_R 43 T2
MR14 33 RC0603 SDATA_IN0 21
13 SDINA SDATA_IN0
GND MR13 38 REF_FLT
MR9 33 RC0603 BIT_CLK0 REF_FLT VC_SCA
*0 13,17 BITCLK 22 BIT_CLK MU3 VC_SCA 37
VREF_SCA
MR17 *0 VREF_SCA 36
ID0 11 CX20468-31 For Layout:
ID0# MIC_BIAS
MBIAS/AVDD 34
GND MR16 *0 ID1 12 ID1# REV.B Place CX132, CX133, CX135,
MR10 MR11 46
GND *10K *10K MR12 330 EAPD_1 S_PDIF SPDIF 32 CX136 near SmartAMC
B 24,32,33 MUTE_LED 14 EAPD
B
RC0603 RC0603 47 GPIO_4 MR30 10K device
PC_BEEP GPIO_4 MC33 MC38 MC36 MC40
45 PC_BEEP
GPIO_5 48 97DOCK_OK 24
MR8 13 0.1U 0.1U 0.1U 1U
DSPKOUT
AVSS_CLK
Populate RX152 in order *0 R307 24 XTLO MR31 *10K
XTLO
GNDC19
AGND35
AGND41
*10K 25
GNDC2
GNDC9
to enable the audio codec XTLI
GND8
GND
only feature of the AGND
SmartAMC device EC_MUTELED AGND
19
26
35
41
MR15 33 XTLO_1
2
6
9
GND MC13
22P
1
REV.B MY2
GND AGND MC18 24.576MHZ

22P
2
GND
Ground Tie XTLI

BITCLK
MR7
0 For Layout:
REV.B C518
*22P
GND AGND
For EMI request
C C
+3V Place crystal and associated

circuitry very near
SmartAMC Device.
C506
PC SPEAKER D21 CX20468-21: ADD R20, MR8
REV.D
.1U_0603_25V 2 1 REMOVE MR12, R413, D24, MR30, MR31
REV:B SETTING
5
1 1SS355
20 PCMSPK PCBEEP1 PCBEEP2 PC_BEEP
4
2 R317 *1K C507 .47U
13 SPK
U25 REV.D
TC7SH86FU
CX20468-31: ADD MR12, R413, D24, MR30
3
R308
C503 R309
REMOVE R20, MR31, MR8
10K
*1000P 1K
CX20468-31 without software EQ:
REV.D ADD MR12, MR31, MR30
REMOVE R413, D24, MR8, R20
D D
PROJECT : CT8
C 20---AC97 CTRL_CONEXANT20468-31 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
AUDIO AMPLIFIER +5V L49

BK2125HS220_0805
+5VAMP
SPEAKER OUT
1
+5VAMP
C661 C658 L53
.1U_0603_25V .01U/50V 10U_1206_10V 4.7U/10V 22U_1206_16V BK1608HS241-T
1
AGND C656 R_SPK-
2
1
2
C640 C657 C648 +
L52 CN21
AGND +5VAMP BK1608HS241-T
R372 U29 R_SPK+ 4
2
15K .1U_0603_25V R_SPK+ 3
19 VDD ROUT+ 21 2
16 R_SPK- C397 C394
.047U AGND ROUT- C756 C757 1
7 PVDD1
A C608 18 4 L_SPK+ 180P 180P A
PVDD2 LOUT+ L_SPK- *.1U *.1U 53398-0410
LOUT- 9 EMI
RRIN-2 23 L51
R378 1K RIN-1 C635 .47U RRIN-1 RLINEIN C665 .1U/16V/0402 BK1608HS241-T
23 AMPR 20 RHPIN PC-BEEP 14 AGND
C652 1 2 .47U 8 REV.C L_SPK+ AGND
RIN+ DOCK_OK AGND
AGND SE/BTL 15
C662 1 2 .47U 10 17 L50
R381 1K LIN-1 C644 .47U RLIN-1 LIN+ HP/LINE BK1608HS241-T
23 AMPL 6 LHPIN
RLIN-2 5 22 R366 10K L_SPK-
LLINEIN SHUTDOWN AMCVDD
.047U
C620 C666 2 1 4.7U/6.3V/CC0603 11 1 C392 C390
BYPASS GND4 VOLMUTE# 30
AGND 24
R358 *1K GND3 180P 180P
2 GAIN0 GND2 13
1
+5VAMP R364 1K 3 12 Q41
GAIN1 GND1
3
R382 R365 10K 25 D18 DTC144EUA
15K R368 *10K GND5
GND6 26 RB500
GND7 27 2 MUTE_LED 23,32,33
28 AGND
AGND R408 GND8
2
GND9 29
AGND 15K 30 REV.D
GND10
1
GND11 31
GND12 32
GND13 33
R240 *0
R338 0 AGND
R413 0 TPA0312
PWP24
R395 0
R337 0
B
0312 Gain Table +5V B
AGND U28 AMCVDD
GAIN0 GAIN1 SE/BTL AV(inv) GMT_G910T21U 800mA (30MIL)
0 0 0 6 dB 3 Vin Vout 1
C751 1 2 *.1u
GND
0 1 0 10 dB
2
REV.C C752 1 2 *.1u C592
1 0 0 15.6 dB
2
C578 C584 C585 C577
1
C753 1 2 *.1u +
1 1 0 21.6 dB
2
.47U
1
X X 1 4.1 dB T10U/10V .01U/50V .1U_0603_25V 4.7U/10V
1
AGND
2
AGND AGND AGND AGND AGND
2ND HEADPHONE OUT

1 9
LSPK+ R202 *30-0805 LSPK+_2 2
6 7
RSPK+ R200 *30-0805 RSPK+_2 3 8
4
5 10
PAVILION
C404 C403
CN24
*180P *180P *PHONEJACK-BLACK
MICROPHONE
C FCM1608K221 1 9 C
AGND L30 2
23 MIC1
+5VAMP 32 MIC_PR 6 7
AMCVDD R205 1K 3 8
C408 220P_0603_50V 4
5 10
1
R204
CN26
R206 Q20 R207 2K AGND PHONEJACK-BLACK
32 JACK_DETECT# 2
220K DTA124EU 220K AGND
PAVILION PRESARIO
R480 3K
DOCK_OK 23 MIC_BIAS
R209 *4.7k AGND
3
23 97DOCK_OK 2 1
1
R151 PC99 SPEC.
D8 RB501H R208 4.7k C707
4.7U/6.3V/CC0603
2
2
C405 R398 AGND

1U/16V
1
AGND
HEADPHONE OUT
32 D_LSPK+
1 9
L_SPK+ C700 100U/6.3V LSPK+ R201 30-0805 LSPK+_1
PAVILION
+
D
2 D
6 7
R_SPK+ C699 100U/6.3V RSPK+ R203 30-0805 RSPK+_1
PRESARIO
+
3 8
4
32 D_RSPK+ 5 10
CN25
R193 R194 C406 C407 PHONEJACK-BLACK
1K 1K 180P 180P PROJECT : CT8

AGND AUDIO AMP_ TI-TPA0312 3A

1 2 3 4 5 6 7 8
5 4 3 2 1
Vdd
Revision History REV:B MODIFY FOR USE
NEW MODEM MODULE MC978 0.1uF
REV Description Date
00 February 14, 2002 MTP58 1
Initial Release 1 1 1
MTP59 MTP36 MTP37
DGND_LSD 1 MTP39
01 27mmx27mm form factor. July 5, 2002 1 MTP35 1 MTP38
RING_2 MFB902 RING_1 MTP41
24
1
AC
02 6 pins J1 connector-T/R traces for specific uses-100V C902/C904 September 24, 2002 MMZ1608D301B
DVdd
21 RAC1 MR902 1M RAC1/RING MC902 0.033uF/100V
RAC1 MBR904
D D
MRV902
03 add J1B - remove T903 October 9, 2002 8 MC906
NC1 TAC1 MR904 1M TAC1/TIP MC904 0.033uF/100V MMBD3004S *470pF MJ2
TAC1 20
22 NC2
04 Change J1 & J1B. Change R938 size. Add TP60 to TP71. November 12, 2002
1
A
25 NC3 RAC2 19 2
Removed J1B. Change size for C978, C984, R902, R904, R906, R908,
05 R910 and R978. Changed BR904 and BR906 to different manufacture. November 26, 2002
KU10S31N
29 18 AGND_LSD GND *FI-S2P-HF(JAE)
PADDLE TAC2
06 Corrected error in Q904 PCB footprint. January 3, 2003 MC908
*470pF
AGND_LSD
07 Added DIB data transformer footprint, added MC966, deleted ring September 24, 2003 MU902 MBR906
AC
impedance circuit. Added the letter "M" prefix to all reference MTP34 1 MMBD3004S
designators.
Changed value for MC966 from 3.3nF to 10nF, 100V, +/-20%, Y5V. By 12 TRDC MR906 6.8M TIP_2 MFB904 TIP_1 MTP42
08 November 06, 2003 TRDC MTP40 1 1
default, MC966 will be populated. Also, changed CX20493 revision from
11 to 21. MMZ1608D301B
MC918 1 2 MC966
1 MTP33 0.01U
0.1uF
C906 and C908 must be Y3 type
11 EIC MC958 15nF
EIC
AGND_LSD
Capacitors for Nordic Countries only
MTP28 1 MTP70
1
AGND_LSD
MTP29 1 RXI MR910 RXI-1

RXI 9 1
237K MTP71
MTP52 C926 must be placed
C MR932 near pin 26 (CLK). R910 must be placed C
1 15K near pin 9 (RXI).
CLK2 CLK 26 1
MTP26 MC926 10pF CLK GPIO1 RING_1
RING_1 27
5 RBias TIP_1
1 RBias TIP_1 27
BR908_CC MFB906 PWR+ 7 PWR+ MR954
MMZ1608D301B 1 MTP32
23 PWRCLKN 1 AGND_LSD
Vdd MTP69 59.0K
MTP30 1
AC1
MC970 2 AVdd 1 MTP68

MTP22 C1 A1 0.1uF MC930 MC928
PWRCLKN MT902 BR908_AC1 C2 A2
1 4
AC2
1 MC962 2.2uF 0.1uF VZ MR908 MC910 BRIDGE_CC

+ -
VZ 10
47pF 6 348K 0.047uF/100V
MBR908 AGnd R908 must be placed
23 PWRCLKP C970 must be C928, C930 must be
MJ1 PWRCLKP 2 3 PCLK BAV99DW near pin 10 (VZ).
1 MID82154 placed near pins 7 placed near pins 2 17 EIO MQ902
1 EIO MMBTA42
2 2 (PWR+) and 6 (AVdd) and 6
MTP23 MTP27 AGND_LSD
3 3 (AGnd). (AGnd).
4 MQ904
4 1 1 1 MTP67 MTP31 1 SB29003
5 5
6 6
MTP72 MTP60 EIF MTP66
7 7 EIF 16 1
MTP24
8 8 23 DIB_DATAP 1 1
*HEADER8 1 TXO MQ906 MR928
TXO 14
DIB_DATAP MC922 10pF DIB_P1 MR922 0 DIB_P2 27 MMBTA42 27
DIB_P
13 TXF
B TXF 1 MTP64 B
MJ3
1 DIB_DATAN MC924 10pF DIB_N1 MR924 0 DIB_N2 28
1 DIB_N 1 MTP49
2 2 DC_GND 15 1
MTP25 MTP73 MTP61 MTP65
3
VRef
3 MR938
4 23
Vc
4 1 1 1 DGnd 110
5 5
MT922 20493-21
6 6 GND 23 DIB_DATAN 1 4
4
7 7 AGND_LSD
8 C944, C974, and C976 DGND_LSD AGND_LSD
8
Vref_LSD
must be placed near
*HEADER8 (omit) 2 3 pins 3 (Vc) and 4
Vc_LSD
*MID82157(omit)
(VRef).
MTP62 MTP63
1 1 AGND_LSD
Depending of the design target and DIB length,
DIB components can be: REV:B MODIFY
-C922/C924 10pF
-C922/C924 47pF (Validation in progress) DEL L9 / L10 / RV1 / C458
MC974 MC944 MC940 MC976
*0.001uF (omit) 0.1uF 1uF .001uF
C922, C924, C906, and C908, must be Y3 type Capacitors in order

to comply with Nordic Countries deviations of IEC60950 2nd and 3rd ed. C940 is X5R ceramic.
Y3 type capacitors must also be certified for a 2.5KV impulse test. AGND_LSD
This must be checked in vendors' specifications (see AVL).
Circuit traces for C922 and C924 should be less

than 2 inches.
A A
PROJECT : CT8
Custom 22---MODEM (DAA) 1A

5 4 3 2 1
A B C D E
8100CL(10/100M) 8110SB(1G)
4 4
DVDD33 3.3VD 3.3VD
26,41,56,71,84,94,107 26,41,56,71,84,94,107
AVDDL 3.3VA 2.5VA
3,7,20 3,7,20,16
DVDD 2.5VD 1.8VD
32,54,78,99 32,54,78,99,24,45,64,110,116,126
AVDD25 2.5VA NC
12
AVDDH NC 3.3VA
10,120
REV.D REV.B
R156 10K
5V_AL
3.6K R341 LANVCC
Q17
SI3443DV
1 2 LANVCC U27
EECS 1 8
27 LAN_LINK# CS VCC
R142 10K 3 4 EESK 2 7
G S 3VPCU SK NC
EEDI/AUX 3 6 R370 *0 C613
27 LAN_SPEED_LED# DI NC
REV.D C385 2 5 EEDO 4 5 .1U/16V/0402
D D DO GND
3
REV.C 1 6 GND
.47U D D
REV.B For CTL8110 93C46-3GR
2
30 3VAUXON LANVCC
XTAL1 C364 27P R327 is 2.49K
Q18 AD[0..31]
EEDI/AUX
LANVCC
CTRL18
2
AVDDH
DTC144EU Y3
1
XTAL2
XTAL1
DVDD
EEDO
DVDD
DVDD
EESK
EECS
RSET
GND
GND
GND
GND
GND
GND
25.0000MHz R327
AD0
AD1
3 XTAL2 C363 27P 5.6K
3
2
AVDDL LANVCC
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
C736
C737
C738
C739
For U8
HG
EEDO
VSS
AVDDH
GND
GND
RSET
VSSPST
EESK
EEDI
EECS
LWAKE
VDD18
CTRL18
LG2
XTAL2
XTAL1
LED0
VDD18
LED1
LED2
LED3
VDD18
VDD33
AD0
AD1
8110SB LANVCC
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
REV.B TX0P 1 102 AD2

27 TX0P MDI0+ AD2
C682
C512
C367
C598
C641
C373
C375
C380
C653
TX0N 2 101 GND
27 TX0N MDI0- VSSPST
AVDDH AVDDL 3 100 GND
AVDDL GND
C557
C516
GND 4 99 DVDD
R328 TX1P VSS VDD18 AD3
27 TX1P 5 MDI1+ AD3 98
10U/10V
10U/10V
EMI *0 TX1N AD4

.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
6 97
*.1U/16V/0402
*.1U/16V/0402
27 TX1N MDI1- AD4

AVDDL 7 96 AD5
CTRL25 AVDDL AD5 AD6
8 CTRL25 AD6 95
GND 9 94 LANVCC
AVDDH VSS VDD33 AD7
12/11 FROM FAE 10 AVDDH AD7 93
R343 *0 11 92 C/BE0#
for 8110SB HSDAC+ CBE0B C/BE0# 12,17,20
3
RTL8110S(B)/8100C
V_12P 12 91 GND
Q30 GND HSDAC- VSSPST AD8
13 VSS AD8 90
CTRL25 1 L45 14 89 AD9
*2SB1188 PBY201209T-4A MDI2+ AD9 M66EN R109 *15K
15 MDI2- M66EN 88
AVDDL AD10
REV.C GND
16
17
AVDDL AD10 87
86 AD11
VSS AD11 AD12
30 mils
2
18 MDI3+ AD12 85
C729
C549
C573
C586
C536
19 84 LANVCC
AVDDL AVDDL MDI3- VDD33 AD13
AVDDL 20 AVDDL AD13 83
+3V R373 1K GND 21 82 AD14
GND VSSPST AD14 GND
22 GND VSSPST 81
ISOLATEB
10U/10V
REV.B 15K R502 GND

.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
23 ISOLATEB GND 80
DVDD 24 79 AD15
INTC# VDD18 AD15 DVDD
12 INTC# 25 INTAB VDD18 78
LANVCC 26 77 C/BE1#
VDD33 CBE1B C/BE1# 12,17,20
PCIRST# 27 76 PAR
12,17,20,30 PCIRST# RSTB PAR PAR 12,17,20
PCLK_LAN 28 75 SERR#
12,16 PCLK_LAN CLK SERRB SERR# 12,17,20
GNT2# 29 74
2 LANVCC LANVCC REV.B
12
12
GNT2#
REQ2#
REQ2# 30
31
GNTB
REQB
SMBDATA
GND 73
72
T152
2
13,17,20 PCI_PME# PMEB SMBCLK T156
Q34 DVDD 32 71 LANVCC
VDD18 VDD33
3
2SB1197K AD31 33 70 PERR#

AD31 PERRB PERR# 12,17,20
Q29 AD30 34 69 STOP#
12,16,17,20 AD[0..31] AD30 STOPB STOP# 12,17,20
CTRL18 1 2 CTRL25 GND 35 68 DEVSEL#
GND DEVSELB DEVSEL# 12,17,20
*2SB1188 30 mils AD29 36 67 TRDY#
AD29 TRDYB TRDY# 12,17,20
AD28 37 66 GND
AD28 VSSPST
C650
C517
C600
C615
C534
C539
GND 38 65 +3V
VSSPST
FRAMEB
CLKRUNB
VSSPST
DVDD
2
CBE3B
CBE2B
VDD33
VDD18
VDD18
VDD33
VDD18
IRDYB
IDSEL
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
GND
GND
GND
2
C538
C619
C654
C639
C596
Q40 2N7002E
22U/10V/0805
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
3 1
*.1U/16V/0402
*.1U/16V/0402
*.1U/16V/0402
*.1U/16V/0402
*.1U/16V/0402
CLKRUN# 12,17,20
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
REV.B
LANVCC
LANVCC
FRAME#
DVDD
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
C/BE3#
C/BE2#
GND
GND
GND
GND
AD_16
PCLK_LAN
IRDY#
DVDD
DVDD
12/5 FROM FAE REV.B
AVDDH
R367
12,17,20 C/BE3# IRDY# 12,17,20
*22 R405 100
12,17,20 AD16 FRAME# 12,17,20
20 mils R347 R354
C/BE2# 12,17,20
PCLK_LAN-1
*0 0
C611
*22P AD[0..31]
V_12P
C568
For
*.1U/16V/0402
8100CL
1 1
PROJECT : CT8
C RTL8100CL 3A
A B C D E
5 4 3 2 1
Close to Chip
8100CL: 0.1U
C532 C537 8110SBL:
.1U/0402 .1U/0402
0.01U
D D
R329 R332 R334 R340

49.9/F 49.9/F 49.9/F 49.9/F
TX1N
U4 TX1P
CT1 6 11 LANCT1 R244 75/F TX0N

TX0P CT CT X-TX0P
26 TX0P 7 TD+ TX+ 10 X-TX0P 32
TX0N 8 9 X-TX0N TX0P
26 TX0N TD- TX- X-TX0N 32
TX1P 1 16 X-TX1P
26 TX1P TX1N RD+ RX+ X-TX1N X-TX1P 32
26 TX1N 2 RD- RX- 15 X-TX1N 32
CT2 3 14 LANCT2 R247 75/F
CT CT
LAN_1
C458
ATPL-119
.1U/0402 C281
CC0402 10/100M 1500P/2KV
CC1808
C C
CN14
R63 330 A1 1
LANVCC LED1_YELP_Y
26 LAN_SPEED_LED# A2 2 LED1_YELN_Y
REV.B C734 REV.C

1000P 3 RX2-
REV.C Del 1G circuit.
4 RX2+
X-TX1N 5 RX1-
6 TX2-
7 TX2+
X-TX1P 8 RX1+
X-TX0N 9 TX1-
B X-TX0P 10 B
TX1+
R67 330 B1 11 15
LANVCC LED2_GRNP_G GND
26 LAN_LINK# B2 12 LED2_GRNN_G GND 16
REV.B C735 13
25 RING_1 RING
1000P
25 TIP_1 14 TIP
LAN_CONN
C303 C318 10 BASE :OFF
470P/CC1808 470P/CC1808 100 BASE : YELLOW
1000 BASE : GREEN
LED1 APECIFICATION
A1(+) YELLOW
A2(-)
A A
LED2 APECIFICATION
B1(+) GREEN
B2(-)
PROJECT : CT8
Custom 3A

5 4 3 2 1
5 4 3 2 1
5VPCU
5VPCU LED HSMD-C170 ORANGE
R2
POWER
LED1 150 *LED HSMB-C112 BLUE
PWR_LED_1 1 2 1 2
PAVILION
LED13 150
3
*LED HSMB-C172 BLUE PWR_LED_1
Q3 LED17-21VGC-TR8
1 2 1 2 PAVILION
2 R484
30,33 PWR_LED DTC144EUA
D LED HSMB-C172 BLUE D
1
*HSMB-C112 BLUE LED9
R485
LED11 150
1 2 PRESARIO
Q37
1 2 1 2 PAVILION HSMD-C110 ORANGE
3
30 MBATLED0 2
HSMD-C110 ORANGE
LED7
LED6
LED HSMD-C110 ORANGE
DTC144EUA
1 2 PRESARIO
1
1 2
HSMD-C110 ORANGE
PRESARIO
R350 LED HSMD-C112 BLUE

LED5 150
Touchpad control Q31
1 2 1 2 5VSUS PAVILION
3
*LED HSMB-C172 BLUE REV.B
20,21 CARD_LED 2 DTC144EUA
C 2 1 C
30,33 MX7 4 3 MY3 30,33

5 *LED HSMB-C172 BLUE
SW3 R93
1
LED3 150
Q15
1 2 1 2 PAVILION
3
30 TP_LED 2
DTC144EUA
TP_R#
2 1
LED4 REV.B: LED7 AND LED8 SWAP
1
33 TP_R# 4 3
SW5
5 PAVILION 1 2 PRESARIO
LED HSMD-C170 ORANGE
HSMD-C110 ORANGE
LED8
2 1 1 2
4 3
+3V
PRESARIO
SW7
5 PRESARIO
2
B B
R486
LED12 150
34 IDELED# 1
Q38
3 1 2 1 2 PAVILION
DTC144EUA
*LED HSMB-C112 BLUE
R55
LED2 150
2 1
TP_L# 4 3 1 2 1 2
33 TP_L#
5 PAVILION
3
SW4
Q11 LED HSMD-C170 ORANGE
30 CAPSLED 2 DTC144EUA
1
2 1
4 3
SW6
5 PRESARIO
A R483 A
LED10 150
18,33 RF_LED# 1 2 1 2 +5V PRESARIO
REV.B
LED HSMB-C112 BLUE
PROJECT : CT8
Custom 2A

5 4 3 2 1
5 4 3 2 1
8Mbit (1M Byte), TSSOP40

D D[0..7] 30 D
U12
ENV0 21 25 D0
30 ENV0 A0 D0
ENV1 20 26 D1
30 ENV1 A1 D1
BADDR0 19 27 D2
30 BADDR0 A2 D2
BADDR1 18 28 D3
30 BADDR1 A3 D3
TRIS 17 32 D4
30 TRIS A4 D4
SHBM 16 33 D5
30 SHBM A5 D5
A6 15 34 D6
30 A6 A6 D6
A7 14 35 D7
30 A7 A7 D7
A8 8
30 A8 A8
A9 7 10 R394 *100K
30 A9 A9 RESET#/NC 3VPCU
A10 36 12
30 A10 A10 RY/BY#/NC
A11 6 29
30 A11 A11 NC1
A12 5 38 C638
30 A12 A12 NC2
A13 4 11 *.1U/16V/0402
30 A13 A13 NC3
A14 3
30 A14 A14
A15 2 31
30 A15 A15 VCC
A16 1 30
30 A16 A16 VCC 3VPCU
A17 40
30 A17 A17
A18 13 C646
30 A18 A18
A19 37 .1U/16V/0402
30 A19 A19
GND 23
CS# 22 39
30 CS# CE# GND
RD# 24
C 30 RD# OE# C
WR# 9
30 WR# WE#
*ST Micro M29W008AB/AMD-29LV081B/SST39VF080

1.AMD-29LV081B require MAX 500nS Tready for it's hardware
AMD :Pin 10 is RESET# ; Pin12 is RY/BY# reset.And MAX6326_UR29 has >100mS reset timing.So we can tie
SST :Pin10,12 are NC it's reset# pin to +3VALW directly.
2.SIO has internal 20 mS delay of VCC1_PWROK
4Mbit (512k Byte), TSSOP32

U11
ENV0 20 21 D0
ENV1 A0 D0 D1
19 A1 D1 22
BADDR0 18 23 D2
BADDR1 A2 D2 D3
B 17 A3 D3 25 B
TRIS 16 26 D4
SHBM A4 D4 D5
15 A5 D5 27
A6 14 28 D6
A7 A6 D6 D7
13 A7 D7 29
A8 3
A9 A8
2 A9
A10 31 9 A18
A11 A10 A18
1 A11
A12 12
A13 A12
4 A13 REV.B
A14 5
A15 A14
11 A15
A16 10
A17 A16
6 A17 VCC 8 3VPCU
CS# 30
RD# CE#
32 OE#
WR# 7 24
WE# GND
39VF040
A A
PROJECT : CT8
B 2A

5 4 3 2 1
5 4 3 2 1
3VPCU 3VPCU
3VPCU
3VPCU VCCRTC ENV1 10K R119

+3V
C386 C378 C398 C379 I/O Address
KBC-NS87541L C401
C393 C400
.1U/16V/0402
C377 R139 *0
VCCRTC 12
.1U/16V/0402
BADDR0 *10K R120
BADDR1-0
0 0
Index
2E
Data
2F
.1U/16V/0402 10U/10V/0805 RESERCE FOR 97551 .1U/16V/0402 .1U/16V/0402 .1U/16V/0402 0 1 4E 4F
.1U/16V/0402
R141 0 Should have a 0.1uF capacitor close to every 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
GND-VCC pair + one larger cap on the BADDR1 *10K R121 1 1 Reserved
supply.
LDRQ#(pin 8) internal is no use MUSIC# 10K R467
123
136
157
166
161
16
34
45
95
LDRQ#0 R465 *0 DRQ0#
U30 SHBM 10K R122
VDD
AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VBAT
12 LDRQ#0
SHBM=1: Enable shared memory with host BIOS
D D
SERIRQ 7 81 TEMP_MBAT
12,17,20 SERIRQ SERIRQ AD0 TEMP_MBAT 36
DRQ0# 8 82 MBATV
LDRQ AD1 MBATV 36
LFRAME# 9 83
12 LFRAME# LFRAME AD2 AD_AIR 36
LAD0 15 84
12 LAD0 LAD0 AD3 SYS_I 36
LAD1 14 87
12 LAD1 LAD1 IOPE0AD4
LAD2 13 AD Input 88 SWID2
12 LAD2 LAD2 IOPE1/AD5 T327
LAD3 10 89
12 LAD3 LAD3 IOPE2/AD6 T324
PCLK_591 18 90
12,16 PCLK_591 LCLK IOPE3/AD7 T325
591RESET# 19 93
KBSMI#591 LREST DP/AD8
13 KBSMI# 2 1 22 SMI Host interface DN/AD9 94
D6 1SS355 23
SWI#2 PWUREQ 5VPCU
T161 DA0 99 CC-SET 36
DA1 100 T326
SCI# 31 DA output 101
13 SCI# IOPD3/ECSCI DA2 VADJ 18
DA3 102
U14
13 GATEA20 5 GA20/IOPB5 IOPA0/PWM0 32 PR_INSERT# 32 8 VCC A0 1
RCIN# 6 33 7 2
13 RCIN# KBRST/IOPB6 IOPA1/PWM1 CELL-SET NC A1
PWM or 36 MBCLK 6 3
IOPA2/PWM2 VFAN_1 31 SCL A3
1
PORT-A 37 MBDATA 5 4 C384
IOPA3/PWM3 3VAUXON 26 SDA GND
MX0 71 38 *.1U
33 MX0 KBSIN0 IOPA4/PWM4 CIR_OUT 32
MX1 72 39
33 MX1 KBSIN1 IOPA5/PWM5 PCICGRST# R470 DOCK5VON 32
MX2 *0 REV.B *24LC08
2
33 MX2 73 KBSIN2 IOPA6/PWM6 40 RPCICGRST# 19,20
MX3 74 43 PWROKSB
33 MX3 KBSIN3 IOPA7/PWM7 3VPCU PWROKSB
MX4 77 R409 10K R471 0
33 MX4 KBSIN4 T334 PWROK_SB 13
MX5 78 153 CLOSE TO U28
33 MX5 KBSIN5 IOPB0/URXD T335
MX6 79 154 REV.B
33 MX6 KBSIN6 IOPB1/UTXD MBATLED0 28
MX7 80 162
28,33 MX7 KBSIN7 IOPB2/USCLK PWR_LED 28,33
PORT-B 163 MBCLK
IOPB3/SCL1 MBCLK 3,36
MY0 49 164 MBDATA
33 MY0 KBSOUT0 IOPB4/SDA1 MBDATA 3,36
MY1 50 165 07/19
33 MY1 KBSOUT1 IOPB7/RING/PFAIL PCIRST# 12,17,20,26
MY2 51 Key matrix scan
33 MY2 KBSOUT2
MY3
28,33 MY3
MY4
52
53
KBSOUT3 IOPC0 168
169 IRCLK T342 LPC Debug Port
33 MY4 KBSOUT4 IOPC1/SCL2 IRDATA
MY5 56 170
33 MY5 KBSOUT5 IOPC2/SDA2
MY6 57 171 REV.B CN6
33 MY6 KBSOUT6 IOPC3/TA1 RSMRST_# 13
C MY7 58 PORT-C 172 FANSIG SERIRQ C
33 MY7 KBSOUT7 IOPC4/TB1/EXWINT22 FANSIG 31 1
MY8 59 175 LFRAME#
33 MY8 KBSOUT8 IOPC5/TA2 T343 2
MY9 60 176 LAD0
33 MY9 KBSOUT9 IOPC6/TB2/EXWINT23 CIR_IN 31,32 3
MY10 61 1 LAD1
33 MY10 KBSOUT10 IOPC7/CLKOUT THERM_CPUDIE# 3,13 4
MY11 LAD2
33 MY11
MY12
64
65
KBSOUT11
26 MUSIC#
PRESARIO LAD3 5
33 MY12 KBSOUT12 IOPD0/RI1/EXWINT20 MUSIC# 33 6
MY13 66 PORT-D-1 29 PCLK_5
33 MY13 KBSOUT13 IOPD1/RI2/EXWINT21 NBSWON# 33 12,16 PCLK_5 7
MY14 67 30 DVD# LDRQ#0
33 MY14 KBSOUT14 IOPD2/EXWINT24 DVD# 33 8
MY15 68 PCIRST#
33 MY15 KBSOUT15 9
2 NBSWON# 2 1
R113 10K TINT- IOPE4/SWIN ACIN 10
3VPCU
T319
105
106
TINT
PORT-E
IOPE5/EXWINT40 44
24 SUSB#
ACIN 36 4 3
5
PAVILION +3V 11
TCK IOPE6/LPCPD/EXWIN45 SUSB# 13 12
T323 107 25 SW2
TDO IOPE7/CLKRUN/EXWINT46 LID_EC# 18 +5V 13
T321 108 JTAG debug port
T322 TDI 14 16
109 TMS IOPH0/A0/ENV0 124 ENV0 29 15 17
125 ENV1
IOPH1/A1/ENV1 ENV1 29
PSCLK1 110 126 BADDR0 *EIC-3801-15
PSCLK1/IOPF0 IOPH2/A2/BADDR0 BADDR0 29
PSDAT1 111 127 BADDR1
PSDAT1/IOPF1 IOPH3/A3/BADDR1 BADDR1 29
KB_CLK 114 128
PSCLK2/IOPF2 IOPH4/A4/TRIS TRIS 29
KB_DAT 115 PORT-H 131 SHBM
PSDAT2/IOPF3 IOPH5/A5/SHBM SHBM 29
TPCLK 116 132
33 TPCLK PSCLK3/IOPF4 IOPH6/A6 A6 29
TPDATA 117 PS2 interface 133
33 TPDATA PSDAT3/IOPF5 IOPH7/A7 A7 29
28 CAPSLED 118 PSCLK4/IOPF6
NUMLED 119 138
33 NUMLED PSDAT4/IOPF7 IOPI0/D0 D0 29
IOPI1/D1 139 D1 29 Pin 24 if no pull-high,
IOPI2/D2 140 D2 29
141 D3 29
will can't reboot.
591_32KX1 IOPI3/D3
158 32KX1/32KCLKOUT PORT-I IOPI4/D4 144 D4 29 5VPCU
IOPI5/D5 145 D5 29
R170 20M 591_32KX2 160 146
32KX2 IOPI6/D6 D6 29
IOPI7/D7 147 D7 29
150 RD# 3VPCU R459 R462
IOPJ0/RD RD# 29
Y5 PORT-J-1 151 WR# 4.7K 4.7K
IOPJ1/WR0 WR# 29
591_32KX3 R177 120K RP2
152 SELIO# 10 1 MY3
SELIO T332
32.768KHZ MY4 9 2 MY2
MY16 62 41 MY5 8 3 MY1 IRCLK
B 33 MY16 IOPJ2/BST0 IOPD4 TP_LED 28 B
REV.B C389 C399 63 42 FPBACK MY6 7 4 MY0
37,38,39,40 HWPG IOPJ3/BST1 IOPD5 FPBACK 18
REV.C 5P 5P 69 PORT-D-2 54 D/C# MY7 6 5
13 SUSC# IOPJ4/BST2 IOPD6 D/C# 36 IRDATA
VOLME_UP# 70 PORTJ-2 55
32 VOLME_UP# IOPJ5/PFS IOPD7 BL/C# 36
VOLME_DN# 75 10KX8
32 VOLME_DN# IOPJ6/PLI
76 143 A8
24 VOLMUTE# IOPJ7/BRKL_RSTO IOPK0/A8 A8 29
142 A9 RP1
IOPK1/A9 A9 29
148 135 A10 10 1 MY15
35,38 S5_ON IOPM0/D8 IOPK2/A10 A10 29
149 134 A11 MY8 9 2 MY14 C688 C689
35,38,41 SUSON IOPM1/D9 IOPK3/A11 A11 29
155 PORT-K 130 A12 MY9 8 3 MY13 *27PF *27PF
35,39 MAINON IOPM2/D10 IOPK4/A12 A12 29
156 129 A13 MY10 7 4 MY12
13 SWI# IOPM3/D11 IOPK5/A13/BE0 A13 29
3 PORT-M 121 A14 MY11 6 5
40 VRON IOPM4/D12 IOPK6/A14/BE1 A14 29
D5 2 1 DNBSWON#591 4 120 A15
13 DNBSWON# IOPM5/D13 IOPK7/A15/CBRD A15 29
BATLOW# 1SS355 D20 2 1 27 10KX8
13 BATLOW# IOPM6/D14
1SS355 28 113 A16
7,18 PWROK IOPM7/D15 IOPL0/A16 A16 29
112 A17
IOPL1/A17 A17 29
CS# 173 PORT-L 104 A18 R414 10K
29 CS# SEL0 IOPL2/A18 A18 29
T336 174 103 A19 MY16
SEL1 IOPL3/A19 A19 29
T162 47 48
CLK IOPL4/WR1 T160
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
REV.B 1. Remove R468.

122
159
167
137
PC87541L
17
35
46
96
11
12
20
21
85
86
91
92
97
98
2. Add a Diode D20 on BATLOW#.

CP5 220PX4 CP4 220PX4
3. R470 no stuff. MY4 2 1 MY8 2 1
C691 MY5 4 3 MY9 4 3
MY6 6 5 MY10 6 5
1U MY7 MY11
8 7 8 7
CP6 220PX4 CP1 220PX4

MY0 2 1 MX4 2 1
MY1 4 3 MX5 4 3
5VPCU MY2 6 5 MX6 6 5
Pin 103 internal is MY3 8 7 MX7 8 7
A A
R157 4.7K MBCLK 3VPCU R466 470K 591RESET# "A19",Can't use to CP2 220PX4 CP3 220PX4
R169 4.7K MBDATA MX0 2 1 MY12 2 1
C690
GPIO MX1 MY13
4 3 4 3
R117 4.7K TPCLK .1U/16V/0402 MX2 6 5 MY14 6 5
33 5VTP 3VPCU
R118 4.7K TPDATA MX3 8 7 MY15 8 7
RN37
RN39
1 2 PSCLK1 1 2 NBSWON# C671 220P
3 4 PSDAT1 3 4 DVD# MY16
5 6 KB_CLK 5 6 VOLME_UP#
7 8 KB_DAT 7 8 VOLME_DN# PROJECT : CT8
8P4R-10K 8P4R-10K Quanta Computer Inc.
C 3A

5 4 3 2 1
5 4 3 2 1
C3 .1U_0603_25V
+5V_CRT2
F1 CRT PORT
FUSE1A6V_POLY 20 mils
2 1 +5V_CRT2
20 MIL
+5V
75-R as possible as CN7
16
closed to SB CRT_CONN
6 rev.e
CRT_R L2 BK1608LL680 CRT_R1 1 11
7 CRT_R CRT_SENSE# 13
D
7 D
CRT_G L1 BK1608LL680 CRT_G1 2 12
7 CRT_G
8
CRT_B L32 BK1608LL680 CRT_B1 3 13
7 CRT_B
T1 9
REV.B 4 14
+3V
R18 R13 R7 REV.C 10
+5V C6 C418 C419 5 15 D12
10P 10P 10P DA204U
75 75 75
AHCT1G125DCH 1
EMI
17
CRT_R1
3
1
5VPCU C8 .1U_0603_25V
U1 2
VSYNC1 D11
R482
PRESARIO 7 VSYNC 2 4
R217 0 DA204U
*47
R218 39 CRTVSYNC 1
5VPCU R219 39 CRTHSYNC CRT_G1
3
R220 0 2
IR1
1
C710 + R481
3
*IRM-368 100K U2 D10

*4.7UF/6.3V DA204U
VCC
2 4 HSYNC1
7 HSYNC 1
C4 C5 C7 C11
1 CRT_B1
DAT CIR_IN 30,32 22P 33P 33P 22P 3
Q26 2N7002E
AHCT1G125DCH DDCCLK 1 3
GND
7 DDCCLK 2
R6 4.7K
2
2
+3V
R11 4.7K
2
C C
DDCDAT 1 3
7 DDCDAT
Q27 2N7002E
R5 R10
6.8K 6.8K
REV.B
+5V
H-C295D165P2
HOLE13
H-TS315BC295D110P2
HOLE7
H-C295D110P2
HOLE23
H-TS315BC295D110P2
HOLE2
H-C295D110P2
HOLE12
H-TS315BC295D110P2
HOLE1
H-C295D110P2
HOLE22
H-TC157D59P2
HOLE24
H-TS315BC295D110P2
HOLE6
H-TC236BC295D110P2
HOLE5
1
3
REV.D
+5V +5V REV.D
2 +5V
Q42 Q13
*DTC144EUA U35 R521 3 4
3K G S
5
H-C276D165P2
HOLE10
H-C236D110P2
HOLE18
H-C236D110P2
HOLE21
H-C236D110P2
HOLE11
H-C295D110P2
HOLE8
1
2 D D 5
1 + 1 D D 6
4
R522 100k
1
30 VFAN_1 3 -
SI3457DV
LMV331
C748 30 mils
2
1UF CN15
R523 5.1K FAN_PWR1 1 +3V
1
2 2
1
3 3
PAD1 PAD2 HOLE3 R524 + C321
B B
H-TS315BC295D110P2
HOLE4
H-C236D110P2
HOLE9
H-TC236BC295D110I160P2
HOLE20
H-C236D110I160P2
HOLE19
EMIPAD433X157 EMIPAD354X157 H-RE315X354D110P2 REV.C 10K R61

T10U/10V FAN 10K
1
2
1
FANSIG 30
C221
FAN CONTROL 100P
A A
PROJECT : CT8
C 3A

5 4 3 2 1
A B C D E
+3V
REV.B C731 C732 C733

VA L9 150 mils .1U .1U .1U
BK2125-33T
VA_P L19 FBMJ2125HM330-T
REV.C 5VPCU +5VAMP
+5VAMP_PR
REV.B CC0402 CC0402 CC0402
4 4
1
R513 *0 C53 C86 C155
.1U/16V/0402 .1U/16V/0402 R39 .1U
2 3 USBP4-1 *100K *SI3443 CC0402
13 USBP4- USBP4+1
1 4 JACK_DETECT#
13 USBP4+ SPDIF Q7
L56
2
3 4 5VSUS
CMM211T-900M-S CN11 2 5
1
R514 *0 C437 C708 1 6
*270P 270P C427
3
56 55 *.022U
56 55
2
PR_PRESENT# 2 1 REV.C 2
2 1 30 DOCK5VON
4 3 Q9 5VDOCK
4 3 *DTC144EUA L37 FBMJ2125HM330-T
REV.C 6 6 5 5 X-TX1P 27
27 X-TX0P 8 8 7 7 X-TX1N 27
JACK_DETECT#
1
27 X-TX0N 10 10 9 9 JACK_DETECT# 24
12 11 SPDIF
AGND 12 11 SPDIF 23
14 13 C425
24 MIC_PR 14 13 +5VAMP_PR
16 15 .1U
AGND 16 15 MUTE_LED 23,24,33
18 17 CC0402
24 D_RSPK+ 18 17 1394_TPA1+ 22
24 D_LSPK+ 20 20 19 19 1394_TPA1- 22
22 21 C164
30 VOLME_UP# USBP4-1 22 21 1394_TPB1+ 22
24 23 .1U
USBP4+1 24 23 1394_TPB1- 22
26 25 CC0402
26 GND
28 28 D0+ 27
CIR_OUT 30 29 +5V
30 CIR_OUT 30 D0-
3 32 32 DDCCLK 31 3
U19
34 34 D1+ 33
36 35 5 6 PR_INSERT#
R25 0 TVGND 36 D1- VCC SEL
38 38 DDCDAT 37
S-CVBS1-PR 40 39 S-CVBS 1 4 S-CVBS1
40 D2+ 33 S-CVBS IN_B1 COM S-CVBS1 7
S-YD1-PR 42 41
S-CD1-PR 42 D2- S-CVBS1-PR L38 1.8UH +5V
44 44 HPD 43 3 IN_B0
VOLME_DN# 46 45 2
30 VOLME_DN# 46 CLK+ GND
CIR_IN 48 47 C429 *33P R230
30,31 CIR_IN 48 CLK-
5VDOCK 50 49 C430 C428 NC7SB3157 75 75-R as possible as
.1U C106 50 49 5VDOCK 5VDOCK 270P 100P C435
52 51
CC0402 54
52 51
53 DOCK_PRESENT .1U closed to SB
18,35,36,37,38,39,40 VIN 54 53 U20
L36 FCM2012K800 CC0402
VA_P 58 57 5 6
58 57 C92 VCC SEL
60
59
C423 C424 .1U S-YD 1 4 S-YD1

33 S-YD IN_B1 COM S-YD1 7
CC0402
60
59
.1U/50V .1U/50V VA_P S-YD1-PR L12 1.8UH 3 +5V

IN_B0
GND 2
C108 *33P R232
CLOSE TO CONNECTOR C112 C109 NC7SB3157 75 75-R as possible as
270P 100P C439
.1U closed to SB
U21 CC0402
3VPCU 5 6
CIR_OUT VCC SEL
S-CD 1 4 S-CD1
33 S-CD IN_B1 COM S-CD1 7
1
2 2
C196 S-CD1-PR L13 1.8UH 3 +5V
120P IN_B0
GND 2
R469 C136 *33P R231
100K C123 C140 NC7SB3157 75 75-R as possible as
VOLME_DN# 270P 100P C441
2
CIR_IN PR_INSERT# .1U closed to SB

PR_INSERT# 30
CC0402
3
C433 C432 SEL FUNCTION(COM)

120P 120P DOCK_PRESENT 1 2 2 Q10
R51 0 LOW IN_B0
3904
HIGH IN_B1
1
PR_PRESENT#
S-CVBS R525 *0 S-CVBS1
S-YD R526 *0 S-YD1
S-CD R527 *0 S-CD1
REV.C
1 1
PROJECT : CT8
Custom 3A

A B C D E
1 2 3 4 5 6 7 8
KEYBOARD CONNECTOR AV BOARD

TOUCH PAD CONNECTOR CN3
1 MX1 30
2 MX7 28,30
A A
3 MX6 30
12 mils BK1608HS800-T
4 MY9 30
L20
5 MX4 30
C297 .1U/16V/0402
5VSUS 6 MX5 30
7 MY0 30 24 1
CN2
8 MX2 30 REV.B
30 5VTP 12 9 MX3 30
11
12 1 10 MY5 30 DEL CN20, C681, C677,CC673
L23 SBK160808T-221 TPDATA-1
30 TPDATA 10 11 MY1 30
9 12 MX0 30
L22 SBK160808T-221 TPCLK-1
30 TPCLK 8 13 MY2 30
7 14 MY4 30 UP CONTACT
6 15 MY7 30
5 16 MY8 30
28 TP_L# 4
UP CONTACT 17 MY6 30
3 18 MY3 28,30
C329 C328
2 19 MY12 30
*10P *10P
28 TP_R# 1 20 MY13 30
21 MY14 30
22 MY11 30
TOUCH PAD
23 MY10 30
24 MY15 30
CHECK PIN DEFINE
KEYBOARD
B B
CN8
L34 MLB-160808-0220A
30 NUMLED 1
L35 MLB-160808-0220A
POWER BOARD 30
30
NBSWON#
MUSIC# 8 7
2
3
LFBR32164M241
6 5 RP5
30 DVD# 4
23,24,32 MUTE_LED 4 3 5
20 1
MX0 2 1
MX1 6 LFBR32164M241
2 1 7
MX2 4 3 RP4
MX3 8
6 5 9
MX4 8 7
MX5 10
2 1 11
MX6 4 3 LFBR32164M241 DOWN CONTACT
MX7 12 RP3
6 5 13
30 MY16 8 7 14
28,30 PWR_LED 15
18,28 RF_LED# 16 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
C L33 MLB-160808-0220A C
17
18
3
Q5 Q6 BACK PLAY/PAUSE FORWARE STOP VOL UP MUTE VOL DN WIRELESS

5VPCU 19
+5V 20
2 BLUELED 2
17 RF_LINK
POWER BOARD
DTC144EUA DTC144EUA C421 C422
.1U/16V/0402 .1U/16V/0402
1
3VSUS CN10 1 19
1 2 5VSUS
3 4 BT_OFF#
5 6 BT_OFF# 13 TOP VIEW
C420 BLUELED C426
13 USBP2+ 7 8
.1U/16V/0402 .1U/16V/0402
13 USBP2- 9 10 BC0EX1 17
D
DAUGHTER BOARD 13 USBP5+
11
13
12
14
BC0EX2 17
2 20 D
13 USBP5- 15 16 S-YD 32
BT_OFF#
17 18 S-CD 32
+3V 19 20 S-CVBS 32 PROJECT : CT8
C82
DAUGHTER BOARD .1U/16V/0402 Quanta Computer Inc.
Custom MDC 2A

1 2 3 4 5 6 7 8
5 4 3 2 1
60 mils CDVCC L41

PBY201209T-4A
+5V
C351 C350 C353 C352 C486

.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402 10U/10V/V
D CD-ROM D
R105 6.8K CDAUD_L CDAUD_L CDAUD_R +5V

23 CDINL2 1 2
CD_GND
NB_RST# 3 4 SDD8
R101 6.8K CDAUD_R SDD7 5 6 SDD9 SDIOR# R91 *4.7K
23 CDINR2 7 8
SDD6 SDD10
SDD5 9 10 SDD11
R104 3.4K/F CD_GND SDD4 11 12 SDD12 SDIOW# R94 *4.7K
23 CDGND1 13 14
SDD3 SDD13
SDD2 15 16 SDD14
SDD1 17 18 SDD15 SIORDY R299 4.7K
NB_RST# SDD0 19 20 SDDREQ
7,12 NB_RST# 21 22 SDIOR#
SDIOW# 23 24
SIORDY 25 26 SDDACK# SDDREQ R92 5.6K
IRQ15 27 28 IOCS16#
29 30 T130
SDA[0..2] SDA1 DIAG#
14 SDA[0..2] 31 32 T129
SDA0 SDA2 IRQ15 R294 8.2K
SDD[0..15] SDCS1# 33 34 SDCS3#
14 SDD[0..15] 35 36
37 38 CDVCC
SDD7 R98 10K
CDVCC 39 40
SDIOW#
14 SDIOW# 41 42
SDDREQ
14 SDDREQ 43 44
C SIORDY CD.46 C
14 SIORDY 45 46 T127
SDIOR# R85 470 CSEL
14 SDIOR# 47 48
IRQ15 CD.50
51
52
14 IRQ15 T126 49 50 T125
SDDACK#
14 SDDACK#
SDCS1#
14 SDCS1#
51
52
SDCS3# CN17 CD-ROM
14 SDCS3#
PDA[0..2]
14 PDA[0..2]
PDD[0..15]
14 PDD[0..15]
PDIOW#
14 PDIOW#
PDDREQ
14 PDDREQ
PIORDY
14 PIORDY PDIOR#
14 PDIOR#
IRQ14
14 IRQ14 PDDACK#
14,16 PDDACK#
PDCS1#
14 PDCS1#
PDCS3#
14 PDCS3#
CN18
NB_RST#
PDD7 1 2 PDD8
B 3 4 B
PDD6 PDD9
PDD5 5 6 PDD10
PDD4 7 8 PDD11
PDD3 9 10 PDD12 +5V
PDD2 11 12 PDD13
PDD1 13 14 PDD14
PDD0 15 16 PDD15 PDIOR# R115 *4.7K
17 18
PDDREQ 19 20
PDIOW# 21 22 PDIOW# R112 *4.7K
PDIOR# 23 24
PIORDY 25 26 PCSEL R124 470
PDDACK# 27 28 PIORDY R116 4.7K
IRQ14 29 30
PDA1 31 32 PDIAG R138 *10K
PDA0 33 34 PDA2
PDCS1# 35 36 PDCS3# HDD_VDD L25 PDDREQ R110 5.6K
IDELED# 37 38 PBY201209T-4A
28 IDELED# 39 40 60 mils
HDD_VDD 41 42 +5V
IRQ14 R130 8.2K
43 44
C679 HDD_CONN
*100P C365 C366 C368 C371 PDD7 R100 10K
1000P 10U/10V/V
HDD CONNECTOR.1U/16V/0402 .1U/16V/0402

A A
PROJECT : CT8
Custom HDD CD-ROM 1A

5 4 3 2 1
5 4 3 2 1
D D
VIN
+1.8V +2.5V +3V +5V +15V
PR116 PR109 PR44 PR100 PR49

1M 22B 22B 22B 22B PR58
1M
MAINON_G
MAIND
MAIND 37,38
3
3
3
MAINON 2
30,39 MAINON
PR115 2 2 2 2 2
1M PC67
PQ47 2200P/50V
1
DTC144EUA PQ44 PQ15 PQ37 PQ16 PQ23 REV.B

2N7002E 2N7002E 2N7002E 2N7002E 2N7002E
1
1
1
C VIN 1.8V_S5 C
3V_S5 +15V
PR112 PR101 PR125 PR60

1M 22B 22B 1M
S5_ON_G S5_OND
S5_OND 37
3
3
S5_ON 2 PR111 2 2 2
30,38 S5_ON
1M PC66
2200P/50V
PQ45 PQ38 PQ51 PQ22
REV.B DTC144EUA 2N7002E 2N7002E 2N7002E
1
VIN +15V
VTT_DDR 1.8VSUS 3VSUS 5VSUS 2.5VSUS
PR56
PR114 PR57 PR59 PR99 PR50 PR126 1M
1M 22B 22B 22B 22B 22B
B SUSD B
SUSD 37,38
SUSON_G
3
3
3
3
2
SUSON 2 2 2 PC64
30,38,41 SUSON PR113 2200P/50V
2 2 2
1M PQ19
PQ46 PQ18 PQ52 2N7002E
DTC144EUA PQ20 PQ21 PQ36 2N7002E 2N7002E
1
2N7002E 2N7002E 2N7002E

1
1
1
A A
PROJECT : CT8
Custom 30---DISCHARGE 2A

5 4 3 2 1
5 4 3 2 1
VA
2
PD2
BATTERY CHARGER
From Docking CNN 1
3
ADAPTER 18.5V 65W 3.51A VIN REV.C
PR25 10K SBM1040 REV.B
D
VIN 18,32,35,37,38,39,40 D
VA2 PQ33
PQ24
PL8 PD8 20 MIL TO CABLE DOCK AO4413
JP1 FBMJ3216HS480NT(6A) PR63 AO4413
2 1 8
1 3 VA3 2 1 1 8 2 7
2 1
2 1 2 7 3 6
3 2P 1P 3 6 PR30 4 5
PR66 SBM1040 2P 1P
7 4 PC75 4 5 200K
6 5 .1U/50V
POWER JACK PC73 0.033/1W/3720
4
PL1 10K .1U/50V PC18 PR89
PQ10 PL10 PC99 PC100 PC98
PQ8 MBAT+
S2
G2
DTA124EUA 2 2 1 1
D1
FBMJ3216HS480NT(6A) 1 3 PR31 .1U/50V
PC47 100K 15uH/4.4A/CDRH104R 2P 1P
2P 1P
10U/25V
10U/25V
10U/25V
PR38 PR32
SI4814
PC37 0.05/1W/3720
S1D2
4.7 4.7 0.47U/25V REV.C PL4
G1
PR43 PR24 PR22
2
PR11
4.7 4.7
ACOK 10K PC44 PC38 .047U/50V FBMJ3216HS800
5
2
.1U/50V PC16 PC17 PC19
100K
3
PD1 .1U/50V
CH501H-40 10U/25V 10U/25V 10U/25V
PC29 PC26 1772_5.4V
2 PQ11 PC34 .1U/50V .1U/50V
1772_5.4V
1
3VPCU VIN 3VPCU 5VPCU 3VPCU 2N7002K PR42 33 PD6 .1U/50V
3
2 1 PC32 CSIP
C C
1U/10V/X7R PR15
1
PR117 REV.B CSIN 100K
1
PD16 2 D/C# CH501H-40
D/C# 30
PR120
47.5K/F PU8 47K PQ50 CSSN
5
SW1010C REV.B
2
1 + 2N7002E CSSP 10K/F
1
4 REF4.096
REV.B 3 - 30 SYS_I
PR14 PR12
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LMV331
PR119 PU1 PR13 100K
2
INP
CSSP
LX
DLOV
CSIP
PGND
CSIN
CELLS
CSSN
DHI
DLO
VCTL
BST
BATT
3
100K PR39
12.4K/F 2.61K/F
PR118
2 BL/C#
BL/C# 30
37.4K/F PQ48 MAX1772EEI REV.C
2N7002E
REFIN
ACOK
ICHG
Battery Low 7.5V
DCIN
ACIN
GND
GND
ICTL
CCS
CCV
LDO
REF
CLS
VA
CCI
1
PD3
10
11
12
13
14
2 1
9
3VPCU
PR41 REV.B 1772_5.4V
VA2 CH501H-40 PR61 ACOK 3 1 PC101 PR23
1772_5.4V
75K/F
PD9 75K/F 1K
PQ6 1U/50V
PC36
PC33
PC30
PC23
2 1 3VPCU 12,18,26,29,30,32,37
PR129 PC46 REF4.096 CELL-SET
3
B 5VPCU PR121 1U/10V/X7R PC22 B

CH501H-40 DTA124EUA
.1U/50V
2
PR130 .1U/50V HI = LDO = 4 CELL
3
PR40 PC145 PR35 CC-SET = 1.05V/A

*0
1
2 PQ53 PD17 PR127 10K PR17

LOW = LDO/2 = 3 CELL
30 ACIN REF4.096 CC-SET CC-SET 30
PQ54
1U/10V/X7R
.01U/50V
.01U/50V
100K 2 100K/F
13.7K/F
.01U/50V
REV.C
CH501H-40
2N7002K PR122 10K

30 AD_AIR
2N7002K
1M PR36
1
15K
PC144 121K/F
1
PR62 REV.D 1U/25V

ESD
3VPCU 12.4K/F REV.B
REV.C
PC25 PR18
1ST_BAT_CONN
.01U/50V 10K/F PL9
CN9 FBMJ3216HS480NT(6A)
MBAT+
1
5 TEMP_MBAT 30
4 PC24 PR27
8 3
7 2 .01U/50V 100K/F
6 PR19
PR20 100
A 100 A
MBATV
MBATV 30
MBDATA MBCLK PC31
MBCLK 3,30
3,30 MBDATA
PR28 .01U/50V
1
14K/F PROJECT : CT8

PD5 PD4
ZD5.6V ZD5.6V Quanta Computer Inc.
2

Custom 3A
MAX1772/CHARGING
5 4 3 2 1
5 4 3 2 1
3VPCU
VIN_1999_3V
REV.B
PQ39
S0-S5
1
2
5
6
PR55 PR54 PC128 PC129 PC123 PL18 AO6402
2 1 1 2
3 1999_RST#
VIN
35 S5_OND
S5_OND 3 0.5A
4.7 HI0805R800R-00 REV.C 3V_S5
2200P/50V
.1U/50V
PC63
10U/25V
D PR53 390K PC65 D
Del
5
3V_S5
4
150K PC122 3V_S5 3,12,13,15,16,35
.1U/50V .1U/50V
2
PC115
2
PQ43 .1U/10V
REV.C AO4914
4
Rds(on)-24mOHM
3VPCU 12,18,26,29,30,32,36
1999_DH3
PL17 PC124 PC125 PC119
1999_LX3 3VPCU 3VPCU
+3V 3V_AL ALWAYS
5.8UH/6A/CDRH104R
5
PC143 5A
1
2.2U/25V
.1U/50V
PC137
1
330U/6.3V/ESR-25
PR108 2 1 PQ40
.1U/50V AO4812
100K PU7 4.7U/10V
2
1 N.C BST3 28
2
30,38,39,40 HWPG 2 PGOOD LX3 27

C C
4
3 ON3 DH3 26
+3V
5V_AL 4 25
S0-S1 SUSD
ON5 LDO3 SUSD 35,38
VIN_1999_5V
ILIM3 5 24 1999_DL3 3VSUS
ILIM3 DL3 2A
6 23 PC114
SHDN- GND 3VSUS 13,19,20,21,22,23,33,35
REF2V_1999 PC126 PC121 PC127 PC130 PL19 PC132 .1U/10V
REF2V_1999 1999_BST3
7 FB3 OUT3 22 3VPCU VIN
PC131 1U/10V PC141 PC113
2 1 8 21 5VPCU HI0805R800R-00 MAIND .1U/10V
S0-S3
REF OUT5 35,38 MAIND
5
6
7
8
2200P/50V
.1U/50V
10U/25V
10U/25V
10U/25V
2.2U/25V
+
9 20 1 2
PR105 100K FB5 V+ 1A
2 1 10 19 1999_DL5 4
PRO- DL5
ILIM5 11 18 PQ42
ILIM5 LDO5 PC140 1U/10V/X7R
12 SKIP- VCC 17
SI4800DY
5VPCU 18,28,30,31,32,33,36,38,39,40
PR103 13 16 1999_DH5
TON DH5 PL16 PC116 PC120 PC118
3
2
1
0 1999_LX5 5VPCU
14 BST5 LX5 15 5VPCU ALWAYS
5
6
7
8
MAX1999 5.8UH/6A/CDRH104R
5
2.2U/25V
.1U/50V
PC138 6A
330U/6.3V/ESR-25
1999_BST5 1 2 4 PQ17
.1U/50V REV.B
2
2
PR110 PQ41 AO4812

B PD15 B
51
CHP202U
AO4702
3
2
1
REF2V_1999
4
Rds(on)-20mOHM +5V SUSD
3
5V_AL SUSD 35,38
15,17,18,24,28,30,31,32,33,34,35 +5V
1
5VSUS
+ PC142 PC59
4.7U/10V
5VSUS 19,21,22,28,32,33,35
PR106 .1U/10V
PR104
S0-S1 PC60
2
60.4K/F
60.4K/F .1U/10V
ILIM3
3.5A MAIND
S0-S3
35,38 MAIND
L_I(A)*Mosfet(Low-Side)RDSON(mOHM)=V_ILIM(mV)/10
ILIM5 2A
1
PR102
PR107
80.6K/F
82.5K/F
REV.B
2
PD13 PD14
5VPCU +10V
A PC133 2 PC134 2 A
1999_DL3 1 2 1999_DL3 1 2
Only for power
3 3
.01U/50V +10V .01U/50V +15V
1 1
1
PC136
CHN217 CHN217
ALWAYS
1
2.2U/25V
PC135
PROJECT : CT8
+10V
.1U/50V
2

2

Custom MAX1999(3V/5V) 3A

5 4 3 2 1
5 4 3 2 1
D D
PC106
.1U/50V
VIN_1845_2.5V
PC110 PL14
PC112 PC111 PC108 PC109 VIN_1845_1.8V
VIN PL5
1
PC41 PC40 PC48 PC45 PC35
HI0805R800R-00 PC103 PD7 VIN
8
7
6
5
10U/25V
10U/25V
.1U/50V
2200P/50V
2 1 CHP202U
10U/25V PQ34 HI0805R800R-00
2200P/50V
.1U/50V
10U/25V
10U/25V
10U/25V
5
6
7
8
4 1U/10V/X5R
5VPCU
3
SI4392DY VIN_1845_1.8V PR91
REV.C 1845VCC 4
8A 20 5.5A
2
PC52 .1U/50V PC104 PQ12
22
4
PU6
S0-S3 2.5VSUS 1845BST2 10U/10V/Y5V
1
2
3
19 21
V+
VCC
PL15 BST2 VDD PC53 SI4800DY
1
PC57 PC58 PC56 PC55 20 25 1845BST1 1.8V_S5
2.5UH/7.5A/CDRH104R DL2 BST1 S0-S5
3
2
1
1845LX2 17 26 1845DH1
3,4,9,10,11,35,41 2.5VSUS LX2 DH1 .1U/50V PL13 PC97 PC96 PC28 PC95
8
7
6
5
220U/4V/ESR-25
220U/4V/ESR-25
2.2U/25V
.1U/50V
1845DH2 18 27 1845LX1
C DH2 LX1 1.8V_S5 15,35 C
1
16 24 1845DL1 5.8UH/6A/CDRH104R
CS2 DL1
1
2.2U/25V
.1U/50V
*220U/4V/ESR-25
470U/4V/ESR-15/NEO
PD18 PR46 + + PQ35 4
1
15 28 + +
OUT2 CS1
5
6
7
8
PD19
AO4704 1845FB2
2
14 FB2 OUT1 1
*EC31QS04
*0 PQ13
2
2
2 1845FB1 4
FB1
*EC31QS04
PR97 0 1845_PWG PR128 *0
2
7 PGOOD PR45
1
2
3
Rc PR93 0 TON 5
1845REF2V AO4704
30,35 S5_ON 11 ON1
Rds(on)-12.5mOHM PR94 0
30,35,41 SUSON 12 ON2
REV.B Vout=(1+Rc/Rd)*1 10 Rds(on)-12.5mOHM *5.23K/F/0603 REV.B
REF
3
2
1
2
1845ILIM2 13 6 Rc
ILIM2 SKIP PC107 REV.B
1845ILIM1 3 ILIM1 .22U
1
Rd 23
OVP
UVP
GND
Vout=(1+Rc/Rd)*1
PR47 1845VCC
8
Rd
0
PR48
MAX8743 0
30,37,39,40 HWPG
REV.B
B B
L_I(A)*Mosfet(Low-Side)RDSON(mOHM)=V_ILIM(mV)/10
Fix 2.5V Output
1.8V_S5
Fix 1.8V Output
1845REF2V
REV.B
PR92 PR96
5
82.5K/F 100K/F
2.5VSUS PQ9
1845ILIM2 1845ILIM1
PQ14 AO4812
PR95 PR98
S0-S1
1
2
5
6
AO6402 53.6K/F 47.5K/F
0.25A +1.8V
4
35,37 MAIND 3
+2.5V SUSD
SUSD 35,37
6,7,8,12,15,35 +1.8V
1.8VSUS
4
+2.5V 3,6,7,8,35
PC21
1.8VSUS 15,35
PC50
A .1U/10V
S0-S1 .1U/10V PC20 A
.1U/10V
3A 35,37 MAIND
S0-S3
MAIND
0.2A PROJECT : CT8

Custom MAX1845(2.5VSUS/1.5V_S5) 3A

5 4 3 2 1
5 4 3 2 1
E E
VIN_1993
VIN
PL6 5VPCU
PC69 PC68 PC72 PC71
PC70
HI0805R800R-00 PC81 PR77
2200P/50V
1993VCC
10U/25V
.1U/50V
10U/25V
10U/25V
1.2V 20
2
10U/10V/Y5V
PC84
8
7
6
5
2
PD10 1U/10V/X5R
PQ26
1
D
7A D
19
24
22
4
CH501H-40 VIN_1993
SI4392DY
VDD
OVP/UVP
VCC
S0-S1 1993BST 17
V+ 14
BST PR82 0
DCR 10m OHM 1993DH 15
POK 4 HWPG 30,37,38,40
VDDA_1V2 DH
1
2
3
LSAT 3
2
PL7 PC76
23 1993SHDN# PR4 0
PC43 PC80 PC3 PC4 2.5UH/7.5A/CDRH104R .1U/50V SHDN MAINON 30,35
VDDA_1V2 1993LX
1
16 LX AGND 21
8
7
6
5
N.C 7
1
470U/4V/ESR-25
470U/4V/ESR-25
2.2U/25V
.1U/50V
+ + 1993DL 18
PR79 Ra PR1 4
DL
PQ25
2
20 PGND
REV.B 7.15K/F 2.49K/F
N.C 8
C AO4704 11 C
CSP
PC79 .1U/50V
1
2
3
1 2
PR80 12 CSN
PC85
TON 1PR8 *0
1993CSP 10
*100P 10K/F OUT
PR131 2.49K/F 6 1993REF
PC43,PC80 change from 220u to Rb Vcs 9
REF
SKIP
ILIM
FB
N.C
470u
1
PR132 0 PR7
PC8
13
100K/F
5
1U/10V/X5R
2
REV.C 1993ILIM
PU4 MAX1992ETG
1
PC9 PR10
Vout=VFB(1+Ra/Rb) 470P
75K/F
2
#VFB=0.7V Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10
B B
REV.B
A A
PROJECT : CT8
A3 3A
MAX1993/VCC_NB
5 4 3 2 1
5 4 3 2 1
5VPCU
PC77 PR67
1544VCC
2.2U/10V/X5R
PL2
2
10 PC86
2
PD12 VIN_1544
10
30
D 10U/10V/Y5V VIN D
HI0805R800R-00
1
VCC
VDD
PL3
1544AGND CH501H-40 PC89 PC91 PC11 PC88 PC90 PC10
1
3 VID0 24 D0 V+ 36
5
6
7
8
5
6
7
8
10U/25V
23 HI0805R800R-00
3 VID1 D1 VCC_CORE
2200P/50V
.1U/50V
10U/25V
10U/25V
10U/25V
22 PQ28 PQ31
3 VID2 D2
28 1544DHM 4 4
3 VID3 21 D3
DHM 1.2V
PR85
20 26 1544BSTM IR7821 IR7821
3 VID4 D4 BSTM 30A
1544VCC 19 0 PC87
OVP PR90
DCR 1.7m OHM+-10%
3
2
1
3
2
1
.22U/25V PL12 0.001/2W/5% PC105 PC49 PC54 PC51
27 1544LXM 1544-1 2 1
LXM 2 1 VCC_CORE
1544AGND 0.56uH
5
6
7
8
5
6
7
8
11 GND 2P 2P 1P 1P
PQ27 PQ30 PR29
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
+ + + +
29 1544DLM 4 4 1.5K
DLM
1544-2
1544-3
MAX1544
4 S0 1 2
IR7832 IR7832
PJ1 SHORT PC39 .22U PR78 PR76
C C
PR37 1K/F
3
2
1
3
2
1
5 S1 PGND 31 1K/F
Vcs 0
1544AGND
37 1544CMP
CMP 1544CMN
CMN 38 REV.D
17 1544OAIN+ DEL PC83
Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/20
OAIN+ 1544OAIN-
REV.C OAIN- 16
PR71 80.6K/F
1544TIME 1 15 1544FB REV.D 50mV/27.3A=1.83mV/a for load line slope
TIME FB
1544AGND
14 1544CCI 1 2 DEL PC7 PR9 PR6

PC78 270P CCI PC6 470P 3.65K/F
1 2 1544CCV 12
CCV 1544_SUS D4 D3 D2 D1 D0 Output
SUS 3
PR5 3.65K/F VIN_1544 0 0 0 0 0 1.550V
PC1 0 0 0 0 1 1.525V
1 2 1544REF 8 PR72 5VPCU 0 0 0 1 0 1.500V
REF COREFB 3
PC13 PC14 0 0 0 1 1 1.475V
1U/10V/X5R 0 PC15 PC12 0 0 1 0 0 1.450V
PR68 2 0 0 1 0 1 1.425V
PD11 0 0 1 1 0 1.400V
2200P/50V
.1U/50V
10U/25V
10U/25V
100K/F 0 0 1 1 1 1.375V
5
6
7
8
5
6
7
8
PR64 60.4K/F 1544AGND 0 1 0 0 0 1.350V
B REV.C REV.B 1544ILIM 9 PQ4 0 1 0 0 1 1.325V B
ILIM CH501H-40 PQ1 0 1 0 1 0 1.300V
1544DHS 0 1 0 1 1 1.275V
1
PR84 0 DHS 33 4 4
REV.B 0 1 1 0 0 1.250V
30,37,38,39 HWPG
35 1544BSTS 0 1 1 0 1 1.225V
BSTS 0 1 1 1 0 1.200V
25 PR74 0 IR7821 IR7821
DCR 1.7m OHM+-10% 0 1 1 1 1 1.175V
VROK PC82 PL11 PC102 1 0 0 0 0 1.150V
REV.D
PR123 0 1 0 0 0 1 1.125V
0.56uH 1 0 0 1 0 1.100V
3
2
1
3
2
1
30 VRON 6 SHDN .22U/25V
PR133 *0 34 1544LXS 1 0 0 1 1 1.075V
1544REF LXS 1 0 1 0 0 1.050V
330U/2.5V/ESR-9/POS
PR124 PR33 + 1 0 1 0 1 1.025V
REV.B 1544VCC 1544SKIP# 18 SKIP DLS 32 1544DLS
1.5K
Vcs 1
1
0
0
1
1
1
1
0
1
1.000V
0.975V
15K PR81 0 1 2 1 1 0 0 0 0.950V
1 1 0 0 1 0.925V
1544REF 1544TON 2 40 1544CSP PC42 .22U PR3 1 1 0 1 0 0.900V
TON CSP 1544CSN 1 1 0 1 1 0.875V
CSN 39 *0
PR73 0 1 1 1 0 0 0.850V
PR75 PR34 0 1 1 1 0 1 0.825V
TON=REF/300KHz PR69 1544OFS 7 13 1544GNDS 1 1 1 1 0 0.800V
OFS GNDS COREFB# 3
TON=Open/200KHz 1 1 1 1 1 Shutdown
121K/F 10/F
1
5
6
7
8
5
6
7
8
PU5
PC5
1000P PQ2 PQ5
LPM K8 100mV of negative offset voltage
2
4 4
A A
1544AGND SUS S1 S0 Output

PR65 IR7832 IR7832
1
PC74 High OPEN OPEN 0.925V

80.6K/F 100P
3
2
1
3
2
1
PROJECT : CT8
2
REF OPEN OPEN 1.325V Quanta Computer Inc.

1544AGND 1544AGND Custom 3A
CPU VCC CORE
5 4 3 2 1
5 4 3 2 1
D D
C C
1.25V (0.2A)
1.25V (1.2A)
REV.B S0-S3
2
PC139
150U/2V/ESR-18
R505 0
REV.B
R506 *0
S0-S3
1
4 VTT_SENSE
VTT_DDR
PR52 1 8
GND VTT VTT_DDR 4,11,35
30,35,38 SUSON 2 SD PVIN 7
2.5VSUS
3 VSENSE AVIN 6
33K 4 5
VREF VDDQ
2
*.1U/50V
PR51 PC62 PC117

PU3 G2996
2.5VSUS 3,4,9,10,11,35,38
*.1U/50V
100K REV.B PC61
10U/10V/Y5V
1
1.Change Pr52 to
B 33k, Pr51 to B
100k. Footprint/PSOP8-8P
2.PC61,PC62 no stuff.
A A
PROJECT : CT8
Custom VTT_DDR/VDDA_1V2 2A

5 4 3 2 1
8 7 6 5 4 3 2 1
CT8 Mother
Model Board
MODEL REV CHANGE LIST Page FROM TO
First Release
1 1A
CT8 M/B 1A 2 3A
3 3A 3B
4 2A
PAGE 2 : 1. C330, C479 CHANGE VALUE FROM 33p TO 27p for meet 35ppm. PAGE22 : 1. C484 VALUE CHANGE FROM 100U TO 150U for USB power meet SPEC. 5 3A
2. DEL R84 0ohm (don't need reserve). 2. ADD R509, R510, R511, R512 FOR EMI.
2A PAGE 3 : 1. ADD CON1 HDT CONNECTOR for AMD requirement. PAGE23 : 1. MC13, MC18 CHANGE VALUE FROM 33p TO 22p for tune clock range. 6 1A
D 2. ADD C721 100P, C722 4.7U, C723 3300P, C724 0.22U for high frequency decoupling. 2. CHANGE MR24, MR27 FROM 1K TO 0ohm for Conexant requirement. D
3. Remove R386,Q33, connect U18 pin 6 to TEMP_ALARM# (no need level shift). 3. ADD SPDIF. 7 3A 3B
4. Change C311 from 10u to 100u and remove C304, that ensures VDD to VDDA power 4. Del MR26 for meet PC99 SPEC.
down sequence is met. 5. Del C518 for tune BITCLK waveform.. 8 2A
PAGE26 : 1. ADD R502 15K pull low for tune ISOLATEB voltage.
5. Add c154,c283,c284,c285 4.7u c9,c277 100u change to 220u for VDDA_1V2 power noise. 2. R341 change 4.7K to 3.6K for REALTEK recommend. 9 1A
PAGE 4 : 1. C148, C163 VALUE CHANGE FROM 330U TO 220U for Mechanic interference. 3. Add C729 10u and C650 change value from 10u to 22u for REALTEK recommend.
2. C225, C243, C267 PART NUMBER CHANGE TO CH733LM8812 for Mechanic interference. 4. Change C385 from 2200p to 3300p for tune 3VPCU drop level. 10 1A
PAGE 5 : 1. R16 VALUE CHANGE FROM 10K TO 8.5K for ATI requirement. 5. Add C736, C737, C738, C739 for EMI.
PAGE 7 : 1. ADD C711~C720, C745~C747 0.1U FOR EMI 6. DEL R134 no need reserve, ADD Q40 for leakage current. 11 2A
2. DEL R19, CHANGE R17 VALUE TO 4.7K PULL +1.8V for side-port memory is not used. PAGE27 : 1. ADD C734, C735 1000P FOR EMI.
3. DEL Y1 CIRCUIT because no need reserve is ATI requirement. 2. DEL R246, R249 for 1G LAN. 12 3A
4. ADD C740, C741 FOR EMI. PAGE28 : 1. R483 change signal from 5VPCU to +5V and R350 pull 5VSUS for leakage current.
5. CHANGE NET NAME FROM PWROK_NB TO PWROK for meet ATI power OK sequence. PAGE29 : 1. U11 change package to TSSOP32 for Mechanic interference. 13 3A 3B
PAGE 8 : 1. ADD L55 for VDDA_1V2 frequency decoupling. PAGE30 : 1. C389 8p, C399 5.6p change value to 15p for clock tolerance.
2. L15,L55 TI201209G121 CHANGE TO FBMJ2125HM330-T. 2. Del signal BT_OFF#, RF_OFF# for HP implement guide. 14 1A
PAGE11 : 1. C280 VALUE CHANGE FROM 330U TO 220U for Mechanic interference. 3. ADD R471 and DEL R468, R470 for ATI power OK sequence.
PAGE12 : 1. DEL R129, C391, C382, U9, D3, because no need reserve is ATI requirement. 4. Add D20 for EC leakage current. 15 2A
2. Remove RTC charge circuit Q16, R133, R137, R140. because RTC battery is not PAGE31 : 1. ADD HOLE24, AND D21, C744 BOM NO STUFF for tune FAN clock.
support charge function. 2. CHANGE L1, L2, L32 TO BK1608LL121. C6, C418, C419 TO 10P for CRT timing. 16 2A
PAGE32 : 1. ADD R513, R514 2, C731, C732, C733 FOR EMI.
3. C387, C388 CHANGE VALUE FROM 12p TO 18p for meet 10ppm SPEC. PAGE33 : 1. DEL CN20, C681, C677,CC673 because no need AV function. 17 3A
4. ADD RN40, RN41, R520 for PCI command signal pull high. PAGE35 : 1. ADD PR126, PR125, PQ51, PQ52 for 2.5VSUS and 1.8V_S5 discharge circuit.
PAGE13 : 1. CHANGE R99 for blue tooth on/off and R318 for wire less on/off function. PAGE36 : 1. CHANGE PQ24 FROM SI4425 TO AO4407, CHANGE PQ33 FROM AO4411 TO AO4407, CHANGE 18 3A 3B
2. DEL R401, C668, R400 for ATI power OK sequence. PR36 FROM 130K TO 121K, PQ11 CHANGE TO 2N7002K, PD6 CHANGE TO CH501H-40. and add PQ53,
3. DEL R161 0ohm for BITCLK. 19 2A 3B
4. ADD R503, R504 FOR F/F AND D/F. PD17, PR127, PC144 for prevent AC discharge MOSFET damage when adapter over watt.
5. CHANGE R147 PULL HIGH FROM 3V_S5 TO +3V for leakage current. and R446 2. Change PD16 bypass from 5VPCU to 3VPCU. 20 3A
contact to BITCLK because change net name. PAGE37 : 1. CHANGE PQ41 FROM AO4704 TO AO4702, CHANGE PR102 FROM 47.5K TO 80.6K, CHANGE
PAGE15 : 1. Del C642 for meet IXP power on sequence. PQ43 FROM SI4834 TO AO4914 for Modify 5VPCU OCP point. 21 3A
PAGE16 : 1. Del R444 10K, Add R445 10K for ATI USB clock from outside. PAGE38 : 1. Change PWM IC from MAX1845 to MAX8743 to avoid negative voltage.Modify 22 3A
PAGE17 : 1. DEL R175, Q19 and CN22 PIN34 CONNECT TO PCI_PME#. because no need LANVCC 2.5VSUS, 1.8V_S5 OCP point.
to control PME signal. 2. ADD PR128 NO STUFF for adjust work frequency. 23 2A 3B
2. Del R196, C402. no need reserve. PAGE39 : 1. CHANGE PR10 FROM 60.4K TO 75K for Change VCCA_1V2 OCP point. 24 3A 3B
PAGE18 : 1. CHANGE R213 SIGNAL to PWROK and DEL Q21, Q22, Q24, R210for ATI LCD back light bug. 2. PC43,PC80 change from 220u to 470u
2. Reserve R215 1K PULL DOWN. PAGE40 : 1. ADD PR124 15K. DEL PR70, PC2 for VR_ON signal add pull down resistor. 25 1A
C 3. ADD R507, C730, R508, D19 for ATI LCD back light bug. 2. Change PR64 from 37.4k to 49.9k for update over current from 32A to 39A. C
PAGE19 : 1. DEL PCI1510 CIRCUIT AND PARTS. PAGE41 : 1. ADD R505, R506 and Change VSENSE from VTT_DDR to CPU VTT_SENSE 26 3A 3B
2. ADD C743 for tune clock waveform. 2. Change PR52 to 33k, PR51 to 100k for timing.
PAGE20 : 1. R402 stuff for PCI reset timing. 3. PC61,PC62 no stuff. 27 3A
2. Remove R392, Q36 and U26 pin T3 connect to PCI_PME# for PME timing.
3. Add R515, C742 circuit on CLK48M for tune clock waveform. 28 2A
4. Change R407 to 4.7k for limit current.
5. Change L48 to 0 ohm for EMI. 29 2A
PAGE21 : 1. ADD R494 22ohm AND Q39 2N7002E for VCC_XD discharge.
2. CHANGE R487, R488, R490, R491, R492, R493, R495, R496, R497, R498, R499 VALUR FROM 0 30 3A
TO 22 for signal waveform..
3. ADD R516, R517, R518 for TI requirement. 31 3A 3B
4. Remove R397, D16, R489. 32 3A
5. Add a Quick Switch U34 to isolate clock.
6. Change R501 to 0 ohm. 33 2A
7. CN5 pin 35, 43 connect to the same net.
8. C725~C728 0.1U for power noise. 34 1A
PAGE 2 : 1. Add CAP C749, C750 0.1u for EMI. PAGE26 : 1. Del 1G signal. 35 2A
2. Change C385 from 3300p to 0.1u for power drop. 36 3A 3B
PAGE 3 : 1. Modify C311 component.
PAGE27 : 1. Del 1G circuit, because no support 1G function. 37 3A
PAGE 5 : 1. Change R16 to 8.25k/F and R12 to 82.5 ohm for A-link drive.
PAGE30 : 1. C89, C390 change value from 15p to 5p for frequency tolerance. 38 3A
3A PAGE 7 : 1. Del C740 for VGA Clock waveform.
2. L17 change from bead to 150ohm for ATI VCO issue(PA_RS480L1). PAGE31 : 1. Modify FAN circuit for diminish electronic magnetic noice. 39 3A
2. Change L1, L2, L32 to BK1608LL680 for CRT waveform can meet SPEC.
PAGE12 : 1. Add D3 for meet SVTP SPEC. 40 3A 3B
2. Change C674, C675, C676, C683 value from 15p to 33p for EMI. PAGE32 : 1. Del 1G signal.
3. C358, C359, C360, C361 change value from 0.1u to 0.01u for ATI PA_IXP400AC11. 2. Add R525, R526, R527 0ohm for option FF or DF TV. 41 2A
3. Add common choke for USB.
PAGE13 : 1. R503 change pull up source from 3VPCU to +3V for real power plane.
PAGE36 : 1. Change PC47 to 0.47U,PC37 to 0.047U for reduce Adapter in inrush current.
PAGE17 : 1. CN22 pin15 pull down for customer request. 2. Del PQ49 for fix 3 CELL battery and cost down.
3. Change PQ53 for 2N7002K for ESD protect.
B PAGE18 : 1. Change C730 from 3300p to 0.1u for power drop. 4. Add PR130,PQ54 for delay AD_AIR signal to EC After 3VPCU ready. B
PAGE20 : 1. Add R529, R530 2.7K pull down for option FF and DF. PAGE37 : 1. Change PR53 to 150K for Meet MAX1999 SHDN signal input trip Max level.
2. Reserve C754, C755 for EMI. 2. Del PC122 for meddle mechanic.
3. Change C742 to 22p for waveform quality.
PAGE38 : 1. Modify VIN_1845_1.8V signal, because that is single net.
PAGE21 : 1. Add C758~C761 0.1u for bypass noise.
2. Change R501 from 3.3K to 0 for signal level. PAGE39 : 1. Add PR132 0 ohm,PR131 2.49K/F for reserve debug.
3. Add R500, R531, U36 for signal driving.
4. Change R518, R519 to 2.2K for signal level. PAGE40 : 1. Change PR64 to 60.4K Modify CPU over current protect point.
2. Change PR71 to 80.6K for Modify CPU power slew rate
PAGE22 : 1. change CN19, CN23, CN16 footprint for new part.
PAGE24 : 1. reserve C751, C752, C753, C756, C757 0.1u for EMI.
PAGE 3 : 1. Add C762~C767 0.1u for ESD.

PAGE 7 : 1. Change C740 value from 1000p to 330p for ESD.
PAGE13 : 1. Modify BT_OFF# from GPIO1 to GPM3 for keep status in S3.
2. Add R533, R534 10k pull low for M/B ID.
PAGE18 : 1. Change R216 power source from +3V to 5VPCU and change C730 value to .47u for glitch.
PAGE19 : 1. Change R342 value from 33ohm to 15ohm for meet PCMCIA SPEC timing.
PAGE23 : 1. Add D21 1ss355 and change R309 value from 2.2k to 1k for eliminate GPRS card noise.
3B 2. Del R317 for GPRS noise.
PAGE24 : 1. Add Q41 DTC144EU for GPRS noise.
PAGE26 : 1. Change R156 power source from 3VPCU to 5V_AL and change C385 value from .1u to .47u for power glitch.
PAGE31 : 1. Add Q43 (no stuff) DTC144EU and Q13 SI3457 for FAN driver.
PAGE36 : 1. Add PC145 .01u for ESD.
PAGE40 : 1. Add PR133 (No stuff) for power saving.
2. Del PC7, PR9, PC83 for ESD.
A A
PROJECT:CT8 M/B REV:2A DOCUMENT NO.: 204 PCBA P/N: 31CT8MB0021

Quanta
Computer Inc. APPROVED BY: DRAWING BY: Ricky Chiu DATE: 11/15/2004 SHEET 1 OF 1
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SYSTEM POWER MAX1845

PCI DEVICES IRQ ROUTING 32.768KHz PCLK_591

RJ11 JACK RJ45

Date: Thursday, April 14, 2005 Sheet 1 of 42

CLK +3V CLK_VDD 20 Mils

7 R274 R277 R276

Date: Thursday, April 14, 2005 Sheet 2 of 42

CPU VDDA_1V2 U22A

CPU_CLK C295 3900P

R32 R35 R38

Q28 2N7002E 10K 10K

C308 1 R80 C721 C722 C723 C724 +2.5V 3V_S5

G923 R79 C766

CPU VTT_DDR U22B

Date: Thursday, April 14, 2005 Sheet 4 of 42

CLG Link 0 Is Clawhammer <--> RS480

HT_RXCAD15P HT_TXCAD15P R24 CADIP15

HYPER TRANSPORT CPU

3 CLKOP1 Y26 HT_RXCLK1P HT_TXCLK1P L24 CLKIP1 3

3 CLKOP0 W29 HT_RXCLK0P HT_TXCLK0P F29 CLKIP0 3

3 CTLOP0 P29 HT_RXCTLP HT_TXCTLP M29 CTLIP0 3

GPP_RX0P AE1 AD2 GPP_TX0P_C

A_RX0P AG1 AF2 A_TX0P_C C16

Quanta Computer Inc.

Date: Thursday, April 14, 2005 Sheet 5 of 42

Decouple to MPVSS near the ball

Date: Thursday, April 14, 2005 Sheet 6 of 42

REV.B DEL Y1 AND U3 CIRCUIT. R21

JOINT LOAD_ROM#:LOAD ROM STRAP ENABLE strap

R20 R228 R223

Date: Thursday, April 14, 2005 Sheet 7 of 42

GROUND VDDA18 ON ON OFF OFF OFF

PLLVDD ON ON OFF OFF OFF

H15 VDD18_1 VDD_CORE27 T15

Date: Thursday, April 14, 2005 Sheet 8 of 42

DDR Unbuffered DDR Near SODIMM Socket

196 181 MD_61

193 178 MD_60

VSS#27 VSS#76 0.01U 4.7U 0.22U

Date: Thursday, April 14, 2005 Sheet 9 of 42

DDR Unbuffered DDR Far SODIMM Socket

196 181 MD_61 C453 C306 C461 C159 C434 C212

193 178 MD_60

Date: Thursday, April 14, 2005 Sheet 10 of 42

MD56 RN48 1 2 10X2 MD_56 MD_1 3 4 MAA11 7 8

Date: Thursday, April 14, 2005 Sheet 11 of 42

18P REV.B 18P

PLACE THESE COMPONENTSCLOSE TO U600, AND U7A

PCI EXPRESS INTERFACE

U9 CPU_STP# AJ8 AF4 REQ0# PAR 8 7

1U/16V B30 AK27 SERIRQ LAD1

T133 F28 A20M# R103 100K

7 ALLOW_LDTSTOP E29 STPCLK#/ALLOW_LDTSTP R452 100K

3 LDT_RST# D28 LDT_RST# VBAT A2 VCCRTC 2 1

C674 C683 C676 C675

EMI REV.C PROJECT : CT8

Date: Thursday, April 14, 2005 Sheet 12 of 42

ACPI / WAKE UP EVENTS