This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2631626, IEEE
Transactions on Power Electronics

A Booost PFC
C Stage Utilized
d as Hallf-Bridgge Convverter foor High
h
Efficciency D
DC-DC Stage
S in
n Powerr Supplyy Unit
Jae-Ill Baek, Studeent Member, IEEE, Jae-K
Kuk Kim, Meember, IEEE, Jae-Bum Leee, Student M
Member,
IEEE, Hann-Shin Youn,, Student Mem
mber, IEEE, and Gun-Wooo Moon, Member,
Me IEEEE

A
Abstract Thee half-bridge ((HB) LLC con nverter is one of the
most attractive dc-dc
d converteers for medium m power suppliies due
to its soft switchhing capability.. However, its conversion effi
ficiency
is considerablyy degraded iin wide-link-vvoltage appliccations
beecause of a sm mall magnetizin ng inductance and wide swiitching
freequency variattion for a high voltage gain. IIn this paper, a boost
PFFC stage whicch can also pllay an importtant role during the (a)
hoold-up time is p proposed for a high efficiencyy HB LLC converter.
In
n the proposed d PFC stage, the boost PF FC converter ccan be
efffectively utilizeed as a HB converter by rep placing a boostt diode
annd inductor w with a synch hronous switch h and transfo former,
reespectively. Aftter the AC line is lost, the prooposed PFC staage can
opperate as the HB converterr and regulatee the output vvoltage
instead of the H HB LLC converrter. Thus, it eenables the HB B LLC
coonverter to be d designed with a large magnettizing inductan nce and
naarrow switchin ng frequency vvariation. As a result, the prooposed
PFFC stage can enhance the overall efficieency of the PSU by
mproving the effficiency of the HB LLC conveerter. To confiirm the
im
vaalidity of this paper, a prototype with 1880-264Vrms AC C line,
2550-400V link vooltage, and 48V V/480W outputt is tested. ((b)
Figg. 1. General poweer supply unit (PS
SU) over 100W. (aa) Two-stage struucture.
Index Terms Half-bridge (HB) flyback converter, HBB LLC (b) Hold-up
H time requuirement.
up time, wide iinput voltage rrange. 1
coonverter, hold-u
secoondary devicees, and no offfset current iin the transformer
I. INTR
RODUCTION [5]--[10].
M
Meanwhile, PS SUs for IT devvices should rregulate the ouutput
R
im
ECENTLY Y, as informatiion technologyy (IT) devicess, such
as computeer, server, and telecom, havee rapidly grow
mportance of ppower supply units (PSUs) has been incrreased.
wn, the volttage after thee AC line is lost to savee data for sevveral
millliseconds, whhich is called the hold-up time requirem ment.
Inn general, PSUUs need two requirements: 1) high efficienncy for Durring this intervval, the boost PFC stage does not operatee and
ennvironmental cconservation aand energy savving [1]-[3], 2) 2 high the link voltage VLink is decreassed to transfer power to the lload,
poower quality too meet the harrmonics regulaations [4]. Forr these as sshown in Fig. 1(b). Thus, thhe HB LLC coonverter shoulld be
reasons, PSUs typically addopt a two-sstage structure that desiigned to coveer wide link voltage
v range,, which leads to a
coonsists of a booost power faactor correctioon (PFC) stagge and smaall magnetizingg inductance ffor a high voltaage gain. How wever,
dcc/dc stage, as shown
s in Fig. 11(a). The boosst PFC stage coontrols a ssmall magneetizing inducctance causes large prim mary
the shape of thee input currentt to achieve a high power qquality. conduction and switch
s turn-offf losses. Furrthermore, thee HB
M
Moreover, it proovides a consttant nominal liink voltage wiith low LLC C converter hhas wide swiitching frequency variatioon to
freequency voltaage ripple for tthe dc/dc stagee as an input vvoltage reguulate the outpput voltage du during the holld-up time, which
w
soource. The dc/dc stage, folloowing the booost PFC stage, offers incrreases the sizee of magneticc components.. Therefore, itt has
gaalvanic isolatiion and precissely regulatess the output vvoltage alsoo large core losss in magneticc components at the normal state
ussing the link vvoltage. For thhe dc/dc stage,, a half-bridgee (HB) [9]--[10].
LLLC converter iis one of the m
most popular toopologies in m medium As aforementiioned reasonss, many approoaches have been
A
poower (300-6000W) applicatioons due to itss wide zero-vooltage- reseearched and prroposed to achhieve a high eefficiency HB LLC
swwitching (ZVS S) range, low vvoltage stress on the primarry and converter with a large magneetizing inducttance and naarrow
swittching frequuency variatiion [6]-[10]. For exam mple,
Manuscript receiived October 11, 2016; accepted N November 10, 2016. This
pulees-width-moduulation (PWM M) control schheme is applieed to
woork was supporteed by the Nationaal Research Founndation of Koreaa (NRF) the HB LLC connverter in [6] and [7]. Thiss method basiccally
graant funded by the Korea governmeent (MSIP) (No. 2016R1A2B20103
2 328). utiliizes the frequeency control too regulate the ooutput voltagee. On
J.-I Baek, H.-S Youn and G.-W W. Moon are wiith the Korea Addvanced the other hand, during
d the holld-up time, it can obtain a high
Insstitute of Sciencee and Technologyy, Daejeon 305-7001, South Korea (e-mail:
[email protected]; [email protected]; [email protected]).
volttage gain by uusing the PWM M control scheeme. Howeverr, the
J.-K Kim is withh the Department oof Electrical Engiineering, Inha Uniiversity, PWWM control schheme causes noot only large ooffset current inn the
Inccheon, Korea (e-m mail: [email protected]). trannsformer but also large ccurrent stress on the exteernal
J.-B Lee is with Korea Railroad RResearch Institutee (KRRI), Uiwangg, Korea resoonant inductorr. Thus, it inccreases core llosses on bothh the
(e--mail:[email protected])

0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2631626, IEEE
Transactions on Power Electronics

traansformer andd external resonnant inductor ddue to their ennlarged

sizzed. To achievve a high voltaage gain withoout the offset ccurrent
in the transformmer, the methodd proposed in [8] and [9] reeplaces
wo diodes in thhe full-bridge rectifier (FBR
tw R) with synchrronous
sw
witches. In thiis method, repplaced two syynchronous sw witches
caan reduce the secondary coonduction losss. Moreover, dduring
the hold-up tim me, they are aable to increaase the voltage gain
wiithout the trransformer ooffset currentt by adoptinng the (a)
phhase-shifted ccontrol schem me. However,, this methodd also
increases the core loss of the eexternal resonaant inductor beecause
the phase-shifteed control scheeme results inn large currentt stress
onn the external resonant induuctor. Finally, in [10], addditional
auuxiliary LC cirrcuit is studiedd. In this methhod, the magneetizing
inductance is vaaried by the sswitching freqquency. Thus, it can
mprove the eff
im fficiency of thhe HB LLC cconverter withh large
efffective magnnetizing inducctance, whilee obtaining a high
vooltage gain with
w small efffective magnnetizing induuctance
duuring the hoold-up time. Nevertheless,, this method has
addditional core aand conductioon losses in thee auxiliary circcuit. In
adddition, it causses large prim
mary current sttress on the exxternal
resonant inductoor. Therefore, it is also diffiicult to accompplish a
high efficiency.
IIn this paper, a boost PFC sstage which caan be utilized as the
HB B converter iss proposed to aachieve a highh efficiency HB B LLC
coonverter. The pproposed PFC C stage can bee effectively dderived
(b)
byy replacing a boost diode and inductor with a switcch and
traansformer, resspectively. WWhen the AC lline is supplieed, the
prroposed PFC stage basicallly operates likke the convenntional
booost PFC convverter. Thus, it provides nom minal link voltaage for
the HB LLC coonverter at the normal state.. On the otherr hand,
duuring the hold--up time, the pproposed PFC stage can deplloy the
inactive boost P PFC converterr as the HB coonverter, whicch can
coover wide link voltage rangee instead of thee HB LLC converter.
Ass a result, becaause the HB L LLC converter operates onlyy at the (c)
noormal state, itt can be dessigned with a large magneetizing Figg. 2. Derivation off proposed PFC sttage. (a) Boost PF
FC converter with boost
diodde. (b) Boost PFC converter with syynchronous switchh and HB convertter. (c)
inductance and narrow switcching frequenccy variation w without
Propposed PFC stage.
abbovementionedd drawbacks.
This paper is improved verrsion of the papper reported inn [11].
Coompared to the previous papper, the analyssis and experim mental the bboost inductorr LB, boost swiitch QB, boost diode DB, andd link
results are new wly added, and the oveerall contents were capaacitor CLink. M Moreover, thhe input filterr capacitor Cin is
im
mproved. Thiis paper preesents derivattion and annalysis, generally employyed to decreasse the electrom magnetic-interrfere-
including operaational principples and desiggn example, of the nce (EMI) noise [12]-[13]. Meeanwhile, the bboost diode caan be
prroposed PFC sstage. Finally, the effectivenness of the prooposed repllaced with a synchronouus switch QS to reduce the
PFFC stage is connfirmed by thee experimentaal results. conduction loss of o the boost P PFC converterr, which has been
generally used [114], as depicteed in Fig 2(b).. From this figgure,
II. CONCEPT OF PROPOSED PFC
C STAGE wheen the boost PFC convertter with QS is arranged inn the
A. Derivation bilaateral symmetrric, the HB innverter can be easily deriveed by
Typically, thhe boost PFC converter is rrequired in PS SUs to subsstituting the bboost inductor LB with a booost transformeer TB.
saatisfy the harmmonic regulatioons and proviide the nominal link Theerefore, the booost PFC convverter can be eeffectively utillized
vooltage for the dc/dc stage at a the normal state. Howevver, as as thhe HB convertter in the propoosed PFC stagge, as shown inn Fig.
m
mentioned prevviously, since the t AC line iss lost, the boosst PFC 2(c)). As can be seeen in this figuure, the propoosed PFC stagee has
coonverter becom mes inactive aand the link vvoltage is decreased threee modificationns: 1) the boost diode DB is substituted wwith a
duuring the holdd-up time. Thhus, the dc/dc stage should cover syncchronous swittch QS, 2) thee boost inducctor LB is repllaced
wiide link voltagge range. On thet other handd, the proposed PFC withh a transformeer TB, 3) the rrectifier of thhe HB convertter is
staage enables thhe dc/dc stage tto operate onlyy at the normaal state addded to the seconndary side of the dc/dc stagge. From efficiiency
byy utilizing thhe inactive booost PFC connverter as thhe HB poinnt of view, altthough the booost transformeer can increasee the
coonverter efficieently during thhe hold-up tim
me. conduction loss of the proposedd PFC stage, thhe efficiency oof the
Fig. 2 shows the derivationn of the propossed PFC stage. First, propposed PFC can be sligghtly improvved because the
ass shown in Figg. 2(a), the booost PFC conveerter is compoosed of syncchronous swittch QS can com mpensate the cconduction losss.

0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Power Electronics

Figg. 3. Circuit diagrram of proposed P

PSU.

Fig. 5. Key waveform

ms of HBF convertter during hold-upp time.

induuctor Lm, rectiifier diodes D1 and D2, ouutput capacitorr CO,

andd output resistaance RO. Typiccally, LR is thee sum of a leaakage
induuctor of the transformer Llkg and an external resoonant
induuctor Lext. Furtthermore, one additional sw witch QA is added to
the secondary sidde of the propoosed PSU to im mplement ON//OFF
control of the HB BF converter.. Therefore, thhe HBF convverter
does not operate w when QA is turnned off at the nnormal state, while
w
it reegulates the ooutput voltage VO during the hold-up tim me by
turnning on QA. Froom power losss point of view w, since QA is series
connnected with ddiode DA, it caauses additional conductionn loss
(a)
duriing the hold-uup time. How wever, its impaact on the holld-up
timee operation iss negligible beecause the holld-up time is very
shorrt as well as thhe additional lloss is small.
C. O
Operational prrinciples
T
The basic operration of the pproposed PSU U can be classsified
accoording to statuus of the AC linne. For instancce, Fig. 4(a) shhows
the circuit diagram m of the propoosed PSU at thhe normal statte. In
this figure, since QA is turned off,o the propossed PFC stagee can
operate like the coonventional booost PFC convverter. On the other o
hand, during the hold-up time, the proposedd PFC stage caan be
utiliized as the HB BF converter by turning onn QA, as show wn in
Fig.. 4(b). As a reesult, the HBF F converter caan cover widee link
volttage range insttead of the HB B LLC convertter.
Inn this part, brieef operational principles of tthe HBF convverter
are presented to explain the deesign guidelinne of the propposed
(b) PFCC stage easily. Fig. 5 shows the key waveeforms of the H HBF
Figg. 4. Operation modes
m of propossed PSU. (a)At nnormal state. (b) During converter. From this figure, eeach switchingg period is sim mply
hold-up time. diviided into two iintervals i.e., t0-t1 and t1-t2, eexcept for the dead
timee between QB and QS. To perrform the modde analysis, sevveral
B. Implementatiion assuumptions are madem as follow
ws: 1) D1 andd D2 are turnedd off
The proposedd PFC stage ccan employ vvarious types of HB becaause the HB LLC L converterr has lower volltage gain thann the
coonverters. Amoong them, the HB flyback (H HBF) converteer with HBF F converter duuring the hold--up time. 2) VLLink, VO, and ouutput
a single-ended rrectifier is utilized to minimmize the compplexity currrent IO, and vooltage of input filter capacitoor VCin are consstant.
off the proposedd circuit in thiss paper. Thus,, the circuit diiagram Buiild-up period [t0-t1]:When QB is turned offf and QS is tuurned
off the proposedd PSU can be ddepicted as shown in Fig. 3.. From on aat t0, build-up period begins. Since VLink-V VCin is applied tto LB
this figure, thee HBF conveerter is compposed of two main andd LB-lkg, the reectifier diode DA is reverse biased, andd the
sw
witches QB andd QS, input fiilter capacitor Cin as the bloocking currrents of LB andd LB-lkg are giveen by
caapacitor, and boost transfformer TB inncluding the boost
inductor LB andd leakage inducctor LB-lkg [15]]-[16]. In case of the VLink VCin
iLBB (t ) iB Llkg (t ) iLB (t0 ) (t t0 ), (1)
HB B LLC converrter, it consistts of the primaary switches Q1 and ( LB LB lkg )
Q2, resonant inductor LR, ressonant capacittor CR, magneetizing

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Transactions on Power Electronics

where VCin is approximately DflyVLink, nfly and Dfly are the TABLE I
DESIGN PARAMETERS OF BOOST PFC CONVERTERS
transformer turns-ratio and duty cycle of the HBF converter,
respectively. Parameters Conventional Proposed
Meanwhile, the maximum flux density of the boost Boost switch, QS IPP60R125C6
transformer BLB-max can be expressed as Rectifier devices, DB/QS DB: SCS206AM QS: C3M006509J
Input filter capacitor, Cin 1F
LB iLB max
BLB max , (2) Core : EI36332
N1 ALB Boost inductor, LB
BLB-max : 0.35T
-
LB : 1mH
where iLB-max is the maximum current of iLB, N1 and ALB are the N1 : 27 turns
primary turns and effective cross-section area of the boost Core : EI36332
transformer, respectively. From (1) and (2), and Fig.5, it is BLB-max : 0.35T
Boost transformer, TB -
LB : 1mH, LB-lkg : 6H
obvious that BLB-max occurs at t1. N1 : N2 = 27 : 9
Powering period [t1-t2]: When QS is turned off and QB is turned Link capacitor, CLink 250F
on at t1, powering period begins. As shown in Fig. 5, LB-lkg and Hold-up time, tHold 18ms @ Full load condition
Link voltage, VLink 250-400V (VLink-nom : 390V)
Cin start to resonate. Thus, the difference of iB-Llkg(t) and iLB(t) is
reflected to the secondary current isec(t), and it can be expressed
as follows: 2 PO-max tHold
VLink-min (VLink-nom 0.5VLink-max ) 2 , (5)
(n flyVO D flyVLink ) CLinkdc dc
isec (t ) n fly [iB Llkg (t ) iLB (t )] n fly sin wR fly (t t1 ), (3)
Z R fly
where PO-max is the maximum output power, fLine is the line
where ZR-fly=(LB-lkg/Cin)0.5 and wR-fly=1/[(CinLB-lkg)0.5]. From (3) frequency, dc-dc is the expected efficiency of the dc/dc stage,
and Fig. 5, it is noted that if the powering period, i.e., and tHold is the hold-up time. Based on Table I, (4), and (5), the
(1-Dfly)TS-fly, is smaller than /wR-fly, the HBF converter is not link voltage range can be determined as 250-400V.
able to achieve the zero-current-switching (ZCS) operation of
B. HB LLC converter
DA.
Based on part III-A, the HB LLC converter in the
III. DESIGN CONSIDERATIONS conventional PSU, i.e., conventional HB LLC converter, should
be designed with 250-400V link voltage range to satisfy the
To illustrate the design procedure of the proposed PSU, the hold-up time requirement. On the other hand, the HB LLC
boost PFC, HB LLC, and HBF converters should be considered. converter in the proposed PSU, i.e., proposed HB LLC
Moreover, they are compared with the conventional PSU. The converter, can be designed to cover narrow link voltage range
design specifications are 180-264Vrms AC line and 480W/48V (375-400V) because the HBF converter can be in charge of
output. wide link voltage range (250-380V) during the hold-up time. In
A. Boost PFC converter this part, two HB LLC converters are designed and compared
The design procedure of the conventional boost PFC considering their link voltage range. Moreover, the resonant
converter is well described in [17], which can be also applied to inductor, resonant capacitor, and resonant frequency were
the proposed PFC stage. Table I shows the design parameters of selected as 40H, 78nF, and 90kHz, respectively, considering
the conventional and proposed boost PFC converters. The boost the frequency variation and voltage gain.
PFC converters employ silicon carbide devices to solve the B-1. Transformer turns-ratio nLLC
reverse recovery problems. The input filter capacitor Cin is The DC-conversion ratio of the HB LLC converter MLLC can
selected as 1F to reduce the EMI noise [12]. The boost be expressed as follows:
inductor LB is designed to be about 1mH using the amorphous VO 1
M LLC
EI3633 core for 30% inductor current ripple. Meanwhile, the VLink
2
2
2 2

proposed one has the additional boost leakage inductor LB-lkg, 2nLLC 1 1 1 f R LLC Q f S LLC f R LLC (6)
k f S LLC 8nLLC f R LLC f S LLC
2

which is measured as 6H in the experiment due to the

secondary turns N2 designed in the HBF converter part. where k=Lm/LR, Q=(LR/CR)0.5, and nLLC, fR-LLC, and fS-LLC are the
However it can be negligible because it is much smaller than LB. transformer turns-ratio, resonant frequency, switching
Furthermore, although the proposed one uses the synchronous frequency of the HB LLC converter, respectively. From (6),
switch QS, it does not degrade the regulation performance of the two features can be found. First, nLLC can be determined as 4
boost PFC converter because QS can be generally controlled because the HB LLC converter is commonly designed to
only to reduce the conduction loss. Finally, the 450V/250F operate near fR-LLC at the normal state. Second, MLLC is increased
capacitor is used as a link capacitor CLink. Thus, when the as fS-LLC is decreased so that lower fS-LLC is required to obtain a
nominal link voltage VLink-nom is regulated as 390V at the normal higher voltage gain.
state, the maximum ripple voltage VLink-max and minimum link B-2. Transformer magnetizing inductance Lm
voltage VLink-min can be calculated by In the HB LLC converter, the transformer magnetizing
PO-max inductance Lm should be designed as large as possible because a
VLink-max , (4) large Lm can reduce the primary conduction and switch turn-off
2 f Line CLink dc-dcVLink-nom
losses. However, from (6), a large Lm makes difficult the HB
LLC converter achieve high voltage gain due to large k, as

0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Power Electronics

B-3. Transformerr core

In general, the trransformer coore can be seleccted using the area
prodduct value, w which is the prroduct of the window areaa and
effeective cross-seection area of the transform mer core. Thuss, the
areaa product of tthe transform mer AP-Trans cann be expresseed as
folloows:
L i 1 2iD1-rms
APP-Trans m Lm-mmax iLR-rrms , (8)
Bmax KU J nLLC
wheere Bmax-Trans iis the maxim mum flux denssity, iLm-max iss the
maxximum magneetizing currennt, iLR-rms is tthe primary R RMS
currrent, iD1-rms is the secondaryy RMS currennt of D1, KU iss the
winndow utility facctor, and J is tthe current dennsity. Typicallly, as
the switching freequency fS-LLC is decreased from the resoonant
freqquency fR-LLC, tthe currents ppeak of the HB B LLC convertter is
alsoo increased. Thhus, iLm-max, iLRR-rms, and iD1-rmms are maximizzed at
its mminimum linkk voltage, whhere is the deesign point off the
Figg. 6. DC-conversiion ratio of HB LL
LC converter accoording to fS-LLC annd Lm .
trannsformer core [8]-[9].
TABLE
A II M
Meanwhile, thhe conventionaal HB LLC coonverter has llarge
TRANSFO
ORMER CORE DES
SIGN OF HB LLC CONVERTERS iLm-mmax, iLR-rms, andd iD1-rms becausse its operatingg frequency is very
Parameteers C
Conventional d
Proposed smaall at VLink-min, as shown in Fig. F 6. On thee other hand, sinces
the proposed H HB LLC convverter operattes near resoonant
Design pooint VLink: 250V VLink: 375V
V
M
Magnetizing induuctance, Lm 180H 440H
freqquency at VLinkk=375V, it hass small iLm-max, iLR-rms, and iD1-rms
D .
Max. magnetizingg current,
Thuus, as shown inn Table II, the proposed HB LLC converteer has
3.24A 1.27A smaaller area prodduct than the coonventional onne. As a resultt, the
iLm-max
Max. flux densiity, Bmax 0.2T propposed HB LL LC converter can utilize sm maller transformer
Window utility fafactor, KU 00.3 coree (PQ2620) thaan conventionnal one (PQ26225), which redduces
Current denssity, J 10000A/cm2 the transformer coore loss.
Primary RMS current,
c
4.48A 3.00A B-4. External resoonant inductor core
iLR-rms
Secondary RMSS current,
10.10A 8.25A T
The external reesonant core caan be also desiigned with thee area
iD1-rms prodduct value likee the transform mer core desiggn, as follows:
4
Area product, AP-Trans 9248.55mm 6641.35mmm4
Selected transforrmer core PQ2625(9548mm4) PQ2620(6825mm4) LR iLR-maxx iLR-rms
AP-LR
P , (9)
Bmax KU J
shhown in Fig. 6.
6 In this figurre, the solid linne is for a larrge Lm,
annd the dotted lline is for a sm mall Lm. As seen in this figgure, a wheere AP-LR is thee area product of the externall resonant induuctor
larrge Lm cannot achieve conveentional maxim mum gain at VLink-min. andd iLR-max is the maximum
m prim
mary current. From
F (9) and T
Table
Thhus, Lm in the conventionaal HB LLC cconverter shouuld be II, tthe conventionnal HB LLC coonverter requiires larger exteernal
smmaller consideering the peakk voltage gainn to cover widde link coree size (AP-LRR=3176mm4) than the prooposed HB LLC
vooltage range. With
W a sufficieent margin, Lm of the convenntional converter (AP-LR=1114mm4). Thherefore, the proposed
p convverter
HB B LLC converrter can be seleected as 180H. can also reduce thhe core loss off the external inductor.
i
On the other hand,
h due to naarrow link volltage range, Lm in the C. H
HBF converterr
prroposed HB LLC convertter can be ddetermined onnly by
coonsidering thee ZVS conditions of the primary p switchhes as The HBF convverter shares the structure of the boost PFC
T
foollows: converter in the proposed
p PFC stage. Thus, thet HBF convverter
shouuld not influennce on the dessign proceduree of the boost PFC
nLLCCVO tdead
Lm , (7) converter. Abovee all, it has to rregulate the output voltage with
8COSS VLinnk-max f S-LLC-Max desiigned parametters of the booost PFC converrter. Thereforee, for
whhere tdead is thee dead time beetween the primary switchess, COSS utiliizing the HBF F converter efffectively, the transformer tturns
is the output cappacitance of tthe primary sw witches, and VLink-max ratioo nfly and swiitching frequeency fS-fly of thhe HBF convverter
annd fS-LLC-Max aare the maxim mum link voltage and swiitching shouuld be designned consideriing followingg features: 1)) the
freequency, resppectively. From m (7), if tdead is 110ns, COSS is DC--conversion raatio of the HB BF converter,, 2) the maximmum
1225pF, and fS-LLC-Max is 110kHHz, maximum Lm can be calcculated currrent stresses of LB and DA, 33) the ZCS conndition of DA.
ass 480H. Thuss, Lm can be chhosen as 440 H with a marrgin in C-1. DC-conversiion ratio of HB HBF converter
the proposed HB B LLC convert rter. From Fig. 6, despite of a large The DC-conveersion ratio of the HBF convverter MHBF caan be
T
Lm, the proposeed maximum gain is suffi ficiently obtainned at variied by fS-fly or the duty cyclee Dfly, which can
c be respectiively
VLLink=375V. As a result, the proposed HB LLC convertter can expressed as folloows:
m
more reduce thee primary condduction and sw witch turn offf losses
VO 2 0.5
1 A(1 1 / f n2 fly ) B 2 f n fly 1 / f n fly
2
coompared to thee conventionall HB LLC convverter becausee it can M HBF (10)
VLink
bee designed witth a larger Lm [8]-[10].
[

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2631626, IEEE
Transactions on Power Electronics

volttage gain witth frequency control becauuse A and B are

alreeady designed in the boost P PFC converterr. Therefore, inn the
propposed PFC sttage, the HBF F converter shhould be desiggned
withh variable dutyy cycle and fixxed switchingg frequency control
baseed on (11). In this case, nfly should be designed to guaraantee
thatt MHBF is nott to be sensitiive to the sw witching frequuency
variiation for achhieving stable operation. Fiig, 7 shows MHBF
accoording to fS-flyy and nfly. As shown in thiss figure, whenn nfly
becoomes smaller,, MHBF is moree sensitive to fS-fly, which m means
smaall variation oof fS-fly can afffect the operration of the H HBF
converter. As a result,
r a large nfly is recomm mended to achhieve
stabble output volttage regulationn of the HBF converter neaar its
swittching frequenncy.
C-22. Maximum cuurrent stressess of LB and DA
UUsing (1), (3), aand Table I, thhe maximum ccurrent stress of o the
booost inductor LB and secondaary diode DA ccan be depicteed in
F
Fig. 7. DC-conversion ratio of HBF
F converter accordding to fS-fly and nfly
Fig.. 8. From this figure, iLB-max is increased aas nfly is decreaased.
f .
Esppecially, whenn nfly is smalleer than 2.8, iLB-max of the H HBF
converter exceedss that of the booost PFC convverter at the noormal
statee. Thus, it can
c cause thee core saturattion of the bboost
trannsformer. Abovve all, it has im mpact on the ddesign proceduure of
the boost PFC connverter. On thhe other hand, as nfly is increaased,
sincce iDA-max is allso increased, too large nfly can result in high
currrent stress on DA. Thereforee, medium nflyly is appropriaate to
reduuce the currennt stresses of LB and DA.
C-33. ZCS conditioon of DA
TThe reverse recovery probleem of DA can cause severe EMI
noisse and high voltage and current stressses on the PSU
[18]]-[19]. Thus, tto eliminate it, the ZCS conddition of DA shhould
be considered. B Based on (3), Fig. 9 preseents the switcching
freqquency fS-fly to obtain the ZC CS operation oof DA accordinng to
nfly. From this figgure, when nffly is smaller than t 2.4, the ZCS
operation of DA ccannot be achiieved because fS-fly is larger than
F
Fig. 8. Maximum ccurrent stresses of LB and DA accorrding to nfly. the rresonant frequuency fR-fly, i.e.., above regionn operation. Onn the
otheer hand, whenn nfly is larger than 4.3, fS-flyy becomes sm maller
thann audible freqquency, i.e., 200kHz. Therefoore, to achievee the
ZCS S operation off DA, it is desiraable that nfly iss designed betw
ween
2.4 and 4.3.
Inn summary, bbased on Partt C-1~C-3, tooo large nfly orr too
smaall nfly can cauuse susceptiblee DC-conversiion ratio and llarge
currrent stresses of DA and LB. Thus, nfly is recommennded
betwween 2.8 and 33.5. In this exaample, nfly is seelected as 3, which
w
makkes the seconndary turns of the boost ttransformer N2 be
chosen as 9 turns.. For this reasoon, the primaryy wire of the bboost
trannsformer shoulld be thinner thhan the wire of o the conventiional
booost inductor, w which can leaad to large w wire resistancee and
conduction loss. H However, the increased
i condduction loss caan be
commpensated by QS in the proposed PFC stagge.

IV. EXPERIMEENTAL RESULTTS

F
Fig. 9. Switching frequency
f for ZCS operation of DA according to nfly. T
To confirm thee validity of thhe proposed PPFC stage, a 480W
prottotype PSU w with the specifiications of 1800-264Vrms AC
C line
VO D fly andd 48V/480W output has been b built and tested. Forr the
M HBF , (11) commparison, the prototype off the conventiional PSU is also
VLink n fly
impplemented. Thee designed parrameters are prresented in Taable I
whhere A=LB-lkg//LB, B=2IOZR/[2(nfly)2VO], fn-fly=fS-fly/fR-flyy, and andd Table III, and MBRB402550T and IRFB B4321 are usedd for
fR--fly is the resonnant frequencyy of the HBF cconverter. As can be the secondary dioode DA and addditional switchh QA, respectivvely.
seeen in (10), the HBF converrter is limited in obtaining a high Bassed on Sectionn III-A and III-C,
I the prooposed boost PFC

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Transactions on Power Electronics

TA
ABLE III
DESIIGN PARAMETERSS OF HB LLC CON
NVERTERS

Parametters Conventional Proposed

Primary switchees, Q1 & Q2 IPA600R280E6
Secondary diodees, D1 & D2 STPS
S30150
C
Core : PQ2625 Core : PQ26220
Lm: 180.41H Lm: 440H H
Transforrmer
Llkg: 3.87 H Llkg: 4.05H
H
((a)
NP:NS:NS=24:6:6 NP:NS:NS=24:6:6
External resonannt inductor, Coore : CM203060 Core: CM1720026
Lext Lext: 35.18H Lext: 35.51HH
Resonant capaacitor, CR 788nF
Digital conntroller TMS3220F28069

((b)
Figg. 11. Experimentaal waveforms undder 100% load conndition at normal state.
(a) C
Conventional HB L LLC converter. (bb) Proposed HB L
LLC converter.

Fig. 10. Control bllock diagram of P

PSU with proposedd PFC stage.

coonverter has thhe same param meters with thee conventionall boost
PFFC converter eexcept for thee wire N1 of thhe boost transfformer ((a)
annd boost inducctor: 1) the coonventional bboost PFC connverter
usses 0.1 2550 Litz wire, 2) the prooposed one utilizes u
0.1100 Litz wire due to the secondaryy turns of the boost
traansformer N2.
Fig. 10 showss the control bllock diagram of
o the proposeed PSU.
Frrom this figuree, when the AC C-Loss signal is low at the nnormal
staate, QB and QS are controlleed by the PFC controller andd QA is
turned off. Morreover, Q1 annd Q2 are conntrolled by thee LLC
coontroller. On thhe other handd, QB and QS are
a controlled by the ((b)
HB BF controller and QA is turnned on when thhe AC-Loss siggnal is Figg. 12. Experimental waveforms undder 10% load conndition at normal state.
high during the hold-up time (a) C
Conventional HB LLLC converter. (bb) Proposed HB L
LLC converter.
Fig. 11 and Fiig. 12 show thhe experimentaal waveforms of the
F
coonventional annd proposed H HB LLC convverters under 100%
annd 10% load condition
c at thhe normal staate, respectiveely. As
shhown in these figures, the pproposed HB L LLC converterr has a
smmaller magnetiizing iLm and primary iLR cuurrents compaared to
the conventionnal HB LLC converter ovver the entiree load
coonditions due to its large magnetizing
m indductance. Thuus, it is
deemonstrated thhat a large maagnetizing indductance reducces the
prrimary conducction and sw witch turn-offf losses. Fig. 13(a) ((a)
shhows experimeental waveforrms of the HB BF converter in the
prroposed PSU at a the minimum m link voltage (VLink=250V). From
this figure, the HBF converteer achieves thhe ZCS operattion of
DA with designned parameterrs. Finally, Fiig. 13(b) show ws the
m
mode transient w waveforms off the proposedd converter whhen the
AC C line is lost. From this figuure, the measuured hold-up ttime is
199.74ms, whichh satisfies the hhold-up time rrequirement.
Fig. 14 showws the measureed efficiency of the convenntional
annd proposed P PSUs in the normal state att 230Vrms wheere the ((b)
PSSU usually opperates. The effficiency was measured witth two Figg. 13. Experimentaal waveforms of H
HBF converter duuring hold-up tim
me. (a)
poower analyzerrs, i.e., Yokoggawa WT30000 and WT16000, for Steaddy state. (b) Mode transition

0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2631626, IEEE
Transactions on Power Electronics

V. CONC
CLUSION
Inn this paper, a boost PFC sttage which cann be deployedd as a
HB converter is pproposed to im mprove the effficiency of thee HB
LLC C converter. T The proposed P PFC stage is simply deriveed by
repllacing a boost diode andd inductor wiith a switch and
trannsformer, resppectively. Durring the hold--up time, thee HB
converter can reggulate the ouutput voltage, and the HB LLC
converter is turneed off. Thus, the HB LLC C converter caan be
desiigned with a large magneetizing inducttance and naarrow
swittching frequenncy variation,, which enablles it to achieeve a
highh efficiency aat the normal state. Furtherm more, becausee the
(a) propposed PFC staage can applyy various HB converters, itt can
alsoo obtain a hiigh compatibbility. Therefoore, the propposed
metthod is expecteed to be very aattractive in P
PSUs which shhould
satissfy the hold-uup time requireement.

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L Converter. (cc) Overall efficienncy of PSU. [8] H. Wu, T. Mu, X. Gao, and Y. Xing, A Secondaryy-Side
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effficiency than the conventioonal one becauuse the synchrronous [9] J. W. Kim and G. W. Moon, A A New LLC Seriees Resonant Connverter
swwitch QS reduuces more connduction loss than the increased with a Narrow Switching Frequeency Variation and Reduced Conduuction
booost transform
mer conductioon loss. In caase of the HB B LLC Losses, IEEE Trans. Power Ellectron., vol. 29, no. 8, pp. 4278--4287,
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coonsiderably improved eefficiency compared too the [10]] D. K. Kim, S. C.C Moon, C. O. Y Yeon, and G. W. M Moon, High Efficciency
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0885-8993 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2016.2631626, IEEE
Transactions on Power Electronics

[14] J. Yang, E Efficiency Improovement with GaN-Based SSF FET as Gun-Woo M Moon (S92-M00)) received the M.S S. and
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P Electron, vvol. 30, no. 2, pp. 657-667, Feb. 20015.

Jae-Il Baek (S14) receivedd the B.S. degree in the

Electronics and Electriccal Engineeringg from
Sungkyunkkwan University, Suwon, Korea iin 2007,
and the M M.S. degree in D Department of Electrical
Engineeringg from KAIST, Daejeon,
D Korea iin 2015.
He is curreently working tow ward the Ph.D. deegree in
KAIST, Daaejeon, Korea. Hiss research interessts are in
the areas oof power electroonics, particularlyy dc/dc
converters, ac/dc converterrs, LED driver, battery
chargers, annd digital control approach of convverters.

Jae-Kuk K Kim (S08-M15) received the B.S. degree

in the Elecctrical Engineerinng from Inha University,
Incheon, K Korea in 2004, aand the M.S. andd Ph.D.
degrees in Electrical Enginneering from thee Korea
Advanced Institute of Sccience and Techhnology
(KAIST), D Daejeon, in 20077 and 2011, respeectively.
From 20111 to 2015, he was w a senior engiineer in
Samsung E Electro-Mechanics, Suwon, Koreaa. He is
currently ann Assistant Professsor in the departtment of
Electrical Engineering, Inhha University, IIncheon,
Koorea. His researchh interests include converter topology design, soft-swwitching
tecchnique, display driving system, sserver power systtem, and battery charger
sysstem.

Jae-Bum Leee (S12) was boorn in Korea, in 1983. He

received the B.S. degree in thhe Electrical Engiineering
from Korea University, Seouul, Korea in 2010 and the
M.S. and Phh.D. degrees in thhe Electrical Engiineering
from the Koorea Advanced Institute
I of Sciennce and
Technology (KAIST), Daejeeon, Korea in 20012 and
2016, respeectively. He is currently workking as
researcher in Korea Railrroad Research IInstitute
(KRRI), Uiw wang, Korea. Hiss main research interests
i
include highh voltage/power ttransformer desiggn, high
efficiency A
AC/DC and DC/D DC converters, andd digital
conntrol method in hhigh power vehiccles such as elecctric vehicles andd rolling
stoock.

Han-Shin Youn (S14) recceived the B.S. deegree in

the Electriccal Engineering frrom Hanyang University,
Seoul, Koorea in 2010 annd the M.S degree in
Departmennt of Electrical Enngineering from KAIST,
Daejoen, K Korea in 2012. He H is currently working
w
toward the Ph.D. degree in KAIST, Daejoen, Korea.
His main rresearch interestss are AC/DC connverters,
DC/DC connverters, drive syystem, and digitall control
method.

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