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Saint Michael'S College of Laguna: Institute of Computer Studies Course Plan in CS2G

This document outlines the course plan for CS2G Computer Architecture and Organization at Saint Michael's College of Laguna for the second semester of the 2016-2017 academic year. The course is 3 credit units and will cover the basic structure of digital computers, including the control unit, arithmetic logic unit, memory unit, and input/output unit. Students will learn about computer evolution, data representation, processor and system design, fixed and floating point arithmetic, control unit design, and memory systems. Assessment tasks will include quizzes, assignments, group activities, and a midterm exam.

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0% found this document useful (0 votes)
62 views7 pages

Saint Michael'S College of Laguna: Institute of Computer Studies Course Plan in CS2G

This document outlines the course plan for CS2G Computer Architecture and Organization at Saint Michael's College of Laguna for the second semester of the 2016-2017 academic year. The course is 3 credit units and will cover the basic structure of digital computers, including the control unit, arithmetic logic unit, memory unit, and input/output unit. Students will learn about computer evolution, data representation, processor and system design, fixed and floating point arithmetic, control unit design, and memory systems. Assessment tasks will include quizzes, assignments, group activities, and a midterm exam.

Uploaded by

Innovator Adrian
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
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SAINT MICHAELS COLLEGE OF LAGUNA

OLD NATIONAL ROAD, CITY OF BINAN, LAGUNA

INSTITUTE OF COMPUTER STUDIES

Course Plan in CS2G


Second Semester, A.Y. 2016 - 2017

Course Code CS2G Course Title Computer Architecture and Organization

Credit Units/No. of Hrs. 3 units/54 hrs. Course Pre-requisites


Course Description To discuss the basic structure of a digital computer and to study in detail the organization of the Control unit, the Arithmetic and Logical unit, the Memory
unit and the I/O unit.

Course Intended Learning The students who succeeded in this course will be able to;
Outcomes
To understand and learn of the basic structure and operation of a digital computer.
To discuss and implement in detail the operation of the arithmetic unit including the algorithms &
implementation of fixed-point and floating-point addition, subtraction, multiplication & division.
To evaluate the detail the different types of control and the concept of pipelining.
To evaluate the hierarchical memory system including cache memories and virtual memory.
To develop the different ways of communicating with I/O devices and standard I/O interfaces.
Preliminary Period
Period Desired Learning Assessment Tasks Learning Content Teaching/Learning Resources References Remarks
Outcomes (ATs) Activities (TLA)
Prelim Period
Week 1 Understand the mission Recitation SMCL Vision and
and vision of SMCL and Mission Discussion Lecture Room with
how the ICS Vision and ICS Vision and Mission LCD Projector
Mission attain with the Program Outcomes
Program Outcomes Course Intended
Explain the requirement Learning Outcomes
of course syllabus and Course Requirement
the intended learning
outcome

Week 2 Introduction to data Quiz and recitation Evolution of Discussion Lecture Room with 1 . John P.Hayes,
Computer architecture and
evolution of computer Computers LCD Projector Organisation, Tata
VLSI Era, System McGraw-Hill, Third edition,
2010.
Design
Register Level
Week 3 Computing and Quiz and assignment Processor Level Discussion Lecture Room with 1 . 1 . John P.Hayes,
Computer architecture and
Computers, Evolution of CPU Organization LCD Projector Organisation, Tata
Computers Data Representation McGraw-Hill, Third edition,
2010.
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 4 System Design- Register Recitation and Quiz Booths algorithm Discussion Lecture Room with 1 . 1 . John P.Hayes,
Computer architecture and
Level, Combinational and LCD Projector Organisation, Tata
Sequential ALUs, McGraw-Hill, Third edition,
2010.
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 5
Midterm Period
Week 6 Fixed Point Arithmetic, Group activity and quiz Non-restoring Discussion Lecture Room with 1 . John P.Hayes,
division algorithm LCD Projector Computer
Modified booths architecture and
Algorithm Organisation, Tata
McGraw-Hill, Third
edition, 2010.
Week 7 Identify the Hardwired Activity and assignment Control Unit Discussion Lecture Room with 2. V.Carl Hamacher,
Control, Nano Programming LCD Projector Zvonko G. Varanesic
Microprogrammed Superscalar and Safat G. Zaky,
Control, Processing Computer

Week 8 Identify the Multiplier Conduct study about Access Memories Discussion Lecture Room with 1 . 1 . John P.Hayes,
Computer architecture and
Control Unit, CPU CPU and Control unit RAM Interfaces, LCD Projector Organisation, Tata
Control Unit, and discuss on class McGraw-Hill, Third edition,
2010.
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 9
Pre Final Period
Week 10 Identify the Pipeline Quiz and recitation Pipeline Discussion Lecture Room with 1. 1 . John P.Hayes,
Computer architecture and
Control, Instruction Performance LCD Projector Organisation, Tata
Pipelines McGraw-Hill, Third edition,
2010.
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer Organisation,
V edition, McGraw-Hill Inc,
2010.

Week 11 Differentiate Random Group activity and Cache & Virtual Discussion Lecture Room with 1 . John P.Hayes, Computer
architecture and
Access Memories, assignment Memory LCD Projector Organisation, Tata
Serial - Access Memory Allocation McGraw-Hill, Third edition,
2010.
Memories, Associative 2. V.Carl Hamacher,
Memory. Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 12 Understand RAM Quiz and recitation Random Access Discussion Lecture Room with 1 . John P.Hayes, Computer
architecture and
Interfaces, Magnetic Memories, Serial LCD Projector Organisation, Tata
Surface Recording, - Access McGraw-Hill, Third edition,
2010.
Memories,
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 13
Final Period
Week 14 Understand the Internet Quiz and Recitation Associative Discussion and seatwork Lecture Room with 1 . John P.Hayes, Computer
architecture and
traffic data and Memory. LCD Projector Organisation, Tata
multimedia payloads Communication McGraw-Hill, Third edition,
2010.
methods
2. V.Carl Hamacher,
IO interface circuits Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 15 Identify the Assignment and Handshaking Discussion Lecture Room with 1 . John P.Hayes, Computer
architecture and
Communication Recitation PCI interrupts LCD Projector Organisation, Tata
methods, Buses, Bus McGraw-Hill, Third edition,
2010.
Control
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 16 Understand the Bus Quiz and Recitation RISC and CISC Discussion Lecture Room with 1 . John P.Hayes, Computer
architecture and
arbitration, IO and processors LCD Projector Organisation, Tata
system control Bus arbitration McGraw-Hill, Third edition,
2010.
2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 17 Identify the DMA and Submit research about Superscalar and Discussion Lecture Room with 1 . 1 . John P.Hayes,
Computer architecture and
interrupts, vectored DMA and recitation vector processor LCD Projector Organisation, Tata
interrupts, operation systems McGraw-Hill, Third edition,
2010.
multiprocessors, 2. V.Carl Hamacher,
Zvonko G. Varanesic
and Safat G. Zaky,
Computer
Organisation, V edition,
McGraw-Hill Inc, 2010.

Week 18 Final Examination / Remediation/Accomplishment of Requirements


COURSE REQUIREMENTS
Midterm and Final Exams 1/3 OTHER REQUIREMENTS:
Quizzes 20%
Long test 30% Develop assembly code when trigger will stop all Input device that has old driver like mouse and keyboard and research about how it will help in
computer science word
Performance 20% 2/3
Behavior 10%
Project 10%
Attendance 10%

GRADING SYSTEM:
PG =2 ( CS) +XG FG= PG1+PG2 CS= Attendance (10%) + Behavior (10%), + Performance ( 20%) +Quizzes (20%) + Long Test (30%) + Project (10%)
3 2 CS = Attendance (10%) + Behavior(10%) + Project (50%) = Long Test (30%) for courses that are output based.
GRADE POINT
1.00 99-100 1.75 90-92 2.50 81-83 4:00 Conditional AW authorized withdrawal NG no grade
1.25 96-98 2.00 87-89 2.75 78-80 5:00 Failed UW unauthorized withdrawal NC no credit
1.50 93-95 2.25 84-86 3.00 75-77 FA Failure due to absences INC Incomplete

Prepared by: Checked and Recommended by: Approved:

ADRIAN D EVANCULLA MARIA LINDA D. PIO


Signature Over Printed Name Associate College Dean ROSALINA M. DE GUZMAN, Ph.D.
College Dean/IELA Administrator
Date: June Nov 5,2016
Reviewed and verified by:

ANNA LIZA A. RAMOS, DBA, MIT REYNANTE M. FRANCIA MICHAEL JESSIE THEODORE A.
SESE
ICS Administrator Faculty Faculty
Date: Nov 7, 2016
Revised No: 2 Effectivity Date June 10, 2015 Second Semester, A.Y 2016-2017

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