LAN7500i Reference Design: Schematic Revision 0.82
LAN7500i Reference Design: Schematic Revision 0.82
LAN7500i Reference Design: Schematic Revision 0.82
ITEM Page
Title Page 1
LAN7500i 2
B B
A A
Title
Title Page
Size Engineer Assembly No. Rev
C R. W. 0.82
VDD12USBPLL
LAN7500i + Ethernet
VDD12PLL
+1.2V
+1.2V VDD12A +2.5V VDD33A
+2.5VA +2.5V
FB1
1 2
11
20
23
30
36
17
49
50
45
48
53
56
19
24
37
15
8
1
U1
C1 C2
VDD12PLL
VDD12CORE
VDD12CORE
VDD12CORE
VDD12CORE
VDD12CORE
VDD12CORE
VDD12USBPLL
VDD12BIAS
VDD12A
VDD12A
VDD12A
VDD12A
VDDVARIO
VDDVARIO
VDDVARIO
VDDVARIO
VDD33A
1
R7 R1 R8 R2 R9 R3 R4 R5 0.01uF 0.1uF
49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9 25V 16V
D D
R10 1/10W 1/10W 1/10W 1/10W 1/10W 1/10W 1/10W 1/10W 10% 10%
2
8.06K 1% 1% 1% 1% 1% 1% 1% 1%
1/10W T1
2
1% THIS SIDE PHY
ETHRBIAS 41 1 2 11 + + 14
44 TR0P 10 15
TR0P TR0N CT CT
TR0N 43
GPIO11 25 12 13
GPIO10 GPIO11 TR1P - - P1
22 GPIO10 TR1P 47
GPIO9 21 46 TR1N 8 17
GPIO8 GPIO9 TR1N + +
18 GPIO8 1 RJ1 GND 11
GPIO7 10 52 TR2P 7 18 2 12
GPIO6/PME_MODE_SEL GPIO7 TR2P TR2N CT CT RJ2 GND
40 GPIO6/PME_MODE_SEL TR2N 51 3 RJ3
GPIO5/PME 38 9 16 4
+2.5V GPIO4/LED4 GPIO5/PME TR3P - - RJ4
35 GPIO4/LED4 TR3P 55 5 RJ5
GPIO3/LED3 34 54 TR3N 5 20 6 9
GPIO2/LED2 GPIO3/LED3 TR3N + + RJ6 MTG1
33 GPIO2/LED2 7 RJ7 MTG2 10
1
R6 GPIO1/LED1 32 R11 4 21 8
10.0K GPIO0/LED0 GPIO1/LED1 12.0K CT CT RJ8
31 GPIO0/LED0
1/10W 1/10W 6 19
1% 1% - -
16 1 2 2 23 Stewart SS-6488S-A-NF
2
1
TG1G-E012NZRL R14 R15 R16 R17
1
DNP DNP DNP DNP 75.0 75.0 75.0 75.0
C3 C4 C5 C6 1/10W 1/10W 1/10W 1/10W
39 0.022uF 0.022uF 0.022uF 0.022uF 1% 1% 1% 1%
TDO TEST 50V 50V 50V 50V
4
2
TMS TDO 10% 10% 10% 10%
3
2
TCK TMS
2 TCK
TDI 1 6
TDI XO R19
GND/EP
C
XI 5 C
1
SW_MODE 9 1 2 1 2
SW_MODE C9
1
VDD33A Y1 1000pF
3
LAN7500i C7 25MHz C8 0 2kV
57
NOTE: 1210
+2.5V 30pF 30pF -20% +80%
2
C3-C6 are optional. In an EMI constrained
1
R12 50V 50V
4.75K 2 1 R20 TMS 10.0K 5% 5% environment, populate these capacitors.
2
4.75K 2 1 R22 TDI
These components must be placed close to
4.75K 2 1 R23 TCK the transformer.
2
VBUS_DET
LEDS +3.3V
Upstream Optional +2.5V
POR Monitor PME Header
uWire EEPROM EECS
FDUPLEX
GPIO4/LED4 1 2 1 2 +2.5V +1.2V +3.3V
1
R33
LED1 Green LED LED_0805 332 R24 10.0K
VCC
1
+5V FB2 VCC_USB EEDO 3 4 EEDI 1/10W R32
DI DO
1
P2 1% 49.9K
LNK EECLK
1 2 1 2 1/10W C39 C38
2
GPIO3/LED3 1 VCC SK 1% 0.1uF 0.1uF J1
2 1 2
1
2
LED2 Green LED LED_0805 332 R25 C10 USBDP D- CS 10% 10% GPIO6/PME_MODE_SEL
3 6 2
2
1.0uF D+ NC nRESET/PME_CLEAR GPIO5/PME
7 6 1 3
GND
16V NC +2.5V V33 nRST VBUS_DET
LNKA/ACT_ONLY 4 GND 4 V12 4
10% 5 5
C11
2
GPIO2/LED2 1 U2 RSTIN(0.714)
2 1 2 5 3 2
5
SHLD1 nMR VSS 1x5
1
1 2 6 93AA66A-I/SN R42 Thresholds:
LED3 Green LED LED_0805 332 R26 SHLD2 SOIC-8 C23 20.0K STM6719SFWB6F
USB Type-B Right Angle 0.1uF 1/10W VCC1 = 2.925V 140ms
B B
SPD1 0.1uF 16V AMP_292304-1 16V 1% VCC2 = 1.050V
10%
2
GPIO1/LED1 1 2 1 2 1 2 RSTIN = 0.625
LED4 Green LED LED_0805 332 R27 332 R28
GND_USB
SPD0
GPIO0/LED0 1 2 1 2
1
C16 R34 0 L1 2.2uH
1
C12 C13 C14 C15 C18 C19 C20 4.7uF 7 R30
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 16V EN1 360K C17
DEF1 5
16V 16V 16V 16V 16V 16V 16V 10% 1/16W 10uF
10% 10% 10% 10% 10% 10% 10% 0805 R31 0 1% 6.3V
R36
2
9 10 1 2 20%
2
EN2 SW2 L2 2.2uH 1 2
ADJ2 1
1
R35 DNP 0
348K
1
+2.5V +1.2V +1.2V SW_MODE_R 2 8 R37 C22
VDD12PLL MODE GND C21 360K 10uF 1/16W
GND_EPAD 11
FB6 22pF 1/16W 6.3V 1%
1 2 50V 1% 20%
2
5%
2
1
1 2
A C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 LP5900SD-3.3 A
0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF +5V LLP-6 +3.3V R39
16V 16V 16V 16V 6.3V 16V 16V 16V 16V 16V 16V 16V VR2 150mA 115K
10% 10% 10% 10% 20% 10% 10% 10% 10% 10% 10% 10% 6 1/16W
VOUT 1
2
VIN 1%
4 VEN
2 SW_MODE
R40 05 NC
NC
1
1
GND
PAD
10% 10%
2
SW_MODE_R Title
LAN7500i
Size Engineer Assembly No. Rev
C R. W. 0.82