Ma 5002 VZ
Ma 5002 VZ
Ma 5002 VZ
by the output stages rather than the power supply. ducts to deliver Vcc to the load and the high side NPN
Composite devices are constructed to function as gi- stage is off.
gantic NPN and PNP devices since the available cur-
rents exceed the limits of existing individual devices. The low side operates quite differently. The power sup-
ply bridge rectifier is not ground referenced. This al-
The devices connected to the load are referred to as lows the power supply to deliver +Vcc and Vcc from
high-side NPN and PNP and the devices connected the same bridge rectifier and filter as a total difference
to ground are referred to as low-side NPN and PNP. in potential, regardless of their voltages with respect to
Positive voltage is delivered to the load by increasing ground. The low side of bridge uses inverted feedback
conductance simultaneously in the high-side NPN and from the high side output to control the ground refer-
low-side PNP stage. At the same time, conductance of ence for the rails.
the high-side PNP and low-side NPN is being de-
creased. As the output swings positive, the output signal is fed
back to the low side and is inverted to drive the low
side with a negative signal. The negative signal causes
4.2.1 Grounded Bridge Operation the low side PNP to conduct (as the high side NPN con-
Figure 4.1 is a simplified example of Crowns patented ducts) shifting the ground reference toward Vcc until,
Grounded Bridge output topology (ignoring the articu- at the peak, Vcc = 0V. At this time +Vcc equals the full
lating characteristics of the VZ supply). It consists of potential (from rail to rail, not rail to ground) of the power
four quadrants of three-deep Darlington (composite) supply with positive polarity. Since the high side is de-
emitter-follower stages per channel: one NPN and one livering +Vcc to the speaker load (which is ground ref-
PNP on the high side of the bridge (driving the load), erenced at all times), the speaker sees the full potential
and one NPN and one PNP on the low side of the bridge developed by the power supply with a positive polarity.
(controlling the ground reference for the rails). The out-
put stages are biased to operate class AB+B for ultra When the input drive signal is negative and the high
low distortion in the signal cross-over region. side PNP conducts to deliver a negative voltage to the
load, that output is again fed to the low side and in-
The high side of the bridge operates similar to a con- verted to cause the low side NPN to conduct. As the
ventional bipolar push-pull output configuration. As the low side NPN conducts, +Vcc swings toward the 0V
input drive voltage becomes more positive, the high side ground potential. At the peak: +Vcc = 0V. At this time
NPN conducts current and delivers positive voltage to Vcc equals the full potential developed by the power
the speaker load. Eventually, full +Vcc is across the load. supply, but with negative polarity. Since the high side is
At this time the high side PNP is biased off. When the delivering Vcc to the speaker load, the load sees the
drive signal is negative going, the high side PNP con-
4-2 Circuit Theory 2000 Crown International, Inc.
130446-1 Rev. A MA-5002VZ Service Manual
full (negative) potential developed by the power sup- Q513, Q515, Q517, and Q536 are the HS NPN output
ply. devices. These devices are biased class B, in soft cut-
off. Together with driver and pre-driver, they function as
The total effect is to deliver a peak to peak voltage to a three-deep Darlington. The output devices work in
the speaker load which is twice the (static) voltage pro- parallel as a giant composite. The over-all bias topol-
duced by the power supply. Benefits include full utiliza- ogy is referred to as AB+B, originally conceived and
tion of the power supply (it conducts current during both patented by Crown engineers in 1966. This is still the
halves of the output signal; conventional designs re- most efficient, stable, and distortion free method used
quire two power supplies per channel, one positive and today in BJT output stages.
one negative), and never exposing any output device
to more than half of the peak to peak output voltage D506 is the flyback diode for the HS NPN output quad-
(which does occur in conventional designs). rant. In the event that a back EMF (flyback) pulse ex-
ceeds power supply voltage, the flyback diode will shunt
4.2.2 Output Stage Circuitry this voltage to the supply in order to protect the output
Circuitry on the positive and negative output modules devices.
include bias circuitry, current limit circuitry, last voltage
amplifiers (LVAs), pre-drivers, drivers, output devices, PNP pre-drivers, drivers, output devices, and flyback
and the Low Side error amp. Temperature sensors are diode D508 are a mirror image of the NPN side.
also mounted to the heatsinks via the output modules. Overall, the High Side of the bridge operates much like
The positive LVAs (Q501, Q502, and Q503) convert the a conventional output stage, but the Low Side (LS) is
negative output of the voltage translator stage to a posi- quite unique.
tive drive voltage for the NPN High Side (HS) predriver. The LS senses output voltage and common buss (0.04
There are three LVA transistors in parallel due to the ohms above ground) potential. The audio output is in-
very high voltages (therefore higher current and ther- verted by U503. Also in the U503 input circuitry are static
mal requirements) that are present when the power and dynamic balance controls. These controls provide
supply is in high voltage mode. D522 prevents the +LVAs a fine balance of the grounded bridge. Output of the
from producing a high negative output to the HS NPN op-amp drives the LS pre-driver circuits through the LS
stage. bias network.
Q507, Q508, and Q509 are the -LVAs and are arranged LS bias is controlled in a fashion similar to that of the
in mirror image to the +LVAs, including D513. HS. Two transistors, Q529 and Q530, fix LS bias volt-
On the positive side, D514, D515, and C506 via the age as measured from pin 15 (hot) to pin 13 of appli-
+LVAs act to limit slew rate. D514 and D515 also pre- cable ATE port TP1 or TP2. Potentiometer R556 adjusts
vent dangerously excessive current through the LVAs. bias in the LS.
D516, D517, and C507 are the negative HS mirror im- Diodes D504 and D505 control polarity of applied LS
age. drive signal. Via the bias transistors, signal is delivered
Q534 and Q540 provide two-speed current limiting in to the bases of the pre-drivers Q527 (NPN) and Q528
the output stage. Sense lines are arranged such that (PNP). Pre-drivers, drivers, and output devices in the
excessive current through any single HS output device LS operate class AB+B, exactly like the HS. The major
will result in current limit protection. Q535 and Q541 are difference is that rather than driving a load, the NPN
the negative side mirror image. and PNP stages control the ground reference for the
high voltage rails. As the HS NPNs conduct, LS PNPs
Q505 on the positive output module works in tandem conduct, and vice versa (as explained in section 4.2.1).
with Q505 on the negative output module as a Vbe
multiplier circuit. They produce and, with great stability, When the ODEP circuit senses that limiting drive is nec-
control bias for the High Side NPN and PNP devices. essary to prevent a dangerous thermal condition, it pro-
Potentiometer R505 is used to precisely set bias volt- vides an output which limits drive to the output stages.
age. Bias voltage is easily measured from pin 2 (hot) to For the HS, this limiting is accomplished on the main
pin 4 of ATE ports TP1 and TP2. Refer to Section 2 for module and is explained in section 4.4. For the LS, ODEP
appropriate test procedures. provides (via wires labeled LL) a signal which limits
bias feed to the LS output devices. This is accomplished
Q504 is the HS NPN pre-driver and Q511 is the HS through current mirrors Q532 and Q531 (LS NPN quad-
NPN driver. These devices are biased class AB for ul- rant), and Q542 and Q543 (LS PNP quadrant).
tra low distortion in the zero-crossing region.
4.3 VZ Power Supply The VZ supply is divided into segments to better match
VZ means Variable Impedance and is the name of the voltage and current requirements of the power tran-
Crowns patented articulated power supply technology. sistors. Remember that audio signals like music are
It enables Crown to pack tremendous power into just complex waveforms. Refer to Figures 4.2 and 4.3.
5.25 inches of vertical rack space. For music the average level is always much less than
A power supply must be large enough to handle the the peak level. This means a power supply does not
maximum voltage and current necessary for the ampli- need to produce full voltage all the time.
fier to drive its maximum rated power into a specified The VZ supply is divided into two parts. When the volt-
load. In the process of fulfilling this requirement, con- age requirements are not high, it operates in a parallel
ventional power supply designs produce lots of heat, mode to produce less voltage and more current.
are heavy, and take up precious real estate. And its no
secret that heat is one of a power amplifiers worst en- The power transistors stay cooler and are not forced to
emies. needlessly dissipate heat. This is the normal operating
mode of the VZ power supply.
According to Ohms Law, the bigger the power supply,
the more heat the power transistors must dissipate. Also, When the voltage requirements are high, VZ switches
the lower the resistance of the power transistors, the to a series mode to produce higher voltage and less
more voltage you can deliver to the load. But at the current. The amplified output signal never misses a beat
same time that you lower the resistance of the transis- and gets full voltage only when it needs it.
tors, you increase the current passing through them, Sensing circuitry watches the voltage of the output sig-
and again increase the amount of heat they must dissi- nal to determine when to switch VZ modes. The switch-
pate. ing circuitry is designed to prevent audible switching
distortion to yield the highest dynamic transfer function
4.3.1 VZ Supply Operation you hear only the music and not the amplifier. You
An articulated power supply, like VZ, can circumvent get not only the maximum power with the maximum
much of this problem by reducing the voltage applied safety, you also get the best power matching to your
to the transistors when less voltage is required. Reduc- load.
ing the voltage reduces the heat. Since the amplifier
runs cooler, you can safely pack more power into the In Figure 4.2, the individual components are
chassis. shown. Upstream of the toroid transformer,
though not shown, is where shutdown protec-
Toroid Bridge 1 tion and soft-start circuitry taps in to control AC
+VCC Buss mains input to the power supply. The VZ Control
circuitry senses audio level and switches the ar-
+ ticulating VZ supplies to either parallel (high cur-
rent) mode for lower level audio, or series (high
voltage) mode for high program peaks.
D 810
Figure 4.3 shows current flow with power supply
and grounded bridge operating to-
gether. Notice that the ungrounded
HI V HI I VZ supply operates much like a
VZ Control
Bridge 2 (MOSFETs) Circuitry battery. More exactly, it is a float-
ing DC supply made up of two in-
ternal batteries which operate in
+ either series or parallel.
D 811 In both examples it can be seen that when the
MOSFET switch is off, the dual supplies are
forced to operate in a parallel mode. Audio level
is sensed via a line tapping off the NFb loop.
When audio level is rising and at about 80% of
-VCC Buss the parallel mode supply voltage, the MOSFETs
Figure 4.2 Simplified VZ Supply (the switch is actually a three-device compos-
+ (+Vcc)
R R
Input
signal
Load
+ S1 + (speaker)
V1 V2 Inverting Op-amp
HIGH SIDE -Vcc (Negative Rail) LOW SIDE
Parallel =
Series =
(-Vcc) R = Switch Resistance
ite switch) are turned on. No current will flow through 4.3.2 VZ Supply Circuitry
either of the control diodes (D810 and D811, as shown For simplicity, only channel 1 circuitry will be covered
for channel 1) because reverse polarity is applied unless noted otherwise. The actual VZ switch circuit is
through the MOSFET switch. Since this happens to both located on the VZ switch assembly. This assembly con-
rectifier sources at the same time, and the negative side tains the filter capacitors, MOSFET switches, and con-
of Bridge 1 is then shorted to the positive side of Bridge trol diodes (D810 and D811). Three MOSFETs are used
2, the supplies are forced to operate in series mode. in parallel for sharing the high current supplied to the
Like two batteries, the supplies will provide double volt- rails. Operation of this section was covered in detail,
age in series mode, double current in parallel mode. minus circuit designations, in Section 4.3.1.
Although shipped from the factory in VZ-ODEP mode,
cool the amplifier more quickly in the event that the ther-
mal reserve is exhausted, it may cause voltage clip- The output of a 555 timer (U703) on the control module
ping rather than ODEP limiting. Seldom will the ampli- determines whether the MOSFETs are switched on
fier be operated locked in high current mode unless a (high) or off (low). This 555 device and the various
very low impedance is being driven. sources that feed the 555 are the things that make the
articulation work.
The master 555 trigger is controlled by the output of
U702A. S700, physically accessible from behind the The ODEP circuitry actually comes in two parts, one
front grille, determines the VZ operating mode. In high positive and the other negative. For the purposes of
voltage mode (Q42930-0 Control Module only) the out- this discussion, only the channel 1 ODEP circuitry is
put of U702A is held low. This in turn keeps the 555 covered here, and the focus will primarily be on the
output high and the MOSFETs are kept on. In the high positive half.
current mode, U702A is held in the opposite polarity,
keeping the output of the 555 low and the MOSFETs off. An LM-334Z thermal sensor provides a calibrated out-
In the AUTO position of S700, the audio level sense put from the output modules. At 25C its output is 2.98V,
circuitry controls the threshold and reset inputs to the with a 10 mV increase per every 1C rise in heatsink
555. The 555 will then switch states to high voltage when temperature.
the audio level is sufficient and will switch back down This thermal sensor output, from the positive sensor,
automatically when level has dropped sufficiently. Ca- goes to three destinations. First is a buffer which drives
pacitors in the U705 circuitry control the speed of the the calibrated temperature test point at pin 7 of TP1/
down-shift. In the VZ-ODEP mode, the switch operates TP2. Second is an over-temperature limit trip (thermal
as it would in AUTO mode unless ODEP limiting is in limit amplifier, as shown below). This will cause both
progress. When ODEP limiting occurs, optic coupler the positive and the negative ODEP circuit to go into,
U704 pulls the reset control low to the 555 to turn the and remain in, hard ODEP until the heatsinks cool. Third,
MOSFET switches off, and keep them off (low voltage/ it goes down into a circuit which combines thermal and
high current mode) until the ODEP limiting condition output power information.
clears.
The thermal sensor from the negative output module
Upstream of the toroids are the soft-start and protec- only performs this last function.
tion mechanisms used to power down the amplifier.
Although tied into the power supply primary, these cir- A pair of sense lines from the Low Side emitter resistors
cuits are covered in Section 4.6, Protection Systems. provide current information. Combined with VCC infor-
mation, actual instantaneous power is calculated. A
The low voltage power supply utilizes a separate trans- combining circuit determines the net thermal condition
former. The front panel power switch and a 1A fuse based on the power being delivered for the existing
(F702) are the only components upstream of this trans- heat level. The ODEP amplifier accepts this input infor-
former. The output of the rectifier produces 24VDC mation and, using an RC model of the heat transfer
unregulated. U715 and U716 produce regulated characteristics of the output devices (as mounted in
15VDC respectively. (A separate fullwave rectifier pro- the heatsinks), creates a complex output proportional
duces pulsed DC for Over-voltage sense and Soft-start to the thermal reserve of the output devices.
control.)
Output from the positive ODEP amplifier ranges from
12V (cold) to +9V (hard ODEP). This output drives the
4.4 ODEP Theory positive LS bias feed control circuit (see Section 4.2.2)
To protect the output stages from adverse thermal con- and the negative HS Voltage Translator feed control cir-
ditions, a specially developed ODEP (Output Device cuit (see Section 4.5.2). Also, this circuit provides test
Emulator Protection) circuit is used. It produces a com- point monitoring information and VZ-ODEP VZ mode
plex analog output signal proportional to the always control information.
changing safe-operating-area (SOA) margin of the out-
put transistors. This output signal controls the Voltage Output from the negative ODEP amplifier ranges from
Translator stage and Low Side output stage bias. This +12V (cold) to 9V (hard ODEP). This output drives the
action removes only the drive that may exceed the safe- negative LS bias feed control circuit (see Section 4.2.2)
operating-area of the output stage. and the positive HS Voltage Translator feed control cir-
cuit (see Section 4.5.2). Also, this circuit provides test
Thermal sensors give the ODEP circuitry vital informa- point monitoring information, VZ-ODEP control informa-
tion on the operating temperature of the heat sinks on tion, and front panel ODEP (thermal reserve) LED con-
which the output devices are mounted. This tempera- trol information.
ture signal combines with the complex ODEP signal to
form the heart of our patented ODEP protection scheme. Also tapping into the ODEP output control of LS bias
feed and Voltage Translator feed are signals from the
4.4.1 ODEP Operation fault, power (turn-on delay), and power loss (brown-
Refer to Figure 4.4 for a diagram of the basic operation out) circuits. By using the output of ODEP for LL and
of the ODEP system. LH control, these sources can mute the audio to the
Module
/ D E K M A D 5 * F ) * + , * A D 5 4 A * 0 4 5 , 4 5
( ) * + , -
^ 2 5
6 4 L L * A J + , E K L K * A
; 1 N O O P Q
( : >
) C * A + D E < * 3 7 2 A
) C * A + D E ; K + K 5 J + , E K L K * A
/ 2 E F
R 9 V
( S T : U > D 5 S / W
N - S >
V
=
( - X + > Y / K 7 * Z
( 0 G H I 0 4 5 , 4 5
( > / /
( > / /
N ; ^ -
8 9
( 0 G H I J + , E K L K * A
- : ; <
0 4 5 , 4 5
( ; ; -
( . / -
/ ? * 5 @ 2 A B
( . / 0 1 -
J ] ; ) -
) C * A + D E 1 2 F * E
I [ -
/ 2 + + 2 3 0 4 5 , 4 5 6 4 7 7
I [ ; 0 < <
N . / 0 1 -
N 0 G H I J + , E K L K * A
N . / -
( ; ^ -
8 9
S P ; <
0 4 5 , 4 5
/ ? * 5 @ 2 A B
N ; ; -
N > / /
) C * A + D E 1 2 F * E
N > / /
N 0 G H I 0 4 5 , 4 5
N ) * + , -
( - S >
/ 2 E F
^ 2 5
; 1 N O O P Q
N : >
) C * A + D E < * 3 7 2 A
ing to case, and case to heatsink under both static and 4.5.1 Balanced Gain Stage
dynamic conditions. The Balanced Gain Stage (BGS) amplifier U100A con-
The output of the positive ODEP amplifier drives +ODEP verts the input audio from a balanced configuration to
test point pin 11. It also drives U114A and U114B which single-ended with (electrical) unity gain. The compres-
in turn drive LH and +LL respectively. The output of sion device is essentially a resistive shunt across the
the negative ODEP amplifier drives the ODEP indica- balanced BGS input. The BGS drives the Variable Gain
tion circuitry and ODEP test point pin 9. Negative ODEP Stage and provides information to the compressor con-
also drives U114C and U114D which in turn drive +LH trol circuit and to the PIP connector.
and LL respectively.
4.5.2 Variable Gain Stage
Also entering the U114 comparator networks are the The Variable Gain Stage (U100B) taps signal from the
PWR (power relay engage), PWRLOSS (brown-out), and wiper of the front panel level control (R120). Gain of the
FAULT (any protection which shuts down the amplifier) front-end is set by the gain of this stage. The sensitivity
signals via blocking diodes. If any of these signals drop switch (S100, located on the rear panel) selects the
low, the feed to the LS bias and Voltage Translator drive amount of gain in this stage. Overall amplifier sensitivity
will be shut down via LL and LH. This action mutes may be set for 26 dB fixed gain (about 5.1Vrms), 1.4V,
all audio in the event of a dramatic failure. or 0.775V. Since overall amplifier gain after this stage is
26 dB, this stage will have a fixed gain of 0 dB (26 dB
4.5 Front End Theory setting), about +12 dB (1.4V setting), or about +16 dB
(0.775V setting). The output of this stage drives the Er-
Figure 4.5 explodes the front-end portion of the overall
block diagram. Once again, only channel 1 will be dis- ror Amp.
cussed in detail.
4.5.3 Error Amp
Input to the amplifier is only via a PIP module. The stan- The Error Amp (U105) input comes from the Variable
dard module shipped with the MA-5002VZ is the PIP2- Gain Stage with or without Loudspeaker Offset Integra-
FXQ. Whether this, or any other module is used, the tion (LOI), and is summed with amplifier output in a nega-
amplifier senses a balanced input from the installed tive feedback (NFb) configuration. Output of the Error
module. Amp drives the Voltage Translators and provides error
j i f
z m
~ f
j i f
z m
Portion of j b
Main Module
p r x y h
f i k a e
v f i k a e
c f g h i
r r
| }
p t h
h j k ` a l i
c g h g c i f
g ` n o p q r
m
j _ g ` j f
z
t x r j n
_ ` a b c d e
_ j ~ ` _ ` a f `
c f g h i f
u
c f g h i f
p t h
j i f
z m
_ g ` o n
m
c o { k _ i
z
` j o n q _ j ~ ` _ ` a f ` c f g h i f
g c ` n
m
o j b ` f j k
p t h
k j
m
o n p ~ a b
p t h
h j k ` a l i
o j b ` f j k
q y h
j i f
z m
` i i f a ` { f i o n p
z
q y h
_ { k e
z z
j c i o n p
z
~ a b
c f g h i f _
` i i f a ` { f i o n q
z
j c i o n q
z
o n q ~ a b
o j b ` f j k
` _ p
m
~ a b _
` _ q
m
The output of U701A controls the Soft-start. Refer to fields have built up in the high voltage supply, and the
Figure 4.6 for a graphic of Soft-start operation. main relay closes. At time 3 a protective action occurs;
note that the DC supply remains. At time 4 the condi-
When the output of U701A goes low, the opto-triac de- tion clears and the restart begins. Time 5 is akin to time
vice U700 turns on. While on, the input triac Q700 con- 2, and time 6 is another protective action. The lower
ducts. Positor R702 limits peak input current to the tor- graph shows Q701 operation (high = on).
oid to a maximum of 22A peak (with 120VAC mains).
U701A combines the sloped input from the C120 cir- Any time a protection mechanism has acted and the
cuitry on the main module with the pulsed DC. As the condition then clears, this entire process repeats.
portion of time which the output of U701A goes low in-
creases, the amount of time where AC mains conduct 4.6.2 Over-voltage
to the transformer (via Q700 and R702) increases until One mode of amplifier protection is a shutdown in the
it remains on. When the U111C PWR circuit times out, event of over-voltage on the AC mains. This is sensed
the relay closes, bypassing the current limiting soft-start by the pulsed DC signal produced by the full-wave rec-
circuit. Soft-start control signals are shown in Figure 4.7. tifier in the low voltage supply.
The upper signal is that produced by C120. At time 0
the amplifier is off. At time 1 the power switch is pressed R780 picks off the pulsed DC, and U707D will, if the
(on). At time 2 C120 has fully charged, the magnetic voltage is too high, shift its output to a low. When this
happens, the over-volt/therm red LED on the control
module lights and signal OV1 goes low
to the main module.
A low (over-voltage condition) on
OV1 causes U211C to shift to a
low output. This low, through D1,
voltages.
tection mechanism.
turned off.
4.6.8 Power Loss fier thermal reserve. The LEDs are amber (although they
The MA-5002VZ has the ability to sense a brown-out may have a reddish appearance) and are normally on.
condition on the AC service. This is accomplished by They dim and/or extinguish in the event that the
sensing the low-voltage power supply at U111A. Local amplifiers thermal reserve is exhausted. ODEP indica-
capacitors on the 15VDC keep this chip powered for tors will also extinguish whenever the main supply re-
a short time after the low voltage supply drops out on lays are open (such as a protection action being acti-
power-down/loss. vated, or during Soft-start time-out).
An RC network, consisting of C1 and R6, will cause the Green SPI/IOC LEDs show signal presence (SPI) and
output of U111A to shift low the instant low voltage is any form of distortion (IOC). They flash dimly with the
lost. This negative potential discharges C120 causing audio to show signal. In the event of an IOC condition
immediate opening of the main relay, and reset of the (output waveform differs from input by >0.05%, or input
Soft-start circuitry. It is essential that C120 be discharged overload) the light will be on brightly. An occasional flash
immediately in the event that power is restored before of IOC usually indicates clipping. If the IOC light locks
C120 would otherwise discharge. The power-loss cir- in, it usually indicates a protective action, or hard ODEP
cuit is common to both channels. Its output goes to limiting.
LL and LH to immediately mute audio upon power- ILOAD/ILIMIT LEDs flash green with the audio when pro-
down or power-loss, thus preventing turn-off audio noise. gram material is being delivered to a load. Its function
is similar to that of the SPI, except that SPI is voltage
4.6.9 Fan Control driven and does not require a load. ILOAD comes on
The MA-5002VZ, unlike other members of the Macro- when the amplifier is loaded, and its brightness is in
Tech family, has two onboard fans. They are mounted proportion to the output current. This is the ILOAD func-
to the chassis divider assembly and pull cool air from tion. In the event of current limiting action, the light will
the front and discharge it across the output stage flash to red. This is the ILIMIT function.
heatsinks to the rear of the amplifier. Also unlike the other
Macro-Techs, the fans are fully ODEP proportional (they
operate in proportion to output stage temperature and 4.8 Mono Modes
calibrated ODEP control voltage). The MA-5002VZ has three main operating modes,
namely dual (stereo), bridge mono, and parallel mono.
U713B combines channel 1 temperature and ODEP
level, U713A for channel 2. D706 and D707 form a di- There are a number of precautions which should be
ode OR gate. The output of the OR gate drives one taken when operating the amplifier in either of the mono
input to U707B. The other input to U707B is from the modes. The VZ mode switches for each channel must
DC pulse width control circuit (U701B). U707B oper- be set to the same setting. Sensitivity, LOI, and Com-
ates in a fashion similar to that of U707A, the Soft-start pressor switches for channel 2 make no difference. The
control amplifier. A graphic example of the fan control input must be to channel 1 only. The input to channel 2
waveforms would look a good deal like those in Figure and controls for channel 2 are NOT defeated in either
4.7, except that the thermal drive would be unique from mono mode, therefore no connection to channel 2 may
that of the Soft-start ramp. be made in either of the mono modes. The channel 2
level control should be turned down (counterclockwise)
The fans will also be forced to operate at full speed in fully in either mono mode.
the event a toroid transformer thermal switch trips open.
Monaural amplifier operating modes are covered in
detail in the MA-5002VZ Reference Manual. The dis-
4.7 Display cussion below primarily aids in understanding how the
Amplifier front panel indication includes a total of 7 LEDs. mono modes work for testing purposes.
These include Enable, ODEP, SPI/IOC, and ILOAD/ILIMIT.
The Enable indicator is an amber light which indicates 4.8.1 Bridge Mono
presence of the low voltage supply. It is powered by the Bridge mono is intended for loads of 4 ohms or greater.
unregulated +24VDC supply. It will be on any time the The feedback loop for channel 1 also drives the input
power switch is depressed (unless the low voltage fuse to channel 2 in this mono mode. The input to channel 2
blows). is, however, inverted. This causes the output of chan-
nel 2 to be of equal magnitude and opposite polarity
ODEP indicators provide an on-line indication of ampli- (for double voltage output). The output of the amplifier
is balanced, and channel 1 hot output is connected to The channel 1 and 2 amplifier hot outputs must be
load hot (+), channel 2 hot output is connected to load shorted by an external shorting buss (10 AWG or larger).
return ( ). The amplifier output to the load(s) is taken from either
channels hot output to load hot, and either channels
4.8.2 Parallel Mono negative output to the load return ( ). The shorting buss
Parallel mono is intended for loads less than 4 ohms must be removed prior to changing from parallel mono
(as low as 1 ohm) in a monaural amplifier configuration. to either other mode.