FXCPU Structured Programming Manual (Basic & Applied Instruction)
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Structured Programming Manual [Basic & Applied Instruction]
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Manual number JY997D34701
Manual revision B
Date 7/2009
Foreword
This manual contains text, diagrams and explanations which will guide the reader through the safe and
correct installation, use, and operation of the FX Series function for structured programs. It should be read
and understood before attempting to install or use the unit.
Store this manual in a safe place so that you can take it out and read it whenever necessary. Always forward
it to the end user.
This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses.
Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may occur as a
result of using the contents noted in this manual.
© 2009 MITSUBISHI ELECTRIC CORPORATION
1
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Outline Precautions
• This manual provides information for the use of the FX Series Programmable Controllers. The manual has
been written to be used by trained and competent personnel. The definition of such a person or persons is
as follows;
1) Any engineer who is responsible for the planning, design and construction of automatic equipment using
the product associated with this manual should be of a competent nature, trained and qualified to the
local and national standards required to fulfill that role. These engineers should be fully aware of all
aspects of safety with aspects regarding to automated equipment.
2) Any commissioning or maintenance engineer must be of a competent nature, trained and qualified to the
local and national standards required to fulfill the job. These engineers should also be trained in the use
and maintenance of the completed product. This includes being familiar with all associated manuals and
documentation for the product. All maintenance should be carried out in accordance with established
safety practices.
3) All operators of the completed equipment should be trained to use that product in a safe and coordinated
manner in compliance with established safety practices. The operators should also be familiar with
documentation that is connected with the actual operation of the completed equipment.
Note: the term 'completed equipment' refers to a third party constructed device that contains or uses the
product associated with this manual.
• This product has been manufactured as a general-purpose part for general industries, and has not been
designed or manufactured to be incorporated in a device or system used in purposes related to human life.
• Before using the product for special purposes such as nuclear power, electric power, aerospace, medicine
or passenger movement vehicles, consult with Mitsubishi Electric.
• This product has been manufactured under strict quality control. However when installing the product
where major accidents or losses could occur if the product fails, install appropriate backup or failsafe
functions into the system.
• When combining this product with other products, please confirm the standards and codes of regulation to
which the user should follow. Moreover, please confirm the compatibility of this product with the system,
machines, and apparatuses to be used.
• If there is doubt at any stage during installation of the product, always consult a professional electrical
engineer who is qualified and trained in the local and national standards. If there is doubt about the
operation or use, please consult the nearest Mitsubishi Electric distributor.
• Since the examples within this manual, technical bulletin, catalog, etc. are used as reference; please use it
after confirming the function and safety of the equipment and system. Mitsubishi Electric will not accept
responsibility for actual use of the product based on these illustrative examples.
• The content, specification etc. of this manual may be changed for improvement without notice.
• The information in this manual has been carefully checked and is believed to be accurate; however, if you
notice any doubtful point, error, etc., please contact the nearest Mitsubishi Electric distributor.
Registration
• Microsoft® and Windows® are either registered trademarks or trademarks of Microsoft Corporation in the
United States and/or other countries.
• CompactFlash is a trademark of SanDisk Corporation in the United States and other countries.
• The company name and the product name to be described in this manual are the registered trademarks or
trademarks of each company.
2
FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
Table of Contents
Positioning of This Manual....................................................................................................... 9
Related Manuals ...................................................................................................................... 12
Generic Names and Abbreviations Used in Manuals .......................................................... 15
1. Outline 16
1.1 Outline of Structured Programs and Programming languages ..................................................... 16
1.1.1 Outline of Structured Programs ..................................................................................................... 16
1.1.2 Programming languages ............................................................................................................... 17
1.2 PLC Series and Programming Software Version .......................................................................... 17
1.3 Cautions on Creation of Fundamental Programs.......................................................................... 18
1.3.1 I/O PROCESSING AND RESPONSE DELAY .............................................................................. 18
1.3.2 Double output (double coil) operation and countermeasures........................................................ 19
1.3.3 Circuits which cannot be created by structured ladder programs and countermeasures.............. 20
1.3.4 Handling of general flags............................................................................................................... 20
1.3.5 Handling of operation error flag ..................................................................................................... 23
1.3.6 Handling of function extension flag................................................................................................ 24
1.3.7 Limitation in number of sequence instructions and number of simultaneous instances
of instructions ................................................................................................................................ 24
2. Instruction List 27
2.1 Basic Instructions .......................................................................................................................... 27
2.2 Step Ladder Instructions ............................................................................................................... 28
2.3 Applied Instructions....................................................................................................................... 28
3. Configuration of Instruction 47
3.1 Expression and Operation Form of Sequence Instructions........................................................... 47
3.2 Labels............................................................................................................................................ 49
3.3 Devices and Addresses ................................................................................................................ 52
3.4 EN and ENO ................................................................................................................................. 53
4. How to Read Explanation of Instructions 54
5. Basic Instruction 56
5.1 LD, LDI, AND, ANI, OR, OR.......................................................................................................... 56
5.2 LDP, LDF, ANDP, ANDF, ORP, ORF ........................................................................................... 61
5.3 OUT (Excluding timers and counters) ........................................................................................... 67
5.4 Operating Timer ............................................................................................................................ 70
5.4.1 OUT_T........................................................................................................................................... 70
5.5 Operating Counters....................................................................................................................... 74
5.5.1 OUT_C, OUT_C_32 ...................................................................................................................... 74
5.6 AND(...), OR(...) ............................................................................................................................ 77
5.7 MPS, MRD, MPP .......................................................................................................................... 79
5.8 INV ................................................................................................................................................ 84
5.9 MEP, MEF..................................................................................................................................... 86
5.10 SET, RST .................................................................................................................................... 88
5.11 PLS, PLF..................................................................................................................................... 92
5.12 MC, MCR .................................................................................................................................... 95
5.13 END............................................................................................................................................. 99
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FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
5.14 NOP (for simple project only) ...................................................................................................... 99
6. Step Ladder Instructions 100
6.1 Step Ladder................................................................................................................................. 100
6.1.1 Outline ......................................................................................................................................... 100
6.1.2 Function and operation explanation ............................................................................................ 100
6.1.3 Program examples ...................................................................................................................... 108
6.2 STL.............................................................................................................................................. 109
6.3 RET ............................................................................................................................................. 110
7. Applied Instructions 112
7.1 Program Flow.............................................................................................................................. 112
7.1.1 CJ ................................................................................................................................................ 112
7.1.2 CALL............................................................................................................................................ 120
7.1.3 SRET ........................................................................................................................................... 126
7.1.4 IRET ............................................................................................................................................ 127
7.1.5 DI ................................................................................................................................................. 130
7.1.6 EI ................................................................................................................................................. 131
7.1.7 FEND........................................................................................................................................... 133
7.1.8 WDT ............................................................................................................................................ 135
7.1.9 FOR ............................................................................................................................................. 138
7.1.10 NEXT ......................................................................................................................................... 139
7.2 Move and Compare..................................................................................................................... 142
7.2.1 CMP............................................................................................................................................. 142
7.2.2 ZCP ............................................................................................................................................. 146
7.2.3 MOV ............................................................................................................................................ 149
7.2.4 SMOV .......................................................................................................................................... 154
7.2.5 CML ............................................................................................................................................. 157
7.2.6 BMOV .......................................................................................................................................... 160
7.2.7 FMOV .......................................................................................................................................... 165
7.2.8 XCH ............................................................................................................................................. 168
7.2.9 BCD ............................................................................................................................................. 170
7.2.10 BIN............................................................................................................................................. 174
7.3 Arithmetic and Logical Operation ................................................................................................ 178
7.3.1 ADD ............................................................................................................................................. 178
7.3.2 SUB ............................................................................................................................................. 181
7.3.3 MUL ............................................................................................................................................. 185
7.3.4 DIV............................................................................................................................................... 189
7.3.5 INC .............................................................................................................................................. 192
7.3.6 DEC ............................................................................................................................................. 194
7.3.7 WAND.......................................................................................................................................... 196
7.3.8 WOR............................................................................................................................................ 198
7.3.9 WXOR ......................................................................................................................................... 200
7.3.10 NEG........................................................................................................................................... 203
7.4 Rotation and Shift Operation....................................................................................................... 207
7.4.1 ROR............................................................................................................................................. 207
7.4.2 ROL ............................................................................................................................................. 210
7.4.3 RCR............................................................................................................................................. 213
7.4.4 RCL ............................................................................................................................................. 216
7.4.5 SFTR ........................................................................................................................................... 219
7.4.6 SFTL............................................................................................................................................ 221
7.4.7 WSFR .......................................................................................................................................... 224
7.4.8 WSFL........................................................................................................................................... 227
7.4.9 SFWR .......................................................................................................................................... 230
7.4.10 SFRD......................................................................................................................................... 233
7.5 Data Operation............................................................................................................................ 235
7.5.1 ZRST ........................................................................................................................................... 235
7.5.2 DECO .......................................................................................................................................... 239
7.5.3 ENCO .......................................................................................................................................... 243
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FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
7.5.4 SUM............................................................................................................................................. 246
7.5.5 BON............................................................................................................................................. 249
7.5.6 MEAN .......................................................................................................................................... 252
7.5.7 ANS ............................................................................................................................................. 254
7.5.8 ANR ............................................................................................................................................. 256
7.5.9 SQR............................................................................................................................................. 258
7.5.10 FLT ............................................................................................................................................ 260
7.6 High Speed Processing............................................................................................................... 264
7.6.1 REF ............................................................................................................................................. 264
7.6.2 REFF ........................................................................................................................................... 268
7.6.3 MTR............................................................................................................................................. 272
7.6.4 DHSCS ........................................................................................................................................ 276
7.6.5 DHSCR........................................................................................................................................ 284
7.6.6 DHSZ........................................................................................................................................... 288
7.6.7 SPD ............................................................................................................................................. 303
7.6.8 PLSY ........................................................................................................................................... 307
7.6.9 PWM............................................................................................................................................ 314
7.6.10 PLSR ......................................................................................................................................... 317
7.7 Handy Instruction ........................................................................................................................ 322
7.7.1 IST ............................................................................................................................................... 322
7.7.2 SER ............................................................................................................................................. 334
7.7.3 ABSD........................................................................................................................................... 338
7.7.4 INCD............................................................................................................................................ 342
7.7.5 TTMR........................................................................................................................................... 345
7.7.6 STMR .......................................................................................................................................... 348
7.7.7 ALT .............................................................................................................................................. 351
7.7.8 RAMP .......................................................................................................................................... 354
7.7.9 ROTC .......................................................................................................................................... 357
7.7.10 SORT......................................................................................................................................... 360
7.8 External FX I/O Device................................................................................................................ 363
7.8.1 TKY.............................................................................................................................................. 363
7.8.2 HKY ............................................................................................................................................. 367
7.8.3 DSW ............................................................................................................................................ 372
7.8.4 SEGD .......................................................................................................................................... 376
7.8.5 SEGL ........................................................................................................................................... 378
7.8.6 ARWS.......................................................................................................................................... 383
7.8.7 ASC ............................................................................................................................................. 388
7.8.8 PR................................................................................................................................................ 390
7.8.9 FROM .......................................................................................................................................... 393
7.8.10 TO.............................................................................................................................................. 399
7.9 External Device (optional device)................................................................................................ 402
7.9.1 RS................................................................................................................................................ 402
7.9.2 PRUN .......................................................................................................................................... 405
7.9.3 ASCI ............................................................................................................................................ 407
7.9.4 HEX ............................................................................................................................................. 411
7.9.5 CCD............................................................................................................................................. 415
7.9.6 VRRD .......................................................................................................................................... 419
7.9.7 VRSC........................................................................................................................................... 421
7.9.8 RS2.............................................................................................................................................. 423
7.9.9 PID............................................................................................................................................... 426
7.10 External Device ......................................................................................................................... 430
7.10.1 MNET ........................................................................................................................................ 430
7.10.2 ANRD ........................................................................................................................................ 432
7.10.3 ANWR........................................................................................................................................ 434
7.10.4 RMST ........................................................................................................................................ 435
7.10.5 RMWR ....................................................................................................................................... 436
7.10.6 RMRD........................................................................................................................................ 438
7.10.7 RMMN ....................................................................................................................................... 440
7.10.8 BLK............................................................................................................................................ 441
7.10.9 MCDE ........................................................................................................................................ 443
7.11 Data Transfer 2 ......................................................................................................................... 444
7.11.1 ZPUSH ...................................................................................................................................... 444
7.11.2 ZPOP......................................................................................................................................... 447
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FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
7.12 Floating Point ............................................................................................................................ 449
7.12.1 DECMP...................................................................................................................................... 449
7.12.2 DEZCP ...................................................................................................................................... 451
7.12.3 DEMOV ..................................................................................................................................... 453
7.12.4 DESTR ...................................................................................................................................... 455
7.12.5 DEVAL....................................................................................................................................... 462
7.12.6 DEBCD ...................................................................................................................................... 468
7.12.7 DEBIN........................................................................................................................................ 470
7.12.8 DEADD ...................................................................................................................................... 473
7.12.9 DESUB ...................................................................................................................................... 475
7.12.10 DEMUL .................................................................................................................................... 477
7.12.11 DEDIV...................................................................................................................................... 479
7.12.12 DEXP....................................................................................................................................... 481
7.12.13 DLOGE .................................................................................................................................... 483
7.12.14 DLOG10 .................................................................................................................................. 485
7.12.15 DESQR.................................................................................................................................... 487
7.12.16 DENEG.................................................................................................................................... 489
7.12.17 INT........................................................................................................................................... 491
7.12.18 DSIN ........................................................................................................................................ 493
7.12.19 DCOS ...................................................................................................................................... 495
7.12.20 DTAN....................................................................................................................................... 497
7.12.21 DASIN...................................................................................................................................... 499
7.12.22 DACOS.................................................................................................................................... 502
7.12.23 DATAN .................................................................................................................................... 505
7.12.24 DRAD ...................................................................................................................................... 508
7.12.25 DDEG ...................................................................................................................................... 511
7.13 Data Operation 2....................................................................................................................... 513
7.13.1 WSUM ....................................................................................................................................... 513
7.13.2 WTOB........................................................................................................................................ 516
7.13.3 BTOW........................................................................................................................................ 519
7.13.4 UNI ............................................................................................................................................ 522
7.13.5 DIS............................................................................................................................................. 525
7.13.6 SWAP ........................................................................................................................................ 527
7.13.7 SORT2....................................................................................................................................... 529
7.14 Positioning Control .................................................................................................................... 534
7.14.1 DSZR......................................................................................................................................... 534
7.14.2 DVIT .......................................................................................................................................... 536
7.14.3 DTBL ......................................................................................................................................... 539
7.14.4 DABS......................................................................................................................................... 541
7.14.5 ZRN ........................................................................................................................................... 543
7.14.6 PLSV ......................................................................................................................................... 547
7.14.7 DRVI .......................................................................................................................................... 551
7.14.8 DRVA......................................................................................................................................... 554
7.15 Real Time Clock Control ........................................................................................................... 557
7.15.1 TCMP ........................................................................................................................................ 557
7.15.2 TZCP ......................................................................................................................................... 560
7.15.3 TADD......................................................................................................................................... 563
7.15.4 TSUB ......................................................................................................................................... 565
7.15.5 HTOS......................................................................................................................................... 567
7.15.6 STOH......................................................................................................................................... 570
7.15.7 TRD ........................................................................................................................................... 573
7.15.8 TWR .......................................................................................................................................... 575
7.15.9 HOUR ........................................................................................................................................ 579
7.16 External Device ......................................................................................................................... 582
7.16.1 GRY........................................................................................................................................... 582
7.16.2 GBIN.......................................................................................................................................... 584
7.16.3 RD3A ......................................................................................................................................... 586
7.16.4 WR3A ........................................................................................................................................ 588
7.17 Extension Function.................................................................................................................... 590
7.17.1 EXTR_IN ................................................................................................................................... 590
7.17.2 EXTR_OUT ............................................................................................................................... 593
7.18 Others ....................................................................................................................................... 597
7.18.1 COMRD ..................................................................................................................................... 597
7.18.2 RND........................................................................................................................................... 600
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FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
7.18.3 DUTY......................................................................................................................................... 602
7.18.4 CRC........................................................................................................................................... 605
7.18.5 DHCMOV................................................................................................................................... 609
7.19 Block Data Operation ................................................................................................................ 614
7.19.1 BK+............................................................................................................................................ 614
7.19.2 BK-............................................................................................................................................. 618
7.19.3 BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>= ......................................... 622
7.20 Character String Control ........................................................................................................... 629
7.20.1 STR ........................................................................................................................................... 629
7.20.2 VAL............................................................................................................................................ 636
7.20.3 $+ .............................................................................................................................................. 642
7.20.4 LEN............................................................................................................................................ 645
7.20.5 RIGHT ....................................................................................................................................... 648
7.20.6 LEFT.......................................................................................................................................... 651
7.20.7 MIDR ......................................................................................................................................... 654
7.20.8 MIDW......................................................................................................................................... 658
7.20.9 INSTR........................................................................................................................................ 662
7.20.10 $MOV ...................................................................................................................................... 665
7.21 Data Operation 3....................................................................................................................... 668
7.21.1 FDEL ......................................................................................................................................... 668
7.21.2 FINS .......................................................................................................................................... 671
7.21.3 POP ........................................................................................................................................... 674
7.21.4 SFR ........................................................................................................................................... 678
7.21.5 SFL ............................................................................................................................................ 681
7.22 Data Comparison ...................................................................................................................... 684
7.22.1 LD=, LD>, LD<, LD<>, LD<=, LD>= .......................................................................................... 684
7.22.2 AND=, AND>, AND<, AND<>, AND<=, AND>= ........................................................................ 688
7.22.3 OR=, OR>, OR<, OR<>, OR<=, OR>= ..................................................................................... 692
7.23 Data Table Operation................................................................................................................ 695
7.23.1 LIMIT ......................................................................................................................................... 695
7.23.2 BAND......................................................................................................................................... 700
7.23.3 ZONE......................................................................................................................................... 706
7.23.4 SCL............................................................................................................................................ 712
7.23.5 DABIN........................................................................................................................................ 717
7.23.6 BINDA........................................................................................................................................ 721
7.23.7 SCL2.......................................................................................................................................... 726
7.24 External Device Communication (Inverter Communication) ..................................................... 732
7.24.1 IVCK .......................................................................................................................................... 732
7.24.2 IVDR .......................................................................................................................................... 735
7.24.3 IVRD .......................................................................................................................................... 738
7.24.4 IVWR ......................................................................................................................................... 740
7.24.5 IVBWR....................................................................................................................................... 742
7.25 Data Transfer 3 ......................................................................................................................... 745
7.25.1 RBFM ........................................................................................................................................ 745
7.25.2 WBFM........................................................................................................................................ 751
7.26 High Speed Processing 2.......................................................................................................... 753
7.26.1 DHSCT ...................................................................................................................................... 753
7.27 Extension File Register Control................................................................................................. 759
7.27.1 LOADR ...................................................................................................................................... 759
7.27.2 SAVER ...................................................................................................................................... 763
7.27.3 INITR ......................................................................................................................................... 772
7.27.4 LOGR ........................................................................................................................................ 776
7.27.5 RWER........................................................................................................................................ 780
7.27.6 INITER....................................................................................................................................... 785
7.28 FX3U-CF-ADP........................................................................................................................... 789
7.28.1 FLCRT ....................................................................................................................................... 789
7.28.2 FLDEL ....................................................................................................................................... 793
7.28.3 FLWR ........................................................................................................................................ 795
7.28.4 FLRD ......................................................................................................................................... 798
7.28.5 FLCMD ...................................................................................................................................... 800
7.28.6 FLSTRD..................................................................................................................................... 802
7
FXCPU Structured Programming Manual
(Basic & Applied Instruction) Table of Contents
8. Interrupt Function and Pulse Catch Function 805
8.1 Outline......................................................................................................................................... 805
8.2 Common items ............................................................................................................................ 806
8.2.1 Interrupt function.......................................................................................................................... 806
8.2.2 How to disable interrupt function and pulse catch function ......................................................... 807
8.2.3 Related items............................................................................................................................... 808
8.2.4 Cautions on use (common) ......................................................................................................... 809
8.3 Input Interrupt (Interrupt Triggered by External Signal) [Without Delay Function] ...................... 811
8.3.1 Input Interrupt (Interrupt Triggered by External Signal) [Without Delay Function]....................... 811
8.3.2 Examples of practical programs (programs to measure short pulse width)................................. 816
8.4 Input Interrupt (Interrupt by External Signal) [With Delay function] ............................................. 818
8.5 Timer Interrupt (Interrupt in Constant Cycle)............................................................................... 819
8.5.1 Timer Interrupt (Interrupt in Constant Cycle) ............................................................................... 819
8.5.2 Example of practical program (timer interrupt program using instruction)................................... 820
8.6 Counter Interrupt - Interrupt Triggered by Counting Up of High Speed Counter......................... 822
8.7 Pulse Catch Function[M8170 to M8177] ..................................................................................... 823
8.8 Pulse width/Pulse period measurement function [M8075 to M8083, D8074 to D8097] .............. 825
Appendix A: Relationships between devices and addresses 830
Warranty................................................................................................................................. 832
Revised History ..................................................................................................................... 833
8
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Positioning of This Manual
This manual explains sequence instructions for structured programs provided by GX Works2. Refer to other
manuals for devices, parameters and application functions.
Refer to each corresponding manual for analog, communication, positioning control and special units and
blocks.
1. When using FX3U/FX3UC/FX3G PLCs
QCPU/FXCPU Structured Programming Manual (Fundamentals) (Additional Manual)
Q/FX This manual explains programming methods, specifications, functions, etc. required to create
structured programs.
Structured
FXCPU Structured Programming Manual (Device & Common) (Additional Manual)
FX This manual explains devices and parameters for structured programs provided
by GX Works2.
Structured
(This manual)
FXCPU Structured Programming Manual (Basic & Applied Instruction)
FX (Additional Manual)
This manual explains sequence instructions for structured programs provided
by GX Works2.
Structured
FXCPU Structured Programming Manual (Application Functions)
FX (Additional Manual)
This manual explains application functions for structured programs provided
by GX Works2.
Structured
FX3G/FX3U/FX3UC User's Manual- Analog Control Edition (Additional Manual)
FX3U This manual explains details of analog special function blocks and analog special
FX3UC adapters for FX3U/FX3UC/FX3G PLCs and PID instruction.
FX3G
Explanation of instructions and instructions used in program examples are expressed
for GX Developer.
FX Series User's Manual -Data Communication Edition (Additional Manual)
FX This manual explains details of simple N:N link, parallel link, computer link, no-protocol
communication (RS and RS2 instructions), programming communication and inverter
communication for FX PLCs.
Explanation of instructions and instructions used in program examples are expressed
for GX Developer.
FX3G/FX3U/FX3UC Series User's Manual -Positioning Edition (Additional Manual)
FX3U This manual explains details of wiring, instructions and operations of the positioning
FX3UC function built in FX3U/FX3UC/FX3G PLC main units.
FX3G
Explanation of instructions and instructions used in program examples are expressed
for GX Developer.
Individual manuals (Manual supplied with product or additional Manual *1)
Special
unit/block This manual explains details of each special unit/block.
Explanation of instructions and instructions used in program examples are expressed
for GX Developer.
*1. Detailed explanation may be provided by a separate manual in some products.
9
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
2. When using FX1S/FX1N/FXU/FX1NC/FX2NC PLCs
QCPU/FXCPU Structured Programming Manual (Fundamentals) (Additional Manual)
Q/FX This manual explains programming methods, specifications, functions, etc. required to create
structured programs.
Structured
FXCPU Structured Programming Manual (Device & Common) (Additional Manual)
FX This manual explains devices and parameters for structured programs provided
by GX Works2.
Structured
(This manual)
FXCPU Structured Programming Manual (Basic & Applied Instruction)
(Additional Manual)
FX
This manual explains sequence instructions for structured programs provided
by GX Works2.
Structured
FXCPU Structured Programming Manual (Application Functions)
FX (Additional Manual)
This manual explains application functions for structured programs provided
by GX Works2.
Structured
FX Series User's Manual -Data Communication Edition (Additional Manual)
FX This manual explains details of simple N:N link, parallel link, computer link, no-protocol
communication (RS instruction), programming communication and inverter communication
for FX PLCs.
Explanation of instructions and instructions used in program examples are expressed for
GX Developer and FX-PCS/WIN.
Individual manuals (Manual supplied with product or additional Manual *1 )
Special
unit/block This manual explains details of each special unit/block.
Explanation of instructions and instructions used in program examples are expressed
for GX Developer and FX-PCS/WIN.
*1. Detailed explanation may be provided by a separate manual in some products.
10
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
3. When using FX0/FX0S/FX0N/FXU/FX2C PLCs
QCPU/FXCPU Structured Programming Manual (Fundamentals) (Additional Manual)
Q/FX This manual explains programming methods, specifications, functions, etc. required to create
structured programs.
Structured
FXCPU Structured Programming Manual (Device & Common) (Additional Manual)
FX This manual explains devices and parameters for structured programs provided
by GX Works2.
Structured
(This manual)
FXCPU Structured Programming Manual (Basic & Applied Instruction)
FX
(Additional Manual)
This manual explains sequence instructions for structured programs provided
by GX Works2.
Structured
FXCPU Structured Programming Manual (Application Functions)
FX (Additional Manual)
This manual explains application functions for structured programs provided
by GX Works2.
Structured
FX Series User's Manual -Data Communication Edition (Additional Manual)
FX This manual explains details of parallel link, computer link, no-protocol communication
(RS instruction) and programming communication for FX PLCs.
Explanation of instructions and instructions used in program examples are expressed for
GX Developer and FX-PCS/WIN.
Individual manuals (Manual supplied with product or additional Manual *1)
Special
unit/block This manual explains details of each special unit/block.
Explanation of instructions and instructions used in program examples are expressed
for GX Developer and FX-PCS/WIN.
*1. Detailed explanation may be provided by a separate manual in some products.
11
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Related Manuals
This manual explains devices and parameters for structured programs provided by GX Works2.
Refer to other manuals for sequence instructions and applied functions.
This chapter introduces only reference manuals for this manual and manuals which describe the hardware
information of PLC main units.
Manuals not introduced here may be required in some applications.
Refer to the manual of the used PLC main unit and manuals supplied together with used products.
Contact the distributor for acquiring required manuals.
Common among FX PLCs [structured]
Supplied with product Model
Manual name Manual number Contents
or Additional Manual name code
QCPU/FXCPU Structured Programming methods, specifications, functions,
SH-080782 Additional Manual 13JW06
Programming Manual (Fundamentals) etc. required to create structured programs
FXCPU Structured Programming Devices, parameters, etc. provided in structured
JY997D26001 Additional Manual 09R920
Manual (Device & Common) projects of GX Works2
FXCPU Structured Programming Sequence instructions provided in structured
JY997D34701 Additional Manual 09R921
Manual (Basic & Applied Instruction) projects of GX Works2
FXCPU Structured Programming Application functions provided in structured
JY997D34801 Additional Manual 09R922
Manual (Application Functions) projects of GX Works2
FX3U/FX3UC/FX3G PLCs
Supplied with product Model
Manual name Manual number Contents
or Additional Manual name code
PLC main unit
I/O specifications, wiring and installation of the
PLC main unit FX3U extracted from the FX3U
FX3U Series Hardware Manual JY997D18801 Supplied with product Series User’s Manual - Hardware Edition. For -
detailed explanation, refer to the FX3U Series
User’s Manual - Hardware Edition.
Details about the hardware including I/O
FX3U Series User's Manual- Hardware
JY997D16501 Additional Manual specifications, wiring, installation and 09R516
Edition
maintenance of the FX3U PLC main unit.
I/O specifications, wiring and installation of the
PLC main unit FX3UC (D, DSS) extracted from the
FX3UC (D, DSS) Series Hardware
JY997D28601 Supplied with product FX3UC Series User’s Manual - Hardware Edition. -
Manual
For detailed explanation, refer to the FX3UC
Series User’s Manual - Hardware Edition.
I/O specifications, wiring and installation of the
PLC main unit FX3UC-32MT-LT-2 extracted from
FX3UC-32MT-LT-2 Hardware Manual JY997D31601 Supplied with product the FX3UC Series User’s Manual - Hardware -
Edition. For detailed explanation, refer to the
FX3UC Series User’s Manual - Hardware Edition.
Details about the hardware including I/O
FX3UC Series User's Manual -
JY997D28701 Additional Manual specifications, wiring, installation and 09R519
Hardware Edition
maintenance of the FX3UC PLC main unit.
I/O specifications, wiring and installation of the
PLC main unit FX3G extracted from the FX3G
FX3G Series Hardware Manual JY997D33401 Supplied with product Series User’s Manual - Hardware Edition. For -
detailed explanation, refer to the FX3G Series
User’s Manual - Hardware Edition.
Details about the hardware including I/O
FX3G Series User's Manual- Hardware
JY997D31301 Additional Manual specifications, wiring, installation and 09R521
Edition
maintenance of the FX3G PLC main unit.
12
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Supplied with product Model
Manual name Manual number Contents
or Additional Manual name code
Programming
Detaileds about the analog special function block
FX3G/FX3U/FX3UC User's Manual- (FX3U-4AD, FX3U-4DA, FX3UC-4AD) and analog
JY997D16701 Additional Manual 09R619
Analog Control Edition special adapter
(FX3U-****-ADP).
Details about simple N : N link, parallel link,
FX Series User's Manual -Data
JY997D16901 Additional Manual computer link and no-protocol communication 09R715
Communication Edition
(RS instruction and FX2N-232IF).
FX3G/FX3U/FX3UC Series User's Details about the positioning function built in the
JY997D16801 Additional Manual 09R620
Manual -Positioning Edition FX3G/FX3U/FX3UC Series.
Describes details of the FX3U-CF-ADP CF card
FX3U-CF-ADP User's Manual JY997D35401 Additional Manual 09R720
special adapter.
FX1S/FX1N/FX2N/FX1NC/FX2NC PLCs
Supplied with product Model
Manual name Manual number Contents
or Additional Manual name code
PLC main unit
Details about the hardware including I/O
FX1S HARDWARE MANUAL JY992D83901 Additional Manual specifications, wiring, installation and -
maintenance of the FX1S PLC main unit.
Details about the hardware including I/O
FX1N HARDWARE MANUAL JY992D89301 Additional Manual specifications, wiring, installation and -
maintenance of the FX1N PLC main unit.
Details about the hardware including I/O
FX2N HARDWARE MANUAL JY992D66301 Additional Manual specifications, wiring, installation and 09R508
maintenance of the FX2N PLC main unit.
Details about the hardware including I/O
specifications, wiring, installation and
FX1NC HARDWARE MANUAL JY992D92101 Additional Manual 09R505
maintenance of the FX1NC PLC main unit.
(Japanese only)
Details about the hardware including I/O
FX2NC HARDWARE MANUAL JY992D76401 Additional Manual specifications, wiring, installation and 09R509
maintenance of the FX2NC PLC main unit.
Programming
Details about simple N : N link, parallel link,
FX Series User's Manual -Data
JY997D16901 Additional Manual computer link and no-protocol communication 09R715
Communication Edition
(RS instruction and FX2N-232IF).
13
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
FX0/FX0S/FX0N/FXU/FX2C PLCs [whose production is finished]
Supplied with product Model
Manual name Manual number Contents
or Additional Manual name code
PLC main unit
Details about the hardware including I/O
FX0/FX0N HARDWARE MANUAL JY992D47501 Supplied with product specifications, wiring, installation and -
maintenance of the FX0/FX0N PLC main unit.
Details about the hardware including I/O
FX0S HARDWARE MANUAL JY992D55301 Supplied with product specifications, wiring, installation and -
maintenance of the FX0S PLC main unit.
Details about the hardware including I/O
FX/FX2C HARDWARE MANUAL JY992D47401 Supplied with product specifications, wiring, installation and -
maintenance of the FXU/FX2C PLC main unit.
Programming
Details about simple N : N link, parallel link,
FX Series User's Manual -Data
JY997D16901 Additional Manual computer link and no-protocol communication 09R715
Communication Edition
(RS instruction and FX2N-232IF).
Manuals of models whose production is finished
Production is finished for FX0/FX0S/FX0N/FXU/FX2C PLCs.
14
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
Generic Names and Abbreviations Used in Manuals
Abbreviation/generic name Name
PLCs
FX3U Series or FX3U PLC Generic name of FX3U Series PLCs
FX3UC Series or FX3UC PLC Generic name of FX3UC Series PLCs
FX3G Series or FX3G PLC Generic name of FX3G Series PLCs
FX2N Series or FX2N PLC Generic name of FX2N Series PLCs
FX2NC Series or FX2NC PLC Generic name of FX2NC Series PLCs
FX1N Series or FX1N PLC Generic name of FX1N Series PLCs
Generic name of FX1NC Series PLCs
FX1NC Series or FX1NC PLC
These products can only used in Japan.
FX1S Series or FX1S PLC Generic name of FX1S Series PLCs
FXU Series or FXU PLC Generic name of FXU(FX,FX2) Series PLCs
FX2C Series or FX2C PLC Generic name of FX2C Series PLCs
FX0N Series or FX0N PLC Generic name of FX0N Series PLCs
FX0S Series or FX0S PLC Generic name of FX0S Series PLCs
FX0 Series or FX0 PLC Generic name of FX0 Series PLCs
Special adapters
CF card special adapter Generic name of CF card special adapters
CF-ADP FX3U-CF-ADP
Programming language
ST Abbreviation of structured text language
Structured ladder Abbreviation of ladder diagram language
Manuals
Q/FX Structured Programming Manual
Abbreviation of QCPU/FXCPU Structured Programming Manual (Fundamentals)
(Fundamentals)
FX Structured Programming Manual
Abbreviation of FXCPU Structured Programming Manual (Device & Common)
(Device & Common)
FX Structured Programming Manual
Abbreviation of FXCPU Structured Programming Manual (Basic & Applied Instruction)
(Basic & Applied Instruction)
FX Structured Programming Manual
Abbreviation of FXCPU Structured Programming Manual (Application Functions)
(Application Functions)
COMMUNICATION CONTROL
Abbreviation of FX Series User's Manual-DATA COMMUNICATION CONTROL EDITION
EDITION
ANALOG CONTROL EDITION Abbreviation of FX3G/FX3U/FX3UC Series User's Manual-ANALOG CONTROL EDITION
POSITIONING CONTROL EDITION Abbreviation of FX3G/FX3U/FX3UC Series User's Manual-POSITIONING CONTROL EDITION
15
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.1 Outline of Structured Programs and Programming
1. Outline
This manual explains setting of sequence instructions for structured programs provided by GX Works2.
Refer to another manuals for device, parameter, and application functions for structured programs.
Refer to the following manual for label, data types and programming languages for structured programs.
→ Q/FX Structured Programming Manual (Fundamentals)
1.1 Outline of Structured Programs and Programming languages
1.1.1 Outline of Structured Programs
You can construct two or more programs (program blocks) into one program.
Because you can divide the entire machine processing into small sub processes and create a program for
each sub process, you can create a program for a large system efficiently.
1. Structured program
Program structuring is a technique to divide the contents of control executed by the PLC CPU into
hierarchical small units (blocks) of processing, and then construct a program. By using this technique, you
can design a program while recognizing structuring of a sequence program.
Advantages of hierarchical program
• You can examine the outline of a program at first, and then design its details gradually.
• Program blocks located at the lowest level in the hierarchy are extremely simple and highly dependent.
Advantages of program consisting of program blocks
• Because the processing of each block is clear, the entire program is easy to understand.
• The entire program can be divided into several blocks that are created by several people.
• The program reusability is improved, and the development efficiency is improved accordingly.
2. Improved reusability of programs
You can save program blocks in a library. Program resources in the library can be shared, and often used
again.
16
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.2 PLC Series and Programming Software Version
1
1.1.2 Programming languages
Outline
The following programming languages can be used in each program block.
Graphic languages
1. Structured ladder language
2
Instruction List
This graphic language is created based on the relay circuit design technology.
Any circuit always starts from the bus line located on the leftmost.
The structured ladder language consists of contacts, coils, functions and function blocks. These components
are connected with vertical lines and horizontal lines.
1 X000 X001 Y000 3
Output Y000
Instruction
Configuration of
Y000
2 MOV
X001
4
EN ENO
D0 s d D2
Instructions
Explanation of
How to Read
When X001 is ON, the contents
of D0 are transferred to D2.
Text language
1. ST ("Structured text language")
5
Basic Instruction
The ST language can describe control achieved by syntax using selective branches with conditional
statements and repetition by repetitive statements in the same way as high-level languages such as C
language. By using the ST language, you can create simple programs easy to understand.
Y000:=(X000 OR Y000) AND NOT X001;
IF X001 THEN 6
D2:=D0; (* When X001 is ON, the contents of D0 are transferred to D2.*)
Instructions
Step Ladder
END_IF;
IF X002 THEN
D4:=D4+1; (* When X002 is ON, the contents of D4 are added by "1". *)
ELSE
D6:=D6+1; (* When X002 is OFF, the contents of D6 are added by "1". *)
END_IF; 7
Instructions
Applied
1.2 PLC Series and Programming Software Version
Software package name
8
PLC series GX Works2 version
Function
and Pulse Catch
Interrupt Function
(model name)
FX3U•FX3UC
FX3G
FX2N•FX2NC
FX1N•FX1NC
FX1S
GX Works2
(SW1DNC-GXW2-E)
Ver. 1.08J or later A
and addresses
between devices
Relationships
FXU•FX2C
FX0N
FX0•FX0S
17
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1.3 Cautions on Creation of Fundamental Programs
This section explains cautions on programming.
Refer to the following manual for cautions on structured programs and programming languages:
→ Q/FX Structured Programming Manual (Fundamentals)
Refer to the following programming manual for detailed operations of and cautions on devices and
parameters:
→ FX Structured Programming Manual (Device & Common)
1.3.1 I/O PROCESSING AND RESPONSE DELAY
1. Operation timing of I/O relays and resonse
delay The ON/OFF status of input terminals
(1) [Input processing] is received at one time.
FX PLCs execute the I/O processing by repeating Input image
the processing (1) to processing (3). memory is read. Input image is read,
and operation is
Accordingly, the control executed by PLCs executed according
Scan
contains not only the drive time of input filters and time
(2) [Program processing] to program.
output devices but also the response delay caused (operation Image memory of
each device is updated.
by the operation cycle. cycle)
(3) [Output processing] Output
Acquiring the latest I/O information Result is transferred devices
For acquiring the latest input information or to output latch
Batch I/O method memory. are driven.
immediately outputting the operation result in the (refresh method)
middle of the operation cycle shown above, the I/O
refresh instruction "REF" is available.
2. Short input pulses cannot be received.
The ON duration and OFF duration of inputs in PLCs require longer time than "PLC cycle time + Input filter
response delay."
When the response delay "10 ms" of the input filter is considered and the cycle time is supposed as "10 ms",
the ON duration and OFF duration should be at least 20 ms respectively.
Accordingly, PLCs cannot handle input pulses at 25 Hz (1000 / (20+20) = 25) or more. However, the situation
can be improved by PLC special functions and instructions.
Convenient functions for
improvement This "input ON" can be received.
By using the following functions, PLCs Input ON" This "input OFF"
can receive pulses shorter than the cannot be received. cannot be received.
operation cycle. OFF ON ON OFF
• High speed counter function Program Program Program Program
processing processing processing processing
• Input interrupt function
• Pulse catch function Input processing
Operation cycle
Output ( Time)
• Input filter value adjustment function processing
18
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1
1.3.2 Double output (double coil) operation and countermeasures
Outline
This subsection explains the double output (double coil) operation and countermeasures.
1. Operation of double output
When a coil (output variable) is used twice (double coil) in another program block to be executed or in the
same program block, the PLC gives priority to the last coil.
2
Instruction List
Suppose that the same coil Y003 is used in two positions as
shown in the figure on the right. Input processing
For example, suppose that X001 is ON and X002 is OFF. X001=ON X002=OFF
In the first coil Y003, the image memory turns ON and the output X001
First
Y003 3
Y004 turns ON also because the input X001 is ON.
Instruction
Configuration of
In the second coil Y003, however, the image memory is set to
OFF because the input X002 is OFF. Y003 Y004
Accordingly, the actual output to the outside is "Y003 = OFF,
Y004 = ON". Second
4
Instructions
Explanation of
How to Read
X002 Y003
Output processing
Y003=OFF Y004=ON 5
Basic Instruction
2. Countermeasures against double output
Double output (double coil) does not cause an illegal input (program error), but the operation is disrupted as
described above. Change the program as shown in the example below.
A B Y000
A B Y000 6
Instructions
Step Ladder
C E
Ignored D
C E Y000 7
Instructions
Applied
D
A B M100
Or
C E M101
8
Function
and Pulse Catch
Interrupt Function
M100 Y000
A
and addresses
between devices
Relationships
M101
SET, RST or jump instruction can be used instead, or a same output coil can be programmed at each state by
using step ladder instructions STL or RET.
When you use the step ladder instruction STL or RET, note that the PLC regards it as double coils if you
program, inside the state, an output coil located outside the RET from another program block or the STL
instruction.
19
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1.3.3 Circuits which cannot be created by structured ladder programs and
countermeasures
1. Bridge circuit
A circuit in which the current flows in both directions should be changed as shown in the figure on the right (so
that a circuit without D and a circuit without B are connected in parallel).
A B F C E B F
A
E
A E D
C D
C
2. Coil connection position
• You can program a contact on the right side of a coil. In this case, be sure to program a coil (including a
function or a function block) at the end of the circuit.
A B C D A E
E B D C
Or
A E B D C
1.3.4 Handling of general flags
In some types of sequence instructions, the following flags operate:
<Examples> M8020: Zero flag M8021: Borrow flag
M8022: Carry flag M8029: Instruction execution complete flag
M8090: Block comparison signal*1 M8328: Instruction non-execution flag*1
M8329: Instruction execution abnormal complete flag *2
M8304: Zero flag*1 M8306: Carry flag*1
*1. Supported only by FX3U and FX3UC PCLs.
*2. Supported only by FX3U, FX3UC and FX3G PLCs.
Each of these flags turns ON or OFF every time the PLC executes a corresponding function. These flags do
not turn ON or OFF when the PLC does not execute a corresponding function or when an error occurs.
Because these flags turn ON or OFF in many sequence instructions, the ON/OFF status of flags changes
every time such instructions are executed.
Refer to the examples in the next page, and program a flag contact just under the target sequence instruction.
20
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1
1. Program containing many flags (example of instruction execution complete flag M8029)
Outline
If you program the instruction execution completion flag M8029 for two or more sequence instructions which
actuate the flag M8029, you cannot judge easily by which sequence instruction the flag M8029 is controlled.
In addition, the flag M8029 does not turn ON or OFF correctly for each corresponding sequence instruction.
Refer to the next page when you would like to use the flag M8029 in any position other than the position just
under the corresponding sequence instruction. 2
Instruction List
Good example
M8000 DSW
EN ENO
X010
1
s
n
d1
d2
Y010
D0 3
Instruction
Configuration of
M8029 MUL
M8029 works as
a flag to indicate EN ENO
Execution is
that execution completed. D0 s1 d Number of
of DSW is 10 s2 output pulses
completed.
4
Instructions
Explanation of
How to Read
X000 M0
S
M0 DPLSY
1000
EN
s1
ENO
d Y000
5
M8029 works as
Basic Instruction
Number of
a flag to indicate output pulses
s2
that execution
of DPLSY is M8029 M0
completed. R
Execution is
completed.
6
Instructions
Step Ladder
Bad example M8029 works as a M8029 M0
flag to indicate that R Program for DPLSY (on the upper side)
execution of DPLSY Execution is
(on the lower side) completed.
is completed.
M8000 DSW 7
EN ENO
Instructions
Applied
X010 s d1 Y010
M8029 works as
a flag to indicate 1 n d2 D0
that execution
of DSW is
completed. X000 M0
S
8
Function
and Pulse Catch
Interrupt Function
M0 DPLSY DPLSY (on the upper side)
EN ENO
1000 s1 d Y000
M8029 works as Number of
a flag to indicate s2
output pulses
that execution of
DPLSY (on the
upper side) is
M8029 MUL Program for DSW A
EN ENO
and addresses
between devices
Relationships
completed.
Execution is D0 s1 d Number of output pulses
completed. 10 s2
M1 DPLSY DPLSY (on the lower side)
EN ENO
1000 s1 d Y001
Number of s2
output pulses 2
21
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
2. Introduction of method for using flags in any positions other than directly under sequence
instructions.
When two or more sequence instructions are programmed, general flags turn ON or OFF when each
sequence instruction turns ON.
Accordingly, when using a flag in any position other than directly under a sequence instruction, set to ON or
OFF another bit device (variable), and then use the contact (variable) of the device as the command contact.
M8000 DSW
EN ENO
X010 s d1 Y010
1 n d2 D0
DSW execution
complete flag
M8029 is changed M100
M8029
to M100.
Execution is
completed.
M0 DPLSY
EN ENO
1000 s1 d Y000
DPLSY execution Number of s2
complete flag output pulses
M8029 is changed M0
M8029
to M200. R
Execution is
completed.
M200
It works as DSW
execution complete flag.
M100 MUL
EN ENO
D0 s1 d Number of
It works as DPLSY 10 s2 output pulses
execution complete flag.
M200 Y030
22
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1
1.3.5 Handling of operation error flag
Outline
When there is an error in the sequence instruction configuration, target device or target device number range
and an error occurs while operation is executed, the following flag turns ON and the error information is store.
1. Operation error
2
Instruction List
Device storing error occurrence step
Error flag Device storing error code FX0/FX0S/FX0N/FXU/FX2C/FX1S
FX3U/FX3UC
/FX1N/FX2N/FX1NC/FX2NC/FX3G
M8067 D8067 D8069*1 D8315, D8314
*1. When the error occurrence step is up to the 32767th step in FX3U and FX3UC PLCs, the error 3
occurrence step can be checked in D8069 (16 bits).
Instruction
Configuration of
• When an operation error has occurred, M8067 is set, D8067 stores the operation error code number, and
the device storing error occurrence step (see the table above) stores the error occurrence step number.
• If another error occurs in another step, the stored data is updated in turn to the error code and step number
of the new error. (These devices are set to OFF when errors are cleared.) 4
• When the PLC mode switches from STOP to RUN, these devices are cleared instantaneously, and then
Instructions
Explanation of
How to Read
set to ON again if errors have not been cleared.
2. Operation error latch
Error flag Device storing error code
Device storing error occurrence step
5
FX0/FX0S/FX0N/FXU/FX2C/FX1S
Basic Instruction
FX3U/FX3UC
/FX1N/FX2N/FX1NC/FX2NC/FX3G
M8068 - D8068*2 D8313, D8312
*2. When the error occurrence step is up to the 32767th step in FX3U and FX3UC PLCs, the error
occurrence step can be checked in D8068 (16 bits).
6
Instructions
Step Ladder
• When an operation error has occurred, M8068 is set, and the device storing error occurrence step (see the
table above) stores the error occurrence step number.
• Even if another error has occurred in another step, the stored data is not updated, and remains held until
these devices are forcibly reset or until the power turns OFF.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
23
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1.3.6 Handling of function extension flag
In some sequence instructions, the function can be extended by combining a specific special auxiliary relay
determined for each sequence instruction. An example is explained below using a structured ladder program.
• When X000 turns ON, this instruction exchanges the
X000 XCHP
contents of D10 and D11 with each other. EN ENO
d1 D10
d2 D11
• If M8160 has been driven before the XCH function and
X000 M8160
the source and destination of the XCH instruction are Function extension flag
specified to the same device, high-order 8 bits and low- for the XCH instruction
order 8 bits are exchanged with each other inside the XCHP
device. EN ENO
d1 D10 Same
d2 D10 number
• For returning this XCH to the normal XCH function, it is M8000 M8160
necessary to set M8160 to OFF.
When using an instruction requiring the function extension flag in an interrupt program, program DI function
(for disabling interrupt) before driving the function extension flag, and program EI function (for enabling
interrupt) after turning OFF the function extension flag.
1.3.7 Limitation in number of sequence instructions and number of simultaneous
instances of instructions
Each sequence instruction has a limitation in the number of using the instruction and the number of
simultaneous instances of instructions. The limitation, however, differs from one PLC to another.
Limitations in the number of instructions
Some instructions can be used only up to the specified number of times.
As for the instructions having a limited number of times of use and whose operands allow indexing, device
numbers and numeric values in such instructions can be changed by index registers. By indexing, when
driving multiple instances simultaneously is required, such instruction can be used as if they were used
beyond the allowable number of times.
→ FX Structured Programming Manual (Device & Common)
Note that some PLCs do not provide some instructions.
→ 2. Instruction List
FX3U, FX3UC and FX3G PLCs
Instruction Allowable number of times of
Remarks
name use
MTR 1 -
DHSCS FX3U, FX3UC PLC is the allowable number of times of sum total use of DHSCS,
DHSCR FX3U, FX3UC PLC is 32. DHSCR, DHSZ, DHSCT.
FX3G PLC is 6. FX3G PLC is the allowable number of times of sum total use of DHSCS, DHSCR,
DHSZ DHSZ.
Pay attention so that this instruction does not overlap the input numbers in interrupt
8
SPD input in DVIT instruction, DOG inputs in ZRN instruction, zero point signal in DSZR
(1 instruction / 1 input or fewer)
instruction, input interrupt numbers and high speed counter input numbers.
IST 1 -
SORT 1 FX3G PLC is not provided.
TKY 1 FX3G PLC is not provided.
HKY 1 FX3G PLC is not provided.
ARWS 1 FX3G PLC is not provided.
PR 2 FX3G PLC is not provided.
SORT2 2 FX3G PLC is not provided.
5
DUTY FX3G PLC is not provided.
(1 instruction / 1 output or fewer)
DHSCT 1 FX3G PLC is not provided.
24
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
1
FX1S, FX1N, FX1NC, FX2N and FX2NC PLCs
Outline
Instruction Allowable number of times of use
name FX1S, FX1N, FX1NC FX2N, FX2NC
MTR 1 1
SPD
PWM
1
1
1
1
2
Instruction List
IST 1 1
ABSD 1 1
INCD 1 1
ROTC FX1S, FX1N or FX1NC PLCs are not provided. 1
SORT
TKY
FX1S, FX1N or FX1NC PLCs are not provided.
FX1S, FX1N or FX1NC PLCs are not provided.
1
1
3
Instruction
Configuration of
HKY FX1S, FX1N or FX1NC PLCs are not provided. 1
DSW No limit 2
SEGL No limit 2
ARWS FX1S, FX1N or FX1NC PLCs are not provided. 1
PR FX1S, FX1N or FX1NC PLCs are not provided. 2
4
FX0, FX0S, FX0N, FXU and FX2C PLCs
Instructions
Explanation of
How to Read
Instruction Allowable number of
Remarks
name times of use
MTR 1 FX0, FX0S or FX0N PLCs are not provided.
PLSY
PWM
1
1
- 5
Basic Instruction
IST 1 -
ABSD 1
INCD 1
ROTC 1
SORT 1
TKY 1 6
FX0, FX0S or FX0N PLCs are not provided.
Instructions
Step Ladder
HKY 1
DSW 2
SEGL 2
ARWS 1
PR 2
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
25
FXCPU Structured Programming Manual 1 Outline
(Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs
Limitation in simultaneous instances of instructions
Some instructions can be programmed two or more times, but the number of simultaneous instances is
limited. Even in instructions not shown below, if two or more instructions are driven at the same time for a
same I/O number, it is regarded as double outputs. In some combinations of instructions, the operation may
be disrupted, or the instructions cannot be executed.
For details, refer to the caution described in each instruction page.
• FX3U, FX3UC and FX3G PLCs
PLSY, PWM, PLSR, DSZR, DVIT*1, ZRN, PLSV, DRVI, DRVA
DHSCS, DHSCR, DHSZ, DHSCT*1
RS, RS2, IVCK, IVDR, IVRD, IVWR, IVBWR*1
*1. FX3G PLC is not compatible.
• FX1S, FX1N, FX1NC, FX2N and FX2NC PLCs
DHSCS, DHSCR, DHSZ(FX1S, FX1N, FX1NC, FX2N and FX2NC PLCs)
RS (FX2N and FX2NC PLCs)
PLSY, PLSR, RS, ZRN, PLSV, DRVI, DRVA(FX1S, FX1N and FX1NC PLCs)
• FX0, FX0S, FX0N, FXU and FX2C PLCs
DHSCS, DHSCR, DHSZ(FX0, FX0S, FX0N, FXU and FX2C PLCs)
RS (FX0N, FXU and FX2C PLCs)
26
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.1 Basic Instructions
Outline
2. Instruction List
This chapter introduces a list of instructions available in programming. 2
Instruction List
2.1 Basic Instructions
Applicable PLCs
3
Instruction
Configuration of
FXU/FX2C
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
Initial logical operation contact type NO
LD
(normally open)
Initial logical operation contact type NC
4
LDI
Instructions
Explanation of
How to Read
(normally closed)
AND Serial connection of NO contacts 3 3 3 3 3 3 3 3 Section 5.1
ANI Serial connection of NC contacts
OR Parallel connection of NO contacts
ORI
LDP
Parallel connection of NC contacts
Initial logical operation of rising edge pulse
5
Basic Instruction
LDF Initial logical operation of falling edge pulse
ANDP Serial connection of rising edge pulse
3 3 3 3 3 Section 5.2
ANDF Serial connection of falling edge pulse
ORP Parallel connection of rising edge pulse
ORF Parallel connection of falling edge pulse 6
OUT Coil drive 3 3 3 3 3 3 3 3 Section 5.3
Instructions
Step Ladder
OUT_T Timer drive 3 3 3 3 3 3 3 3 Section 5.4.1
OUT_C
Counter drive 3 3 3 3 3 3 3 3 Section 5.5.1
OUT_C_32
···)
AND( Serial connection of circuit block
3 3 3 3 3 3 3 3 Section 5.6 7
OR(···) Parallel connection of circuit block
Instructions
Applied
MPS Stack pushdown
MRD Stack read 3 3 3 3 3 3 3 3 Section 5.7
MPP Stack popup
Invert the current result of the internal PLC
INV
operations
3 3 3 3 3 Section 5.8
8
Function
and Pulse Catch
Interrupt Function
Conversion of operation result to leading edge
MEP
pulse
*1 3 Section 5.9
Conversion of operation result to trailing edge
MEF
pulse
SET Set bit device latch ON
RST
Reset bit device OFF and clear current value and
resister
3 3 3 3 3 3 3 3 Section 5.10
A
and addresses
between devices
Relationships
PLS Rising edge pulse differential output
3 3 3 3 3 3 3 3 Section 5.11
PLF Falling edge pulse differential output
MC Connection to common contact
3 3 3 3 3 3 3 3 Section 5.12
MCR Clear connection to common contact
END Program END, I/O refresh and return to step 0 3 3 3 3 3 3 3 3 Section 5.13
NOP No operation or null step Section 5.14
*1. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.30 or later.
27
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.2 Step Ladder Instructions
2.2 Step Ladder Instructions
Applicable PLCs
FXU/FX2C
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
STL Starts step ladder 3 3 3 3 3 3 3 3 Section 6.2
RET Completes step ladder 3 3 3 3 3 3 3 3 Section 6.3
2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Program Flow
CJ Continuous 3 3 3 3 3 3 3 3
Conditional jump Section 7.1.1
CJP Pulse 3 3 3 3 3 3
CALL Continuous 3 3 3 3 3 3
Call subroutine Section 7.1.2
CALLP Pulse 3 3 3 3 3 3
SRET Continuous Subroutine return 3 3 3 3 3 3 Section 7.1.3
IRET Continuous Interrupt return 3 3 3 3 3 3 3 3 Section 7.1.4
DI Continuous Disable interrupt 3 3 3 3 3 3 3 3 Section 7.1.5
EI Continuous Enable interrupt 3 3 3 3 3 3 3 3 Section 7.1.6
FEND Continuous Main routine program end 3 3 3 3 3 3 3 3 Section 7.1.7
WDT Continuous 3 3 3 3 3 3 3 3
Watchdog timer refresh Section 7.1.8
WDTP Pulse 3 3 3 3 3 3
FOR Continuous Start a FOR/NEXT loop 3 3 3 3 3 3 3 3 Section 7.1.9
NEXT Continuous End a FOR/NEXT loop 3 3 3 3 3 3 3 3 Section 7.1.10
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
28
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
2
Move and Compare
Instruction List
CMP Continuous 3 3 3 3 3 3 3 3
CMPP Pulse 3 3 3 3 3 3
Compare Section 7.2.1
DCMP Continuous 3 3 3 3 3 3 3 3
DCMPP Pulse 3 3 3 3 3 3
ZCP Continuous 3 3 3 3 3 3 3 3 3
Instruction
Configuration of
ZCPP Pulse 3 3 3 3 3 3
Zone compare Section 7.2.2
DZCP Continuous 3 3 3 3 3 3 3 3
DZCPP Pulse 3 3 3 3 3 3
MOV Continuous 3 3 3 3 3 3 3 3
MOVP Pulse 3 3 3 3 3 3
DMOV Continuous
Move
3 3 3 3 3 3 3 3
Section 7.2.3 4
Instructions
Explanation of
How to Read
DMOVP Pulse 3 3 3 3 3 3
SMOV Continuous 3 3 3 3
Shift move Section 7.2.4
SMOVP Pulse 3 3 3 3
CML Continuous 3 3 3 3
CMLP
DCML
Pulse
Continuous
Inversion move
3
3
3
3
3
3
3
3
Section 7.2.5 5
Basic Instruction
DCMLP Pulse 3 3 3 3
BMOV Continuous 3 3 3 3 3 3 3
Block move Section 7.2.6
BMOVP Pulse 3 3 3 3 3 3
FMOV Continuous 3 3 3 3
FMOVP
DFMOV
Pulse
Continuous
Fill move
3
3
3
3
3
3
3
*1
Section 7.2.7 6
Instructions
Step Ladder
DFMOVP Pulse 3 3 3 *1
XCH Continuous 3 3 3
XCHP Pulse 3 3 3
Exchange Section 7.2.8
DXCH Continuous 3 3 3
DXCHP
BCD
Pulse
Continuous
3
3 3
3
3 3 3
3
3 3 3
7
Instructions
Applied
BCDP Pulse 3 3 3 3 3 3
Conversion to binary coded decimal Section 7.2.9
DBCD Continuous 3 3 3 3 3 3 3 3
DBCDP Pulse 3 3 3 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
8
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
29
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Move and Compare
BIN Continuous 3 3 3 3 3 3 3 3
BINP Pulse 3 3 3 3 3 3
Conversion to binary Section 7.2.10
DBIN Continuous 3 3 3 3 3 3 3 3
DBINP Pulse 3 3 3 3 3 3
Arithmetic and Logical Operation
ADD Continuous 3 3 3 3 3 3 3 3
ADDP Pulse 3 3 3 3 3 3
Addition Section 7.3.1
DADD Continuous 3 3 3 3 3 3 3 3
DADDP Pulse 3 3 3 3 3 3
SUB Continuous 3 3 3 3 3 3 3 3
SUBP Pulse 3 3 3 3 3 3
Subtraction Section 7.3.2
DSUB Continuous 3 3 3 3 3 3 3 3
DSUBP Pulse 3 3 3 3 3 3
MUL Continuous 3 3 3 3 3 3 3 3
MULP Pulse 3 3 3 3 3 3
Multiplication Section 7.3.3
DMUL Continuous 3 3 3 3 3 3 3 3
DMULP Pulse 3 3 3 3 3 3
DIV Continuous 3 3 3 3 3 3 3 3
DIVP Pulse 3 3 3 3 3 3
Division Section 7.3.4
DDIV Continuous 3 3 3 3 3 3 3 3
DDIVP Pulse 3 3 3 3 3 3
INC Continuous 3 3 3 3 3 3 3 3
INCP Pulse 3 3 3 3 3 3
Increment Section 7.3.5
DINC Continuous 3 3 3 3 3 3 3 3
DINCP Pulse 3 3 3 3 3 3
DEC Continuous 3 3 3 3 3 3 3 3
DECP Pulse 3 3 3 3 3 3
Decrement Section 7.3.6
DDEC Continuous 3 3 3 3 3 3 3 3
DDECP Pulse 3 3 3 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
30
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Arithmetic and Logical Operation
2
Instruction List
WAND Continuous 3 3 3 3 3 3 3 3
WANDP Pulse 3 3 3 3 3 3
Logical word AND Section 7.3.7
DAND Continuous 3 3 3 3 3 3 3 3
DANDP Pulse 3 3 3 3 3 3
WOR
WORP
Continuous
Pulse
3
3
3
3
3
3
3
3
3
3
3
3
3 3
3
Logical word OR Section 7.3.8
Instruction
Configuration of
DOR Continuous 3 3 3 3 3 3 3 3
DORP Pulse 3 3 3 3 3 3
WXOR Continuous 3 3 3 3 3 3 3 3
WXORP Pulse 3 3 3 3 3 3
Logical exclusive OR Section 7.3.9
DXOR
DXORP
Continuous
Pulse
3
3
3
3
3
3
3
3
3
3
3
3
3 3
4
Instructions
Explanation of
How to Read
NEG Continuous 3 3 3
NEGP Pulse 3 3 3
Negation Section 7.3.10
DNEG Continuous 3 3 3
DNEGP Pulse 3 3 3
Rotation and Shift Operation 5
ROR Continuous 3 3 3 3
Basic Instruction
RORP Pulse 3 3 3 3
Rotation right Section 7.4.1
DROR Continuous 3 3 3 3
DRORP Pulse 3 3 3 3
ROL Continuous 3 3 3 3
ROLP Pulse
Rotation left
3 3 3 3
Section 7.4.2
6
DROL Continuous 3 3 3 3
Instructions
Step Ladder
DROLP Pulse 3 3 3 3
RCR Continuous 3 3 3
RCRP Pulse 3 3 3
Rotation right with carry Section 7.4.3
DRCR Continuous 3 3 3
DRCRP Pulse 3 3 3 7
RCL Continuous 3 3 3
Instructions
Applied
RCLP Pulse 3 3 3
Rotation left with carry Section 7.4.4
DRCL Continuous 3 3 3
DRCLP Pulse 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later. 8
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
and addresses
between devices
Relationships
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
31
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Rotation and Shift Operation
SFTR Continuous 3 3 3 3 3 3 3 3
Bit shift right Section 7.4.5
SFTRP Pulse 3 3 3 3 3 3
SFTL Continuous 3 3 3 3 3 3 3 3
Bit shift left Section 7.4.6
SFTLP Pulse 3 3 3 3 3 3
WSFR Continuous 3 3 3 3
Word shift right Section 7.4.7
WSFRP Pulse 3 3 3 3
WSFL Continuous 3 3 3 3
Word shift left Section 7.4.8
WSFLP Pulse 3 3 3 3
SFWR Continuous Shift write 3 3 3 3 3 3
Section 7.4.9
SFWRP Pulse [FIFO/FILO control] 3 3 3 3 3 3
SFRD Continuous Shift read 3 3 3 3 3 3
Section 7.4.10
SFRDP Pulse [FIFO control] 3 3 3 3 3 3
Data Operation
ZRST Continuous 3 3 3 3 3 3 3 3
Zone reset Section 7.5.1
ZRSTP Pulse 3 3 3 3 3 3
DECO Continuous 3 3 3 3 3 3 3 3
Decode Section 7.5.2
DECOP Pulse 3 3 3 3 3 3
ENCO Continuous 3 3 3 3 3 3 3 3
Encode Section 7.5.3
ENCOP Pulse 3 3 3 3 3 3
SUM Continuous 3 3 3 3
SUMP Pulse 3 3 3 3
Sum of active bits Section 7.5.4
DSUM Continuous 3 3 3 3
DSUMP Pulse 3 3 3 3
BON Continuous 3 3 3 3
BONP Pulse 3 3 3 3
Check specified bit status Section 7.5.5
DBON Continuous 3 3 3 3
DBONP Pulse 3 3 3 3
MEAN Continuous 3 3 3 3
MEANP Pulse 3 3 3 3
Mean Section 7.5.6
DMEAN Continuous 3 3 3 *1
DMEANP Pulse 3 3 3 *1
ANS Continuous Timed annunciator set 3 3 3 3 Section 7.5.7
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
32
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Data Operation
2
Instruction List
ANR Continuous 3 3 3 3
Annuncator reset Section 7.5.8
ANRP Pulse 3 3 3 3
SQR Continuous 3 3 3
SQRP Pulse 3 3 3
Square root Section 7.5.9
DSQR Continuous 3 3 3
3
DSQRP Pulse 3 3 3
Instruction
Configuration of
FLT Continuous 3 *12 3 *2
FLTP Pulse 3 *12 3 *2
Conversion to floating point Section 7.5.10
DFLT Continuous 3 *12 3 *2
DFLTP Pulse 3 *12 3 *2
High Speed Processing 4
REF Continuous 3 3 3 3 3 3 3 3
Instructions
Explanation of
How to Read
Refresh Section 7.6.1
REFP Pulse 3 3 3 3 3 3
REFF Continuous 3 3 3
Refresh and filter adjust Section 7.6.2
REFFP Pulse 3 3 3
MTR Continuous Input matrix 3 3 3 3 3 3 Section 7.6.3
DHSCS Continuous High speed counter set 3 3 3 3 3 3 3 3 Section 7.6.4 5
Basic Instruction
DHSCR Continuous High speed counter reset 3 3 3 3 3 3 3 3 Section 7.6.5
DHSZ Continuous High speed counter zone compare 3 3 3 3 Section 7.6.6
SPD Continuous 3 3 3 3 3 3
Speed detection Section 7.6.7
DSPD Continuous *3 3
PLSY
DPLSY
Continuous
Continuous
Pulse Y output
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Section 7.6.8 6
Instructions
Step Ladder
PWM Continuous Pulse width modulation 3 3 3 3 3 3 3 3 Section 7.6.9
PLSR Continuous 3 3 3 3 3
Acceleration/deceleration setup Section 7.6.10
DPLSR Continuous 3 3 3 3 3
Handy Instruction
IST Continuous Initial state 3 3 3 3 3 3 3 3 Section 7.7.1
7
SER Continuous 3 3 3 *2
Instructions
Applied
SERP Pulse 3 3 3 *2
Search a data stack Section 7.7.2
DSER Continuous 3 3 3 *2
DSERP Pulse 3 3 3 *2
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later. 8
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
33
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Handy Instruction
ABSD Continuous 3 3 3 3 3 3
Absolute drum sequencer Section 7.7.3
DABSD Continuous 3 3 3 3 3 *1
INCD Continuous Incremental drum sequencer 3 3 3 3 3 3 Section 7.7.4
TTMR Continuous Teaching timer 3 3 3 Section 7.7.5
STMR Continuous Special timer 3 3 3 Section 7.7.6
ALT Continuous 3 3 3 3 3 3 3 3
Alternate state Section 7.7.7
ALTP Pulse 3 3 3 3 3 3
RAMP Pulse Ramp variable value 3 3 3 3 3 3 3 3 Section 7.7.8
ROTC Continuous Rotary table control 3 3 3 Section 7.7.9
SORT Continuous SORT tabulated data 3 3 *2 Section 7.7.10
External FX I/O Device
TKY Continuous 3 3 3
Ten key input Section 7.8.1
DTKY Continuous 3 3 3
HKY Continuous 3 3 3
Hexadecimal input Section 7.8.2
DHKY Continuous 3 3 3
DSW Continuous Digital switch 3 3 3 3 3 3 Section 7.8.3
SEGD Continuous 3 3 3
Seven segment decoder Section 7.8.4
SEGDP Pulse 3 3 3
SEGL Continuous Seven segment with latch 3 3 3 3 3 3 Section 7.8.5
ARWS Continuous Arrow switch 3 3 3 Section 7.8.6
ASC Continuous ASCII code data input 3 3 3 Section 7.8.7
PR Continuous Print (ASCII code) 3 3 3 Section 7.8.8
FROM Continuous 3 3 3 3 *4 3
FROMP Pulse 3 3 3 3 *4
Read from a special function block Section 7.8.9
DFROM Continuous 3 3 3 3 *4 3
DFROMP Pulse 3 3 3 3 *4
TO Continuous 3 3 3 3 *4 3
TOP Pulse 3 3 3 3 *4
Write to a special function block Section 7.8.10
DTO Continuous 3 3 3 3 *4 3
DTOP Pulse 3 3 3 3 *4
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
34
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
External Device (optional devices)
2
Instruction List
RS Continuous Serial Communication 3 3 3 3 3 *2 *5 Section 7.9.1
PRUN Continuous 3 3 3 3 3 3
PRUNP Pulse 3 3 3 3 3 3
Parallel run (octal mode) Section 7.9.2
DPRUN Continuous 3 3 3 3 3 3
DPRUNP Pulse 3 3 3 3 3 3 3
ASCI Continuous 3 3 3 3 3 *2 *5
Instruction
Configuration of
Hexadecimal to ASCII conversion Section 7.9.3
ASCIP Pulse 3 3 3 3 3 *2
HEX Continuous 3 3 3 3 3 *2 *5
ASCII to hexadecimal conversion Section 7.9.4
HEXP Pulse 3 3 3 3 3 *2
CCD
CCDP
Continuous
Pulse
Check code
3
3
3
3
3
3
3
3
3
3
*2
*2
*5
Section 7.9.5 4
Instructions
Explanation of
How to Read
VRRD Continuous *12 *6 *6 3 3
Volume read Section 7.9.6
VRRDP Pulse *12 *6 *6 3 3
VRSC Continuous *12 *6 *6 3 3
Volume scale Section 7.9.7
VRSCP Pulse *12 *6 *6 3 3
RS2 Continuous Serial data communication 3 3 Section 7.9.8 5
PID Continuous PID control loop 3 3 3 3 3 *7 Section 7.9.9
Basic Instruction
External Device
MNET Continuous *8
F-16NP/NT communication Section 7.10.1
MNETP Pulse *8
ANRD Continuous *8
ANRDP Pulse
Read from F1-6A
*8
Section 7.10.2 6
Instructions
Step Ladder
ANWR Continuous *8
Write to F2-6A Section 7.10.3
ANWRP Pulse *8
RMST Continuous F2-32RM start 3 Section 7.10.4
RMWR Continuous 3
RMWRP Pulse
Write to F2-32RM
3
Section 7.10.5 7
DRMWR Continuous 3
Instructions
Applied
DRMWRP Pulse 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later. 8
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
Function
and Pulse Catch
Interrupt Function
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later. A
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
35
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
External Device
RMRD Continuous 3
RMRDP Pulse 3
Read from F2-32RM Section 7.10.6
DRMRD Continuous 3
DRMRDP Pulse 3
RMMN Continuous 3
F2-32RM monitor Section 7.10.7
RMMNP Pulse 3
BLK Continuous *8
Specify F2-30GM Section 7.10.8
BLKP Pulse *8
MCDE Continuous *8
2-30GM code Section 7.10.9
MCDEP Pulse *8
Data Transfer 2
ZPUSH Continuous 3
Batch store of index register Section 7.11.1
ZPUSHP Pulse 3
ZPOP Continuous 3
Batch POP of index register Section 7.11.2
ZPOPP Pulse 3
Floating Point
DECMP Continuous 3 *12 3
Floating point compare Section 7.12.1
DECMPP Pulse 3 *12 3
DEZCP Continuous 3 3
Floating point zone compare Section 7.12.2
DEZCPP Pulse 3 3
DEMOV Continuous 3 *12
Floating point move Section 7.12.3
DEMOVP Pulse 3 *12
DESTR Continuous Floating point to character string 3
Section 7.12.4
DESTRP Pulse conversion 3
DEVAL Continuous Character string to floating point 3
Section 7.12.5
DEVALP Pulse conversion 3
DEBCD Continuous Floating point to scientific notation 3 3
Section 7.12.6
DEBCDP Pulse conversion 3 3
DEBIN Continuous Scientific notation to floating point 3 3
Section 7.12.7
DEBINP Pulse conversion 3 3
DEADD Continuous 3 *12 3
Floating point addition Section 7.12.8
DEADDP Pulse 3 *12 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
36
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Floating Point
2
Instruction List
DESUB Continuous 3 *12 3
Floating point subtraction Section 7.12.9
DESUBP Pulse 3 *12 3
DEMUL Continuous 3 *12 3
Floating point multiplication Section 7.12.10
DEMULP Pulse 3 *12 3
DEDIV Continuous
Floating point division
3 *12 3
Section 7.12.11 3
DEDIVP Pulse 3 *12 3
Instruction
Configuration of
DEXP Continuous 3
Floating point exponent Section 7.12.12
DEXPP Pulse 3
DLOGE Continuous 3
Floating point natural logarithm Section 7.12.13
DLOGEP Pulse 3
DLOG10 Continuous
Floating point common logarithm
3
Section 7.12.14
4
DLOG10P Pulse 3
Instructions
Explanation of
How to Read
DESQR Continuous 3 *12 3
Floating point square root Section 7.12.15
DESQRP Pulse 3 *12 3
DENEG Continuous 3
Floating point negation Section 7.12.16
DENEGP Pulse 3
INT Continuous 3 *12 3 5
Basic Instruction
INTP Pulse 3 *12 3
Floating point to integer conversion Section 7.12.17
DINT Continuous 3 *12 3
DINTP Pulse 3 *12 3
DSIN Continuous 3 3
Floating point sine Section 7.12.18
DSINP
DCOS
Pulse
Continuous
3
3
3
3
6
Floating point cosine Section 7.12.19
Instructions
Step Ladder
DCOSP Pulse 3 3
DTAN Continuous 3 3
Floating point tangent Section 7.12.20
DTANP Pulse 3 3
DASIN Continuous 3
Floating point arc sine Section 7.12.21
DASINP Pulse 3
7
DACOS Continuous 3
Instructions
Applied
Floating point arc cosine Section 7.12.22
DACOSP Pulse 3
DATAN Continuous 3
Floating point arc tangent Section 7.12.23
DATANP Pulse 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later. 8
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
37
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Floating Point
DRAD Continuous Floating point degrees to radians 3
Section 7.12.24
DRADP Pulse conversion 3
DDEG Continuous Floating point radians to degrees 3
Section 7.12.25
DDEGP Pulse conversion 3
Data Operation 2
WSUM Continuous *9
WSUMP Pulse *9
Sum of word data Section 7.13.1
DWSUM Continuous *9
DWSUMP Pulse *9
WTOB Continuous *9
WORD to BYTE Section 7.13.2
WTOBP Pulse *9
BTOW Continuous *9
BYTE to WORD Section 7.13.3
BTOWP Pulse *9
UNI Continuous *9
4-bit linking of word data Section 7.13.4
UNIP Pulse *9
DIS Continuous *9
4-bit grouping of word data Section 7.13.5
DISP Pulse *9
SWAP Continuous 3 3
SWAPP Pulse 3 3
Byte swap Section 7.13.6
DSWAP Continuous 3 3
DSWAPP Pulse 3 3
SORT2 Continuous *9
Sort tabulated data 2 Section 7.13.7
DSORT2 Continuous *9
Positioning Control
DSZR Continuous Dog search zero return 3 3 Section 7.14.1
DVIT Continuous 3
Interrupt positioning Section 7.14.2
DDVIT Continuous 3
DTBL Continuous Batch data positioning mode *9 3 Section 7.14.3
DABS Continuous Absolute current value read 3 3 *10 3 3 Section 7.14.4
ZRN Continuous 3 3 3 3
Zero return Section 7.14.5
DZRN Continuous 3 3 3 3
PLSV Continuous 3 3 3 3
Variable speed pulse output Section 7.14.6
DPLSV Continuous 3 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
38
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Positioning Control
2
Instruction List
DRVI Continuous 3 3 3 3
Drive to increment Section 7.14.7
DDRVI Continuous 3 3 3 3
DRVA Continuous 3 3 3 3
Drive to absolute Section 7.14.8
DDRVA Continuous 3 3 3 3
Real Time Clock Control
3
TCMP Continuous 3 3 3 3 3
Instruction
Configuration of
RTC data compare Section 7.15.1
TCMPP Pulse 3 3 3 3 3
TZCP Continuous 3 3 3 3 3
RTC data zone compare Section 7.15.2
TZCPP Pulse 3 3 3 3 3
TADD Continuous 3 3 3 3 3
TADDP Pulse
RTC data addition
3 3 3 3 3
Section 7.15.3
4
TSUB Continuous 3 3 3 3 3
Instructions
Explanation of
How to Read
RTC data subtraction Section 7.15.4
TSUBP Pulse 3 3 3 3 3
HTOS Continuous 3
HTOSP Pulse 3
Hour to second conversion Section 7.15.5
DHTOS Continuous 3
DHTOSP Pulse 3 5
Basic Instruction
STOH Continuous 3
STOHP Pulse 3
Second to hour conversion Section 7.15.6
DSTOH Continuous 3
DSTOHP Pulse 3
TRD
TRDP
Continuous
Pulse
Read RTC data
3
3
3
3
3
3
3
3
3
3
Section 7.15.7 6
Instructions
Step Ladder
TWR Continuous 3 3 3 3 3
Set RTC data Section 7.15.8
TWRP Pulse 3 3 3 3 3
HOUR Continuous 3 3 *10 3 3
Hour meter Section 7.15.9
DHOUR Continuous 3 3 *10 3 3
External Device
7
GRY Continuous 3 3 3
Instructions
Applied
GRYP Pulse 3 3 3
Decimal to gray code conversion Section 7.16.1
DGRY Continuous 3 3 3
DGRYP Pulse 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later. 8
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
39
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
External Device
GBIN Continuous 3 3 3
GBINP Pulse 3 3 3
Gray code to decimal conversion Section 7.16.2
DGBIN Continuous 3 3 3
DGBINP Pulse 3 3 3
RD3A Continuous 3 3 *10 3
Read from dedicated analog block Section 7.16.3
RD3AP Pulse 3 3 *10 3
WR3A Continuous 3 3 *10 3
Write to dedicated analog block Section 7.16.4
WR3AP Pulse 3 3 *10 3
Extension Function
EXTR_IN Continuous *10
Section 7.17.1
EXTRP_IN Pulse *10
External ROM function
EXTR_OUT Continuous *10
Section 7.17.2
EXTRP_OUT Pulse *10
Others
COMRD Continuous *9
Read device comment data Section 7.18.1
COMRDP Pulse *9
RND Continuous 3
Random number generation Section 7.18.2
RNDP Pulse 3
DUTY Continuous Timing pulse generation *9 Section 7.18.3
CRC Continuous 3
Cyclic redundancy check Section 7.18.4
CRCP Pulse 3
DHCMOV Continuous High speed counter move 3 Section 7.18.5
Block Data Operation
BK+ Continuous *9
BK+P Pulse *9
Block data addition Section 7.19.1
DBK+ Continuous *9
DBK+P Pulse *9
BK- Continuous *9
BK-P Pulse *9
Block data subtraction Section 7.19.2
DBK- Continuous *9
DBK-P Pulse *9
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
40
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Block Data Operation
2
Instruction List
BKCMP= Continuous *9
BKCMP> Continuous *9
BKCMP< Continuous *9
BKCMP<> Continuous *9
BKCMP<=
BKCMP>=
Continuous
Continuous
*9
*9
3
Instruction
Configuration of
BKCMP=P Pulse *9
BKCMP>P Pulse *9
BKCMP<P Pulse *9
BKCMP<>P Pulse *9
BKCMP<=P
BKCMP>=P
Pulse
Pulse
*9
*9
4
Instructions
Explanation of
How to Read
Block data compare Section 7.19.3
DBKCMP= Continuous *9
DBKCMP> Continuous *9
DBKCMP< Continuous *9
DBKCMP<> Continuous *9
DBKCMP<= Continuous *9 5
DBKCMP>= Continuous *9
Basic Instruction
DBKCMP=P Pulse *9
DBKCMP>P Pulse *9
DBKCMP<P Pulse *9
DBKCMP<>P Pulse *9
DBKCMP<=P Pulse *9 6
DBKCMP>=P Pulse *9
Instructions
Step Ladder
Character String Control
STR Continuous *9
STRP Pulse *9
BIN to character string conversion Section 7.20.1
DSTR Continuous *9
DSTRP Pulse *9 7
VAL Continuous *9
Instructions
Applied
VALP Pulse *9
Character string to BIN conversion Section 7.20.2
DVAL Continuous *9
DVALP Pulse *9
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
8
Function
and Pulse Catch
Interrupt Function
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction. A
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
and addresses
between devices
Relationships
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
41
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Character String Control
$+ Continuous 3
Link character strings Section 7.20.3
$+P Pulse 3
LEN Continuous 3
Character string length detection Section 7.20.4
LENP Pulse 3
RIGHT Continuous Extracting character string data 3
Section 7.20.5
RIGHTP Pulse from the right 3
LEFT Continuous Extracting character string data 3
Section 7.20.6
LEFTP Pulse from the left 3
MIDR Continuous Random selection of character 3
Section 7.20.7
MIDRP Pulse strings 3
MIDW Continuous Random replacement of character 3
Section 7.20.8
MIDWP Pulse strings 3
INSTR Continuous *9
Character string search Section 7.20.9
INSTRP Pulse *9
$MOV Continuous 3
Character string transfer Section 7.20.10
$MOVP Pulse 3
Data Operation 3
FDEL Continuous *9
Deleting data from tables Section 7.21.1
FDELP Pulse *9
FINS Continuous *9
Inserting data to tables Section 7.21.2
FINSP Pulse *9
POP Continuous Shift last data read 3
Section 7.21.3
POPP Pulse [FILO control] 3
SFR Continuous 3
Bit shift right with carry Section 7.21.4
SFRP Pulse 3
SFL Continuous 3
Bit shift left with carry Section 7.21.5
SFLP Pulse 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
42
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Data Comparison
2
Instruction List
LD= Continuous 3 3 3 3 3
LD> Continuous 3 3 3 3 3
LD< Continuous 3 3 3 3 3
LD<> Continuous 3 3 3 3 3
LD<= Continuous 3 3 3 3 3 3
LD>= Continuous 3 3 3 3 3
Instruction
Configuration of
Load compare Section 7.22.1
LDD= Continuous 3 3 3 3 3
LDD> Continuous 3 3 3 3 3
LDD< Continuous 3 3 3 3 3
LDD<>
LDD<=
Continuous
Continuous
3
3
3
3
3
3
3
3
3
3
4
Instructions
Explanation of
How to Read
LD>= Continuous 3 3 3 3 3
AND= Continuous 3 3 3 3 3
AND> Continuous 3 3 3 3 3
AND< Continuous 3 3 3 3 3
AND<> Continuous 3 3 3 3 3 5
AND<= Continuous 3 3 3 3 3
Basic Instruction
AND>= Continuous 3 3 3 3 3
AND compare Section 7.22.2
ANDD= Continuous 3 3 3 3 3
ANDD> Continuous 3 3 3 3 3
ANDD< Continuous 3 3 3 3 3
ANDD<> Continuous 3 3 3 3 3
6
Instructions
Step Ladder
ANDD<= Continuous 3 3 3 3 3
ANDD>= Continuous 3 3 3 3 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
7
Instructions
Applied
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later. 8
Function
and Pulse Catch
Interrupt Function
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
A
and addresses
between devices
Relationships
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
43
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Data Comparison
OR= Continuous 3 3 3 3 3
OR> Continuous 3 3 3 3 3
OR< Continuous 3 3 3 3 3
OR<> Continuous 3 3 3 3 3
OR<= Continuous 3 3 3 3 3
OR>= Continuous 3 3 3 3 3
OR compare Section 7.22.3
ORD= Continuous 3 3 3 3 3
ORD> Continuous 3 3 3 3 3
ORD< Continuous 3 3 3 3 3
ORD<> Continuous 3 3 3 3 3
ORD<= Continuous 3 3 3 3 3
ORD>= Continuous 3 3 3 3 3
Data Table Operation
LIMIT Continuous 3
LIMITP Pulse 3
Limit control Section 7.23.1
DLIMIT Continuous 3
DLIMITP Pulse 3
BAND Continuous 3
BANDP Pulse 3
Dead band control Section 7.23.2
DBAND Continuous 3
DBANDP Pulse 3
ZONE Continuous 3
ZONEP Pulse 3
Zone control Section 7.23.3
DZONE Continuous 3
DZONEP Pulse 3
SCL Continuous 3
SCLP Pulse Scaling 3
Section 7.23.4
DSCL Continuous (coordinate by point data) 3
DSCLP Pulse 3
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
44
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Outline
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Data Table Operation
2
Instruction List
DABIN Continuous *9
DABINP Pulse *9
Decimal ASCII to BIN conversion Section 7.23.5
DDABIN Continuous *9
DDABINP Pulse *9
BINDA Continuous *9 3
BINDAP Pulse *9
Instruction
Configuration of
BIN to decimal ASCII conversion Section 7.23.6
DBINDA Continuous *9
DBINDAP Pulse *9
SCL2 Continuous 3
SCL2P
DSCL2
Pulse Scaling 2
Continuous (coordinate by X/Y data)
3
3
Section 7.23.7 4
Instructions
Explanation of
How to Read
DSCL2P Pulse 3
External Device Communication (Inverter Communication)
IVCK Continuous Inverter status check 3 *12 Section 7.24.1
IVDR Continuous Inverter drive 3 *12 Section 7.24.2
IVRD Continuous Inverter parameter read 3 *12 Section 7.24.3 5
IVWR Continuous Inverter parameter write 3 *12 Section 7.24.4
Basic Instruction
IVBWR Continuous Inverter parameter block write 3 Section 7.24.5
Data Transfer 3
RBFM Continuous Divided BFM read *9 Section 7.25.1
WBFM Continuous Divided BFM write *9 Section 7.25.2
High Speed Processing 2
6
Instructions
Step Ladder
High speed counter compare with
DHSCT Continuous 3 Section 7.26.1
data table
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later. 7
Instructions
Applied
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later. 8
Function
and Pulse Catch
Interrupt Function
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later. A
and addresses
between devices
Relationships
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
45
FXCPU Structured Programming Manual 2 Instruction List
(Basic & Applied Instruction) 2.3 Applied Instructions
Applicable PLCs
FXU/FX2C
Execution
FX3U(C)
FX2N(C)
FX1N(C)
Instruction name Function Reference
FX0(S)
FX3G
FX0N
FX1S
condition
Extension File Register Control
LOADR Continuous 3 3
Load from ER Section 7.27.1
LOADRP Pulse 3 3
SAVER Continuous Save to ER 3 Section 7.27.2
INITR Continuous 3
Initialize R and ER Section 7.27.3
INITRP Pulse 3
LOGR Continuous 3
Logging R and ER Section 7.27.4
LOGRP Pulse 3
RWER Continuous *11 3
Rewrite to ER Section 7.27.5
RWERP Pulse *11 3
INITER Continuous *11
Initialize ER Section 7.27.6
INITERP Pulse *11
FX3U-CF-ADP
FLCRT Continuous File create / check *13 Section 7.28.1
FLDEL Continuous File delete / CF card format *13 Section 7.28.2
FLWR Continuous Data write *13 Section 7.28.3
FLRD Continuous Data read *13 Section 7.28.4
FLCMD Continuous CF-ADP command *13 Section 7.28.5
FLSTRD Continuous CF-ADP status read *13 Section 7.28.6
*1. The instruction is provided in the FXU PLC Ver. 2.30 or later.
*2. The instruction is provided in the FXU PLC Ver. 3.07 or later.
*3. The 32-bit operations are provided in the FX3U and FX3UC PLCs Ver. 2.20 or later.
*4. The instruction is provided in the FXU PLC Ver. 2.10 or later.
*5. The instruction is provided in the FX0N PLC Ver. 1.20 or later.
*6. Though programmed, this instruction is not valid because the FX1NC or FX2NC PLC does not have a
volume to read out under this instruction.
*7. The instruction is provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*8. The instruction is not provided in the FXU and FX2C PLCs Ver. 3.30 or later.
*9. The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
*10. The instruction is provided in the FX2N and FX2NC PLCs Ver. 3.00 or later.
*11. The instruction is provided in the FX3UC PLC Ver. 1.30 or later.
*12. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
*13. The instruction is provided in the FX3U and FX3UC PLCs Ver. 2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
46
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.1 Expression and Operation Form of Sequence
Outline
3. Configuration of Instruction
This chapter explains the configuration of sequence instructions. 2
Instruction List
3.1 Expression and Operation Form of Sequence Instructions
Instructions and arguments 3
• Each instruction is given a specific name that indicates its contents.
Instruction
Configuration of
"SMOV" (shift move) is one of such examples.
• Each instruction consists of the arguments that indicate input and output data used in that particular
instruction.
Command
input SMOV 4
EN ENO
Instructions
Explanation of
How to Read
D0 s d D10
K1 m1
K2 m2
K3 n
: This symbol indicates an argument called "source" that does not change its contents by the 5
execution of an instruction.
Basic Instruction
: This symbol indicates an argument called "destination" that changes its contents by the
execution of an instruction.
m, n : Symbols "m" and "n" indicate an argument that belongs to neither the source nor the
destination.
6
Instructions
Step Ladder
Applicable devices of arguments
• An input variable (label or device) specifies the applicable device of an argument.
• Bit devices such as X, Y, M and S may be handled.
• These bit devices may be combined to form KnX, KnY, KnM and KnS to be handled as numerical data.
→ FX Structured Programming Manual (Device & Common) 7
Instructions
Applied
• The current value register of data register D, timer T and counter C may be handled.
• When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is
a 32-bit long device. Use a global label to specify a device.
When handling 32-bit data, a 16-bit data register D is a combination of data registers of two consecutive
points.
8
Function
and Pulse Catch
Interrupt Function
For example, where data register D0 is defined by a label as the argument of a 32-bit instruction, the 32-bit
data of (D1, D0) is handled. (D1 is high order 16 bits and D2 is low order 16 bits.)
Where the current value registers of T and C are used as general data registers, they are handled in the
same manner.
A
and addresses
between devices
Relationships
47
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.1 Expression and Operation Form of Sequence
Instruction mode and Operation form
Instructions are divided into "16-bit instructions" and "32-bit instructions" depending on the size of values they
handle. The instructions also have characteristics of either a "continuous execution" or "pulse execution"
depending on the form of execution.
Some of the instructions have all these combinations.
1. 16-bit and 32-bit instructions
• An applied instruction that handles a numeric value is either 16 bits or 32 bits depending on the bit length
of the numeric value data.
Instruction that transfers the D10 contents to D12
Command 1 MOV
EN ENO
D10 s d D12
Command 2 DMOV Instruction that transfers the contents of (D21, D20) to (D23,
EN ENO D22).
Label 1 s d Label 2 Label 1 and label 2 define D20 and D22, respectively.
• Where it is a 32-bit instruction, "D" is added to express as "DMOV".
• The specified device can be an even number or an odd number and is used in combination with the device
of the next higher number. (In the case of word devices such as T, C and D)
To avoid confusion, it is suggested to give an even number to the low order device specified by the
argument of a 32-bit instruction.
• A 32-bit counter is of the size of 32 bits with this device alone, enabling to directly specify as an argument.
2. Pulse execution and continuous execution instructions
Pulse operation
In an example shown on the right, when X000 changes from OFF X000 MOVP
to ON, the instruction is executed only once. No other execution EN ENO
takes place. D10 s d D12
It is therefore suggested that the instructions of pulse operation be
used if not executed all the time.
Symbol "P" indicates that the instruction is of pulse operation.
The same is applied to DMOVP.
Continuous operation
The instruction in the figure on the right is of continuous operation. X001 MOV
It is executed in each cycle of operation while X001 is ON. EN ENO
D10 s d D12
Where continuous execution instructions such as INC and DEC are used, some instructions have the
destination contents be changed in each cycle of operation.
In either cases, the instruction is not executed if the drive input X000 or X001 is OFF. The destination does
not change either if the instruction is not specified otherwise.
48
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.2 Labels
1
3.2 Labels
Outline
Types of labels
Labels are either global labels or local labels.
• Global labels are available for use in program blocks and function blocks.
2
Instruction List
• Local labels are available for use only in a declared program part.
Label classes
The label classes indicate how they are used in which program parts.
The table below shows the label classes. 3
Instruction
Configuration of
Program parts available for use
Label class Descriptions Program Function
Function
block block
VAR_GLOBAL A common label that can be used in all program parts. 3 3
VAR_GROBAL_CONSTANT A common constant that can be used in all program parts. 3 3 4
A label used within declared program parts. It cannot be used
Instructions
Explanation of
How to Read
VAR 3 3 3
in other program parts.
A constant used within declared program parts. It cannot be
VAR_CONSTANT 3 3 3
used in other program parts.
A label that receives values. It cannot be changed within
VAR_INPUT 3 3
VAR_OUTPUT
program parts.
A label for output from a function block. 3
5
Basic Instruction
A local label that receives values and outputs from a program
VAR_IN_OUT 3
part.
Definition of labels
Before using a label, the label needs to be defined. An error is generated if attempting to convert (compile) a
program where the label is not defined.
6
Instructions
Step Ladder
• Where defining a global label, the label name, class, data type and device are interrelated.
• Where defining a local label, the label name, class and data type are set.
The user does not have to specify a device when using a local label. A device is allocated automatically
during the compilation.
The following is an example of setting the label VAR_D10 and VAR_D20 of a DMOV instruction. 7
Instructions
Applied
X000 DMOV
EN ENO
VAR_D10 s d VAR_D20
• When using as a global label:
8
Function
and Pulse Catch
Interrupt Function
Set the class, label name and data type and device or address.
A
and addresses
between devices
Relationships
49
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.2 Labels
• When using as a local label:
Set the class, label name and data type.
Expressing constants
The following describes the method of expression when setting constant to a label.
Type of constant Method of expression Example
Bit Enter either "FALSE" or "TRUE", or either "0" or "1". TRUE, FALSE
Binary number Add "2#" before the binary number. 2#0010, 2#01101010
Octal number Add "8#" before the octal number. 8#0, 8#337
Enter the decimal number directly. Or, add "K" before the decimal
Decimal number 123, K123
number
Hexadecimal number Add "16#" or "H" before the hexadecimal number. 16#FF, HFF
Real number Enter the real number directly. Or, add "E" before the real number. 2.34, E2.34
Put the character string between single quotations ('') or double
Character string 'ABC', "ABC"
quotations ("").
Data type
The data type of label is either basic data type or universal data type.
• The table below lists the basic data types.
Data type Description Value range Bit length
Bit Boolean data 0(FALSE), 1(TRUE) 1 bit
Word [signed] Integer -32768 to 32767 16 bits
-2147483648 to
Double Word [signed] Double precision integer 32 bits
2147483647
Word [unsigned]/Bit String
16-bit data 0 to 65535 16 bits
[16-bit]
Double Word [unsigned]/Bit
32-bit data 0 to 4294967295 32 bits
String [32-bit]
E ±1.175495-38 to
FLOAT (Single Precision) Real number E ±3.402823+38 32 bits
(Number of significant figures: 6)
String Character string (50 characters maximum) Variable
T#-24d-0h31m23s648.00ms to
Time Time value 32 bits
T#24d20h31m23s647.00ms
50
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.2 Labels
1
• The universal data type is the data type of a label that puts together several basic data types.
Outline
The data type name starts with "ANY".
ANY
Instruction List
*1 *1
ANY_SIMPLE Array Structure
ANY_NUM ANY_BIT Time String
3
Bit
Instruction
Configuration of
Word
[unsigned]/
ANY_REAL ANY_INT The "ANY" type on a higher layer contains types
Bit String
FLOAT [16-bit] on the lower layer.
(Single Word The "ANY" type on the top layer contains all types.
4
[signed] Double Word
Precision) [unsigned]/
FLOAT Bit String
Instructions
Explanation of
How to Read
Double word
(Double [32-bit]
[signed]
Precision)
5
ANY16 ANY32
Basic Instruction
Word Word Double Word Double word
[unsigned]/
Bit String
[signed] [unsigned]/
Bit String
[signed]
6
[16-bit] [32-bit]
Instructions
Step Ladder
7
Instructions
Applied
*1 Refer to the following manual for details.
Q/FX Structured Programming Manual (Fundamentals)
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
51
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.3 Devices and Addresses
3.3 Devices and Addresses
A device is expressed by a device or an address.
Device
The device is expressed by a device name and a device number.
X0 D 100
Device name Device number
Address
An address is expressed by a method defined by IEC61131-3.
It is expressed as follows according to IEC61131-3.
1st character: 3rd character and
Top 2nd character: size Number
position onwards: classification
I Input (Omitted) Bit These are the numbers for
detailed classification. This
Q Output X Bit
number is separated by "." The number that indicates a
% M Internal W Word (16 bits) (period) from subsequent device number (decimal
numbers. number).
D Double word (32 bits) This number may be
omitted.
%I X 0 %M X 1 . 863
Position of Size Classification Number
memory area
• Position of memory area
This is the first classification to identify the position of memory area either by input, output and internal
where data is allocated.
X (X device) :I (Input)
Y (Y device) :Q (Output)
Device other than above :M (Internal)
• Size
The principle of expression method corresponding to device (method of expression for MELSEC) is as
follows.
Bit device :X (Bit)
Word device :W (Word), D (Double word)
• Classification
This is the second classification to identify the types of device that cannot be classified only by the above
position and size.
X or Y of a device does not classify.
Refer below for the expression corresponding to the device expression.
→ 7.3, Appendix A
52
FXCPU Structured Programming Manual 3 Configuration of Instruction
(Basic & Applied Instruction) 3.4 EN and ENO
1
3.4 EN and ENO
Outline
The execution control is available for an instruction with "EN".
• EN is for entering an execution condition of instruction.
• ENO is for outputting the state of execution of instruction. 2
• The table below shows the relationships between the EN and ENO and the contents of operation results.
Instruction List
EN ENO Operation results
TRUE(Without operation error) Operation output value
TRUE(Executing operation)
FALSE(With operation error) Undefined value
3
FALSE(Stopping operation) FALSE Undefined value
Instruction
Configuration of
X000 MOV
EN ENO M1
D0 s d D2 4
Instructions
Explanation of
How to Read
In the instruction above,
instruction MOV is executed
only when X000 is TRUE.
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
53
FXCPU Structured Programming Manual 4 How to Read Explanation of Instructions
(Basic & Applied Instruction)
4. How to Read Explanation of Instructions
The following shows one of the pages that explains the instructions.
* The above is different from the actual page, as it is provided for explanation only.
54
FXCPU Structured Programming Manual 4 How to Read Explanation of Instructions
(Basic & Applied Instruction)
1
1) Indicates the corresponding chapter, section, subsection, number and instruction name.
Outline
2) Indicates the PLCs that support the instruction.
Item Descriptions
Supported by PLCs from the first release.
The support conditions depend on the versions.
"Cautions" explains the applicable versions. 2
This particular series PLCs do not support the instruction.
Instruction List
3) Indicates the data length, operation form and expression of each instruction.
Item Descriptions
16 bits An instruction of 16-bit data length
32 bits An instruction of 32-bit data length 3
This is a continuous execution instruction that is executed in each cycle of
Instruction
Configuration of
Continuous
operation while the execution condition (EN) is being satisfied.
This is a pulse execution instruction that is executed only when the execution
Pulse
condition (EN) changes from the state of not established to the state of established.
Structured ladder Indicates a structured ladder language instruction.
ST Indicates a ST language instruction.
4
Some PLCs do not support "16 bits / 32 bits" or "continuous / pulse" depending on their versions.
Instructions
Explanation of
How to Read
Refer to "Cautions".
4) Indicates the names of the input and output variables of the instruction and the contents and data type of
each variable.
Refer to the following manual for details of data type.
→ Q/FX Structured Programming Manual (Fundamentals) 5
5) Applicable devices
Basic Instruction
"z" indicates the devices that can be used in an instruction.
Devices marked "S" have restrictions in use.
Refer to "Cautions".
6) Function and operation explanation
Explains the functions that the instruction is responsible for. 6
This explanation uses an example of structured ladder language.
Instructions
Step Ladder
7) Summarizes the notes before using the instruction.
8) Program example
Explains a program example in each language.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
55
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR
5. Basic Instruction
This chapter introduces the instructions and operators for the structured project corresponding to the basic
instructions for the simple project.
Refer to the following manual for variable, instruction and data type.
→ Q/FX Structured Programming Manual (Fundamentals)
5.1 LD, LDI, AND, ANI, OR, OR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The LD and LDI instructions are contacts connected to bus lines.
The AND and ANI instructions connect one contact in series.
The OR and ORI instructions connect one contact in parallel.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST
To become an assignment statement, operator, control
LD Continuous syntax and so forth.
LD AND ANI
X000 X002 Y000
LDI Continuous The ST language may not have the instructions (symbols)
OR directly corresponding to the contacts of LD, AND and OR
that are programmed in a simple project.
AND Continuous X001 X003 Y001
The structured ladder shown on the left can be expressed
as shown below.
LDI (When configuring with assignment statements)
ANI Continuous X000 X002 Y002
Y000:=(X000 OR X001) AND X002;
OR Continuous ORI Y001:=(X000 OR X001) AND X002 AND NOT X003;
X001 X003 Y003
Y002:=(NOT X000 OR NOT X001) AND NOT X002;
ORI Continuous Y003:=(NOT X000 OR NOT X001) AND NOT X002 AND
AND X003;
2. Set data
Variable Description Data type
Input variable - Variable that are applicable to AND and OR input. Bit
Output variable - Result of operation of AND and OR. Bit
3. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
LD z z z z z z S1 S2
LDI z z z z z z S1 S2
AND z z z z z z S1 S2
ANI z z z z z z S1 S2
OR z z z z z z S1 S2
ORI z z z z z z S1 S2
S: Refer to "Cautions".
56
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR
1
Function and operation explanation
Outline
1. LD (Initial logical operation of NO (normally open) contacts)
[Structured ladder] [ ST ]
X000
LD
Y000 2
Y000:= X000;
Instruction List
Bus line
timing chart
3
X000 ON ON
Instruction
Configuration of
Y000 ON ON
4
2. LDI (Initial logical operation of NC (normally closed) contact type)
Instructions
Explanation of
How to Read
[Structured ladder] [ ST ]
LDI
X000 Y000
Y000:= NOT X000;
Bus line 5
Basic Instruction
timing chart
X000 ON ON
6
Instructions
Step Ladder
Y000 ON ON
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
57
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR
3. AND (Serial connection of NO (normally open) contacts)
[Structured ladder] [ ST ]
AND
X002 X000 Y003 Y003:= X002 AND X000;
timing chart
LD X002 ON ON
AND X000 ON ON
Y003 ON
4. ANI (Serial connection of NC (normally closed) contacts)
[Structured ladder] [ ST ]
ANI
X002 X000 Y003 Y003:= X002 AND NOT X000;
timing chart
LD X002 ON ON
ANI X000 ON ON
Y003 ON ON
5. OR (Parallel connection of NO (normally open) contacts)
[Structured ladder] [ ST ]
X000 Y000 Y000:= X000 OR X001;
X001
OR
timing chart
LD X000 ON ON
OR X001 ON ON
Y000 ON ON ON
58
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR
1
6. ORI (Parallel connection of NC (normally closed) contacts)
Outline
[Structured ladder] [ ST ]
X000 Y001 Y001:= X000 OR NOT X002;
X002 2
ORI
Instruction List
timing chart
LD X000 ON ON
3
Instruction
Configuration of
ORI X002 ON ON ON
Y001 ON ON ON
7. Relationship with AND (...) 4
The parallel connection by OR or ORI
Instructions
Explanation of
How to Read
LD AND(...) LD instruction is connected to the preceding LD
or LDI instruction in principle. The "AND (...)
after" instruction, however, the parallel
connection by OR or ORI instruction is
OR OR
connected to the second preceding LD or LDI
instruction.
5
Basic Instruction
AND (...) before
OR
OR
AND (...) after
6
Instructions
Step Ladder
8. Indexing
Devices used in LD, LDI, AND, ANI, OR and ORI can be indexed with index registers (V, Z).
(State relays (S), special auxiliary relays (M), 32-bit counters (C) or "D
.b" cannot be indexed.) 7
Applicable only to the FX3U and FX3UC PLCs.
Instructions
Applied
When a used devices is an input (X) or output
[Structured ladder] [ ST ]
(Y), the value of an index register (V or Z) is
converted into an octal number, and then
added.
X000 Y000 Y000:= X000 OR X001V0;
Example: When the value of V0 is "10", the
LD contact is set to ON (becomes 8
X001V0 conductive) or OFF (becomes
Function
and Pulse Catch
Interrupt Function
nonconductive) by X013.
9. Bit specification of data register (D)
A bit in data register (D) can be specified as a device used in LD, LDI, AND, ANI, OR and ORI.
Applicable only to the FX3U and FX3UC PLCs.
When specifying a bit in data register, input "."
A
and addresses
between devices
Relationships
[Structured ladder] [ ST ]
after a data register (D) number, and then
input a bit number (0 to F) consecutively.
Only 16-bit data resister is applicable.
X002 D0.3 Y003 Y003:= X002 AND D0.3;
Specify a bit number as "0 1, 2, ..., 9, A, B, ...,
F" from the least significant bit.
Example: In the example shown on the left,
LD contact is set to ON (becomes
conductive) or OFF (becomes
nonconductive) by the bit 3 of D0.
59
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR
Cautions
1) Some restrictions to applicable devices
S1: The FX3U and FX3UC PLCs only are applicable.
S2: Only the FX3U and FX3UC PLCs are capable of indexing applicable devices.
The following devices cannot be indexed.
• Special auxiliary relays (M)
• 32-bit counters (C)
• State (S)
• Word bit specification "D
.b"
Errors
1) When an I/O number used in LD, LDI, AND, ANI, OR or ORI instruction does not exist due to indexing,
M8316 (Non-existing I/O specification error) turns ON. (Applicable to the FX3U and FX3UC PLCs only)
2) When the device number of a device (M, T or C) other than I/O does not exist due to indexing, an
operation error (error code: 6706) occurs. (Applicable to the FX3U and FX3UC PLCs only)
60
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
1
5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
Contact instructions LDP, ANDP, and ORP detect the rising edge, and become active during one operation
cycle only at the rising edge of a specified bit device (that is, when the bit device turns ON from OFF).
Contact instructions LDF, ANDF and ORF detect the falling edge, and become active during one operation
cycle only at the falling edge of a specified bit device (that is, when the bit device turns OFF from ON).
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
name form Structured ladder ST
Pulse LDP
LDP (detecting EN ENO LDP(EN,s);
rising pulse) s 4
Instructions
Explanation of
How to Read
Pulse LDF
LDF (detecting EN ENO LDF(EN,s);
falling pulse) s
Pulse ANDP 5
ANDP (detecting EN ENO ANDP(EN,s);
Basic Instruction
rising pulse) s
Pulse ANDF
ANDF (detecting EN ENO ANDF(EN,s);
falling pulse) s 6
Instructions
Step Ladder
Pulse ORP
ORP (detecting EN ENO ORP(EN,s);
rising pulse) s
Pulse ORF 7
Instructions
Applied
ORF (detecting EN ENO ORF(EN,s);
falling pulse) s
2. Set data
Variable Description Data type 8
LDP,LDF: Always TRUE
Function
and Pulse Catch
Interrupt Function
Input EN Execution condition
Except LDP, LDF : BOOL
variable
Applicable devices Bit
Output
ENO Execution state Bit
variable
A
and addresses
between devices
Relationships
61
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
3. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
LDP z z z z z z S1
LDF z z z z z z S1
ANDP z z z z z z S1
ANDF z z z z z z S1
ORP z z z z z z S1
ORF z z z z z z S1
S: Refer to "Cautions".
Function and operation explanation
1. LDP, ANDP, ORP (Initial logical operation of rising edge pulse, serial connection and parallel
connection)
[Structured ladder] [ ST ]
LDP ORP M0 IF (LDP(TRUE,X0)) OR (LDP(TRUE,X001)) THEN
EN ENO EN ENO M0:= TRUE;
X000 s X001 s END_IF;
M1:= ANDP(M8000,X002);
M8000 ANDP M1
EN ENO
RUN monitor s
X002
timing chart
LDP X000 ON ON
ORP X001 ON ON
ON during
one operation
M0 cycle
M8000 ON
ANDP X002 ON ON ON
ON during
one
operation
M1 cycle
In the example shown above, M0 or M1 is ON during only one operation cycle when X000 to X002 turn ON
from OFF.
62
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
1
2. LDF, ANDF, ORF (Initial logical operation of falling/trailing edge pulse, serial connection
Outline
and parallel connection)
[Structured ladder] [ ST ]
LDF ORF M0
EN ENO EN ENO IF (LDF(TRUE,X0)) OR (LDF(TRUE,X001)) THEN
X000 s X001 s M0:= TRUE;
END_IF;
2
Instruction List
M1:= ANDF(M8000,X002);
M8000 ANDF M1
EN ENO
RUN monitor s
X002
timing chart
3
Instruction
Configuration of
LDF X000 ON ON
ORF X001 ON ON
ON
during one
operation 4
M0 cycle
Instructions
Explanation of
How to Read
M8000 ON
ANDF X002 ON ON ON 5
Basic Instruction
ON
during one
operation
M1 cycle
In the example shown above, M0 or M1 is ON during only one operation cycle when X000 to X002 turn OFF
from ON.
3. Bit specification of data register (D)
6
Instructions
Step Ladder
A bit data register (D) can be specified as a device used in LDP, LDF, ANDP, ANDF, ORP and ORF
instructions.
When specifying a bit in data register, input "."
[Structured ladder] [ ST ]
after a data register (D) number, and then input
Y000:= LDP(TRUE,D0.3); a bit number (0 to F) consecutively.
EN
LDP
ENO
Y000
Only 16-bit data resister is applicable. 7
Specify a bit number as "0 1, 2, ..., 9, A, B, ..., F"
Instructions
Applied
D0.3 s
from the least significant bit.
Example: In the example shown on the left, LDP
contact turns ON (becomes
conductive) or OFF (becomes
nonconductive) when the bit 3 of D0 8
turns ON or OFF.
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
63
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
4. Output drive side
The following two circuits offer the same operation.
<OUT instruction> <Pulse instruction>
LDP M6
X010 PLS
X010
EN
s
ENO = EN ENO
d M6
X010
One One
M 6 operation cycle operation cycle
In each circuit, M6 is ON during only one operation cycle when X010 turns ON from OFF.
<Rising edge detection> <Pulse instruction (applied instruction)>
LDP MOV X020 MOVP
EN ENO EN ENO = EN ENO
X020 s K10 s d D0 K10 s d D0
In each circuit, MOV instruction is executed only once when X020 turns ON from OFF.
64
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
1
5. Differences in the operation caused by auxiliary relay (M) numbers
Outline
Not supported by the FX1S, FX1N or FX1NC PLC.
When an auxiliary relay (M) is specified as a device in LDP, LDF, ANDP, ANDF, ORP and ORF instructions,
the operation varies depending on the device number range as shown in the figure below.
<M0 to M2799, M3072 to M7679> (M0 to M2799 for the FX2N and FX2NC PLCs)
After M0 is driven by X000, all contacts 1) to 4) corresponding
2
Instruction List
1) LDP SET to M0 are activated.
EN ENO EN ENO
• The contacts 1) to 3) detect the rising edge of M0.
M0 s d M50
• Because of LD instruction, the contact 4) is conductive while
X000 M0
M0 is ON.
LDP SET
3
2)
Instruction
Configuration of
EN ENO EN ENO
M0 s d M51
3) LDP SET
EN ENO EN ENO
M0 s d M52 4
Instructions
Explanation of
How to Read
M0 M53
4)
<M2800 to M3071>
From M2800 driven by X000, the program is
LDP SET divided into the upper block (block A) and the 5
EN ENO EN ENO lower block (block B). In each of the blocks A
Basic Instruction
M2800 s d M0 and B, only the first contact which detects the
Block A
rising or falling edge is activated.
LDP SET Because of LD instruction, the contact in the
EN ENO EN ENO block C is conductive while M2800 is ON.
M2800 s d M1 By utilizing these characteristics, "transition
X000 M2800 of state by same signal" in a step ladder 6
Instructions
Step Ladder
circuit can be efficiently programmed.
LDP SET
EN ENO EN ENO
M2800 s d M2
LDP SET 7
EN ENO EN ENO
Instructions
Applied
M2800 s d M3
8
LDF SET Block B
EN ENO EN ENO
Function
and Pulse Catch
Interrupt Function
M2800 s d M4
LDP SET
EN ENO EN ENO
M2800 s d M5
LDF SET A
and addresses
between devices
Relationships
EN ENO EN ENO
M2800 s d M6
M2800 M7
Block C
65
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF
Cautions
1) When LDP, LDF, ANDP, ANDF, ORP or ORF instruction programmed in a same step is executed two or
more times within one operation cycle, the operation is as follows.
Programs executed two or more times
FOR
- Program between FOR and NEXT instructions EN ENO
- Program which executes a same subroutine program from two or more KOO n
CALL instructions during one operation cycle.
LDP
- Program which jumps to a label (P) in a smaller step number by CJ EN ENO
instruction. X000 s
Operation NEXT
- When a device turns ON from OFF EN ENO
1st time :LDP, ANDP or ORP instruction turns ON.
2nd time and later :When the device status is same as the time when the instruction was executed last,
the instruction turns OFF.
- When a device turns OFF from ON
1st time :LDF, ANDF or ORF instruction turns ON.
2nd time and later :When the device status is same as the time when the instruction was executed last,
the instruction turns OFF.
2) When write during RUN is completed for a circuit including an instruction for falling edge pulse (LDF,
ANDF, or ORF instruction), the instruction for falling edge pulse is not executed without regard to the ON/
OFF status of the target device of the instruction for falling edge pulse.
When write during RUN is completed for a circuit including an instruction for falling edge pulse (PLF
instruction), the instruction for falling edge pulse is not executed without regard to the ON/OFF status of
the operation condition device.
It is necessary to set to ON the target device or operation condition device once and then set it to OFF for
executing the instruction for falling edge pulse.
3) When write during RUN is completed for a circuit including an instruction for rising edge pulse, the
instruction for rising edge pulse is executed if a target device of the instruction for rising edge pulse or the
operation condition device is ON.
Target instructions for rising edge pulse: LDP, ANDP, ORP and pulse operation type applied instructions
(such as MOVP)
Contact ON/OFF status (while write
Instruction for rising edge pulse Instruction for falling edge pulse
during RUN is executed)
OFF Not executed Not executed
ON Executed*1 Not executed
*1. PLS instruction is not executed.
4) Some restrictions to applicable devices
S1: The FX3U and FX3UC PLCs only are applicable.
66
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters)
1
5.3 OUT (Excluding timers and counters)
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
This instruction outputs the operation result up to the execution of the OUT instruction to the specified device.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST 3
Instruction
Configuration of
X000 Y000
OUT(EN,d);
Or an assignment statement
OUT Continuous Or Example:
X000 OUT OUT(X000,Y000);
EN ENO
d Y000
When using an assignment statement.
Y000:=X000; 4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input
variable
EN Execution condition Bit
5
ENO Execution state Bit
Basic Instruction
Output
variable Target variable ANY_SIMPLE
3. Applicable devices
Bit Devices Word Devices
System Special
Others
Real Character
6
Instruction System User Digit Specification Index Constant Pointer
Instructions
Step Ladder
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
OUT zz z S1 S2
S: Refer to "Cautions".
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
67
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters)
Function and operation explanation
1. When a bit device is used
A device described in OUT instruction turns ON or OFF according to the driven contact status.
Parallel OUT instructions can be used consecutively as many times as necessary.
In the program example shown below, OUT M100 and OUT M101 are parallel.
If two or more OUT instructions are executed for a same device number, however, the double output (double
coil) operation is resulted.
[Structured ladder] [ ST ]
Drive contact of OUT instruction
OUT(X000,Y000);
OUT IF NOT X001 THEN
X000 Y000
OUT(TRUE,M100);
OUT(TRUE,M101);
END_IF;
X001 M100 OUT
For assignment statement
M101 OUT
Y000:= X000;
M100:= NOT X001;
M101:= NOT X001;
timing chart
ON ON
X000
OUT Y000 ON ON
X001 ON ON
OUT M100 ON
OUT ON
M101
2. Indexing
Devices used in OUT instruction can be indexed with index registers (V and Z).
(State relays (S), special auxiliary relays (M), or "D
.b" cannot be indexed.)
Applicable only to the FX3U and FX3UC PLCs.
When a used devices is an input (X) or
[Structured ladder] [ ST ]
output (Y), the value of an index register (V
or Z) is converted into an octal number, and
OUT(X000,Y000Z0); then added.
X000 Y000Z0
For assignment statement Example: When the value of Z0 is "20",
Y000Z0:= X000; Y024 turns ON or OFF.
3. Bit specification of data register (D)
A bit in data register (D) can be specified as a device used in OUT instruction.
Applicable only to the FX3U and FX3UC PLCs.
When specifying a bit in data register, input
[Structured ladder] [ ST ]
"." after a data register (D) number, and then
input a bit number (0 to F) consecutively.
OUT(X000,D0.3); Only 16-bit data resister is applicable.
X000 D0.3
For assignment statement Specify a bit number as "0 1, 2, ..., 9, A, B,
D0.3:= X000; ..., F" from the least significant bit.
Example: In the example shown on the left,
the bit 3 of D0 turns ON or OFF
when X000 turns ON or OFF.
68
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters)
1
Cautions
Outline
1) Some restrictions to applicable devices
S1: The FX3U and FX3UC PLCs only are applicable.
S2: Only the FX3U and FX3UC PLCs are capable of indexing applicable devices.
The following devices cannot be indexed.
• Special auxiliary relays (M) 2
Instruction List
• State (S)
• Word bit specification "D
.b"
2) The following instructions are used to operate the timer and counter in a structured program. Note that
they are not operable in the OUT instruction.
Instruction name Reference
3
Instruction
Configuration of
OUT_T Section 5.4.1
OUT_C Section 5.5.1
OUT_C_32 Section 5.5.1
Errors 4
1) When a Y number used in OUT instruction does not exist due to indexing, M8316 (Non-existing I/O
Instructions
Explanation of
How to Read
specification error) turns ON. (Applicable to the FX3U and FX3UC PLCs only)
2) When the device number of a device (M,T,C)other than I/O does not exist due to indexing, an operation
error (error code: 6706) occurs. (Applicable to the FX3U and FX3UC PLCs only.)
Program example 5
Basic Instruction
1. When using bit device
[Structured ladder] [ ST ]
X005 Y033 X005 OUT
OUT(X5,Y33);
EN ENO
d Y033
IF X6 THEN 6
X006 Y034
Instructions
Step Ladder
OUT(TRUE,Y34);
Or X006 OUT OUT(TRUE,Y35);
Y035 EN ENO END_IF;
d Y034
EN
OUT
ENO 7
Instructions
Applied
d Y035
2. When specifying bit of word device
[Structured ladder] [ ST ]
X005 D0.5 X005 OUT
8
Function
and Pulse Catch
Interrupt Function
EN ENO OUT(X5,D0.5);
d D0.5
IF X6 THEN
X006 D0.6
OUT(TRUE,D0.6);
Or X006 OUT OUT(TRUE,D0.7);
D0.7 EN ENO END_IF;
d D0.6 A
and addresses
between devices
Relationships
OUT
EN ENO
b15 b7 b6 b5 b0 d D0.7
D0
69
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.4 Operating Timer
5.4 Operating Timer
5.4.1 OUT_T
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
An output is generated when a set time expires.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
OUT_T
EN ENO
OUT_T 16 bits Continuous OUT_T(EN, TCoil, TValue);
TCoil
TValue
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
TCoil Target timer Bit
variable
TValue Timer set value ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
TCoil z
TValue z S1 S2 z
S: Refer to "Cautions".
70
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.4 Operating Timer
1
Function and operation explanation
Outline
1. OUT_T operation
1) When the operation result up to the OUT_T operation is ON, the timer coils is ON and counts until the set
value is reached. When the set time expires (or reaches the set count), the contacts become as follows:
NO (normally open) contact Timer is conductive.
2
Instruction List
NC (normally closed) contact Timer is not conductive.
2) When the operation result up to the OUT_T operation turns OFF from ON, the timer parameters become
as follows.
Before time-up After time-up
Timer type Timer coil
Current timer
NO (normally
NC (normally
NO (normally
NC (normally 3
value closed) closed)
Instruction
Configuration of
open) contact open) contact
contact contact
100 ms timer
0.1 to 3276.7 seconds
10 ms timer
OFF 0 Nonconductive Conductive Nonconductive Conductive
0.01 to 327.67 seconds
1 ms timer*1
4
Instructions
Explanation of
How to Read
0.001 to 32.767 seconds
100 ms integrating timer*2
0.1 to 3276.7 seconds Holding current
OFF Nonconductive Conductive Nonconductive Conductive
1 ms integrating timer*2 value
0.001 to 32.767 seconds
5
*1. Not supported by the FX2N, FX2NC, FX1N, FX1NC, FXU, FX2C, FX0 or FX0S PLC.
Basic Instruction
*2. Not supported by the FX1S, FX0N, FX0 or FX0S PLC.
2. Clearing integrating timer
After the set time expires, the current value of the integrating timer is cleared and the contacts are turned OFF
by the RST.
6
3. Timer set value
Instructions
Step Ladder
The set value can be specified directly by a decimal number (K) or indirectly using a data register (D) or
extension register (R).
Indirect setting by the extension register (R) is applicable only to the FX3U and FX3UC PLCs.
No negative numbers (-32768 to -1) can be set.
If the timer value is set to "0", the time expires at the same time as the OUT_T activates. 7
Instructions
Applied
4. OUT_T operation
The following processes take place when the OUT_T activates.
1) The OUT_T TC coil turns ON or OFF.
2) The OUT_T TS contacts turn ON or OFF.
3) The OUT_T TN current value is changed. 8
Function
and Pulse Catch
Interrupt Function
If the OUT_T is skipped by an instruction such as JMP while the OUT_T is ON, neither the current value is
updated nor contacts are turned ON or OFF.
When one particular OUT_T operates more than once within the same scan, the current value is updated as
many times as the timer operates.
A
and addresses
between devices
Relationships
71
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.4 Operating Timer
Cautions
1) When a timer device is specified in a program, use the following depending on the locations of use.
- Used as contacts: TS
- Used as a coil: TC
- Used as a current value: TN
2) Use the timer T192 to T199 within a subroutine or interrupt routine. This timer counts the time when
executing a coil instruction or END instruction.
When the set value is reached, the output contact operates when the coil instruction or the END
instruction is executed.
A general purpose timer counts the time only when the coil instruction is executed. Such a timer does not
operate normally because it does not count the time if used in a subroutine or an interrupt routine where
the coil instruction is executed only under certain conditions.
3) Note: If a 1 ms integrating timer is used in a subroutine or an interrupt routine, the output contact operates
when the first coil instruction is executed after the set value is reached
(FX3U, FX3UC, FX3G, FX1N, FX2N, FX1NC, FX2NC, FX2C and FXU PLCs)
4) Some restrictions to applicable devices
S1: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S2: The target device can be indexed only by the FX3U and FX3UC PLCs.
72
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.4 Operating Timer
1
Program example
Outline
1. Program that turns ON Y010 and Y014 in 10 seconds after X000 turns ON.
[Structured ladder] [ ST ]
2
X000 OUT_T OUT_T(X000,TC1,100);
EN ENO OUT(TS1,Y010);
OUT(TS1,Y014);
Instruction List
TC1 TCoil
100 TValue
TS1 Y010
Y014 3
Instruction
Configuration of
2. Program that sets the BCD data of X010 to X01F to a timer.
[Structured ladder] [ ST ]
X000
EN
BINP
ENO
BCD data of X010 to X01F is
converted to binary data and
BINP(X000,K4X010,Var_D10);
OUT_T(X002,TC2,Var_D10);
4
*1 stored in D10.
Instructions
Explanation of
How to Read
K4X010 s d Var_D10 OUT(TS2,Y015);
X002 OUT_T
EN ENO When X002 turns ON, timer
starts to count using data
TC2
Var_D10
TCoil
TValue
stored in D10 as set value. 5
Basic Instruction
TS2 Y015
When T2 timer completes
counting up, Y015 turns on.
*1. Var_D10 is a global label and is defined as D10. 6
Instructions
Step Ladder
3. Program that turns ON Y010 in 250 milliseconds after X000 turns ON.
[Structured ladder] [ ST ]
OUT_T(X000,TC200,25);
X000 OUT_T OUT(TS200,Y010);
EN ENO 7
TC200 TCoil
Instructions
Applied
25 TValue
TS200 Y010
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
73
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.5 Operating Counters
5.5 Operating Counters
5.5.1 OUT_C, OUT_C_32
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The counter starts counting when the condition turns ON from OFF. It generates an output when counting up
to the set value.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
OUT_C
EN ENO
OUT_C 16 bits Continuous OUT_C(EN,CCoil,CValue);
CCoil
CValue
OUT_C_32
EN ENO
OUT_C_32 32 bits Continuous OUT_C_32(EN,CCoil,CValue);
CCoil
CValue
2. Set data
Data type
Variable Description
16-bit operation 32-bit operation
EN Execution condition Bit
Input
CCoil Target counter Bit
variable
CValue Counter set value ANY16 ANY32
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
CCoil z
CValue z S1 S2 z
S: Refer to "Cautions".
74
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.5 Operating Counters
1
Function and operation explanation
Outline
1. OUT_C operation
1) When the operation result up to the OUT_C turns ON from OFF, the counter counts up the current value
(count value) by +1. When the counter completes counting (the current value reaches the set value), the
contact becomes as follows. 2
Instruction List
NO (normally open) contact Conductive
NC (normally closed) contac Nonconductive
2) The counter does not count if the operation result remains ON. (The count input does not need to be in
the form of pulse.)
2. Counter reset 3
Instruction
Configuration of
After completing to count, the count value and contact condition does not change until the RST is executed.
3. Counter set value
The set value of the counter can be specified directly by a decimal number (K) or indirectly using a data
register (D) or extension register (R).
Indirect setting by the extension register (R) is applicable only to the FX3U and FX3UC PLCs. 4
No negative numbers (-32768 to -1) can be set.
Instructions
Explanation of
How to Read
If set to "0", the same process as 1 takes place.
4. When using counter device
When a counter device is specified in a program, use the following depending on the locations of use.
• Used as contacts: CS 5
• Used as a coil: CC
Basic Instruction
• Used as a current value: CN
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
6
Instructions
Step Ladder
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) Some restrictions to applicable devices
S1: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S2: Only the FX3U and FX3UC PLCs can index the target device.
A 32-bit counter cannot be indexed.
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
75
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.5 Operating Counters
Program example
1. This program turns ON Y30 when X0 turns ON 10 times and resets the counter when X1
turns ON.
[Structured ladder] [ ST ]
X000 OUT_C OUT_C(X0,CC10,10);
EN ENO OUT(CS10,Y30);
CC10 CCoil RST(X1,CN10);
K10 CValue
CS10 Y030
X001 RST
EN ENO
d CN10
2. This program sets "10" to C10 when X0 turns ON and sets to "20" to C10 when X1 turns ON.
[Structured ladder] [ ST ]
X000 X001 MOVP MOVP(X0 AND NOT X1,10,Var_D0);
EN ENO Sets "10" to D0 when MOVP(X1 AND NOT X0,20,Var_D0);
X0 turns ON. OUT_C(X3,CC10,Var_D0);
10 s D0 d Var_D0*1
OUT(CS10,Y30);
X001 X000 MOVP
Sets "20" to D0 when
EN ENO X1 turns ON.
20 s D0 d Var_D0
X003 OUT_C
EN ENO C10 counts with the
CCoil data stored in D0 as
CC10 the set value.
Var_D0 CValue
CS10 Y030 When C10 completes counting,
Y30 turns ON.
*1. Var_D10 is a global label and is defined as D10.
76
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.6 AND(...), OR(...)
1
5.6 AND(...), OR(...)
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
Use AND (...) instruction to connect a branch circuit (parallel circuit block) to the preceding circuit in series.
Use OR (...) instruction to connect a series circuit block in parallel.
1. Format and operation, execution form
Instruction
name
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
AND(...)
X000 X002 Y000 The ladder diagram (or LD) is described as follows.
AND(...) Continuous Y000:=(X000 OR X001) AND(X002 OR X003);
X001 X003
Instructions
Explanation of
How to Read
OR(...)
X000 X001 Y001 The ladder diagram (or LD) is described as follows.
OR(...) Continuous Y001:=(X000 AND X001) OR(X002 AND X003);
X002 X003
Basic Instruction
2. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
6
Instructions
Step Ladder
AND(...)
There are no applicable devices.
OR(...)
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
77
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.6 AND(...), OR(...)
Function and operation explanation
1. AND(...)(Serial connection of circuit blocks)
AND (...) is an independent instruction not associated with any device number in the same way as the OR (...)
instruction described later.
When there are many parallel circuits, the AND (...) instruction can be used for each circuit block to connect
them.
[Structured ladder]
LD
X000 X002 X003 Y007
X001 X004 X005
X006
Parallel block
X003
OR instruction before AND (...) instruction
OR instruction after AND (...) instruction
[ ST ]
Y007:= ((X000 OR X001) AND ((X002 AND X003) OR (NOT X004 AND X005) OR X006)) OR X003;
2. OR(...)(Parallel connection of circuit blocks)
OR (...) is an independent instruction not associated with any device number in the same way as the AND (...)
instruction.
When there are many parallel circuits, the OR (...) instruction can be used for each circuit block to connect
them.
[Structured ladder]
X000 X001 Y007
X002 X003
X004 X005
Serial circuit block
[ ST ]
Y007:=(X000 AND X001) OR (X002 AND X003) OR (NOT X004 AND X005);
78
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.7 MPS, MRD, MPP
1
5.7 MPS, MRD, MPP
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
These PLCs have 11 memories called "Stack" which store the intermediate result (ON or OFF) of operations.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST 3
Instruction
Configuration of
MPS Continuous MPS MPS(EN);
EN ENO
MRD Continuous
MRD MRD(EN);
EN ENO
4
Instructions
Explanation of
How to Read
MPP Continuous MPP MPP(EN);
EN ENO
2. Set data
Input
Variable Description
MPS:
Data type
Bit
5
EN Execution condition
Basic Instruction
variable MRD, MPP: Always TRUE
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
6
Instructions
Step Ladder
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
MPS
MRD There are no applicable devices.
MPP 7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
79
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.7 MPS, MRD, MPP
Function and operation explanation
These instructions are convenient in programming branched multi-output circuits.
1. MPS, MRD, MPP (Stack push down, stack read and stack popup)
[Structured ladder]
X004 MPS X005 Y002
EN ENO
MRD X006 Y003
EN ENO
MRD Y004 1 MPP
MRD
EN ENO 2
MPS
MPP
3
X007 Y005
EN ENO 4 MPP
[ ST ] 10
Y002:= X005 AND MPS(X004); 11
Y003:= MRD(TRUE) AND X006; Stack
Y004:= MRD(TRUE);
Y005:= MPP(TRUE) AND X007;
1) Use MPS instruction to store the intermediate result of operation, and then drive the output Y002.
2) Use MRD instruction to read the stored data, and then drive the output Y003.
MRD instruction can be programmed as many times as necessary.
3) In the final output circuit, use MPP instruction instead of MRD instruction.
MPP instruction reads the stored data described above, and then resets it.
Error
MPS instruction can be used two or more times. However, the difference between the number of MPS
instructions and the number of MPP instructions should be 11 or less, and should be 0 at the end.
Caution
When a circuit is programmed as shown on the left, it is compiled in fact as the program on the right that does
not use MPS, MRD or MPP instruction.
Program representing actual operation
(program in the PLC)
X000 MPS X001 Y000 X000 X001 Y000
EN ENO
MRD X002 Y001 X000 X002 Y001
EN ENO
MPP X003 Y002 X000 X003 Y002
EN ENO
Or
X000 M256
M256 X001 Y000
M256 X002 Y001
M256 X003 Y002
80
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.7 MPS, MRD, MPP
1
Program example
Outline
1. Program example 1 (One stack)
Only one stack is used in this example.
[Structured ladder] [ ST ]
2
Instruction List
X000 X001 MPS X002 Y000 Y000:= MPS(X000 AND X001) AND X002;
EN ENO Y001:= MPP(TRUE);
MPP Y001
EN ENO Y002:= MPS(X003) AND X004;
Y003:= MPP(TRUE) AND X005;
3
Instruction
Configuration of
Y004:= MPS(X006) AND X007;
X003 MPS X004 Y002 Y005:= MRD(TRUE) AND X010;
EN ENO Y006:= MRD(TRUE) AND X011;
Y007:= MPP(TRUE) AND X012;
MPP X005 Y003
4
EN ENO
Instructions
Explanation of
How to Read
X006 MPS X007 Y004
EN ENO
MRD X010 Y005
5
Basic Instruction
EN ENO
MRD X011 Y006
EN ENO
MPP X012 Y007
EN ENO 6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
81
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.7 MPS, MRD, MPP
2. Program example 2 (One stack with AND (...) and OR (...) instructions)
[Structured ladder] [ ST ]
X000 MPS X001 Y000 Y000:= MPS(X000) AND (X001 OR X002);
EN ENO Y001:= MRD(TRUE) AND ((X003 AND X004) OR (X005 AND X006));
Y002:= MPP(TRUE) AND X007;
X002 Y003:= Y002 AND (X010 OR X011);
MRD X003 X004 Y001
EN ENO
X005 X006
MPP X007 Y002
EN ENO
X010 Y003
X011
3. Program example 3 (Two stacks)
[Structured ladder] [ ST ]
X000 MPS X001 MPS X002 Y000 Y000:= (MPS(X000) AND MPS(X001)) AND X002;
EN ENO EN ENO Y001:= MPP(TRUE) AND X003;
Y002:= (MPP(TRUE) AND MPS(X004)) AND X005;
MPP X003 Y001
EN ENO
Y003:= MPP(TRUE) AND X006;
MPP X004 MPS X005 Y002
EN ENO EN ENO
MPP X006 Y003
EN ENO
82
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.7 MPS, MRD, MPP
1
4. Program example 4 (Four stacks)
Outline
[Structured ladder]
X000 MPS X001 MPS X002 MPS X003 MPS X004 Y000
EN ENO EN ENO EN ENO EN ENO
MPP Y001
2
Instruction List
EN ENO
MPP Y002
EN ENO
MPP Y003
EN ENO 3
Instruction
Configuration of
MPP Y004
EN ENO
[ ST ]
Y000:= (((MPS(X000) AND MPS(X001)) AND MPS(X002)) AND MPS(X003)) AND X004;
Y001:= MPP(TRUE);
4
Instructions
Explanation of
How to Read
Y002:= MPP(TRUE);
Y003:= MPP(TRUE);
Y004:= MPP(TRUE);
[Structured ladder] [ ST ] 5
Basic Instruction
X000 Y004 Y004:= X000;
Y003:= Y004 AND X001;
X001 Y003 Y002:= Y003 AND X002;
Y001:= Y002 AND X003;
X002 Y002
Y000:= Y001 AND X004; 6
Instructions
Step Ladder
X003 Y001
X004 Y000
In programming a circuit on the upper side, it is necessary to use MPS instruction three times.
By changing the circuit on the upper side into the circuit on the lower side, the same contents can be
7
Instructions
Applied
programmed easily without MPS instruction.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
83
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.8 INV
5.8 INV
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
INV instruction inverts the operation result up to just before INV instruction.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST
INV Continuous INV INV(EN);
EN ENO
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
INV There are no applicable devices.
84
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.8 INV
1
Function and operation explanation
Outline
1. INV(inverts the result of operations)
[Structured ladder] Timing chart
2
ON
X000 OFF OFF
X000 INV Y000
Instruction List
EN ENO
Y000 ON OFF
ON
[ ST ] Operation result until just Operation result after INV
before INV instruction instruction is executed
Y000:= INV(X000) OFF ON 3
Instruction
Configuration of
ON OFF
Inverted
In the figure above, Y000 turns ON when X000 is OFF, and Y000 turns OFF when X000 is ON.
INV instruction can be used in a same position as serial contact instructions (AND, ANI, ANDP and ANDF).
4
Instructions
Explanation of
How to Read
Different from LD, LDI, LDP and LDF instructions shown in the list, INV instruction cannot execute connection
to bus lines. Different from OR, ORI, ORP and ORF instructions, INV instruction cannot be used
independently in parallel to a contact instruction.
2. Operation range of INV instruction
When INV instruction is used in a complicated circuit containing ORB and ANB instructions, the operation 5
range of INV instruction is as shown in the figure below:
Basic Instruction
INV INV INV INV INV INV
EN ENO EN ENO EN ENO EN ENO EN ENO EN ENO
LD LD
INV INV 6
EN ENO EN ENO
Instructions
Step Ladder
LD LD
INV INV
EN ENO EN ENO
LD LD
INV instruction inverts the operation result after LD, LDI, LDP or LDF instruction located before INV
7
Instructions
Applied
instruction.
Accordingly, if INV instructions are used inside ORB and ANB instructions, blocks after LD, LDI, LDP or LDF
instruction seen from each INV instruction are regarded as the target of INV operation.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
85
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.9 MEP, MEF
5.9 MEP, MEF
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
MEP and MEF commands are instructions that change the operation results to pulses so that device numbers
do not have to be specified.
1) MEP
The operation results up to the MEP instruction become conductive when the driving contacts turn ON
from OFF.
The use of MEP instructions simplifies the process of changing driving contacts to pulses when multiple
contact points connect in a series.
2) MEF
The operation results up to the MEF instruction become conductive when the driving contacts turn OFF
from ON.
The use of MEF instructions simplifies the process of changing driving contacts to pulses when multiple
contact points connect in a series.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST
MEP Pulse MEP MEP(EN);
EN ENO
MEF Pulse MEF MEF(EN);
EN ENO
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
MEP
There are no applicable devices.s
MEF
86
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.9 MEP, MEF
1
Function and operation explanation
Outline
1. MEP(ON during rising edge of driving contacts results)
[Structured ladder] Timing chart
X000 X001 MEP SET
X000 OFF ON 2
EN ENO EN ENO
Instruction List
d M0
X001 OFF ON
[ ST ]
IF X000 AND X001 THEN OFF ON
M0
MEP(TRUE);
SET(TRUE,M0); 3
END_IF;
Instruction
Configuration of
2. MEF(ON during falling edge of driving contacts results)
[Structured ladder] Timing chart
X000 X001
EN
MEF
ENO EN
SET
ENO X000 OFF ON OFF 4
Instructions
Explanation of
How to Read
d M0
X001 OFF ON OFF
[ ST ]
IF X000 AND X001 THEN OFF ON
M0
MEF(TRUE);
SET(TRUE,M0);
END_IF;
5
Basic Instruction
Cautions
1) The FX3U and FX3UC PLCs of V2.30 or later support MEP and MEF instructions.
2) MEP and MEF instructions may not operate normally if the indexed contact is modified and changed to
pulses by sub-routine programs, the FOR and NEXT instructions, etc.
6
Instructions
Step Ladder
3) As the MEP and MEF instructions operate using the operation results immediately before them, use at
the list program as the AND instruction.
The MEP and MEF instructions cannot be used at the list program as LD or OR.
4) Caution on writing during RUN
a) Pulse command during rising edge of operation (MEP instruction) results 7
After writing to the circuit with MEP instructions during RUN, the MEP instruction result turns ON
Instructions
Applied
(conductive) while the operation results up to the MEP instruction are ON.
b) Pulse instruction during falling edge of operation (MEF command) results
After writing to the circuit with MEF instructions during RUN , the MEF instruction result turns OFF
(nonconductive), regardless of the operation results up to the MEF instruction. The operation results
of MEF instruction turns ON (conductive) when the operation results up to the MEF instruction turn
OFF.
8
Function
and Pulse Catch
Interrupt Function
Operation Results up to MEP/MEF Instruction
MEP MEF
(while writing is excuted during RUN)
OFF OFF (non-conductive) OFF (non-conductive)
ON ON (conductive) OFF (non-conductive)
A
and addresses
between devices
Relationships
87
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.10 SET, RST
5.10 SET, RST
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
1) Setting a bit device (SET instruction [holding operation])
When the command input turns ON, SET instruction sets to ON an output relay (Y), auxiliary relay (M),
state relay (S) and bit specification of word device.
Even if the command input turns OFF after that, the device which was set to ON by SET instruction
remains ON.
2) Resetting a bit device (RST instruction [resetting folding operation])
RST instruction resets an output relay (Y), auxiliary relay (M), state relay (S), timer (T), counter (C) or bit
specification of a word device.
Use the RST instruction to reset (reset to OFF) a device which was set to ON by SET instruction.
3) Clearing the current value of a word device (RST instruction [Clearing current value and resister])
RST instruction clears the current value data of a timer (T), counter (C), data register (D), extension
register or (R)index register (V) (Z). (The same result can be obtained by MOV instruction which transfers
the constant K0.)
RST instruction can be used also to reset the current value and return the contact of retentive type timers.
SET and RST instructions can be used for a same device as many times as necessary in an arbitrary
order.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST
X000 SET
EN ENO
d Y000 SET(EN,d);
SET Continuous
Or Example:
SET(X000,Y000);
X000 Y000
*1
S
X001 RST
EN ENO
d Y000 RST(EN,d);
RST Continuous
Or Example:
RST(X001,Y000);
X001 Y000
*1
R
*1. This symbol is applicable to the bit type data only.
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
ENO Execution state Bit
Output
variable SET Bit
Applicable device or variable
RST ANY_SIMPLE
88
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.10 SET, RST
1
3. Applicable devices
Outline
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
SET zz z S1 S3
2
Instruction List
RST z z z z z S1 z z z S2 zz S3
S: Refer to "Cautions".
Function and operation explanation
SET instruction drives the coil for an output relay (Y), auxiliary relay (M), state relay (S) and bit specification of 3
data register (D).
Instruction
Configuration of
1. When using a bit device
SET instructions located in parallel can be used consecutively as many times as necessary.
In the program example shown below, RST (X1001, Y000) after SET (X000, Y000) corresponds to this
usage.
4
[Structured ladder] [ ST ] timing chart
Instructions
Explanation of
How to Read
X000 ON
X000 SET SET(X000,Y000);
EN ENO RST(X001,Y000);
d Y000 X001 ON
X001 RST
Y000 ON
5
EN ENO
Basic Instruction
d Y000 SET RST
instruction instruction
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
89
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.10 SET, RST
2. When using word device (timer or counter)
Use RST instruction to reset a counter or retentive type timer.
1) Program example of an internal counter
C0 up-counts the number of turning ON from OFF at X011.
X010 RST
When the counting result reaches the set value K10, the output
EN ENO
contact C0 is activated. Even if X011 changes from OFF to ON
d CN0
after that, the current value of the counter remains unchanged
X011 OUT_C and the output contact remains activated.
EN ENO For clearing the counter and returning the output contact, X010
CC0 CCoil is set to ON.
K10 CValue
In case of latched (battery backed) type counters, the current
CS0 Y003
value and the operation status and reset status of the output
contact are latched even after power failure.
2) Program example of a high speed counter
Counting direction
For one-phase one-input counters, use special auxiliary relays
X010 M8 for specifying the counting direction.
X010 in ON status: specifies down counting.
X010 in OFF status: Specifies up counting
Sequence When X011 turns ON, the output contact of the counter
reset circuit CUUU is returned and the current value of the counter is reset
X011 RST to "0".
EN ENO
In counters with reset input, the same situation is achieved by
d CN
interrupt operation when the corresponding reset input turns
ON, but any program is not required for this operation.
Counting coil When X012 turns ON, turning ON/OFF of a counting input X000
X012 CC
to X005 determined according to the counter number is
K or D counted.
In counters having start input, counting is started only after the
CS Y002 corresponding start input turns ON.
When the current value of a counter increases and reaches the
set value (K or contents of D), the output contact is set. When
the current value decreases and reaches the set value, the
output contact is reset.
As a contact driving the counting coil of a high speed counter, program a contact which is normally ON
when high speed counting is executed.
If an input relay (X000 to X005) assigned for high speed counters is used for driving the counting coil,
accurate counting cannot be achieved.
3) Caution on using RST instruction for a jumped program, subroutine program or interrupt program
When RST instruction for a timer or counter is executed in a jumped program, subroutine program or
interrupt program, the timer or counter may be kept in the reset status and the timer or counter may be
disabled.
For details, refer to the following sections.
→ For a jumped program, refer to subsection 7.1.1.
→ For a subroutine program, refer to subsection 7.1.2.
→ For an interrupt program, refer to subsection 8.2.3.
90
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.10 SET, RST
1
3. Indexing
Outline
Devices used in SET and RST instructions can be indexed with index registers (V, Z).
(State relays (S), special auxiliary relays (M), 32-bit counters, "D
.b" and word devices cannot be indexed.)
This is applicable only to the FX3U and FX3UC PLCs.
When a used device is an input (X) or output (Y),
[Structured ladder] [ ST ]
the value of an index register (V, Z) is converted 2
X000 SET SET(X000,Y000Z0); into octal, and then added.
Instruction List
EN ENO RST(X001,Y000Z0); Example: When Z0 is "20", Y024 turns ON or
d Y000Z0 OFF.
X001 RST
EN ENO
d Y000Z0 3
Instruction
Configuration of
4. Bit specification of a data register (D)
A bit data register (D) can be specified as a device used in SET or RST instruction.
This is applicable only to the FX3U and FX3UC PLCs.
When specifying a bit in data register, input "."
4
[Structured ladder] [ ST ]
after a data register (D) number, and then input a
X000 SET SET(X000,D0.3); bit number (0 to F) consecutively.
Instructions
Explanation of
How to Read
EN ENO RST(X001,D0.3); Only 16-bit data registers are available.
d D0.3 Specify a bit number as "0, 1,2, ..., 9, A, B, ..., F"
from the least significant bit.
X001 RST
EN ENO
Example: In the example shown on the left,
when X000 turns ON once, the bit 3 of
d D0.3
D0 turns ON. When X001 turns ON, 5
the bit 3 of D0 turns OFF.
Basic Instruction
Cautions
1) Some restrictions to applicable devices
S1: The FX3U and FX3UC PLCs only are applicable.
S2: The FX3U, FX3UC and FX3G PLCs only are applicable.
6
Instructions
Step Ladder
S3: Only the FX3U and FX3UC PLCs are capable of indexing applicable devices.
The following devices cannot be indexed.
• Special auxiliary relays (M)
• 32-bit counters (C)
• State (S) 7
Instructions
Applied
• Word device
• Word bit specification "D
.b"
2) When SET and RST instructions are executed for an output relay (Y) in a same operation, the result of
the instruction located nearest the END instruction (which specifies the end of program) is output.
3) When using the retentive type timers of the FX1N, FX2N, FX1NC and FX2NC, be sure to create a program 8
where the RST instruction resets the retentive type timers to be used. If no such a reset circuit by RST is
Function
and Pulse Catch
Interrupt Function
present in the program, the timers remain in the state of reset, possibly causing the timers not to operate.
Error
1) When an I/O number used in SET or RST instruction does not exist due to indexing, M8316 (non-existing
I/O specification error) turns ON. (Applicable only to the FX3U and FX3UC PLCs.) A
and addresses
between devices
Relationships
2) When the device number of a device (M, T or C) other than I/O used in SET or RST instruction does not
exist due to indexing, an operation error (error code: 6706) occurs. (Applicable only to the FX3U and
FX3UC PLCs.)
91
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.11 PLS, PLF
5.11 PLS, PLF
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
When PLS instruction is executed, an applicable device is activated during only one operation cycle after a
drive input turns ON.
When PLF instruction is executed, an applicable device is activated during only one operation cycle after a
drive input turns OFF.
For example, when PLC mode is changed in the way "RUN → STOP → RUN while a drive input remains ON,
"PLS(**, M0) operates, but "PLS (**, M600) (backed up by the battery)" does not operate (when the PLC
mode switches from STOP to RUN) because the status of M600 is latched even while the PLC is in the STOP
mode.
1. Format and operation, execution form
Instruction Execution Expression in each language
name form Structured ladder ST
PLS
PLS Pulse EN ENO PLS(EN,d);
d
PLF
PLF Pulse EN ENO PLF(EN,d);
d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
Output ENO Execution state Bit
variable Applicable device or variable Bit
3. Applicable devices
Bit Devices Word Devices Others
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
PLS z S1 S2
PLF z S1 S2
S: Refer to "Cautions".
92
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.11 PLS, PLF
1
Function and operation explanation
Outline
1. PLS (rising edge differential output)
[Structured ladder] [ ST ] timing chart
2
PLS X000 ON
X000 PLS(X000, M0);
EN ENO
ON during one
Instruction List
d M0 operation cycle
PLS instruction M 0
In the figure above, M0 is ON during only one operation cycle when X000 changes from OFF to ON.
2. PLF (falling edge differential output)
[Structured ladder] [ ST ] timing chart 3
Instruction
Configuration of
PLF X000 ON
X000 PLF(X000, M1);
EN ENO
d ON during one
M1
PLF instruction M 1 operation cycle
In the figure above, M1 is ON during only one operation cycle when X000 changes from ON to OFF.
3. Output drive side
4
Instructions
Explanation of
How to Read
The following two circuits cause a same operation.
<<OUT instruction>> <<PLS instruction>>
X000 M1 M0
5
X000 PLS
X000 M1 = EN ENO
d
Basic Instruction
M0
X000 ON
ON during one
M 0 operation cycle 6
Instructions
Step Ladder
M 1 ON
In each case, M0 is ON during only one operation cycle when X000 changes from OFF to ON.
<<PLS instruction>> <<Pulse operation type applied instruction>>
7
PLS MOVP
Instructions
Applied
X000
EN ENO EN ENO
d M0 K10 s d D0
M0 MOV
K10
EN
s
ENO
d D0
8
Function
and Pulse Catch
Interrupt Function
In each case, MOV instruction is executed only once when X000 changes from OFF to ON.
A
and addresses
between devices
Relationships
93
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.11 PLS, PLF
Cautions
1) When write during RUN is completed for a circuit including an instruction for falling edge pulse (LDF,
ANDF or ORF instruction), the instruction is not executed without regard to the ON/OFF status of the
target device of the instruction for falling edge pulse.
When write during RUN is completed for a circuit including an instruction for falling edge pulse (PLF
instruction), the instruction is not executed without regard to the ON/OFF status of the operation condition
device.
It is necessary to set to ON the target device or operation condition device once and then set it to OFF for
executing the instruction for falling edge pulse.
2) When write during RUN is completed for a circuit including an instruction for rising edge pulse, the
instruction is executed if a target device of the instruction for rising edge pulse or the operation condition
device is ON.
Target instructions for rising edge pulse: LDP, ANDP, ORP, and pulse operation type applied instructions
(such as MOVP)
Contact ON/OFF status
(while write during RUN is Instruction for rising edge pulse Instruction for falling edge pulse
executed)
OFF Not executed Not executed
ON Executed*1 Not executed
*1. PLS instruction is not executed.
3) Some restrictions to applicable devices
S1: Excluding special auxiliary relays (M)
S2: Only the FX3U and FX3UC PLCs are capable of indexing applicable devices.
The following devices cannot be indexed.
• Special auxiliary relays (M)
94
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.12 MC, MCR
1
5.12 MC, MCR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
When MC instruction is executed, the bus line (LD or LDI point) is moved to a position after MC contact.
The bus line can be returned to the original position by MCR instruction.
By changing a device (Y or M) number, MC instruction can be used as many times as necessary.
If a same device number is used twice, however, it results in the double coil operation in the same way as
OUT instruction.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
name form Structured ladder ST
MC
MC Continuous EN ENO MC(EN,n,d); 4
n d
Instructions
Explanation of
How to Read
MCR
MCR Continuous EN ENO MCR(EN,n);
n
2. Set data
5
Basic Instruction
Variable Description Data type
MC: Bit
EN Execution condition
MCR: Always TRUE
Input Nesting level
variable When adopting a nesting structure, use it in order of 0 → 1 →
2 → 3 → 4 → 5 → 6 → 7. If not adopting a nesting structure,
ANY16 6
it is always "0".
Instructions
Step Ladder
Output ENO Execution state Bit
variable Device or variable of common connection contact Bit
3. Applicable devices
Bit Devices Word Devices Others
7
Instructions
Applied
System Special Real Character
Instruction System User Digit Specification Index Constant Pointer
User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
MC z S1
MCR
S: Refer to "Cautions".
There are no applicable devices.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
95
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.12 MC, MCR
Function and operation explanation
When MC instruction is executed, the bus line is moved to a position after MC contact.
Drive instructions connected to the bus line after MC contact execute each operation only when MC
instruction is executed, and do not execute the operation when MC instruction is not executed (the same
operation with the contact OFF).
In the program example below, the instructions from MC to MCR are executed as they are while the input
X000 is ON.
However, while the input X000 is OFF, each driven device offers the following operation.
Timers (except retentive type timers) and devices driven by OUT instruction: Turn OFF
Retentive type timers, counters and devices driven by SET/RST instruction : Hold the current status.
The expressions of circuit programs used to explain operations are circuits (for reading or monitoring) of GX
Works2.
[Structured ladder]
X000 MC
EN ENO
0 n d M100
N0 M100
X001 Y000
X002 Y001
MCR
EN ENO Write MCR instruction.
0 n
[ ST ]
MC(X000,0,M100);
Y000:= X001;
Y001:= X002;
MCR(TRUE,0);
Caution
Some restrictions to applicable devices
S1: Excluding special auxiliary relays (M)
96
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.12 MC, MCR
1
Program examples
Outline
1. When the nesting structure is not adopted.
[Structured ladder]
X000
EN
MC
ENO
2
Instruction List
0 n d M100
N0 M100
X001 Y000
X002 Y001
3
Instruction
Configuration of
MCR
EN ENO Return to the bus line.
0 n
Instructions
Explanation of
How to Read
X003 MC
EN ENO When not adopting the nesting structure, use nesting
0 n d M150 level "0" again to program.
There is no limitation in the number of nesting level "0".
N0 M150 Only in the nesting structure, increase the nesting level
X004 Y002
0 1 ... 6 7 as shown in the example 2 on the next 5
page.
Basic Instruction
X005 Y003
MCR
0
EN
n
ENO 6
Instructions
Step Ladder
[ ST ] 7
Instructions
Applied
MC(X000,0,M100);
Y000:= X001;
Y001:= X002;
MCR(TRUE,0);
MC(X003,0,M150);
Y002:= X004; 8
Function
and Pulse Catch
Interrupt Function
Y003:= X005;
MCR(TRUE,0);
A
and addresses
between devices
Relationships
97
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.12 MC, MCR
2. When the nesting structure is adopted.
When using MC instructions inside MC instruction, increase the nesting level "N" in turn in the way "N0 → N1
→ N2 → N3 → N4 → N5 → N6 → N7".
For returning from the nesting structure, reset the nesting levels from the highest one in turn using MCR
instruction in the way "N7 → N6 → N5 → N4 → N3 → N2 → N1 → N0".
For example, if "MCR N5" is programmed without programming "MCR N6" and "MCR N7", the nesting level is
returned to 5 at one time.
Available nesting levels are from N0 to N7 (eight layers).
[Structured ladder]
While X000 X000 MC
is OFF N0
EN ENO
[A] N 0 0 n d M100
M100
Y000
N0
X001
[B] The bus line B is active while X000 is ON.
While
X002 X002 MC
is OFF N1
EN ENO
1 n d M101
N1 M101
[C] X003 Y001 N1
The bus line C is active while both X000 and
While X002 are ON.
X004 X004 MC
is OFF N2
EN ENO
2 n d M102
N2 M102
X005 Y002 N2
The bus line D is active while all of X000,
X002 and X004 are ON.
MCR
EN ENO
[D] N2
2 n
X006 Y003 N1
The bus line returns to the status of the bus
line C by "MCR N2".
MCR
EN ENO
[C] N1
1 n
X007 Y004 N0
The bus line returns to the status of the bus
line B by "MCR N1".
MCR
EN ENO
[B] N0
0 n
Initial status
X010 Y005
The bus line returns to the initial status of the
bus line A by "MCR N0". Accordingly, Y005
turns ON or OFF by turning ON or OFF of
X010 without regard to X000, X002 and X004.
[A]
[ ST ]
MC(X000,0,M100);
Y000:= X001;
MC(X002,1,M101);
Y001:= X003;
MC(X004,2,M102);
Y002:= X005;
MCR(TRUE,2);
Y003:= X006;
MCR(TRUE,1);
Y004:= X007;
MCR(TRUE,0);
Y005:= X0010;
98
FXCPU Structured Programming Manual 5 Basic Instruction
(Basic & Applied Instruction) 5.13 END
1
5.13 END
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
END instruction specifies the end of a program.
(Do not write the END instruction in the middle of a program.)
END instruction for ending a program and input/output processing and returning to 0 step is automatically
written at the end of the program. It cannot be programmed into program structural elements (POU).
Function and operation explanation
3
Instruction
Configuration of
PLCs repeat "input processing → program execution → output processing". When END instruction is written
at the end of a program, PLCs immediately execute the output processing without executing steps after END
instruction.
If END instruction is not written at the end of a program, PLCs execute the program until the final step, and
then execute the output processing.
At the first execution after the PLC mode was changed from STOP to RUN, PLCs start from END instruction. 4
Instructions
Explanation of
How to Read
When END instruction is executed, the watchdog timer (which checks to see if the operation cycle is too long)
is refreshed.
Input processing
Step 000
001 LD X000 5
002
Basic Instruction
OUT Y000
END
NOP
NOP
NOP
6
Instructions
Step Ladder
Output processing
Cautions 7
Do not write END instruction in the middle of a program.
Instructions
Applied
5.14 NOP (for simple project only)
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
8
Function
and Pulse Catch
Interrupt Function
This instruction is available for use only in the simple project. It cannot be programmed in the structured
project.
A
and addresses
between devices
Relationships
99
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
6. Step Ladder Instructions
6.1 Step Ladder
This chapter introduces the instructions of structured project that correspond to the MELSEC-LD step ladder
instructions.
6.1.1 Outline
In programs using step ladder instructions, a state relay S is assigned to each process based on machine
operations, and input condition and output control are programmed as sequences connected to the state
output.
6.1.2 Function and operation explanation
In step ladder program, a state S is regarded as one control process, and a sequence of input condition and
output control are programmed in a state relay.
Because the preceding process is not performed any more when the program execution proceeds to the next
process, a machine can be controlled using simple sequences for each process.
1. Operation of instruction
In a step ladder program, each process performed by the machine is expressed by a state relay.
A state relay consists of a drive coil and contact (STL output) in the same way as other relays.
Use SET or OUT instruction to drive a coil, and use STL instruction for a contact.
• When a state relay turns ON, a connected circuit (internal circuit) is activated by way of an STL output.
When a state relay turns OFF, a connected internal circuit is deactivated by way of an STL output.
After one operation cycle, non-driving of an instruction (jump status) is not available.
• When a condition (transfer condition) provided between state relays is satisfied, the next state relay turns
ON, and the state relay which has been ON so far turns OFF (transfer operation).
In the state relay transfer process, the both state relays are ON only instantaneously (during one operation
cycle).
In the next operation cycle after the ON status was transferred the former state is reset to OFF.
When the transfer state relay S is used in a contact instruction, however, the contact image is executed in
the OFF status immediately after the transfer condition is satisfied.
100
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
1
• One state relay number can be used only once.
Outline
STL *1
Y030
EN ENO
S31 s
EN
SET
ENO
Process of S31
2
Instruction List
d Y31
When X001 turns ON,
SET S32 turns ON and S31
X001 is automatically reset.
EN ENO
d S32
STL Y030 *1
3
Instruction
Configuration of
EN ENO
S32 s
Y032 Process
of S32
4
X002 SET
EN ENO
Instructions
Explanation of
How to Read
d S33
STL Y030
EN ENO
S31 s
SET 5
Basic Instruction
EN ENO
d Y31
X001 SET
EN ENO
d S32
6
Instructions
Step Ladder
STL Y030
EN ENO
S32 s Activated
Y032
Y31 programmed in SET
instruction remains ON
even if S31 is reset.
X002 SET 7
EN ENO
Instructions
Applied
d S33
*1. Output coils can be used again in different state relays.
2. Primary knowledge for creating programs
8
• List of sequence instructions available between STL instruction and RET instruction
Function
and Pulse Catch
Interrupt Function
Instruction
LD/LDI/LDP/LDF
State relay AND/ANI/ANDP/ANDF, ANB/ORB/MPS/MRD/
MC/MCR
OR/ORI/ORP/ORF, OUT, MPP
Initial/general state relay
SET/RST, PLS/PLF
Available Available*1 Not available
A
and addresses
between devices
Relationships
Drive processing Available Available*1 Not available
Branch/recombination
state relay Transfer
Available Not available Not available
processing
- STL instruction cannot be used in interrupt program and subroutine programs.
- It is not prohibited to use jump instructions in state relays. But it is not recommended to use jump
instructions because complicated movements will be resulted.
*1. MPS instruction cannot be used immediately after an STL instruction, even in a drive processing
circuit.
101
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
• Special auxiliary relays
For efficiently creating step ladder programs, it is necessary to use some special auxiliary relays. The table
below shows major ones.
Device
Name Function and application
number
This relay is normally ON while the PLC is in the RUN mode.
M8000 RUN monitor Use this relay as the program input condition requiring the normally driven status or for indicating the PLC
operation status.
This relay turns ON and remains ON only instantaneously (during one operation cycle) when the PLC
M8002 Initial pulse mode is changed from STOP to RUN.
Use this relay for the initial setting of a program or for setting the initial state relay.
When this relay is set to ON, transfer of the ON status is disabled among all state relays.
STL transfer
M8040 Because programs in state relays are operating even in the transfer disabled status, output coils do not
disable
turn OFF automatically.
This relay automatically turns ON M8046 when any of the state relays S0 to S899 or S1000 to S4095 turn
M8046*1 STL state ON ON.
Use this relay to prevent simultaneous start up of another float or as a process ON/OFF flag.
When this device is driven, the state relays in the ON status on the programming function are
Enable STL
M8047*1 automatically read and displayed.
monitoring
For details, refer to the manual of each peripheral equipment.
*1. Processed when END instruction is executed.
• Block
When there are relay ladder blocks and M8002 SET
EN ENO
step ladder blocks, put RET instruction Initial pulse d S0
at the end of each step ladder program.
Relay ladder
A PLC starts the step ladder processing SET
by STL instruction, and returns to the EN ENO
relay ladder processing from the step d S1
ladder processing by RET instruction.
However, when consecutively STL Y000
Step ladder is
EN ENO started by STL
programming a step ladder in a different
S0 s instruction.
flow (when there is no relay ladder
X000 SET
before the step ladder in the different EN ENO
flow), RET instruction between flows can d S20 Step ladder
be omitted, and RET instruction can be
programmed only at the end of the last STL Y001
flow. EN ENO
S20 s X001 S0 It can be omitted.
Step ladder is
RET finished by RET
EN ENO instruction
STL Y001
EN ENO Step ladder is
S1 s started by STL
X002 SET instruction.
EN ENO
d S30 Step ladder
STL Y003
EN ENO
S30 s X003 S1
Step ladder is
RET finished by RET
EN ENO instruction
102
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
1
• Output driving method
Outline
It is required to include a LD or LDI instruction before the last OUT instruction in a state relay.
Change such a circuit as shown below.
STL Y001
EN ENO
S20 s
X005 Y002 2
Instruction List
Y003
Change Change
Instruction
Configuration of
STL Y001 STL Y001
EN ENO EN ENO
S20 s Or S20 s
Y003 X005 Y002
X005 Y002 M8000 Y003
Move the RUN
4
Instructions
Explanation of
How to Read
position. monitor Insert "always
ON" contact.
• State relay transfer method
Each OUT and SET instruction in state relays automatically resets the transfer source, and has the self-
holding function.
OUT instructions can be used only for transfer to a separate state relay in an SFC program. 5
Basic Instruction
STL
EN ENO
S41 s
SET
EN ENO Transfer to the next state relay
(SET instruction)
Transfer
condition S50
d S42
Transfer to a separate state relay
6
Instructions
Step Ladder
(OUT instruction)
3. Program with state relays in branches and recombination
• Example of selective branch
Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with
branches and recombination. 7
Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
Instructions
Applied
In the same way as programs for general state relays, program the drive processing first, and then
program the transfer processing.
Continuously program all transfer processing.
EN
STL
ENO
Y000
Drive processing
8
Function
and Pulse Catch
Interrupt Function
S20 s
X000 SET
EN ENO
d S21
X001
EN
SET
ENO
Transfer processing A
and addresses
between devices
Relationships
d S31
X002 SET
EN ENO
d S41
103
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
• Example of selective recombination
Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with
branches and recombination.
Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
Pay attention to the programming order so that a branch line does not cross a recombination line.
STL Y010
EN ENO
S29 s
STL Y011
EN ENO Drive processing
S39 s
STL Y012
EN ENO
S49 s
STL X010 SET
EN ENO EN ENO
S29 s d S50
STL X011 SET
EN ENO EN ENO Transfer processing
S39 s d S50
STL X012 SET
EN ENO EN ENO
S49 s d S50
Before recombination, program the drive processing of state relays first.
After that, program only the transfer processing to recombination state relays continuously.
This rule should be observed to enable inverse conversion into an SFC program.
• Example of parallel branch
Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with
branches and recombination.
Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
In the same way as programs for general state relays, program the drive processing first, and then
program the transfer processing.
Continuously program all transfer processing.
STL Y001 Drive processing
EN ENO
S20 s
X000 SET
EN ENO
d S21
SET
EN ENO Transfer processing
d S31
SET
EN ENO
d S41
104
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
1
• Example of parallel recombination
Outline
Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with
branches and recombination.
Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
Pay attention to the programming order so that a branch line does not cross a recombination line.
STL
2
Y010
Instruction List
EN ENO
S29 s
STL Y011
EN ENO Drive processing
S39 s 3
Instruction
Configuration of
STL Y012
EN ENO
S49 s
STL
S29
EN
s
ENO 4
Instructions
Explanation of
How to Read
STL
EN ENO
S39 s
EN
STL
ENO
Transfer processing
5
Basic Instruction
S49 s
X010 X011 X012 SET
EN ENO
d S50
6
Instructions
Step Ladder
Before recombination, program the drive processing of state relays first.
After that, program only the transfer processing to recombination state relays continuously.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
105
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
• Composition of branches and recombination
When a recombination line is directly connected to a branch line (not by way of a state relay as shown
below), it is recommended to provide a dummy state relay between the lines.
Create step ladder programs as shown below.
1) Selective recombination and selective branch
STL X000 SET
EN ENO EN ENO
S20 s d S100
STL X001 SET
EN ENO EN ENO
S30 s d S100
STL X003 SET
EN ENO EN ENO
S100 s d S50
X004 SET
EN ENO
d S60
2) Parallel recombination and parallel branch
STL
EN ENO
S20 s
STL X000 SET
EN ENO EN ENO
S30 s d S101
STL S101 SET
EN ENO EN ENO
S101 s d S50
SET
EN ENO
d S60
3) Selective recombination and parallel branch
STL X000 SET
EN ENO EN ENO
S20 s d S102
STL X001 SET
EN ENO EN ENO
S30 s d S102
STL S102 SET
EN ENO EN ENO
S102 s d S40
SET
EN ENO
d S50
106
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
1
4) Parallel recombination and selective branch
Outline
STL
EN ENO
S20 s
STL X000 SET 2
EN ENO EN ENO
Instruction List
S30 s d S103
STL X001 SET
EN ENO EN ENO
S103 s d S40
3
SET
Instruction
Configuration of
X002
EN ENO
d S50
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
107
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.1 Step Ladder
6.1.3 Program examples
Examples of single flows
1. Example of flicker circuit
• When the PLC mode is changed from STOP to RUN, the state relay S3 is driven by the initial pulse
(M8002).
• The state relay S3 outputs Y000. One second later, the ON status transfers to the state relay S20.
• The state relay S20 outputs Y001. 1.5 seconds later, the ON status returns to the state relay S3.
[Structured ladder]
Step M8002 SET
number 0 EN ENO
Initial d S3
Y000 pulse
STL Y000
Y001 3 EN ENO
S3 s
OUT_T
1 second 1.5 second EN ENO
TC0 TCoil
K10 TValue
TS0 SET
8 EN ENO
d S20
STL Y001
11 EN ENO
S20 s
OUT_T
EN ENO
TC1 TCoil
K15 TValue
TS1 S3
16
RET
19 EN ENO
[ ST ]
SET(M8002,S3);
STL(TRUE, S3);
Y000:=TRUE;
OUT_T(TRUE, TC0,K10);
SET(TS0, S20);
STL(TRUE, S20);
Y001:=TRUE;
OUT_T(TRUE, TC1, K15);
S3:=TS1;
RET(TRUE);
108
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.2 STL
1
6.2 STL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
2
Instruction List
In programs using step ladder instructions, a state relay State S is assigned to each process based on
machine operations, and input condition and output control are programmed as sequences connected to the
state output.
STL instruction for step ladder programs is expressed as follows in each language.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
STL
STL 16 bits Continuous EN ENO STL(EN,s); 4
s
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input
variable
EN Execution condition Always TRUE 5
Basic Instruction
Output Target device or variable Bit
variable ENO Execution state Bit
3. Applicable devices
Bit Devices Word Devices Others 6
Operand System Special Real Character
Instructions
Step Ladder
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
4. Caution
Refer to the cautions in the items below for expressing step ladders in a structured project (structured ladder,
7
Instructions
Applied
ST).
→ Section 6.3 RET
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
109
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.3 RET
6.3 RET
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
RET instruction for step ladder programs is expressed as follows in each language.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RET
RET 16 bits Continuous RET(EN);
EN ENO
2. Set data
Variable Description Data type
Input
EN Execution condition Always TRUE
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
110
FXCPU Structured Programming Manual 6 Step Ladder Instructions
(Basic & Applied Instruction) 6.3 RET
1
4. Caution
Outline
The following examples show how MELSEC-LD step ladders are expressed in the structured programs
(structured ladder, ST).
Reference: MELSEC-LD step ladder expression
1) When expressing step ladder (STL) 2) When expressing step ladder (STL) 2
instructions in the coil format. (Same as that instructions in the contact format.
Instruction List
for GX Developer)
M8002 M8002
SET S0 SET S0
3
S0
Instruction
Configuration of
STL S0 STL Y000
X000
Y000 SET S20
X000
SET S20
S20
STL
X000
S0
4
Instructions
Explanation of
How to Read
STL S20
RET
X001
S0
END
RET 5
Basic Instruction
END
Expressing step ladder in structured program 6
Instructions
Step Ladder
1) Structured ladder
M8002 SET
EN ENO
d S0
7
Instructions
Applied
STL Y000
EN ENO
S0 s SET
X000
EN ENO
d S20
8
Function
and Pulse Catch
Interrupt Function
STL X001 S0
EN ENO
S20 s RET
EN ENO
A
and addresses
between devices
Relationships
2) ST
SET(M8002, S0);
STL(TRUE, S0);
Y000:=TRUE;
SET(X000, S20);
STL(TRUE, S20);
S0:=X001;
RET(TRUE);
111
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
7. Applied Instructions
This chapter introduces the structured project instructions corresponding to the applied instructions for the
simple project.
→ Q/FX Structured Programming Manual (Fundamentals)
7.1 Program Flow
7.1.1 CJ
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
CJ or CJP instruction jumps to a pointer p.
The sequence program steps between CJ or CJP instruction and the pointer are not executed.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
CJ
CJ 16 bits Continuous EN ENO Syntax such as condition sentence is used.
p Refer to the following manual for syntaxes.
→ Q/FX Structured
CJP Programming Manual
CJP 16 bits Pulse EN ENO (Fundamentals)
p
2. Input and output data types
Variable Description Data type
Input EN Execution condition Bit
variable p Circuit block label for the jump destination ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
p z z
112
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Function and operation explanation
Outline
1. 16-bit operation(CJ, CJP)
While the command input is ON, CJ or CJP instruction executes a program with a specified label (pointer
number).
1) In the case of CJ instruction 2
Instruction List
User program
Command CJ ON
EN ENO Command
Jumps to the pointer while p input
the command is ON.
p
3
CJ Executed in every scan
Instruction
Configuration of
User program
Which is skipped and is not executed when the command turns ON.
Label
p User program
2) In the case of CJP instruction
4
Instructions
Explanation of
How to Read
User program
Command CJP ON
EN ENO Command
Jumps to the pointer only in one
operation while the command is ON.
p
p input 5
Basic Instruction
CJP
User program
Which is skipped and is not executed in one operation Executed in one scan
cycle when the command turns ON.
Label
p User program 6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
113
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Cautions
1) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
2) The figure below shows programming of a label.
When creating a circuit program, move the cursor to the left side of the bus line in the ladder diagram, and
input a label P at the head of the circuit block.
X030 CJ
EN ENO
P20 p
X031 Y010
Label X032 Y011
P 20
Bus line
3) A label can be programmed in a smaller number step than CJ instruction. However, note that a watchdog
timer error occurs when the scan time exceeds 200 ms (default setting).
Label
P 10
X022 CJ
EN ENO
P10 p
4) When the pointer number in operands is same and there is one label, the following operation is caused.
When X020 turns ON, the program execution jumps from CJ instruction corresponding to X020 to the
label P9. When X020 turns OFF and X021 turns ON, the program execution jumps from CJ instruction
corresponding to X021 to the label P9.
X020 CJ
EN ENO
P9 p
X021 CJ
EN ENO
P9 p
Label
P9
5) When a label number (including labels for CALL instructions described later) is used two or more times,
an error is caused.
X020 CJ
EN ENO
P9 p
X030 CJ
EN ENO
P9 p
Label
P9 User program
Label
P9 User program
114
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
6) The pointer P63 specifies jump to END step. Do not program P63. If P63 is programmed, PLCs will
Outline
display the error code 6507 (defective label definition) and stop.
CJ
EN ENO
P63 p
2
Instruction List
Label
P 63 END
Do not program P63.
7) Any label cannot be shared by CALL instruction and CJ instruction.
3
Command CJ
Instruction
Configuration of
EN ENO
P15 p
CALLP
X000
P15
EN
p
ENO
4
Instructions
Explanation of
How to Read
X001
FEND
EN ENO
Label Subroutine program
P15
M8000
User program
dedicated to CALL instruction
5
RUN monitor Program a label (P)
Basic Instruction
(normally ON) SRET after FEND instruction.
EN ENO
8) Because M8000 is normally ON while a PLC is operating, unconditional jump is specified when M8000 is
used in the following example.
CJ
6
M8000
Instructions
Step Ladder
EN ENO
RUN monitor P5 p
User program
(It is skipped, and is not executed.)
Label
7
Instructions
Applied
P5 User program
9) The operation of the CJ and contact coils are described later.
10) The relationships between the master control instructions and jump instructions are described later.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
115
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Program examples
In one operation cycle after X023 changes to ON from OFF, CJ P7 instruction becomes valid.
By using this method, jump can be executed after all outputs between CJ P7 instruction and the label P7 turn
OFF.
X023 PLS
EN ENO
d M0
M0 CJ
EN ENO
P7 p
X023
Label
P7 User program
116
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
CJ instruction and operations of contact and coil
Outline
In the program example shown below, when X000 turns ON, the program execution jumps from CJ instruction
in the first circuit to the label P8. While X000 is OFF, jump is executed. The program is sequentially executed
from first step, and jumps from 11th circuit to the label 9.
The jumped instruction is not executed.
1. Circuit example 1 for explain operations
2
Instruction List
X000 CJ • Double coil operation of output Y001
1st circuit 0 EN ENO While X000 is OFF, output Y001 is activated by X001.
P8 p While X000 is ON, output Y001 is activated by X012.
X001 Y001 Even in a program divided by conditional jumps, if a
4
X002 M1
same coil (Y000 in this case) is programmed two or more
times within the jump area or outside the jump area, such
3
Instruction
Configuration of
6 a coil is handled as double coil.
X003 S1
8 • When the reset (RST) instruction for the retentive type
X004 OUT_T timer (T246) is located outside jump area:
EN ENO Even if the counting coil (T246) is jumped, reset (return
4
11
TC0 TCoil of the contact and clearing of the current value) is valid.
K10 TValue
Instructions
Explanation of
How to Read
• When the reset (RST) instruction for the counter (C0) is
RST
X005 located outside the jump area:
15 EN ENO
Even if the counting coil is jumped, reset (return of the
d TN246 contact and clearing of the current value) is valid.
18
X006
EN
OUT_T
ENO • Operation of the routine timers:
5
Basic Instruction
TC246 TCoil A routine timer continues its operation even if it is jumped
K1000 TValue after the coil is driven, and the output contact is
activated.
X007 RST
22 EN ENO
• Operation of the high speed counters:
d CN0 A high speed counter continues its operation even if it is 6
jumped after the coil is driven, and the output contact is
Instructions
Step Ladder
X010 OUT_C
25 EN ENO activated.
CC0 CCoil
When each input changes during jump in the program
K20 CValue
shown on the left, each coil executes the following
operation:
29
X011
EN
MOV
ENO
Classification
Contact status before Coil operation during 7
jump jump
Instructions
Applied
K3 s d D0
Label Y, M, S X001, X002, X003 OFF Y001, M1, S1 OFF
P8 (Y001, M1, S1) X001, X002, X003 ON Y001, M1, S1 ON
X004 OFF Timer is not activated.
X000 CJ 10 ms timer and
Counting is paused
11th circuit 35 EN ENO 100 ms timer
P9 p (T0)
X004 ON (and is restarted after X000
turns OFF). 8
Y001
Function
and Pulse Catch
Interrupt Function
X012 Timer is not activated.
X005 OFF
40 The deactivation status is
X006 OFF
1 ms timer reset when X013 turns ON.
Label
(T246) Counting is continued
P9 X005 OFF
(and the contact is activated
RST X006 ON
X013 after X000 turns OFF).
42 EN ENO
d TN246 X007 OFF
Countint is not activated. A
The deactivation status is
and addresses
between devices
Relationships
X010 OFF
reset when X013 turns ON.
RST Counter (C0)
Counting is paused
EN ENO X007 OFF
(and is restarted after X000
d CN0 X010 ON
turns OFF).
X011 OFF FNC instruction is not
executed during jump.
Applied
But MTR, HSCS, HSCR,
instruction
X011 ON HSZ, SPD, PLSY and PWM
(MOV)
instructions continue their
operations.
117
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
2. Circuit example 2 for explaining operations (when only an RST instruction for timer or
counter is jumped)
When X011 turns ON while the RST instruction
OUT_C
X012 for the counter C0 is operating (X010 is ON), the
EN ENO
program execution jumps past the RST
CC0 CCoil
instruction due to the CJ instruction.
K10 CValue
In this jump status, the counter C0 remains
X011 CJ reset. Accordingly, the current value of C0
EN ENO remains "0" even if X012 turns ON.
P0 p To clear this reset status, it is necessary to turn
OFF the RST instruction for counter C0. (Refer
X010 RST
EN ENO
to the program shown below.)
d CN0
Label
P0
Timing chart
Jump operation by
CJ instruction driven by X011
X012
Because C0 remains
Counter reset, its current value
3 is reset. remains unchanged
Current value 2 even if X012 turns ON. 2
of C0 1 1
X010 ON
RST
C0 Remains reset
Program example for activating a timer and counter even during a jump
X012 OUT_C
EN ENO
CC0 CCoil
K10 CValue
X011 CJ
EN ENO
P0 p
X010 RST
EN ENO
d CN0
Label
P0
M8000 RST
EN ENO Clears the reset status
of counter C0 during jump
d CN0
118
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Timing chart
Outline
Jump operation by
CJ instruction driven by X011
X012
2
Instruction List
5
Counter 4
3 is reset. 3
Current value 2 2
of C0 1 1
X010 ON
*1 In the same operating
3
Instruction
Configuration of
RST cycle as the reset, the
C0 reset status of counter
C0 is cleared.
*1
Relationship between master control instruction and jump instruction
The figure below shows the contents of operation and the relationship between the master control instruction.
4
Instructions
Explanation of
How to Read
Avoid using 2), 4) and 5) because the operation will be complicated.
CJ P 0
1) Jump from outside MC to
outside MC is available
arbitrarily.
5
Master control
CJ P 1 MC N 0 M 1
2) Jump from outside MC
Basic Instruction
to inside MC
MC N 0 M 0 Jump is executed CJ P 4
regardless of the MC
operation.
P 1 Even if M0 is OFF, M0 is MCR N 0 5) Jump from inside
regarded as ON after P1. MC to inside
other MC 6
Instructions
Step Ladder
MC N 0 M 2
Master control
3) Jump from inside MC to
Master control
CJ P 2 inside MC P 4
Jump is disabled while
M0 is OFF.
P 2
MCR N 0
7
Instructions
Applied
4) Jump from inside MC to
outside MC
CJ P 3 Jump is disabled while
M0 is OFF. Jump is enabled while M1 is ON.
Jump is executed while In circuits after jump, M2 is regarded as ON
MCR N 0 M0 is ON, but MCR is
invalid.
regardless of the actual ON/OFF status of M2.
And the first MCR is ignored.
8
Function
and Pulse Catch
Interrupt Function
P 3
P 0
A
and addresses
between devices
Relationships
119
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
7.1.2 CALL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction calls and executes a program which should be processed commonly in a sequence program.
This instruction saves the number of program steps, and achieves efficient program design.
For creating a subroutine program, FEND and SRET instructions are required.
A similar processing is available by creating a function block and read it out from the program block.
Refer to the following manual for creating function blocks.
→ GX Works2 Version1 Operating Manual (Structured Project)
→ Q/FX Structured Programming Manual (Fundamentals)
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
CALL
CALL Continuous EN ENO
p
Use a subroutine program by reading out the
16 bits
function block made of other program parts.
CALLP
CALLP Pulse EN ENO
p
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable p Circuit block label of subroutine program to be executed. ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
p z z
120
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Function and operation explanation
Outline
1. 16-bit operation
While the command input is ON, CALL instruction is executed and the program execution jumps to a step with
a label p.
Then, a subroutine program with the label p is executed.
When SRET instruction is executed, the program execution returns to the step after CALL instruction.
2
Instruction List
• At the end of the main program, put FEND instruction.
• Put a label p for CALL instruction after FEND instruction.
User program
3
CALL
Instruction
Configuration of
Command
EN ENO Main program
p p
Program area from the
step 0 to FEND instruction
User program
FEND
4
Instructions
Explanation of
How to Read
EN ENO
Label M8000
p
User program Subroutine program
RUN monitor
(normally ON) Program area from a label p
SRET to SRET instruction 5
EN ENO
Basic Instruction
Cautions
1) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
6
2) To use the subroutine call, follow the steps below.
Instructions
Step Ladder
Name the task "MELSEC_MAIN".
Using a different task name prompts an error because the "one set in the program block" by the function
FEND and the "one finally added to the program block during compiling" become redundant.
Be sure to program in combination with the SRET and FEND functions.
→ Refer to Section 7.1.3 for SRET. 7
→ Refer to Section 7.1.7 for FEND.
Instructions
Applied
3) In CALL instructions, a same number can be used two or more times in operands (P).
However, do not use a label (P) and number used in another instruction (CJ).
X020 CJ
P9
EN
p
ENO
8
Function
and Pulse Catch
Interrupt Function
X030 CALLP
EN ENO
P9 p
Label
P9 User program A
and addresses
between devices
Relationships
4) Cautions about the use in subroutines or interrupt routines are described later.
121
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Program examples
1. Example of fundamental use (no nesting)
X000 CALL
EN ENO
P10 p
Main program
While X000 is ON, the program
FEND
execution jumps to a step with the label P10.
EN ENO
Label
P 10
Subroutine program
When SRET instruction is executed
after the subroutine program has executed,
SRET the program execution returns to the original step +1.
EN ENO
2. Example of multiple CALL instructions in subroutines (multiple nesting)
CALL instruction can be used up to 4 times in subroutine programs. Nesting of up to five layers is allowed.
X001 CALLP
EN ENO
P11 p Main program
When X001 turns ON from OFF, the program
FEND execution jumps to the label P11 only once.
EN ENO
Label
P 11
X002 CALL Subroutine program1
EN ENO When SRET instruction is executed, the program
P12 p execution returns to the main program.
If X002 is ON while the subroutine program 1 is
SRET executed, the program execution jumps to a step with the label P12.
EN ENO
Label X003
P 12 Subroutine program2
The subroutine program with P12 is executed,
SRET and then the program execution returns to the subroutine program
EN ENO with P11 by SRET instruction.
122
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Cautions on subroutines and interrupt routines
Outline
This section explains cautions on creating programs in subroutines and interrupt routines.
The explanation below is given for subroutines, but the situation also applies to interrupt routines.
1. When using timers in subroutines (or interrupt routines)
Use retentive type timers T192 to T199 in subroutines. 2
These timers execute counting when the coil instruction or END instruction is executed.
Instruction List
After a timer reaches the set value, the output contact is activated when the coil instruction or END instruction
is executed.
Because general timers execute counting only when the coil instruction is executed, they do not execute
counting if they are used in subroutines in which the coil instruction is executed only under some conditions.
2. When using retentive type 1 ms timers in subroutines (or interrupt routines) 3
If a retentive type 1 ms timer is used in a subroutine, note that the output contact is activated when the first
Instruction
Configuration of
coil instruction (or subroutine) is executed after the timer reaches its set value.
3. Countermeasures against latches of devices used in subroutines (or interrupt routines)
Devices which were set to ON in a subroutine are latched in the ON status even after the subroutine is
finished. (Refer to the program described later.)
When RST instruction for a timer or counter is executed, the reset status of the timer or counter is latched
4
Instructions
Explanation of
How to Read
also.
For turning OFF such a device latched in the ON status or for canceling such a timer or counter latched in the
reset status, reset such a device in the main program after the routine is finished, or program a sequence for
resetting such a device or for deactivating RST instruction in the routine. (Refer to the program described
later.)
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
123
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1) Example in which outputs are latched
In the following program example, the counter C0 is provided to count X001. When X000 is input, the
subroutine P0 is executed only in one scan, and then the counter is reset and Y007 is output.
• Program examples
X000 CALLP
EN ENO
P0 p
X001 OUT_C
EN ENO
CC0 CCoil
K10 CValue
FEND
EN ENO
X000 RST
P0 EN ENO
d CN0
Y007
SRET
EN ENO
• Timing chart
Execution of subroutine Subroutine is executed.
P0 triggered by X000
X001
Counter is Because the reset instruction for C0 is valid,
3 reset. the current value of C0 remains unchanged
Current value 2 even if pulses are input.
of C0 1
RST
C0 Remains reset
Y007 Y007 is being output.
Outputs are held.
124
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
2) Example for resetting held outputs (countermeasures)
Outline
• Program examples
X000 CALLP
EN ENO
P0 p
2
OUT_C
Instruction List
X001
EN ENO
CC0 CCoil
K10 CValue
RST
X002
EN ENO Y007 is reset at an arbitrary timing. 3
d Y007
Instruction
Configuration of
FEND
EN ENO
P0
X000
EN
RST
ENO A
4
Instructions
Explanation of
How to Read
d CN0
M8001 RST
B
EN ENO
RUN monitor d CN0 The preceding RST C0 instruction
(normally OFF) is deactivated in the subroutine.
Y007 5
Basic Instruction
SRET
EN ENO
• Timing chart 6
Instructions
Step Ladder
Subroutine is executed.
Execution of P0
triggered by X000.
X001
4
7
3
Instructions
Applied
3
Current value 2 2
of C0 1 1
RST Counter is reset Counter reset
C0 (part A in above program). instruction is deactivated (part B in above program).
Y007 8
Function
and Pulse Catch
Interrupt Function
X002 Y007 is reset.
A
and addresses
between devices
Relationships
125
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
7.1.3 SRET
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction returns the program execution from a subroutine to the main program.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SRET Use a subroutine program by reading out the
SRET 16 bits Continuous
EN ENO function block made of other program parts.
2. Set data
Variable Description Data type
Input
EN Execution condition Always TRUE
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
Function and operation explanation
When CALL instruction in the main program is executed, the program execution jumps to a subroutine.
SRET instruction returns the program execution to the main routine.
→ Refer to Section 7.1.2.
126
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
7.1.4 IRET
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction returns the program execution from an interrupt routine to the main program.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
IRET 16 bits Continuous IRET IRET(EN);
EN ENO
2. Input and output data types
Variable Description Data type
4
Instructions
Explanation of
How to Read
Input
EN Execution condition Always TRUE
variable
Output
ENO Execution state Bit
variable
3. Applicable devices 5
Basic Instruction
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
6
Function and operation explanation
Instructions
Step Ladder
When an interrupt (input, timer or counter) is generated while the main program is executed, the program
execution jumps to an interrupt (I) routine.
IRET instruction returns the program execution to the main routine.
The table below shows the three types of jump to an interrupt routine.
Function Description
7
Instructions
Applied
Input interrupt Executes the interrupt processing when an input(X) signal turns ON or OFF.
Timer interrupt Executes the interrupt processing at a specified time interval (constant cycle).
Counter interrupt *1 Executes the interrupt processing when a high speed counter reaches its set value.
*1. Only the FX3U, FX3UC and FX2C PLCs of V3.07 or later support this function.
→ For the interrupt function, refer to Chapter 8. 8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
127
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Cautions
1) Create a task for the interrupt program and the main program.
2) Use "Event" to specify the interrupt pointer to be used for the task for the interrupt program.
→ For the interrupt pointer, refer to Chapter 8.
3) IRET instruction needs not to be programmed because the function IRET is automatically added during
the compilation at the end of the program block that is registered in the task for the interrupt program.
Interrupt program
INC
EN ENO
d D0
IRET
EN ENO
Do not program IRET instruction because
it is automatically added during the compilation.
4) The program block registered in the task for the main program requires the function EI (interrupt
enabled). Program the function DI (interrupt disabled) as necessary.
EI
EN ENO
Range of interrupt enabled
DI If necessary, program the DI as
EN ENO it is a interrupt disabled function.
FEND
EN ENO Do not program the FEND instruction as
it is automatically added during the compilation.
128
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Program examples
Outline
[Structured ladder]
Task for main program
Interrupts are usually disabled in PLCs.
EI Use EI instruction to enable interrupts.
EN ENO When X000 turns ON while the main program is 2
executed,instructions after the interrupt
Instruction List
routine pointer I001 are executed, and the
M8000 OUT_C program execution returns to the original main
EN ENO program by IRET instruction.
CC255 CCoil Main program
K100 CValue
Instruction
Configuration of
FEND
EN ENO
Task for interrupt program(Interrupt pointer I001 is set by event.)
I001:The rising edge of X000 is detected.
4
Instructions
Explanation of
How to Read
Input interrupt routine
IRET
EN ENO
Task for interrupt program(Interrupt pointer I620 is set by event.)
I620:Interrupt every 20 ms.
The timer interrupt of the pointer I620 is executed
5
Basic Instruction
every timer time of 20 ms, and the program execution
Timer interrupt routine is returned to the original main program by IRET
IRET
instruction each time.
EN ENO
Task for interrupt program(Interrupt pointer I010 is set by event.)
I010:High speed counter interrupt
The high speed counter interrupt of the pointer I010
6
Instructions
Step Ladder
is executed when the current value of a high speed
High speed counter routine counter becomes equivalent to a value specified by
IRET DHSCS instruction, and the program execution returns
EN ENO to the original main program by IRET.
[ ST ]
Task for main program 7
Interrupts are usually disabled in PLCs.
Instructions
Applied
EI(TRUE);
Use EI instruction to enable interrupts.
OUT_C(M8000, CC255, K100);
Main program When X000 turns ON while the main program is
executed,instructions after the interrupt
FEND(TRUE) routine pointer I001 are executed, and the
program execution returns to the original main
Task for interrupt program(Interrupt pointer I001 is set by event.)
I001:The rising edge of X000 is detected.
program by IRET instruction. 8
Function
and Pulse Catch
Interrupt Function
Y000: =X000;
Input interrupt routine
IRET(TRUE);
Task for interrupt program(Interrupt pointer I620 is set by event.)
I620:Interrupt every 20 ms.
The timer interrupt of the pointer I620 is executed
A
and addresses
between devices
Relationships
Y000: =X000; every timer time of 20 ms, and the program execution
Timer interrupt routine is returned to the original main program by IRET
IRET(TRUE); instruction each time.
Task for interrupt program(Interrupt pointer I010 is set by event.)
I010:High speed counter interrupt The high speed counter interrupt of the pointer I010
is executed when the current value of a high speed
Y000: =X000;
counter becomes equivalent to a value specified by
High speed counter routine
DHSCS instruction, and the program execution returns
IRET(TRUE); to the original main program by IRET.
129
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
7.1.5 DI
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction disables interrupts after interrupts were enabled by EI instruction.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DI 16 bits Continuous DI DI(EN);
EN ENO
2. Set data
Variable Description Data type
Input
EN Execution condition Always TRUE
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
Function and operation explanation
DI instruction is the independent type, and does not require command (drive) contact.
Cautions
Interrupts (requests) generated after DI instruction are processed after EI instruction is executed.
130
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
7.1.6 EI
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
Interrupts are usually disabled in PLCs. This instruction enables interrupts in PLCs.
Use this instruction for using the input interrupt, timer interrupt and counter interrupt functions.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
EI 16 bits Continuous
EI EI(EN);
EN ENO
2. Set data 4
Instructions
Explanation of
How to Read
Variable Description Data type
Input
EN Input condition Always TRUE
variable
Output
ENO Input status Bit
variable
5
3. Applicable devices
Basic Instruction
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available. 6
Instructions
Step Ladder
Function and operation explanation
EI instruction is the independent type, and does not require command (drive) contact.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
131
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Cautions
1) Refer to the following items for the cautions on the interrupt program.
→ Refer to Section 7.1.4.
2) Use the EI instruction as follows when the FXU, FX2C, FX2N, FX2NC, FX3U and FX3UC PLCs use the pulse
catch function. The IE instruction does not need to be programmed when the FX0, FX0S, FX0N, FX1S,
FX1N, FX1NC or FX3G PLC uses the pulse catch function.
For the details of special auxiliary relays and other devices used with the pulse catch function, refer to the
following manual.
→ FX Structured Programming Manual (Device & Common)
When using the FX3U PLC
[Structured ladder] [ ST ]
EI(TRUE)
EI
EN ENO
Y000:=M8170; *1
RST(X001, M8170); *1
M8170 *1 Y000
With the rising edge of X000 detected,
M8170 is reset by interrupt.
X002 RST
EN ENO Resets pulse catch results.
d M8170
*1. A special auxiliary relay for the X000 pulse catch function used in the FX1S, FX1N, FXU, FX2C, FX2N,
FX2NC, FX3G, FX3U and FX3UC PLCs. The special auxiliary relay depends on the PLC used and input
number. For the pulse catch function, refer to Chapter 8.
132
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
7.1.7 FEND
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction indicates the end of the main program.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
FEND 16 bits Continuous FEND FEND(EN);
EN ENO
2. Set data
Variable Description Data type
4
Instructions
Explanation of
How to Read
Input
EN Input condition Always TRUE
variable
Output
ENO Input status Bit
variable
3. Applicable devices 5
Basic Instruction
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
6
Function and operation explanation
Instructions
Step Ladder
When FEND instruction is executed, output processing, input processing and watchdog timer refresh are
executed, and then the program execution returns to the step 0.
FEND instruction is required in creating subroutine programs and interrupt programs.
1. In the case of CJ instruction 7
Instructions
Applied
0
Main routine program
When X010 is OFF
X010 CJ
EN ENO
P20 p
8
Function
and Pulse Catch
Interrupt Function
Jump
Main routine program
FEND
EN ENO
A
When X010 is ON
P20
and addresses
between devices
Relationships
Main routine program
FEND
EN ENO
133
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
2. In the case of CALL instruction
0
Main routine program
When X011
When X011 is OFF
is ON
X011 CALL
EN ENO
P21 p
Main routine program
FEND
EN ENO
P21
Subroutine program
I100
Interrupt routine
program
Cautions
1) The function FEND instruction is usually added automatically during compilation.
It is not necessary to program the FEND instruction in the program block except when creating a
subroutine. As for the subroutine programs, refer to the following.
→ Refer to Section 7.1.2.
2) When FEND instruction is programmed two or more times, put a subroutine program or interrupt routine
program between the last FEND instruction and END instruction.
3) When CALL or CALLP instruction is used, put a label after FEND instruction. And the SRET instruction is
required in every case.
4) When CALL or CALLP instruction is used, if FEND instruction is executed after CALL or CALLP
instruction was executed and before SRET instruction is executed, an error is caused.
5) When FOR instruction is used, if FEND instruction is executed after FOR instruction was executed and
before NEXT instruction is executed, an error is caused.
6) When the interrupt function (I) is used, be sure to program an interrupt label (pointer) after FEND
instruction. And IRET instruction is required in every case.
134
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
7.1.8 WDT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction refreshes the watchdog timer in a sequence program.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
WDT
Instruction
Configuration of
WDT Continuous WDT(EN);
EN ENO
16 bits
WDTP Pulse WDTP WDTP(EN);
EN ENO
4
2. Set data
Instructions
Explanation of
How to Read
Variable Description Data type
Input
EN Execution condition Bit
variable
Output
ENO Execution state Bit
variable
5
Basic Instruction
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
-
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier
No target device is available.
K H E "
" P
6
Instructions
Step Ladder
Function and operation explanation
When the operation cycle (time until END or FEND instruction is executed after the step 0) of a PLC exceeds
200 ms, a watchdog timer error (indicating abnormal operation) occurs. The CPU error LED lights, and the
PLC stops. When the operation cycle is long, insert WDT instruction in the middle of the program to avoid the 7
watchdog timer error.
Instructions
Applied
Command
Command
contact
input WDTP
EN ENO One scan is
executed.
Command
8
Function
and Pulse Catch
Interrupt Function
Command
contact
input WDT
EN ENO
Each scan is
executed.
A
and addresses
between devices
Relationships
Related device
Device Name Description
D8000 Watchdog timer time Up to 32767 ms can be set in units of ms (initial value: 200 ms).
135
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Cautions
1) The FX0, FX0S or FX0N PLC does not support the pulse operation type instructions.
To execute pulse operation, make the instruction execution condition pulse type.
2) A watchdog timer error may occur in the following cases. To avoid the error, input a program shown
below near the head step to extend the watchdog timer time, or shift FROM/TO instruction execution
timing.
- Caution when many special extension devices are connected.
In such configuration that many special extension devices (such as positioning units, cam switches,
analog units and link units) are connected, the buffer memory initialization time may become longer,
thus the operation time may become longer, and a watchdog timer error may occur.
- Caution when many FROM/TO instructions are driven at one time.
When many FROM/TO instructions are executed or when many buffer memories are transferred, the
operation time may become longer, and a watchdog timer error may occur.
- Caution when there are many high speed counters (software counters).
When many high speed counters are provided and high frequency are counted at one time, the
operation time may become longer, and a watchdog timer error may occur.
3) The watchdog timer time can be changed.
By overwriting the contents of D8000 (watchdog timer time), the watchdog timer detection time (initial
value: 200 ms) can be changed.
By inputting the program shown below, the sequence program after this insertion is monitored by a new
watchdog timer time.
M8002 MOV
EN ENO
Watchdog timer time 300ms
0 K300 s d D8000
Initial pulse
WDT Watchdog timer refresh
EN ENO If WDT (FNC 07) instruction is not programmed,
the value of D8000 is valid during END processing.
Program examples
1. When the operation cycle is long and causes an error
For example, by dividing a program whose operation cycle is 240 ms into two portions and inserting WDT
instruction between them, the operation cycle becomes less than 200 ms in both the former half portion and
the latter half portion.
Program whose
operation cycle
Program whose is 120 ms
operation cycle
is 240 ms WDT
EN ENO
Program whose
END operation cycle
is 120 ms
END
2. When a label (P) of CJ instruction is located in a step number smaller than the step number
of CJ instruction
Put WDT instruction after the label (P).
If an input relay (X) is used as the
M8000 WDT
Label command contact, input refresh is
EN ENO
Pn RUN monitor disabled, so the program
execution cannot be returned
Program When the command from the area between P and CJ.
contact turns ON As the command contact, use
Command CJ such device that can be set to
EN ENO OFF in a program being jumped.
Pn p
136
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
3. When FOR/NEXT instruction is repeated many times
Outline
Put WDT instruction between FOR and NEXT.
FOR
EN ENO
K30000 n
2
Instruction List
Program
WDT
EN ENO
EN
NEXT
ENO
3
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
137
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
7.1.9 FOR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
FOR instruction specifies the number of repetition of the loop between FOR and NEXT instructions.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FOR
FOR 16 bits Continuous EN ENO FOR(EN);
n
2. Set data
Variable Description Data type
EN Execution condition Always TRUE
Input
variable Number of repetition of the loop between FOR and NEXT
ANY16
instructions
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
S: Refer to "Cautions".
Function and operation explanation
→ Refer to Section 7.1.10 for details.
Related instruction
FOR instruction and NEXT instruction are set as a pair in programming.
Cautions
1) The repeat syntax (FOR...DO syntax) can program the same function.
For the repeat syntax of the ST program, refer to the following manual.
→ FX Structured Programming Manual (Device & Common)
2) Some restrictions to applicable devices
S1: The FX3U, FX3UC and FX3G PLCs only are applicable.
S2: The FX3U and FX3UC PLCs only are applicable.
138
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
7.1.10 NEXT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
FOR instruction specifies the number of repetition of the loop between FOR and NEXT instructions.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
NEXT 16 bits Continuous NEXT NEXT(EN);
EN ENO
2. Set data
Variable Description Data type
4
Instructions
Explanation of
How to Read
Input
EN Execution condition Always TRUE
variable
Output
ENO Execution state Bit
variable
3. Applicable devices 5
Basic Instruction
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- No target device is available.
6
Function and operation explanation
Instructions
Step Ladder
The loop between FOR and NEXT instruction is repeated "n" times (which is specified by the input variable
(n)).
After the loop is repeated by the specified number of times, steps after NEXT instruction are executed.
EN
FOR
ENO
7
Instructions
Applied
n n
Repeated "n" times
NEXT
EN ENO
Related instruction
8
Function
and Pulse Catch
Interrupt Function
NEXT instruction and FOR instruction are set as a pair in programming.
A
and addresses
between devices
Relationships
139
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
Cautions
FOR-NEXT loop can be nested up to 5 levels.
FOR
FOR
EN ENO
EN ENO
n
n
FOR
FOR
EN ENO
EN ENO
n
n
1st
FOR level
NEXT
EN ENO
EN ENO
n
1st 2nd 3rd 2nd level
level level level FOR
NEXT
EN ENO
EN ENO
n
1st
level
NEXT NEXT
EN ENO EN ENO
NEXT
NEXT
EN ENO
EN ENO
Error
1) When FOR-NEXT loop is repeated many times, the operation cycle (D8010) is too long, and a watchdog
timer error may occur. In such a case, change the watchdog timer time or reset the watchdog timer.
→ For details on changing and resetting the watchdog timer, refer to Section 7.1.8.
2) The following programs are regarded as errors.
When NEXT instruction is located before FOR instruction When NEXT instruction does not exist
NEXT FOR
EN ENO EN ENO
n
FOR
NEXT
EN ENO Not programmed
EN ENO
n
When number of FOR instructions is not equivalent to the
number of NEXT instructions. When NEXT instruction exits after FEND instruction.
FOR FOR
EN ENO EN ENO
n n
FOR FEND
EN ENO EN ENO
n
NEXT NEXT
EN ENO EN ENO
NEXT
EN ENO Not programmed
140
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.1 Program Flow
1
Program examples
Outline
1. Program example with three FOR-NEXT loops
FOR
EN ENO 2
K4 n
Instruction List
The loop 3) is repeated 4 times.
FOR
EN ENO
D0Z n When the data value (current value) of D0Z
(D4 when Z is "4") is "6", the loop 2) is
X010
EN
CJ
ENO
repeated 6 times. 3
Instruction
Configuration of
P22 p
When X010 is OFF
FOR
When K1X000 is "7", the loop 1) is repeated 7 times.
EN ENO 1) 2) 3)
n When X010 is ON
K1X000
4
The program execution jumps to the pointer P22, and
NEXT the loop 1) is skipped.
Instructions
Explanation of
How to Read
EN ENO 7 times
P 22
NEXT Number of times of repeating the loops 1), 2) and 3).
EN ENO 6 times X010=OFF X010=ON
1) 7 6 4 = 168 times 0 time
NEXT 2) 6 4 = 24 times 24 times 5
4 times
Basic Instruction
EN ENO 3) 4 times 4 times
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
141
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
7.2 Move and Compare
7.2.1 CMP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction compares two values, and outputs the result (smaller, equal or larger) to bit devices (3
points).
→ For the contact comparison instruction, refer to Section 7.22.
→ For floating point comparison, refer to Section 7.12.1.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
CMP
EN ENO
CMP 16 bits Continuous CMP(EN,s1,s2,d);
s1 d
s2
CMPP
EN ENO
CMPP 16 bits Pulse CMPP(EN,s1,s2,d);
s1 d
s2
DCMP
EN ENO
DCMP 32 bits Continuous DCMP(EN,s1,s2,d);
s1 d
s2
DCMPP
EN ENO
DCMPP 32 bits Pulse DCMPP(EN,s1,s2,d);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Data or device number handled as comparison value ANY16 ANY32
variable
Data or device number handled as comparison source ANY16 ANY32
Output ENO Execution state Bit
variable Head bit device to which comparison result is output. ARRAY [0..2] OF Bit
142
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
3. Applicable devices
Outline
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 zz z z z
2
Instruction List
z z z z z z z S2 S3 zz z z z
zz z S1 z
S: Refer to "Cautions".
Function and operation explanation 3
Instruction
Configuration of
1. 16-bit operation(CMP, CMPP)
The comparison value specified by and the comparison source specified by are compared with
each other. According to the result (smaller, equal or larger), any of the three points of the devices specified
by turns on.
• The source data specified by and are handled as BIN (binary) values. 4
Instructions
Explanation of
How to Read
• Comparison is executed algebraically. Example: -10 < 2
Command
Command input CMP input
EN ENO 51
Comparison s1 d Label1 *1 50
value data
Comparison s2 (M100)
49 5
source data s2 s1
Basic Instruction
48
M100
Turns on in the case of s1 > s2 d
Latched
M101
Turns on in the case of s1 = s2 d +1
6
M102 Latched
Instructions
Step Ladder
Turns on in the case of s1 < s2 d +2
Latched
Even if the command input turns OFF and CMP instruction is not executed,
d to d +2 latch the status just before the command input turns OFF from ON.
*1 This defines the head bit device that stores the comparison result. (Defines M100) 7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
143
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
2. 32-bit operation(DCMP, DCMPP)
The comparison value specified by and the comparison source specified by are compared with
each other. According to the result (smaller, equal or larger), any of the three points of the devices specified
by turns on.
• The source data specified by and are handled as BIN (binary) values.
• Comparison is executed algebraically. Example: -125400 < 22466
Command
input
Command input DCMP 51
EN ENO 50
Label1 *1 s1 d Label3 *3 49
s2 +1, s2 s1 +1, s1
Label2 *2 s2 (M100) 48
100 Latched
Turns on in the case of d +1
[ s1 +1, s1 ] > [ s2 +1, s2 ]
101 Latched
Turns on in the case of
d +2
[ s1 +1, s1 ] = [ s2 +1, s2 ]
102 Latched
Turns on in the case of
[ s1 +1, s1 ] < [ s2 +1, s2 ]
Even if the command input turns OFF and DCMP instruction is not executed,
d to d +2 latch the status just before the command input turns OFF from ON.
*1 This defines comparison value data or the device that stores the comparison value data.
*2 This defines the comparison source data or the device that stores the comparison source data.
*3 This defines the head bit device that stores the comparison result. (Defines M100)
Cautions
1) Some restrictions to applicable devices
S1:The FX3U and FX3UC PLCs only are applicable. Not indexed (V,Z).
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
S3:The FX3U and FX3UC PLCs only are applicable.
2) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX0, FX0S or FX0N PLC does not support the pulse operation type instructions.
To execute pulse operation, make the instruction execution condition pulse type.
4) From the device specified as , three devices are occupied.
Be sure not to use those devices in another control.
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Program examples
Outline
1. When comparing present value of a counter
[Structured ladder]
X000
EN
CMP
ENO
X000 2
Instruction List
K100 s1 d Var_CMP *1 101
CN20 s2 100
M0 Y000 99
CN20
Turns ON in the case of
K100 > C 20 current value. M0
M1 Y001
Turns ON in the case of
3
M1
Instruction
Configuration of
K100 = C 20 current value.
M2 Y002
Turns ON in the case of M2
K100 < C 20 current value.
Latched Latched Latched
in the ON in the ON in the ON
CMP(X000, K100, CN20, Var_CMP *1 );
status. status. status.
4
Y000:=X000 AND M0;
Instructions
Explanation of
How to Read
Y001:=X000 AND M1;
Y002:=X000 AND M2;
*1 Var_CMP is a global label and is defined as M0.
If it is necessary to clear the comparison result when the instruction is not executed, add the following
contents under the above program.
5
1) RST
Basic Instruction
[Structured ladder] [ ST ]
X000 RST RST(NOT X000, M0);
EN ENO RST(NOT X000, M1);
d M0 RST(NOT X000, M2);
6
Instructions
Step Ladder
RST
EN ENO
d M1
RST
EN ENO
d M2 7
Instructions
Applied
2) ZRST
[Structured ladder] [ ST ]
X000 ZRST
ZRST(NOT X000, M0, M2);
EN ENO
d1 M0
8
Function
and Pulse Catch
Interrupt Function
d2 M2
M0 to M2 are reset.
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
7.2.2 ZCP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction compares two values (zone) with the comparison source, and outputs the result (upper, equal
or lower) to bit devices (3 points).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ZCP
EN ENO
ZCP 16 bits Continuous s1 d ZCP(EN,s1,s2,s3,d);
s2
s3
ZCPP
EN ENO
ZCPP 16 bits Pulse s1 d ZCPP(EN,s1,s2,s3,d);
s2
s3
DZCP
EN ENO
DZCP 32 bits Continuous s1 d DZCP(EN,s1,s2,s3,d);
s2
s3
DZCPP
EN ENO
DZCPP 32 bits Pulse s1 d DZCPP(EN,s1,s2,s3,d);
s2
s3
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Data or device handled as lower comparison value ANY16 ANY32
Input
variable Data or device handled as upper comparison value ANY16 ANY32
Data or device number handled as comparison source ANY16 ANY32
Output ENO Execution state Bit
variable Head bit device to which comparison result is output. ARRAY [0..2] OF Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 zz z z z
z z z z z z z S2 S3 zz z z z
z z z z z z z S2 S3 zz z z z
zz z S1 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
Function and operation explanation
Outline
1. 16-bit operation(ZCP, ZCPP)
The lower comparison value specified by and the upper comparison value specified by are
compared with the contents of the comparison source specified by . According to the result (smaller,
within zone or larger), any of the three points of the devices specified by turns ON. 2
• Comparison is executed algebraically. Example: -10 < 2 < 10
Instruction List
Command input ZCP
EN ENO
Lower comparison s1 d Label1 *1
value
Upper comparison s2 (M100)
value
Comparison
source data
s3 3
Instruction
Configuration of
M100
(Lower comparison value specified by s1 ) > (Comparison source specified by s3 )
M101 (Lower comparison value specified by s1 ) (Comparison source specified by s3 )
(Upper comparison value specified by s2 ) 4
Instructions
Explanation of
How to Read
M102
(Comparison source specified by s3 ) > (Upper comparison value specified by s2 )
Even if the command input turns OFF and ZCP instruction is not executed,
d to d +2 latch the status just before the command input turns OFF from ON. 5
*1 This defines the head bit device that stores the comparison result. (Defines M100)
Basic Instruction
2. 32-bit operation(DZCP, DZCPP)
The lower comparison value specified by and the upper comparison value specified by are
compared with the contents of the comparison source specified by . According to the result (smaller,
within zone or larger), any of the three points of the devices specified by turns ON. 6
• Comparison is executed algebraically. Example: -125400 < 22466 < 1015444
Instructions
Step Ladder
Command input DZCP
EN ENO
Label1 *1 s1 d Label4 *4
Label2 *2 s2 (M100)
Label3 *3 s3 7
Instructions
Applied
M100
(Lower comparison value specified by s1 ) > (Comparison source specified by s3 )
M101 (Lower comparison value specified by s1 ) (Comparison source specified by s3 )
(Upper comparison value specified by s2 ) 8
Function
and Pulse Catch
Interrupt Function
M102
(Comparison source specified by s3 ) > (Upper comparison value specified by s2 )
Even if the command input turns OFF and DZCP instruction is not executed,
d to d +2 latch the status just before the command input turns OFF from ON.
A
and addresses
between devices
Relationships
*1 This defines the lower comparison value data or the devices that stores the lower comparison value data.
*2 This defines the upper comparison value data or the devices that stores the upper comparison value data.
*3 This defines the comparison source data or the device that stores the comparison source data.
*4 This defines the head bit device that stores the comparison result. (Defines M100)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
Cautions
1) Some restrictions to applicable devices
S1:The FX3U and FX3UC PLCs only are applicable. Not indexed (V,Z).
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
S3:The FX3U and FX3UC PLCs only are applicable.
2) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX0, FX0S or FX0N PLC does not support the pulse operation type instructions.
To execute pulse operation, make the instruction execution condition pulse type.
4) From the device specified as , three devices are occupied.
Be sure not to use those devices in another control.
5) The lower comparison value specified by should be smaller than the upper comparison value
specified by .
• When the lower comparison value is smaller than the upper comparison value
X000 ZCP
EN ENO
X000
K100 s1 d Var_ZCP1*1
K120 s2 121
120
CN30 s3 119
…
100
M3 CN30 99
Turns ON in the case of "K100
> CN30 (current value)". M3
M4
Turns ON in the case of "K100 M4
CN30 (current value) K120"
M5 M5
Turns ON in the case of "K120
< CN30 (current value)".
*1 Var_ZCP1 is a global label and is defined as M3.
• When the lower comparison value is larger than the upper comparison value
X000 ZCP
EN ENO
X000
K120 s1 d Var_ZCP1*1
K100 s2 121
120
CN30 s3 119
…
It is handled as K120 s1 . 100
M3 CN30 99
Turns ON in the case of "K120
> CN30 (current value)". M3
M4
Turns ON in the case of "K120 M4
= CN30 (current value)".
M5 M5
Turns ON in the case of "K120
< CN30 (current value)".
*1 Var_ZCP1 is a global label and is defined as M3.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
7.2.3 MOV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transfers (copies) the contents of a device to another device.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
MOV
Instruction
Configuration of
MOV(EN,s,d);
MOV 16 bits Continuous EN ENO
Or an assignment statement
s d
MOVP
MOVP(EN,s,d);
MOVP 16 bits Pulse EN ENO
s d
Or an assignment statement
4
Instructions
Explanation of
How to Read
DMOV
DMOV(EN,s,d);
DMOV 32 bits Continuous EN ENO
Or an assignment statement
s d
DMOVP
DMOVP 32 bits Pulse EN ENO
DMOVP(EN,s,d);
Or an assignment statement
5
s d
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation 6
EN Execution condition Bit
Instructions
Step Ladder
Input
variable Data or device of transfer source ANY16 ANY32
Output ENO Execution state Bit
variable Transfer destination device ANY16 ANY32
3. Applicable devices
7
Instructions
Applied
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z 8
z z z z z z S1 S2 zz z
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
Function and operation explanation
1. 16-bit operation(MOV, MOVP)
The contents of the transfer source specified by are transferred to the transfer destination specified by
.
• While the command input is OFF, the transfer destination specified by does not change.
• When a constant (K) is specified as the transfer source specified by , it is automatically converted into
binary.
Command input MOV
EN ENO s d
Transfer source s d Transfer destination data
data
When specifying digits of a bit device (K1X000 K1Y000)
The bit device transfers a maximum of 16 points (multiple of 4).
Command input MOV
EN ENO
K1X000 s d K1Y000
s : K1X000 d : K1Y000 Command contact ON
Before X3 X2 X1 X0 Y3 Y2 Y1 Y0
execution X000 ON
ON OFF OFF ON ON ON ONOFF
X001 OFF
Transfer s
After X002 OFF
X3 X2 X1 X0 Y3 Y2 Y1 Y0
execution X003 ON
ON OFF OFF ON ON OFF OFF ON
Y000 OFF ON
Y001 ON OFF
d
Y002 ON OFF
Y003 ON
When a word device is specified
The word device transfers 1 point.
Command input MOV
EN ENO
D10 s d D50
s : D10 d : D50 Command contact ON
Before
execution K50 K0
s 50
Transfer
After
execution K50 K50 d 0 50
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
2. 32-bit operation(DMOV, DMOVP)
Outline
The contents of the transfer source specified by are transferred to the transfer destination specified by
.
• While the command input is OFF, the transfer destination specified by does not change.
• When a constant (K) is specified as the transfer source specified by
binary.
, it is automatically converted into
2
Instruction List
Command input DMOV
EN ENO [ s +1, s ] [ d +1, d ]
Label1 *1 s d Label2 *2
*1 This defines the transfer source data or the device that stores the transfer source data.
*2 This defines the transfer destination device. 3
Instruction
Configuration of
When specifying digits of a bit device (K8X000 K8Y000)
The bit device transfers a maximum of 32 points (multiple of 4).
Command input DMOV Command contact ON
EN ENO
Var_MOV1 *1 s d Var_MOV2 *2 X000 ON 4
Instructions
Explanation of
How to Read
X001 OFF
s
s: K8X000 d : K8Y000 to OFF
Before X37 to X1 X0 Y37 to Y1 Y0
execution X037 ON
ON OFF OFF ON ON ON ON OFF
Y000 OFF ON
After X37 to X1 X0
Transfer
Y37 to Y1 Y0 d
Y001 ON OFF 5
execution
Basic Instruction
to ON OFF
ON OFF OFF ON ON OFF OFF ON
Y037 ON
*1 Var_MOV1 is a global label and is defined as K8X000.
*2 Var_MOV2 is a global label and is defined as K8Y000.
When a word device is specified 6
The word device transfers 1 point.
Instructions
Step Ladder
Command input DMOV
EN ENO
Var_MOV1 *1 s d Var_MOV2 *2
Before
s : D11, D10 d : D51, D50 Command contact ON 7
Instructions
Applied
execution K500000 K4321
s 500000
Transfer
After
execution K500000 K500000 d 4321 500000
8
*1 Var_MOV1 is a global label and is defined as D10.
Function
and Pulse Catch
Interrupt Function
*2 Var_MOV2 is a global label and is defined as D50.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. A
A 32-bit counter can be specified directly as it is a 32-bit long device.
and addresses
between devices
Relationships
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the pulse operation type instructions.
To execute pulse operation, make the instruction execution condition pulse type.
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
Program examples
1. When reading the current value of a timer and counter
[Structured ladder] [ ST ]
X001 MOV MOV(X001,TN0,D20);
EN ENO (Current value of T0) (D20)
TN0 s d D20 The operation is the same as a counter.
2. When indirectly specifying the set value of a timer or counter
As the set value of the timer T20, two values can be specified by turning ON or OFF the switch X002.
For specifying more than two set values, more than one switch is required.
[Structured ladder]
X002 MOV
EN ENO
K100 s d D10 (K100) (D 10)
X002 MOV
EN ENO (K50) (D 10)
K50 s d D10
M0 OUT_T
EN ENO When X002 is ON, D 10=K100(10-second timer)
TC20 TCoil When X002 is OFF, D 10=K50(5-second timer)
D10 TValue
[ ST ]
MOV(X002, K100, D10);
MOV(NOT X002, K50, D10);
OUT_T(M0, TC20, D10);
3. When transferring a bit device
The program written by basic instructions shown below can be expressed using MOV instruction.
[Structured ladder]
X000 Y000
M8000 MOV
EN ENO
X001 Y001 RUN s d
monitor K1X000 K1Y000
X002 Y002 [ ST ]
MOV(M8000, K1X000, K1Y000);
X003 Y003
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
4. When transferring 32-bit data
Outline
Be sure to use DMOV instruction for transferring an applied instruction (such as MUL) whose operation result
is output in 32 bits, and for transferring a 32-bit numeric value or transferring the current value of a high speed
counter (C235 to C255) which is a 32-bit device.
[Structured ladder]
DMOV
2
X000
Instruction List
EN ENO (D 1, D 0) (D 11, D 10)
Var_MOV1 *1 s d Var_MOV2 *2
X001 DMOV
EN ENO (Current value of C235) (D 21, D 20)
Var_MOV3 *3 s d Var_MOV4 *4 3
Instruction
Configuration of
[ ST ]
MOV(X000, Var_MOV1 *1 , Var_MOV2 *2 );
MOV(X001, Var_MOV3 *3 , Var_MOV4 *4 );
*1 Var_MOV1 is a global label and is defined as D0.
4
*2 Var_MOV2 is a global label and is defined as D10.
*3 Var_MOV3 is a global label and is defined as CN235.
*4 Var_MOV4 is a global label and is defined as D20.
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
153
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
7.2.4 SMOV
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction distributes and composes data in units of digit (4 bits).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SMOV
EN ENO
s d
SMOV 16 bits Continuous SMOV(EN,s,m1,m2,n,d);
m1
m2
n
SMOVP
EN ENO
s d
SMOVP 16 bits Pulse SMOVP(EN,s,m1,m2,n,d);
m1
m2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Word device storing data whose digits will be moved. ANY16
Input Head digit position to be moved ANY16
variable
Number of digits to be moved ANY16
Word device storing data whose digits are moved ANY16
Output ENO Execution state Bit
variable Head digit position of movement destination ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z
z z
z z
z z z zzz S1 S2 zz z
z z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
Function and operation explanation
Outline
1. 16-bit operation(SMOV, SMOVP)
The contents of the transfer source specified by and transfer destination specified by are converted
into 4-digit BCD (0000 to 9999) respectively. "m2" digits starting from "m1"th digit are transferred (composed)
to the transfer destination specified by
the transfer destination specified by .
starting from "n"th digit, converted into binary, and then stored to 2
Instruction List
• While the command input is OFF, the transfer destination specified by does not change.
• When the command input turns ON, the data of the transfer source specified by and unspecified
digits in the transfer destination specified by do not change.
Command input
EN
SMOV
ENO
3
Instruction
Configuration of
Digit transfer s d Result data
data
Head digit position m1
Number of digits m2
Digit position at n
transfer destination
In the case of m1 = 4, m2 = 2, n =3
1) is converted from 4
4th digit 3rd digit 2nd digit 1st digit binary into BCD.
Instructions
Explanation of
How to Read
s (16-bit binary data) 2) "m2" digits starting from
Data is automatically converted. 1) "m1"th digit are transferred
(composed) to ' starting
103 102 101 100 s ' (4-digit BCD data) from "n"th digit. The digits of
Command contact=ON
Digits are moved. 2) 103 and 100 of ' are not 5
affected even if data is
Basic Instruction
103 102 101 100 d ' (4-digit BCD data) transferred from '.
Do not change Data is automatically converted. 3) 3) The composed data (BCD)
is converted into binary, and
d (16-bit binary data) stored to .
2. Extension function
6
Instructions
Step Ladder
When M8168 is set to ON first and then SMOV instruction is executed, conversion from binary to BCD is not
executed.
Data is moved in units of 4 bits.
M8168
X010 SMOV
7
Instructions
Applied
EN ENO
D1 s d D2
K4 m1
K2 m2
K3 n
M8168 is available for other instructions also.
After using M8168 for SMOV instruction, return it to OFF.
8
X010 M8168
Function
and Pulse Catch
Interrupt Function
Cautions
1) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
Program examples
The data on three-digit digital switches are composed, and stored as binary data to D2.
[Structured ladder]
BIN
102 101 100
EN ENO (X020 to X027)2-digit BCD
M8000 K2X020 s d D2 D 2(Binary)
7 6 5
BIN
8 1 8 1 EN ENO (X000 to X003)1-digit BCD
8 1 K1X000 s d D1 D 1(Binary)
X003 to X000 X027 to X020 SMOV
EN ENO 1-digit BCD data of D1 is
PLC D1 s d D2 transferred to the 3rd digit
(BCD data) of D2, and
Data on three digital switches connected K1 m1
automatically converted
to non-consecutive input terminals are K1 m2 into binary data.
composed. K3 n
[ ST ]
BIN(M8000, K2X020, D2);
BIN(M8000, K1X000, D1);
SMOV(M8000, D1, K1, K1, K3, D2);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
7.2.5 CML
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction inverts data in units of bit, and then transfers (copies) the inverted data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
CML
Instruction
Configuration of
CML 16 bits Continuous EN ENO CML(EN,s,d);
s d
CMLP
CMLP 16 bits Pulse EN ENO CMLP(EN,s,d);
s d 4
Instructions
Explanation of
How to Read
DCML
DCML 32 bits Continuous EN ENO DCML(EN,s,d);
s d
DCMLP
DCMLP 32 bits Pulse EN ENO DCMLP(EN,s,d); 5
s d
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation 6
EN Execution condition Bit
Instructions
Step Ladder
Input
variable Data to be inverted or word device storing the data ANY16 ANY32
Output ENO Execution state Bit
variable Destination word device storing inverted data ANY16 ANY32
3. Applicable devices
7
Instructions
Applied
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z 8
z z z z z z S1 S2 zz z
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
157
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
Function and operation explanation
1. 16-bit operation(CML, CMLP)
Each bit of a device specified by is inverted (from 0 to 1 or from 1 to 0), and then transferred to the
device specified by .
• When a constant (K) is specified as , it is automatically converted into binary.
• This operation is useful when a logically inverted output is required as an output from a PLC.
Command input CML
EN ENO s → d
Data to be s d Data having been inverted
inverted
b15 b14 b13 b12 b11 b11 b9 b8 b7 b6 n5 b4 b3 b2 b1 b0
s 1 0 1 0 1 0 1 0 0 0 1 1 1 0 1 0
sign bit
Command contact=ON
(0=Positive number 1=Negative number)
d 0 1 0 1 0 1 0 1 1 1 0 0 0 1 0 1
Inverted data is transferred.
2. 32-bit operation(DCML, DCMLP)
Each bit of a device specified by is inverted (from 0 to 1 or from 1 to 0), and then transferred to the
device specified by .
• When a constant (K) is specified as , it is automatically converted into binary.
• This operation is useful when a logically inverted output is required as an output from a PLC.
Command input DCML
EN ENO
Label1 *1 s d Label2 *2
s +1, s → d +1, d
*1 This defines the data to be inverted or the word device that stores the data.
*2 This defines the word device that stores the inverted data.
b31 b30 b29 b28 b27 b26 b25 to b7 b6 n5 b4 b3 b2 b1 b0
s 1 0 1 0 1 0 1 0 0 1 1 1 0 1 0
sign bit Command contact=ON
(0=Positive number 1=Negative number)
d 0 1 0 1 0 1 0 1 1 0 0 0 1 0 1
Inverted data is transferred.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Program examples
Outline
1. When receiving an inverted input
The sequence program shown below can be written by CML instruction.
X000 M0 X000 M0
2
Instruction List
X001 M1 X001 M1
X002 M2 X002 M2
X003 M3 X003 M3 3
Instruction
Configuration of
[Structured ladder] [ ST ]
M8000 CML CML(M8000, K1X000, K1M0); 4
Instructions
Explanation of
How to Read
EN ENO
RUN K1X000 s d K1M0
monitor
2. When four bits are specified for a device with digit specification
[Structured ladder] [ ST ] 5
Basic Instruction
X000 CML CML(X000, D0, K1Y000);
EN ENO
D0 s d K1Y000
(D 0) → (K1Y000)
Y015 b14 b13 b12 b11 b11 b9 b8 b7 b6 n5 b4 b3 b2 b1 b0 6
s 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Instructions
Step Ladder
D0 sign bit (0=Positive number 1=Negative number) X000=ON
d 0 1 0 1
K1Y000 Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000
7
Instructions
Applied
Do not change. Inverted data
is transferred.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
159
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
7.2.6 BMOV
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction transfers (copies) a specified number of data at one time.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BMOV
EN ENO
BMOV 16 bits Continuous BMOV(EN,s,n,d);
s d
n
BMOVP
EN ENO
BMOVP 16 bits Pulse BMOVP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Transfer source device ANY16
variable
Number of transferred points (including file registers) ANY16
Output ENO Execution state Bit
variable Transfer destination device ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z
z z z z z z S1 S2 z
z z z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
1
Function and operation explanation
Outline
BMOV instruction transfers "n" points of data from the device specified by to the device specified by
at one time.
• If the device number range is exceeded, data is transferred within the possible range.
Command input BMOV
s d 2
Instruction List
EN ENO s +1 d +1
n points
Transfer source s d Transfer destination •• ••
data data • •
Number of points n s +n d +n
transferred
1. Transfer is enabled even if the transfer number range is overlapped. 3
To prevent overwriting before transfer of source data, data is automatically transferred in the order "1)2)
Instruction
Configuration of
3)" according to the number overlap status.
BMOV
1)
X001 D 10 D 9
EN ENO 2)
D 11 D 10
D10 s d D9
K3 n D 12
3)
D 11 4
Instructions
Explanation of
How to Read
BMOV
3)
X002 D 10 D 11
EN ENO 2)
D 11 D 12
D10 s d D11 1)
K3 n D 12 D 13
2. Extension function (bi-directional transfer function)
5
Basic Instruction
By controlling the direction inverse flag M8024 *1 for BMOV instruction, data can be transferred in two
directions in one program.
X001 M8024 *1
BMOV direction BMOV direction inverse Transfer
X000 BMOV
inverse flag direction ,
6
D5D10
Instructions
Step Ladder
EN ENO M8024*1:OFF D6D11
D5 s d D10 D7D12
K3 n D5D10
M8001 M8024 *1 M8024*1:ON D6D11
BMOV direction D7D12
inverse OFF
Normally OFF
during operation
7
Instructions
Applied
*1. M8024 is cleared when the PLC mode is changed from RUN to STOP.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.2 Move and Compare
Cautions
1) The FX0N, FXU and FX2C PLCs handle file registers as follows.
BMOV instruction
Read Write
FX0N 3
FXU
3 3
FX2C
FXU
3
(V2.30 or earlier)
2) The FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) When specifying digits of bit devices, specify a same number of digits for and .
M8000 BMOV M 0 Y000
EN ENO
M 1 Y001
K1M0 s d K1Y000
K2 n M 2 Y002
M 3 Y003
Specify a same number of digits. n = 2 points
(Example: K1) M 4 Y004
M 5 Y005
M 6 Y006
M 7 Y007
4) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
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1
Function of transfer between file registers and data registers
Outline
BMOV instruction has a special function to file registers (D1000 and later).
The maximum number of file register differs from one PLC to another.
This explanation here uses the FX3U and FX3UC PLCs as examples.
For the details of the file registers, refer to the following manual.
→ FX Structured Programming Manual (Device & Common) 2
Instruction List
1. What are file registers
By parameter setting, D1000 to D7999 can be handled as file registers, and written to and read from the
program memory area.
1) Outline of setting
File registers (D1000 to D7999) do not exist in the initial status. They are valid only when some number of
file registers are secured by parameter setting in a programming tool.
3
Instruction
Configuration of
2) Number of file registers
In parameter setting, set 500 file registers as 1 block.
1 to 14 blocks (each of which has 500 file registers) can be set.
1 block occupies 500 steps in the program memory area.
3) Difference between BMOV instruction and other instructions 4
The table below shows the difference between BMOV instruction and other instructions with regard to file
Instructions
Explanation of
How to Read
registers (D1000 and later).
Instruction Contents of transfer Remarks
Can read from and write to the file register area [A]
BMOV -
inside the program memory.
Other applied
instructions than
Can read from and write to the data register area Because the data register area [B] is provided inside the
[B] inside the image memory in the same way as system RAM in PLCs, its contents can be arbitrarily
5
Basic Instruction
BMOV general data registers. changed without regard to the optional memory format.
When power is turned ON, data registers set as file registers are automatically copied from the file
register area [A] to the data register area [B].
Inside built-in memory Inside system RAM
or
memory cassette 6
D0
Instructions
Step Ladder
Program Data
memory memory
When power is
Program/ turned ON Data register
comment When PLC
D1000 Devices D1000 and later specified as
7
D1000 mode is
file changed from Data register operands in applied instructions other
500 points 14 blocks register Write than BMOV, indirectly specified values
STOP to RUN
Instructions
Applied
maximum for timers or counters or devices in
(7000 points maximum) [A] [B] RST instruction are read from and
Read written to the area [B] in the same
Data register
D7999 way as general data registers.
Remaining area can be used as data register for general purpose.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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2. Cautions on use
1) When updating the contents of a file register with a same number (same-number update mode), make
sure that the file register number is equivalent between and .
2) When using file registers in the same-number update mode, make sure that the number of transfer points
specified by "n" does not exceed the file register area.
3) If the file register area is exceeded while file registers are used in the same-number update mode, an
operation error (M8067) is caused and the instruction is not executed.
4) In the case of indexing (in the same-number update mode)
When and are modified with index, the instruction is executed if the actual device number is
within the file register area and the number of transfer points does not exceed the file register area.
5) Handling of flash memory
When changing the contents of file registers secured inside the flash memory, observe the following
condition:
- Set the protect switch to OFF in the optional memory.
- When writing data using a continuous operation type instruction in a program, data is written to the flash
memory in every operation cycle of the PLC.
To prevent this, as the flash memory has a limit to the number of times of writing operations, be sure to
use a pulse operation type instruction (BMOVP) so that the number of times of writing is reduced.
- It takes 66 to 132 ms to write data of one serial block (500 points) to the flash memory.
Execution of the program is paused during this period. Because the watchdog timer is not refreshed at
this time, it is necessary to take proper countermeasures such as insertion of WDT instruction in a user
program.
6) File register operation
File registers are secured inside the built-in memory or memory cassette.
Different from general data registers, file registers can be read and written directly only by peripheral
equipment or BMOV instruction.
7) If a file register is not specified as the destination in BMOV instruction, the file register is not accessed.
a) Outline of memory operation
Inside built-in RAM
or Inside system RAM
optional cassette D0
D200
Program Image
memory memory
Program/ D599 Data register
comment
Read
D1000
500 points 14 blocks file D1100 Data register
register
maximum
(7000 points maximum) [A] D1499 [B]
Data register
D7999
b) Program examples
When X000 is set to ON, the data register area [B] is read.
[Structured ladder] [ ST ]
X000 BMOVP BMOVP(X000, D1100, K400, D200);
EN ENO
D1100 s d D200
K400 n
A file register can be specified as . But if a same number with is specified, the same-number
register update mode is selected.
However, even if a file register having different number is specified for and respectively,
data cannot be transferred from the file register area to another file register area. In such a case, read
the contents of a file register specified as in the same-number register update mode to the data
register area [B] once, and then write the data.
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(Basic & Applied Instruction) 7.2 Move and Compare
1
7.2.7 FMOV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transfers same data to specified number of devices.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
FMOV
Instruction
Configuration of
EN ENO
FMOV 16 bits Continuous FMOV(EN,s,n,d);
s d
n
FMOVP
FMOVP 16 bits Pulse
EN ENO
FMOVP(EN,s,n,d);
4
s d
Instructions
Explanation of
How to Read
n
DFMOV
EN ENO
DFMOV 32 bits Continuous DFMOV(EN,s,n,d);
s d
n 5
Basic Instruction
DFMOVP
EN ENO
DFMOVP 32 bits Pulse DFMOVP(EN,s,n,d);
s d
n
2. Set data
6
Instructions
Step Ladder
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable
Transfer source data or device storing data ANY16 ANY32
7
Number of transfer points ANY16
Instructions
Applied
ENO Execution state Bit
Output
variable Head word device of transfer destination
ANY16 ANY32
(Same data is transferred from the transfer source at one time.)
3. Applicable devices 8
Bit Devices Word Devices Others
Function
and Pulse Catch
Interrupt Function
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 z A
and addresses
between devices
Relationships
z z
S: Refer to "Cautions".
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Function and operation explanation
1. 16-bit operation(FMOV, FMOVP)
The data or contents of a device specified by are transferred to "n" devices starting from a device
specified by .
• The contents will be same among all of "n" devices.
• If the number of points specified by "n" exceeds the device number range, data is transferred within the
possible range.
• While the command input is OFF, the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer source specified by does not change.
• When a constant (K) is specified as the transfer source specified by , it is automatically converted into
binary.
Command input FMOV
s d
EN ENO
Transfer s d Transfer destination
source data
Number of points n device d +1
transferred
d +2 n
d +3
d +4
2. 32-bit operation(DFMOV, DFMOVP)
The contents of the transfer source specified by are transferred to "n" 32-bit devices starting from the
device specified by .
• The contents will be the same among all of "n" 32-bit devices.
• If the number of points specified by "n" exceeds the device number range, data is transferred within the
possible range.
• While the command input is OFF, the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer source specified by does not change.
• When a constant (K) is specified as the transfer source specified by , it is automatically converted into
binary.
Command input DFMOV
s +1, s d +1, d
EN ENO
*1 s d *2
Label1 Label2
Number of points n d +3, d +2
transferred
*1 This defines the transfer source data or the device
that stores the transfer source data. d +5, d +4 n
*2 This defines the head word device at the transfer destination.
d +7, dd +6
d +9, d +8
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Cautions
Outline
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FXU PLC of V2.30 or earlier does not support 32-bit instructions. 2
Instruction List
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples
3
1. When writing specified data to two or more devices
Instruction
Configuration of
[Structured ladder] [ ST ]
X000 FMOV FMOV(X000, K0, K5, D0);
EN ENO
K0 s
n
d D0 4
K5
Instructions
Explanation of
How to Read
Before After
execution execution
K0 K0 D0 ······ K 3 K 0
K0 D1 ······ K 5 K 0
5
Basic Instruction
K0 D2 ······ K 65 K 0
K0 D3 ······ K 7 K 0
6
······
Instructions
Step Ladder
K0 D4 K100 K 0
Values before execution are shown as examples.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.2 Move and Compare
7.2.8 XCH
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction exchanges data between two devices.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
XCH
EN ENO
XCH 16 bits Continuous XCH(EN,d1,d2);
d1
d2
XCHP
EN ENO
XCHP 16 bits Pulse XCHP(EN,d1,d2);
d1
d2
DXCH
EN ENO
DXCH 32 bits Continuous DXCH(EN,d1,d2);
d1
d2
DXCHP
EN ENO
DXCHP 32 bits Pulse DXCHP(EN,d1,d2);
d1
d2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition Bit
variable
ENO Execution state Bit
Output Device storing data to be exchanged. ANY16 ANY32
variable
Device storing data to be exchanged. ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z S1 S1 zz z
z z z z z z S1 S1 zz z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Function and operation explanation
Outline
1. 16-bit operation(XCH, XCHP)
Data is exchanged between the device specified by and the device specified by .
Command
XCH
input
EN ENO 2
d1 Data exchanged 1 d1 d2
Instruction List
d2 Data exchanged 2
Before execution After execution
d1 K10 K36 d1
K10
3
d2 K36 d2
Instruction
Configuration of
Exchange
2. 32-bit operation(DXCH, DXCHP)
Data is exchanged between the device specified by and the device specified by .
Command
input
EN
DXCH
ENO
4
Instructions
Explanation of
How to Read
d1 Label1 *1 d1 +1, d1 d2 +1, d2
d2 Label2 *1
*1 This defines the device that stores the data to be exchanged.
Before execution After execution
d1 +1, d1 K10000 K1433600 d1 +1, d1 5
Basic Instruction
d2 +1, d2 K1433600 K10000 d2 +1, d2
Exchange
Extension function
When the instruction is executed while M8160 is ON, high-order 8 bits (byte) and low-order 8 bits (byte) of a 6
word device are exchanged each other.
Instructions
Step Ladder
(The FXU PLC of V2.30 or earlier does not support the extension function.)
This is the same operation as SWAP instruction, so use SWAP instruction for newly programming.
In the case of 32-bit operation, high-order 8 bits (byte) and low-order 8 bits (byte) of a word device are
changed.
X000 M8160
SWAP
7
Instructions
Applied
DXCH
EN ENO
D 11 D 10
d1 Var_DXCH1*1
d2 Var_DXCH2*2 High-order Low-order High-order Low-order
8 bits 8 bits 8 bits 8 bits
M8160
8
Function
and Pulse Catch
Interrupt Function
M8000
*1 Var_DXCH1 is a global label and is defined as D10.
*2 Var_DXCH2 is a global label and is defined as D10.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the A
case of a simple project. Use a label to handle 32-bit data.
and addresses
between devices
Relationships
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) Some restrictions to applicable devices
S1:The FX3U and FX3UC PLCs only are applicable.
Error
An operation error occurs in the following case. The error flag M8067 turns ON, and the error code is stored in
D8067.
• When M8160 is ON, and the device numbers specified by and are different.
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(Basic & Applied Instruction) 7.2 Move and Compare
7.2.9 BCD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts binary (BIN) data into binary-coded decimal (BCD) data.
Binary data is used in operations in PLCs. Use this instruction to display numeric values on the seven-
segment display unit equipped with BCD decoder.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BCD
BCD 16 bits Continuous EN ENO BCD(EN,s,d);
s d
BCDP
BCDP 16 bits Pulse EN ENO BCDP(EN,s,d);
s d
DBCD
DBCD 32 bits Continuous EN ENO DBCD(EN,s,d);
s d
DBCDP
DBCDP 32 bits Pulse EN ENO DBCDP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable Word device storing the conversion source (binary) data ANY16 ANY32
ENO Execution state Bit
Output
variable Word device of the conversion destination
ANY16 ANY32
(binary-coded decimal) data
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S1 S2 zz z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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1
Function and operation explanation
Outline
1. 16-bit operation(BCD, BCDP)
This instruction converts the binary (BIN) data specified by into binary-coded decimal (BCD) data, and
transfers the converted BCD data to the device specified by .
• The data of the device specified by can be converted if it is within the range from K0 to K9999 (BCD). 2
Instruction List
• The table below shows digit specification for the devices specified by and respectively.
Command
input BCD BIN
PLC
EN ENO BCD
Conversion s d Conversion
source data destination data Y014 Y010 Y004 Y000
to to to to 3
Y017 Y013 Y007 Y003
Instruction
Configuration of
When "K4Y000" is specified
(sequence on the right)
BCD
Instructions
Explanation of
How to Read
Number of digits Data range
K1Y000 1 0 to 9
K2Y000 2 00 to 99
K3Y000 3 000 to 999
K4Y000 4 0000 to 9999 5
Basic Instruction
2. 32-bit operation(DBCD, DBCDP)
This instruction converts the binary (BIN) data specified by into binary-coded decimal (BCD) data, and
transfers the converted BCD data to the device specified by .
• The data of the device specified by can be converted if it is within the range from K0 to K99999999
(BCD). 6
• The table below shows digit specification for the devices specified by and respectively.
Instructions
Step Ladder
Command
input DBCD PLC BIN
EN ENO DBCD
Label1 *1 s d Label2 *2
Y034 Y030 Y024 Y020 Y014 Y010 Y004 Y000
When "K8Y000" is specified
to to to to to to to to
Y037 Y033 Y027 Y023 Y017 Y013 Y007 Y003
7
Instructions
Applied
(sequence on the right).
*1 This defines the conversion source data device.
*2 This defines the conversion destination
data device. BCD
8
Function
and Pulse Catch
Interrupt Function
[ +1, ] Number of digits Data range
K1Y000 1 0 to 9
K2Y000 2 00 to 99
K3Y000 3 000 to 999
K4Y000 4 0000 to 9999 A
K5Y000 5 00000 to 99999
and addresses
between devices
Relationships
K6Y000 6 000000 to 999999
K7Y000 7 0000000 to 9999999
K8Y000 8 00000000 to 99999999
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Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing the instruction with M8023 ON, conversion takes place from binary float to decimal float.
X000 M8023
DBCD
Binary float value D1 D0
EN ENO
*1 *2
Label1 s d Label2
Variable
M8000 M8023 Decimal float value D3 D2
*1 This defines D0.
*2 This defines D2.
For the float conversion, only data register (D) is applicable as the device for and .
Related instruction
Instruction Function
BIN Converts binary-coded decimal (BCD) data into binary (BIN) data.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Because conversion between binary-coded decimal data and binary data is automatically executed in
SEGL and ARWS instructions, BCD instruction is not required.
4) Binary data is used in all operations in PLCs including arithmetic operations (+, -, × and ÷), increment and
decrement instructions.
• When receiving the digital switch information in the binary-coded decimal (BCD) format into a PLC, use
BIN instruction for converting BCD data into binary data.
• When outputting data to the seven-segment display unit handling binary-coded decimal (BCD) data, use
BCD instruction for converting binary data into BCD data.
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Error
In BCD or BCDP (16-bit type) instructions, an operation error occurs when the value is outside the range
from 0 to 9,999.
In DBCD or DBCDP (32-bit type) instructions, an operation error occurs when the value is outside the
range from 0 to 99,999,999.
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1
Program examples
Outline
1. When the seven-segment display unit has 1 digit
[Structured ladder]
X000
EN
BCD
ENO
PLC 2
Instruction List
D0 s d K1Y000
[ ST ]
BCD(X000, D0, K1Y000);
3
2. When the seven-segment display unit has 2 to 4 digits
Instruction
Configuration of
[Structured ladder]
X000 BCD PLC
EN ENO
D0 s d K2Y000
Output destination
4
In the case of 2 digits: K2
Instructions
Explanation of
How to Read
In the case of 3 digits: K3
In the case of 4 digits: K4
[ ST ] K4 K3 K2 K1
BCD (X000, D0, K2Y000);
5
Basic Instruction
3. When the seven-segment display unit has 5 to 8 digits
[Structured ladder]
X000 DBCD PLC
EN ENO
Var_BCD1 *1 s d Var_BCD2 *2 6
D1,D0 K5Y000
Instructions
Step Ladder
In the case of 5 digits: K5 Output destination
In the case of 6 digits: K6
In the case of 7 digits: K7
In the case of 8 digits: K8 K8 K7 K6 K5 K4 K3 K2 K1
[ ST ] 7
Instructions
Applied
DBCD (X000, Var_BCD1 *1 , Var_BCD2 *2 );
*1 Var_BCD1 is a global label and is defined as D0.
*2 Var_BCD2 is a global label and is defined as K5Y000.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.2 Move and Compare
7.2.10 BIN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts binary-coded decimal (BCD) data into binary (BIN) data.
Use this instruction to convert a binary-coded decimal (BCD) value such as a value set by a digital switch into
binary (BIN) data and to receive the converted binary data so that the data can be handled in operations in
PLCs.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BIN
BIN 16 bits Continuous EN ENO BIN(EN,s,d);
s d
BINP
BINP 16 bits Pulse EN ENO BINP(EN,s,d);
s d
DBIN
DBIN 32 bits Continuous EN ENO DBIN(EN,s,d);
s d
DBINP
DBINP 32 bits Pulse EN ENO DBINP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable Word device storing the conversion source
ANY16 ANY32
(binary-coded decimal) data
Output ENO Execution state Bit
variable Word device of the conversion destination (binary) ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Function and operation explanation
Outline
1. 16-bit operation(BIN, BINP)
This instruction converts the binary-coded decimal (BCD) data specified by into binary (BIN) data, and
transfers the converted binary data to the device specified by .
• The data of the device specified by can be converted if it is within the range from 0 to 9999 (BCD). 2
Instruction List
• The table below shows digit specification for the devices specified by and .
Command input BIN BCD
EN ENO 6 7 8 9
Conversion s d Conversion destination
source device device
When "K4X000" is specified
3
Instruction
Configuration of
(sequence on the right)
X014 X010 X004 X000
to to to to
X017 X013 X007 X003
BIN
BIN
4
PLC
Instructions
Explanation of
How to Read
Number of digits Data range
K1X000 1 0 to 9
K2X000 2 00 to 99
K3X000 3 000 to 999
K4X000 4 0000 to 9999
5
Basic Instruction
2. 32-bit operation(DBIN, DBINP)
This instruction converts the binary-coded decimal (BCD) data specified by into binary (BIN) data, and
transfers the converted binary data to the device specified by .
• The data of the device specified by can be converted if it is within the range from 0 to 99999999
(BCD). 6
• The table below shows digit specification for the devices specified by and .
Instructions
Step Ladder
BCD
Command input DBIN 2 3 4 5 6 7 8 9
EN ENO
Label1 *1 s d Label2 *2
7
When "K8X000" is specified
Instructions
Applied
(sequence on the right)
X034 X030 X024 X020 X014 X010 X004 X000
*1 This defines the transfer source device. to to to to to to to to
*2 This defines the transfer destination device. X037 X033 X027 X023 X017 X013 X007 X003
BIN
DBIN(FNC 19)
PLC
8
+1, Number of digits Data range
Function
and Pulse Catch
Interrupt Function
K1X000 1 0 to 9
K2X000 2 00 to 99
K3X000 3 000 to 999
K4X000
K5X000
4
5
0000 to 9999
00000 to 99999
A
and addresses
between devices
Relationships
K6X000 6 000000 to 999999
K7X000 7 0000000 to 9999999
K8X000 8 00000000 to 99999999
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(Basic & Applied Instruction) 7.2 Move and Compare
Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing the instruction with M8023 ON, conversion takes place from binary-coded decimal float to
binary float.
X000 M8023
DBIN
Decimal float value D5 D4
EN ENO
*1 *2
Label1 s d Label2
Variable
M8000 M8023 Binary float value D7 D6
*1 This defines D4.
*2 This defines D6.
For the float conversion, only data register (D) is applicable as the device for and .
Related instruction
Instruction Function
BCD Converts binary (BIN) data into binary-coded decimal (BCD) data.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Because conversion between binary-coded decimal data and binary data is automatically executed in
DSW, BIN instruction is not required.
4) Binary data is used in all operations in PLCs including arithmetic operations (+, -, × and ÷), increment and
decrement instructions.
• When receiving the digital switch information in the binary-coded decimal (BCD) format into a PLC, use
BIN instruction for converting BCD data into binary data.
• When outputting data to the seven-segment display unit handling binary-coded decimal (BCD) data, use
BCD instruction for converting binary data into BCD data.
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Error
M8067 (operation error) turns ON when the source data is not binary-coded decimal (BCD).
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(Basic & Applied Instruction) 7.2 Move and Compare
1
Program examples
Outline
1. When the digital switch has 1 digit
[Structured ladder]
2
X000 BIN
EN ENO
Instruction List
K1X000 s d D0
[ ST ]
6
BIN(X000, K1X000, D0);
3
MOV instruction can be used instead.
Instruction
Configuration of
[Structured ladder] PLC
X000 MOV
EN ENO
K1X000 s d D0
[ ST ]
MOV (X000, K1X000, D0);
4
Instructions
Explanation of
How to Read
2. When the digital switch has 2 to 4 digits
[Structured ladder]
K4 K3 K2 K1
X000 BIN
EN ENO
6 7 8 9
5
K2X000 s d D0
Basic Instruction
In the case of 2 digits: K2 Output destination
In the case of 3 digits: K3
In the case of 4 digits: K4
Digital switch input
PLC
[ ST ] 6
Instructions
Step Ladder
BIN (X000, K2X000, D0);
3. When the digital switch has 5 to 8 digits
[Structured ladder] K8 K7 K6 K5 K4 K3 K2 K1
X000 DBIN 7
EN ENO 2 3 4 5 6 7 8 9
Instructions
Applied
Var_BIN1*1 s d Var_BIN2*2
K5X000 D0
In the case of 5 digits: K5 Output
destination PLC
In the case of 6 digits: K6
In the case of 7 digits: K7
Digital switch input
8
In the case of 8 digits: K8
Function
and Pulse Catch
Interrupt Function
[ ST ]
DBIN (X000, Var_BIN1 *1 , Var_BIN2 *2 );
*1 Var_BIN1 is a global label and is defined as K5X000.
*2 Var_BIN2 is a global label and is defined as D0.
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3 Arithmetic and Logical Operation
7.3.1 ADD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes addition by two values to obtain the result (A + B = C)
→ For the floating point addition instruction [DEADD], refer to Section 7.12.8.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ADD
EN ENO
ADD 16 bits Continuous ADD(EN,s1,s2,d);
s1 d
s2
ADDP
EN ENO
ADDP 16 bits Pulse ADDP(EN,s1,s2,d);
s1 d
s2
DADD
EN ENO
DADD 32 bits Continuous DADD(EN,s1,s2,d);
s1 d
s2
DADDP
EN ENO
DADDP 32 bits Pulse DADDP(EN,s1,s2,d);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Data for addition or word device storing data ANY16 ANY32
variable
Data for addition or word device storing data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the addition result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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1
Function and operation explanation
Outline
1. 16-bit operation(ADD, ADDP)
The data specified by and are added in the binary format, and the addition result is transferred to
the device specified by .
Command input ADD 2
Instruction List
EN ENO
Addition data 1 s1 d Device for s1 + s2 → d
Addition data 2 s2 addition result
• The most significant bit of each data indicates the sign (positive: 0 or negative: 1), and data is added
algebraically.
5+(-8)=-3 3
Instruction
Configuration of
• When a constant (K) is specified in or , it is automatically converted into the binary format.
2. 32-bit operation(DADD, DADDP)
The data specified by and are added in the binary format, and the addition result is transferred to
the device specified by .
Command input DADD
4
Instructions
Explanation of
How to Read
EN ENO
Label1 *1 s1 d Label2 *2 [ s1 +1, s1 ] + [ s2 +1, s2 ] → [ d +1, d ]
Label3 *1 s2
*1 This defines the data to be added or the device that stores the data.
5
*2 This defines the device that stores the results of addition.
• The most significant bit of each data indicates the sign (positive: 0 or negative: 1), and data is added
Basic Instruction
algebraically.
5,500+(-8,540)=-3,040
• When a constant (K) is specified in or , it is automatically converted into the binary format.
Related device 6
Instructions
Step Ladder
1. Relationship between the flag operation and the sign
→ For the flag operations, refer to Section 1.3.4.
Device Name Description
ON : When the operation result is 0
M8020 Zero
OFF : When the operation result is not 0 7
ON : When the operation result is less than -32,768 (in 16-bit operation) or -2,147,483,648 (in
Instructions
Applied
32-bit operation), the borrow flag operates.
M8021 Borrow
OFF : When the operation result is not less than -32,768 (in 16-bit operation) or
-2,147,483,648 (in 32-bit operation)
ON : When the operation result is more than 32,767 (in 16-bit operation) or 2,147,483,647 (in
32-bit operation), the carry flag operates.
M8022 Carry
OFF : When the operation result is not more than 32,767 (in 16-bit operation) or
2,147,483,647(in 32-bit operation)
8
Function
and Pulse Catch
Interrupt Function
Zero flag Zero flag Zero flag
–2, –1, 0, –32,768 –1, 0, 1 32,767, 0, 1, 2
Borrow flag Carry flag A
and addresses
between devices
Relationships
The most significant The most significant
bit of data bit of data
Zero flag becomes "1". becomes "0". Zero flag
–2, –1, 0, –2,147,483,648 –1, 0, 1 2,147,483,647, 0, 1, 2
Borrow flag Zero flag Carry flag
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing an instruction with M8023 ON, a binary float operation takes place.
In this case, K, H and D are valid as the object device for and and D is valid for .
The source data needs to be converted into binary float value in advance by FLT instruction.
Note, however, that constants K and H are automatically converted into binary float values.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) When using a 32-bit operation instruction (DADD or DADDP) and specifying word devices, a 16-bit word
device on the low-order side is specified first, and a word device with the subsequent device number is
automatically set for the high-order 16 bits.
To prevent number overlap, it is recommended to always specify an even number, for example.
4) The same device number can be specified for both the source and the destination.
In this case, note that the addition result changes in every operation cycle if a continuous operation type
instruction (ADD or DADD) is used.
X001 ADD
EN ENO
(D 0) + 25 → (D 0)
D0 s1 d D0
K25 s2
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples
1. Difference between ADD instruction and INC instruction caused by a program for adding
"+1".
When ADD[P] instruction is executed, "1" is added to the contents of D0 every time X001 turns ON from OFF.
ADD[P] instruction is similar to INCP instruction described later except the contents shown in the table below.
ADD/ADDP/DADD/DADDP INC/INCP/DINC/DINCP
Flag (zero, borrow, carry) Operates Does not operate
+(+1)= +32,767 → 0 → +1 → +2 → +32,767 → -32,768 → -32,767
Operation result
16-bit
operation ← -2 ← -1 ← 0 ← -32,768 -
+(-1)=
32-bit +(+1)= +2,147,483,647 → 0 → +1 → +2 → +2,147,483,647 → -2,147,483,648 → -2,147,483,647
operation ← -2 ← -1 ←0 ← -2,147,483,648 -
+(-1)=
[Structured ladder] [ ST ]
X001 ADDP ADDP(X001, D0, K1, D0);
EN ENO
(D 0) +1 →( D 0)
D0 s1 d D0
K1 s2
X001 INCP INCP(X001, D0);
EN ENO (D 0) +1 →( D 0)
d D0
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
7.3.2 SUB
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes subtraction using two values to obtain the result (A -B = C).
→ For the floating point subtraction instruction [DESUB], refer to Section 7.12.9.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
SUB
EN ENO
SUB 16 bits Continuous SUB(EN,s1,s2,d);
s1 d
s2
SUBP 4
EN ENO
Instructions
Explanation of
How to Read
SUBP 16 bits Pulse SUBP(EN,s1,s2,d);
s1 d
s2
DSUB
EN ENO
DSUB 32 bits Continuous
s1 d
DSUB(EN,s1,s2,d);
5
s2
Basic Instruction
DSUBP
EN ENO
DSUBP 32 bits Pulse DSUBP(EN,s1,s2,d);
s1 d
s2
6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition
Data for subtraction or word device storing data
Bit
ANY16 ANY32
7
variable
Instructions
Applied
Data for subtraction or word device storing data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the subtraction result ANY16 ANY32
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation(SUB, SUBP)
The data specified by is subtracted from the data specified by in the binary format, and the
subtraction result is transferred to .
Command input SUB
EN ENO
Subtraction s1 d Device for s1 – s2 → d
data 1 subtraction
Subtraction s2 result
data 2
• The most significant bit of each piece of data indicates the sign (positive: 0 or negative: 1), and data is
subtracted algebraically.
(5-(-8)=13)
• When a constant (K) is specified in or , it is automatically converted into the binary format.
2. 32-bit operation(DSUB, DSUBP)
The data specified by is subtracted from the data specified by in the binary format, and the
subtraction result is transferred to .
Command input DSUB
EN ENO [ s1 +1, s1 ] – [ s2 +1, s2 ] → [ d +1, d ]
Label1 *1 s1 d Label2 *2
Label3 *1 s2
*1 This defines the data or the device that stores the data.
*2 This defines the device that stores the subtraction result.
• The most significant bit of each piece of data indicates the sign (positive: 0 or negative: 1), and data is
subtracted algebraically.
(5,500-(-8,540)=14,040)
• When a constant (K) is specified in or , it is automatically converted into the binary format.
Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing an instruction with M8023 ON, a binary float operation takes place.
In this case, K, H and D are valid as the object device for and and D is valid for .
The source data needs to be converted into binary float value in advance by FLT instruction.
Note, however, that constants K and H are automatically converted into binary float values.
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1
Related device
Outline
1. Relationship between the flag operation and the sign
→ For the flag operations, refer to Section 1.3.4.
Device Name Description
M8020 Zero
ON : When the operation result is 0 2
OFF : When the operation result is not 0
Instruction List
ON : When the operation result is less than -32,768 (in 16-bit operation) or -2,147,483,648 (in
32-bit operation), the borrow flag operates.
M8021 Borrow
OFF : When the operation result is not less than -32,768 (in 16-bit operation) or
-2,147,483,648 (in 32-bit operation)
ON : When the operation result is more than 32,767 (in 16-bit operation) or 2,147,483,647 (in
M8022 Carry
32-bit operation), the carry flag operates. 3
OFF : When the operation result is not more than 32,767 (in 16-bit operation) or
Instruction
Configuration of
2,147,483,647(in 32-bit operation)
Zero flag Zero flag Zero flag
–2, –1, 0, –32,768 –1, 0, 1 32,767, 0, 1, 2
4
Instructions
Explanation of
How to Read
Borrow flag Carry flag
The most significant The most significant
bit of data bit of data
Zero flag becomes "1". becomes "0". Zero flag
–2, –1, 0, –2,147,483,648 –1, 0, 1 2,147,483,647, 0, 1, 2
5
Basic Instruction
Borrow flag Zero flag Carry flag
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device. 6
Use a global label to specify a device.
Instructions
Step Ladder
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) When using a 32-bit operation instruction (DSUB or DSUBP) and specifying word devices, a 16-bit word
device on the low-order side is specified first, and a word device with the subsequent device number is
automatically set for the high-order 16 bits. 7
To prevent number overlap, it is recommended to always specify an even number, for example.
Instructions
Applied
4) The same device number can be specified for both the source and the destination.
In this case, note that the addition result changes in every operation cycle if a continuous operation type
instruction (SUB or DSUB) is used.
X001
EN
SUB
ENO
(D 0) – 25 → (D 0)
8
Function
and Pulse Catch
Interrupt Function
D0 s1 d D0
K25 s2
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Program examples
1. Difference between SUB instruction and DEC instruction caused by a program for
subtracting "1"
"1" is subtracted from the contents of D0 every time X001 turns ON from OFF.
SUB instruction is similar to DECP instruction described later except the contents shown in the table below.
SUB/SUBP/DSUB/DSUBP
DEC/DECP/DDEC/DDECP instructions
instructions
Flag (zero, borrow, carry) Operates Does not operate
-(+1)= ← -2 ← -1 ← 0 ← -32,768 -32,768 → +32,767 → +32,766
Operation result
16-bit
operation +32,767 → 0 → +1 → +2 → -
-(-1)=
32-bit -(+1)= ← -2 ← -1 ←0 ← -2,147,483,648 -2,147,483,648 → +2,147,483,647 → +2,147,483,646
operation +2,147,483,647 → 0 → +1 → +2 → -
-(-1)=
[Structured ladder] [ ST ]
X001 SUBP SUBP(X001, D0, K1, D0);
EN ENO
(D 0) – 1 → (D 0)
D0 s1 d D0
K1 s2
X001 DECP DECP(X001, D0);
EN ENO (D 0) – 1 → (D 0)
d D0
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1
7.3.3 MUL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes multiplication by two values to obtain the result (A × B = C).
→ For the floating point multiplication instruction [DEMUL], refer to Section 7.12.10.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
MUL
EN ENO
MUL 16 bits Continuous MUL(EN,s1,s2,d);
s1 d
s2
MULP 4
EN ENO
Instructions
Explanation of
How to Read
MULP 16 bits Pulse MULP(EN,s1,s2,d);
s1 d
s2
DMUL
EN ENO
DMUL 32 bits Continuous
s1 d
DMUL(EN,s1,s2,d);
5
s2
Basic Instruction
DMULP
EN ENO
DMULP 32 bits Pulse DMULP(EN,s1,s2,d);
s1 d
s2
6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition
Data for multiplication or word device storing the multiplication
Bit
7
Input ANY16 ANY32
Instructions
Applied
data
variable
Data for multiplication or word device storing the multiplication
ANY16 ANY32
data
ENO Execution state Bit
Output
variable ARRAY [1..2]
Head word device storing the multiplication result ANY32
OF ANY32
8
Function
and Pulse Catch
Interrupt Function
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
A
z z z z z z z S1 S2 z z z z
and addresses
between devices
Relationships
z z z z z z z S1 S2 z z z z
z z z z z z S1 S2 S3 z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Function and operation explanation
1. 16-bit operation(MUL, MULP)
The data specified by is multiplied by data specified by in the binary format, and the multiplication
result is transferred to 32-bit (double word) device specified by .
Command input MUL
EN ENO BIN BIN BIN
Multiplication s1 d Label1 *1 ( s1 ) × ( s2 ) → ( d +1, d )
data 1
Multiplication s2 16 bits 16 bits 32 bits
data 2
*1 This defines the device that stores the multiplication result.
• The most significant bit of each piece of data indicates the sign (positive: 0 or negative: 1), and data is
multiplied algebraically.
(5×(-8)=-40)
• When a constant (K) is specified in or , it is automatically converted into the binary format.
• When a digit (K1 to K8) is specified for the device specified by :
A digit can be specified in the range from K1 to K8.
For example, when K2 is specified, only low-order 8 bits can be obtained out of the product (32 bits).
Command input MUL
EN ENO
K53 s1 d Var_MUL*1
K15 s2 *1 Var_MUL is a global label and is defined as K2Y000.
s1 K53(H0035)
×
s2 K15(H000F)
When command contact turns ON
K795(H031B)
Sign bit (0=Positive 1=Negative)
Y027 Y026 Y025 ··· Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000
d 0 0 0 ··· 0 0 1 1 0 0 0 1 1 0 1 1
Not output Operation result is output to K2Y000
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
2. 32-bit operation(DMUL, DMULP)
Outline
The data specified by is multiplied by the data specified by in the binary format, and the
multiplication result is transferred to 64-bit (four word devices).
Command input DMUL
EN ENO
Label1 *1 s1 d Label2 *2
*1 This defines the multiplication data or the
device that stores the multiplication data. 2
Instruction List
Label3 *1 s2 *2 This defines the device that stores the
multiplication result.
BIN BIN BIN
[ s1 +1, s1 ] × [ s2 +1, s2 ] → [ d +3, d +2, d +1, d ]
32 bits 32 bits 64 bits
• The most significant bit of each piece of data indicates the sign (positive: 0 or negative: 1), and data is 3
Instruction
Configuration of
multiplied algebraically.
(5,500×(-8,540)=-46,970,000)
• When a constant (K) is specified in or , it is automatically converted into the binary format.
• When a digit (K1 to K8) is specified for the device specified by , the result is obtained only for low-
order 32 bits, and is not obtained for high-order 32 bits.
Transfer the data to word devices once, then execute the operation.
4
Instructions
Explanation of
How to Read
Command input DMUL
EN ENO (D51, D50) (D103, D102, D101, D100)
Var_s1*1 s1 d Var_d3*3 K100 × K150 → K15000
Var_s2*2 s2
DMOV
5
D100 is output to Y017 to Y000
Basic Instruction
EN ENO D101 is output to Y037 to Y020
Var_IN1*4 s d Var_OUT1*5
DMOV
D102 is output to Y057 to Y040
EN ENO
6
D103 is output to Y077 to Y060
Var_IN2*6 s d Var_OUT2*7
Instructions
Step Ladder
*1 Var_s1 is a global label and is defined as D50.
*2 Var_s2 is a global label and is defined as K150.
*3 Var_d3 is a global label and is defined as D100.
*4 Var_IN1 is a global label and is defined as D100.
*5 Var_OUT1 is a global label and is defined as K8Y000.
*6 Var_IN2 is a global label and is defined as D102. 7
*7 Var_OUT2 is a global label and is defined as K8Y040.
Instructions
Applied
Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing an instruction with M8023 ON, a binary float operation takes place, for example, (D1, D0) ×
(D3, D2) = (D5, D4). 8
In this case, K, H and D are valid as the object device for and and D is valid for .
Function
and Pulse Catch
Interrupt Function
The source data needs to be converted into binary float value in advance by FLT instruction.
Note, however, that constants K and H are automatically converted into binary float values.
Related device
1. Relationship between the flag operation and the sign
A
and addresses
between devices
Relationships
Device Name Description
ON : When the operation result is 0
M8304*1 Zero
OFF : When the operation result is not 0
*1. Available in the FX3U and FX3UC PLCs of Ver. 2.30 or later and FX3G PLC of Ver. 1.00 or later.
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Cautions
1) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
S3:Available only for a 16-bit operation. Not available for a 32-bit operation.
2) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
4) When a 32-bit operation (DMUL or DMULP) is used, "Z" cannot be specified to the device specified by
.
5) In monitoring the operation results by a programming tool, 64-bit data as the operation results cannot be
monitored at one time even if a word device is used.
In such a case, the FX3U, FX3UC and FX3G PLCs can use floating point operation.
→ For the floating point operation, refer to Section 7.12.
Program examples
1. 16-bit operation
[Structured ladder]
X000 MUL
EN ENO (D 0) × (D 2) × (D 5, D 4)
D0 s1 d Var_MUL*1 8 9 72
D2 s2
[ ST ]
MUL(X000, D0, D2, Var_MUL*1 );
*1 Var_MUL is a global label and is defined as D4.
2. 32-bit operation
[Structured ladder]
X001 DMUL
EN ENO (D 1,D 0) × (D 3,D 2) × (D 7,D 6,D 5,D 4)
Var_s1*1 s1 d Var_d3*3 1756 327 574,212
Var_s2*2 s2
[ ST ]
DMUL(X001, Var_s1 *1 , Var_s2 *2 , Var_d3 *3 );
*1 Var_s1 is a global label and is defined as D0.
*2 Var_s2 is a global label and is defined as D2.
*3 Var_d3 is a global label and is defined as D4.
Function changes according to versions
Compatible versions
Item Function summary
FX3U FX3UC FX3G
Ver. 2.30 or Ver. 2.30 or Ver. 1.00 or Turns the special device M8304 ON when the operation result of MUL
Zero flag
later later later instruction is 0.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
7.3.4 DIV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes division by two values to obtain the result [A ÷ B =C...(remainder)].
→ For the floating point division instruction [DEDIV], refer to Section 7.12.11.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
DIV
EN ENO
DIV 16 bits Continuous DIV(EN,s1,s2,d);
s1 d
s2
DIVP 4
EN ENO
Instructions
Explanation of
How to Read
DIVP 16 bits Pulse DIVP(EN,s1,s2,d);
s1 d
s2
DDIV
EN ENO
DDIV 32 bits Continuous
s1 d
DDIV(EN,s1,s2,d);
5
s2
Basic Instruction
DDIVP
EN ENO
DDIVP 32 bits Pulse DDIVP(EN,s1,s2,d);
s1 d
s2
6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition
Data for division or word device storing the data (dividend).
Bit
ANY16 ANY32
7
variable
Instructions
Applied
Data for division or word device storing the data (divisor). ANY16 ANY32
ENO Execution state Bit
Output
variable Head word device storing the division result ARRAY [0..1] ARRAY [0..1]
(quotient and remainder) OF ANY16 OF ANY32
3. Applicable devices
8
Function
and Pulse Catch
Interrupt Function
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z z z z z z z S1 S2 z z z z A
z z z z z z z S1 S2 z z z z
and addresses
between devices
Relationships
z z z z z z S1 S2 S3 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Function and operation explanation
1. 16-bit operation(DIV, DIVP)
The contents specified by indicates the dividend, the contents specified by indicates the divisor, the
quotient and remainder are transferred to the device specified by .
Command input DIV
EN ENO Dividend Divisor Quotient Remainder
Division data 1 s1 d Label1*1 BIN BIN BIN BIN
s2 ( s1 ) ÷ ( s2 ) → ( d )··· ( d +1)
Division data 2
16 bits 16 bits 16 bits 16 bits
*1 This defines the device that stores the division result.
• The most significant bit of each data indicates the sign (positive: 0 or negative: 1), and data is divided
algebraically, for example, 36 ÷ (-5) = -7 (quotient) and 1 (remainder).
• Two devices in total starting from are occupied to store the operation result (quotient and remainder).
Make sure that these two devices are not used for other control.
• When a constant (K) is specified in or , it is automatically converted into the binary format.
2. 32-bit operation(DDIV, DDIVP)
The contents specified by indicates the dividend, the contents specified by indicates the divisor, the
quotient and remainder are transferred to the device specified by .
Command input DDIV *1 This defines the dividend data or the
EN ENO device that stores the dividend data.
Label1 *1 s1 d Label3 *3 *2 This defines the divisor data or the
device that stores the divisor data.
Label2 *2 s2
*3 This defines the device that stores
the division result.
Dividend Divisor Quotient Remainder
BIN BIN BIN BIN
[ s1 +1, s1 ] ÷ [ s2 +1, s2 ] → [ d +1, d ] ··· [ d +3, d +2]
32 bits 32 bits 32 bits 32 bits
• Four devices in total starting from are occupied to store the operation result (quotient and remainder).
Make sure that these four devices are not used for other control.
• The most significant bit of each data indicates the sign (positive: 0 or negative: 1), and data is divided
algebraically, for example, 5,500 ÷ (-540) = -10 (quotient) and 100 (remainder).
• When a constant (K) is specified in or , it is automatically converted into the binary format.
Extension function(FXU and FX2C PLCs)
The FXU PLC of V2.30 or earlier does not support the extension function.
When executing an instruction with M8023 ON, a binary float operation takes place, for example, (D1, D0) ÷
(D3, D2) = (D5, D4).
In this case, K, H and D are valid as the object device for and and D is valid for .
The source data needs to be converted into binary float value in advance by FLT instruction.
Note, however, that constants K and H are automatically converted into binary float values.
Related device
Device Name Description
ON : When the operation result is 0
M8304*1 Zero
OFF : When the operation result is not 0
ON : When the operation result is more than 32,767 (in 16-bit operation) or 2,147,483,647 (in
32-bit operation), the carry flag operates.
M8306*1 Carry
OFF : When the operation result is not more than 32,767 (in 16-bit operation) or
2,147,483,647(in 32-bit operation)
*1. Available in the FX3U and FX3UC PLCs of Ver. 2.30 or later and FX3G PLC of Ver. 1.00 or later.
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Cautions
Outline
1) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
S3:Available only for a 16-bit operation. Not available for a 32-bit operation.
2) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified 2
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
Instruction List
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
4) The most significant bit of the quotient and remainder indicates the sign (positive: 0 or negative: 1). 3
Instruction
Configuration of
5) The quotient is negative when either the dividend or divisor is negative.
The remainder is negative when the dividend is negative.
6) The remainder is not obtained when a bit device is specified with digit specification for the device
specified by .
7) In a 32-bit operation (by DDIV or DDIVP), Z cannot be specified as the device specified by . 4
Instructions
Explanation of
How to Read
Program examples
1. 16-bit operation
[Structured ladder]
X000 DIV 5
EN ENO
Basic Instruction
Dividend Divisor Quotient Remainder
D0 s1 d Var_DIV *1 (D 0) ÷ (D 2) → (D 4) ··· (D 5)
s2
100 33 3 1
D2
[ ST ]
MUL(X000,D0,D2,Var_DIV *1 );
6
Instructions
Step Ladder
*1 Var_DIV is a global label and is defined as D4.
2. 32-bit operation
[Structured ladder]
X001
EN
DDIV
ENO Dividend Divisor Quotient Remainder 7
Var_d3*3 (D 1, D 0) ÷ (D 3, D 2) → (D 5, D 4) ··· (D 7, D 6)
Instructions
Applied
Var_s1*1 s1 d
s2
100,000 3333 30 10
Var_s2*2
[ ST ]
DDIV(X001, Var_s1 *1 , Var_s2 *2 , Var_d3 *3 );
*1 Var_s1 is a global label and is defined as D0.
8
Function
and Pulse Catch
Interrupt Function
*2 Var_s2 is a global label and is defined as D2.
*3 Var_d3 is a global label and is defined as D4.
Function changes according to versions
FX3U
Compatible versions
FX3UC FX3G
Item Function summary A
and addresses
between devices
Relationships
Zero flag Turns M8304 ON when the operation result of DIV instruction is 0.
Turns M8306 ON when the operation result of DIV instruction overflows.
Ver. 2.30 or Ver. 2.30 or Ver. 1.00 or 16-bit operation : Only when the maximum negative value
later later later Carry flag (-32,768) is divided by "-1".
32-bit operation : Only when the maximum negative value
(-2,147,483,648) is divided by "-1".
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3.5 INC
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction increments the data of a specified device by "1" (+1 addition).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
INC
INC 16 bits Continuous EN ENO INC(EN,d);
d
INCP
INCP 16 bits Pulse EN ENO INCP(EN,d);
d
DINC
DINC 32 bits Continuous EN ENO DINC(EN,d);
d
DINCP
DINCP 32 bits Pulse EN ENO DINCP(EN,d);
d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition Bit
variable
Output ENO Execution state Bit
variable Word device storing data to be incremented by "1" ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Function and operation explanation
Outline
1. 16-bit operation(INC, INCP)
The contents of the device specified by is incremented by "1", and the increment result is transferred to
.
Command input INC 2
EN ENO d +1 → d
Instruction List
d +1 addition data
2. 32-bit operation(DINC, DINCP)
The contents of the device specified by is incremented by "1", and the increment result is transferred to
. 3
Instruction
Configuration of
Command input DINC
EN ENO
[ d +1, d ] +1 → [ d +1, d ]
d Label1 *1
*1 This defines the device that stores the data to be added by "1".
Cautions 4
Instructions
Explanation of
How to Read
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type. 5
Basic Instruction
3) Note that data is incremented in every operation cycle in a continuous operation type instruction.
4) In a 16-bit operation, when "+32,767" is incremented by "1", the result is "-32,768". Flags (zero, borrow
and carry) are not activated at this time.
5) In a 32-bit operation, when "+2,147,483,647" is incremented by "1", the result is "-2,147,483,648". Flags
(zero, borrow and carry) are not activated at this time.
6
6) Some restrictions to applicable devices
Instructions
Step Ladder
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples
[Structured ladder]
7
X010 MOVP
Instructions
Applied
EN ENO 0 → (Z) Z is cleared by reset input X010.
K0 s d Z
M1
X011 BCDP
(C 0Z) → (K4Y000) The current values of counter C0 to C9 are BCD
EN
s
ENO
d
BIN BCD converted, and the result is outputted into
K4Y000.
8
CN0Z K4Y000
Function
and Pulse Catch
Interrupt Function
INCP Every time X011 turns ON, the current values
EN ENO (Z)+1 → (Z) are outputted one at a time in the order of
d Z C0, C1, ... and C9.
A
and addresses
between devices
Relationships
CMPP
EN ENO
When (Z) is 10
K10 s1 d M0 M 1=ON
Z s2
[ ST ]
MOVP(X010 OR M1, K0, Z);
BCDP(X011, CN0Z, K4Y000);
INCP(X011, Z);
CMPP(X011, K10, Z, M0);
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3.6 DEC
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction decrements the data of a specified device by "1" (-1 addition).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEC
DEC 16 bits Continuous EN ENO DEC(EN,d);
d
DECP
DECP 16 bits Pulse EN ENO DECP(EN,d);
d
DDEC
DDEC 32 bits Continuous EN ENO DDEC(EN,d);
d
DDECP
DDECP 32 bits Pulse EN ENO DDECP(EN,d);
d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition Bit
variable
Output ENO Execution state Bit
variable Device storing data to be decremented by "1" ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Function and operation explanation
Outline
1. 16-bit operation(DEC, DECP)
The contents of the device specified by are decremented by "1", and the decremented result is
transferred to the device specified by .
Command input DEC 2
EN ENO d –1→
Instruction List
d
d "1" decrement data
2. 32-bit operation(DDEC, DDECP)
The contents of the device specified by are decremented by "1", and the decremented result is
transferred to the device specified by . 3
Instruction
Configuration of
Command input DDEC
EN ENO [ d +1, d ] – 1 → [ d +1, d ]
d Label1*1
*1 This defines the device that stores the data to be decremented by "1".
Cautions 4
Instructions
Explanation of
How to Read
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type. 5
Basic Instruction
3) In a 16-bit operation, when "+32,767" is incremented by "1", the result is "-32,768". Flags (zero, borrow
and carry) are not activated at this time.
4) In a 32-bit operation, when "+2,147,483,647" is incremented by "1", the result is "-2,147,483,648". Flags
(zero, borrow and carry) are not activated at this time.
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
6
Instructions
Step Ladder
S2:The FX3U and FX3UC PLCs only are applicable.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3.7 WAND
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes the logical product (AND) operation of two numeric values.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WAND
EN ENO
WAND 16 bits Continuous WAND(EN,s1,s2,d1);
s1 d1
s2
WANDP
EN ENO
WANDP 16 bits Pulse WANDP(EN,s1,s2,d1);
s1 d1
s2
DAND
EN ENO
DAND 32 bits Continuous DAND(EN,s1,s2,d1);
s1 d
s2
DANDP
EN ENO
DANDP 32 bits Pulse DANDP(EN,s1,s2,d1);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Data used for logical product or word device storing data ANY16 ANY32
variable
Data used for logical product or word device storing data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the logical product result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Function and operation explanation
Outline
1. 16-bit operation(WAND, WANDP)
The logical product (AND) operation is executed to the contents specified by and in units of bit, and
the result is transferred to the device specified by .
Command input WAND 2
EN ENO
Instruction List
Logical product s1 ∧ s2 → d
s1 d1 Logical
data 1
Logical product s2 product result
data 2
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by
change.
and do not
3
Instruction
Configuration of
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
converted into the binary format.
• The logical product operation is executed in units of bit as shown in the table below (1 ∧ 1 = 1, 0 ∧ 1 = 0,
1 ∧ 0 = 0 and 0 ∧ 0 = 0).
In the table : 1=ON, 0=OFF
4
Instructions
Explanation of
How to Read
WAND
0 0 0
Logical operation 1 0 0
(unit: bit) 0 1 0
1 1 1
2. 32-bit operation(DAND, DANDP)
5
Basic Instruction
The logical product (AND) operation is executed to the contents specified by and in units of bit, and
the result is transferred to the device specified by .
Command input DAND
EN ENO
Label1 *1
Label2 *1
s1
s2
d Label3 *2 s1 +1, s1 ∧ s2 +1, s2 → d +1, d
6
Instructions
Step Ladder
*1 This defines the logical product data or the device that stores the logical product data.
*2 This defines the device that stores the logical product operation result.
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by and do not
change. 7
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
Instructions
Applied
converted into the binary format.
• The logical product operation is executed in units of bit as shown in the table below (1∧1 = 1, 0∧1 = 0, 1∧0
= 0 and 0∧0 = 0).
In the table : 1=ON, 0=OFF
+1, +1,
+1,
DAND instruction
8
Function
and Pulse Catch
Interrupt Function
0 0 0
Logical operation 1 0 0
(unit: bit) 0 1 0
1 1 1
Cautions A
and addresses
between devices
Relationships
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
197
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3.8 WOR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes the logical sum (OR) operation of two numeric values.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WOR
EN ENO
WOR 16 bits Continuous WOR(EN,s1,s2,d1);
s1 d1
s2
WORP
EN ENO
WORP 16 bits Pulse WORP(EN,s1,s2,d1);
s1 d1
s2
DOR
EN ENO
DOR 32 bits Continuous DOR(EN,s1,s2,d1);
s1 d
s2
DORP
EN ENO
DORP 32 bits Pulse DORP(EN,s1,s2,d1);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Data used for logical sum or word device storing data ANY16 ANY32
variable
Data used for logical sum or word device storing data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the logical sum result. ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
198
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Function and operation explanation
Outline
1. 16-bit operation(WOR, WORP)
The logical sum (OR) operation is executed to the contents specified by and in units of bit, and the
result is transferred to the device specified by .
Command input
EN
WOR
ENO ∨ s2 →
2
s1 d
Instruction List
Logical sum s1 d1 Logical sum result
data 1
Logical sum s2
data 2
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by
change.
and do not
3
Instruction
Configuration of
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
converted into the binary format.
• The logical sum operation is executed in units of bit as shown in the table below (1 ∨ 1 = 1, 0 ∨ 1 = 1,
0 ∨ 0 = 0 and 1 ∨ 0 = 1).
In the table : 1=ON, 0=OFF
4
Instructions
Explanation of
How to Read
WOR
0 0 0
Logical operation 1 0 1
(unit: bit) 0 1 1
1 1 1
2. 32-bit operation(DOR, DORP)
5
Basic Instruction
The logical sum (OR) operation is executed to the contents specified by and in units of bit, and the
result is transferred to the device specified by .
Command input DOR
EN ENO s1 +1, s1 ∨ s2 +1, s2 → d +1, d
Label1 *1
Label2 *1
s1
s2
d Label3 *2
6
Instructions
Step Ladder
*1 This defines the logical sum data or the device that stores the logical sum data.
*2 This defines the device that stores the logical sum result.
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by and do not
change. 7
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
Instructions
Applied
converted into the binary format.
• The logical sum operation is executed in units of bit as shown in the table below (1 ∨ 1 = 1, 0 ∨ 1 = 1,
0 ∨ 0 = 0 and 1 ∨ 0 = 1).
In the table : 1=ON, 0=OFF
+1, +1,
+1,
DOR instruction
8
Function
and Pulse Catch
Interrupt Function
0 0 0
Logical operation 1 0 1
(unit: bit) 0 1 1
1 1 1
Cautions A
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
and addresses
between devices
Relationships
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
199
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
7.3.9 WXOR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes the exclusive logical sum (XOR) operation of two numeric values.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WXOR
EN ENO
WXOR 16 bits Continuous WXOR(EN,s1,s2,d1);
s1 d1
s2
WXORP
EN ENO
WXORP 16 bits Pulse WXORP(EN,s1,s2,d1);
s1 d1
s2
DXOR
EN ENO
DXOR 32 bits Continuous DXOR(EN,s1,s2,d1);
s1 d
s2
DXORP
EN ENO
DXORP 32 bits Pulse DXORP(EN,s1,s2,d1);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Data used for exclusive logical sum or word device storing data ANY16 ANY32
variable
Data used for exclusive logical sum or word device storing data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the exclusive logical sum result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
200
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Function and operation explanation
Outline
1. 16-bit operation(WXOR, WXORP)
The exclusive logical sum (XOR) operation is executed to the contents specified by and in units of
bit, and the result is transferred to the device specified by .
Command input
EN
WXOR
ENO
2
s1 ∀ s2 → d
Instruction List
XOR data 1 s1 d1 XOR result
XOR data 2 s2
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by and do not
change. 3
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
Instruction
Configuration of
converted into the binary format.
• The logical exclusive sum operation is executed in units of bit as shown in the table below (1 ∀ 1 = 0, 0 ∀ 0
= 0, 1 ∀ 0 = 1 and 0 ∀ 1 = 1).
In the table : 1=ON, 0=OFF
4
WXOR
Instructions
Explanation of
How to Read
0 0 0
Logical operation 1 0 1
(unit: bit) 0 1 1
1 1 0
2. 32-bit operation(DXOR, DXORP) 5
The exclusive logical sum (XOR) operation is executed to the contents specified by and in units of
Basic Instruction
bit, and the result is transferred to the device specified by .
Command input DXOR
EN ENO s1 +1, s1 ∀ s2 +1, s2 → d +1, d
Label1 *1 s1 d Label3 *2
Label2 *1 s2 6
Instructions
Step Ladder
*1 This defines the exclusive logical sum data or the device that stores the exclusive logical sum data.
*2 This defines the devices that stores the exclusive logical sum result.
• While the command input is OFF, the data of the transfer destination specified by does not change.
• While the command input is ON, the data of the transfer sources specified by and do not
change.
• When a constant (K) is specified in the transfer sources specified by and , it is automatically
7
Instructions
Applied
converted into the binary format.
• The logical exclusive sum operation is executed in units of bit as shown in the table below (1 ∀ 1 = 0, 0 ∀ 0
= 0, 1 ∀ 0 = 1 and 0 ∀ 1 = 1).
In the table : 1=ON, 0=OFF
+1,
+1, +1,
DXOR instruction 8
Function
and Pulse Catch
Interrupt Function
0 0 0
Logical operation 1 0 1
(unit: bit) 0 1 1
1 1 0
Cautions
A
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
and addresses
between devices
Relationships
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
201
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Program examples
By combining WXOR and CML instructions, the exclusive logical sum not (XORNOT) operation can be
executed.
[Structured ladder] [ ST ]
X000 WXOR WXOR(X000, D10, D12, D14);
EN ENO CML(X000, D14, D14);
D10 s1 d1 D14
D12 s2
CML
EN ENO
D14 s d D14
202
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
7.3.10 NEG
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction obtains the 2's complement of a numeric value (by inverting each bit and adding "1").
A sign of a numeric value can be converted by this instruction.
→ For the floating point sign inversion instruction [DENEG], refer to Section 7.12.16.
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
NEG
NEG 16 bits Continuous EN ENO NEG(EN,d);
d
NEGP 4
NEGP 16 bits Pulse EN ENO NEGP(EN,d);
Instructions
Explanation of
How to Read
d
DNEG
DNEG 32 bits Continuous EN ENO DNEG(EN,d);
d
5
DNEGP
Basic Instruction
DNEGP 32 bits Pulse EN ENO DNEGP(EN,d);
d
2. Set data
Data type 6
Variable Description 16-bit 32-bit
Instructions
Step Ladder
operation operation
Input
EN Execution condition Bit
variable
ENO Execution state Bit
Output
7
Word device which stores data for obtaining complement and will
variable store the operation result. (The operation result will be stored in ANY16 ANY32
the same word device.)
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
type
System User Digit Specification
User Unit
Index Constant
Number String
Pointer
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z z z z z z S1 S1 zz z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
203
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Function and operation explanation
1. 16-bit operation(NEG, NEGP)
Each bit of the device specified by is inverted (0 → 1, 1 → 0), "1" is added, and then the result is stored
in the original device.
Command input NEG
EN ENO ( d ) +1 → d
d Complement data
2. 32-bit operation(DNEG, DNEGP)
Each bit of the device specified by is inverted (0 → 1, 1 → 0), "1" is added, and then the result is stored
in the original device.
Command input DNEG
EN ENO
( d +1, d )+1 = ( d +1, d )
d Label1 *1
*1 This defines the device that stores the complement data.
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) Note that the complement is obtained in every scan time (operation cycle) in a continuous operation type
instruction (NEG,DNEG).
3) Some restrictions to applicable devices
S1:The FX3U and FX3UC PLCs only are applicable.
204
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
1
Program examples
Outline
The program examples below are provided to obtain the absolute value of a negative binary value.
1. Obtaining the absolute value of a negative value using NEG instruction
[Structured ladder]
M8000 BON
2
Instruction List
EN ENO In BON (ON bit check) instruction, M0
RUN D10 s d M0 turns ON when the bit 15 (b15 among
monitor b0 to b15) of D10 is "1".
K15 n
M0 NEGP
EN ENO
D10 → D10
NEGP instruction is executed for D10
3
d D10
Instruction
Configuration of
only when M0 turns ON.
[ ST ]
BON(M8000, D0, K15, M0);
NEGP(M0, D10);
2. Obtaining the absolute value by SUB (subtraction) instruction 4
Even if NEG instruction (complement operation) is not used, D30 always stores the absolute value of the
Instructions
Explanation of
How to Read
difference.
[Structured ladder]
X000 CMP
D10
EN
s1
ENO
d M10
(D 10) > (D 20) (D10) = (D 20) (D 10) < (D 20)
M 10=ON M 11=ON M 12=ON
5
Basic Instruction
D20 s2
M10 SUB
EN ENO In the case of "D10 D20",
D10 s1 d
6
D30 D10 - D20 D30
M11 D20 s2
Instructions
Step Ladder
M12 SUB
EN ENO
In the case of "D10 < D20",
D20 s1 d D30 D20 - D10 D30
D10 s2
7
[ ST ]
Instructions
Applied
CMP(D10, D20, M10);
SUB(X000 AND (M10 OR M11), D10, D20, D30);
SUB(X000 AND M12, D20, D10, D30);
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
205
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation
Negative value expression and absolute value (reference)
In PLCs, a negative value is expressed in 2's complement.
When the most significant bit is "1", it is a negative value, and its absolute value can be obtained by NEG
instruction.
(D 10) = 2
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
(D 10) = 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(D 10) = 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
(D 10) = –1 (D 10) +1 = 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(D 10) = –2 (D 10) +1 = 2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
(D 10) = –32,767 (D 10) +1 = 32,767
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
(D 10) = –32,767 (D 10)+1 = –32,768
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
The absolute value can be obtained up to 32,767.
206
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4 Rotation and Shift Operation
Outline
7.4.1 ROR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction shifts and rotates the bit information rightward by the specified number of bits without the
carry flag.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ROR
ROR 16 bits Continuous EN ENO ROR(EN,n,d); 4
n d
Instructions
Explanation of
How to Read
RORP
RORP 16 bits Pulse EN ENO RORP(EN,n,d);
n d
DROR
5
Basic Instruction
DROR 32 bits Continuous EN ENO DROR(EN,n,d);
n d
DRORP
DRORP 32 bits Pulse EN ENO DRORP(EN,n,d);
n d 6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit 32-bit
EN Execution condition Bit
operation operation
7
Input
Instructions
Applied
Number of bits to be rotated
variable ANY16
n≤16(16-bit operation), n≤32(32-bit operation)
Output ENO Execution state Bit
variable Word device storing data to be rotated rightward ANY16 ANY32
3. Applicable devices
8
Function
and Pulse Catch
Interrupt Function
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
S1 S1 S1 z z z S2 S3 zz z A
z S2 z z
and addresses
between devices
Relationships
S: Refer to "Cautions".
207
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (ROR, RORP)
"n" bits out of 16 bits of the device specified by are rotated rightward.
Command input ROR
EN ENO
Number of bits n d Rightward rotation data
to be rotated
• The final bit is stored in the carry flag (M8022).
• In a device with digit specification, K4 (16-bit instruction) is valid.
"n" bits (in the case of K4)
High order Low order
b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 Carry flag
Before
execution 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 M8022
After the "n-1" bits
instruction
is executed once. b0 to b3 (n-1) are moved.
"n-1" bits The status of the bit "n-1" is copied.
Rightward rotation
High order Low order
After b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0
Carry flag
Before shift Before shift M8022
b3 to b0 b15 to b4
The contents of b3 are stored.
2. 32-bit operation (DROR, DRORP)
"n" bits out of 32 bits of the device specified by are rotated rightward.
Command input DROR
EN ENO
Number of bits n d Label1*1
to be rotated
*1 This defines the device that stores the data to be rotated rightward.
• The final bit is stored in the carry flag (M8022).
• In a device with digit specification, K8 (32-bit instruction) is valid.
"n" bits (in the case of K4)
High order Low order
Before b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 Carry flag
execution 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 M8022
After the The status of the b0 to b3 (n-1)
instruction bit "n-1" is copied. are moved.
is executed once.
The status of the bit
"n-1" bits "n-1" is copied.
Rightward rotation
High order Low order
b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
After
execution 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0
Carry flag
Before shift Before shift M8022
b3 to b0 b31 to b4 The contents of
b3 are stored.
208
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Related device
Outline
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description
M8022 Carry Turns ON when the bit shifted last from the lowest position is "1".
Cautions
2
Instruction List
1) Some restrictions to applicable devices
S1:K4Y , K4M and K4S are valid for a 16-bit operation.
K8Y , K8M and K8S are valid for a 32-bit operation.
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
S3:The FX3U and FX3UC PLCs only are applicable. 3
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
Instruction
Configuration of
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) In the case of continuous operation type instructions (ROR and DROR), note that shift and rotation are
executed in every scan time (operation cycle). 4
Instructions
Explanation of
How to Read
4) When a device with digit specification is specified as , only K4 (16-bit instruction) or K8 (32-bit
instruction) is valid (examples: K4Y010 or K8M0).
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
209
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
7.4.2 ROL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction shifts and rotates the bit information leftward by the specified number of bits without the carry
flag.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ROL
ROL 16 bits Continuous EN ENO ROL(EN,n,d);
n d
ROLP
ROLP 16 bits Pulse EN ENO ROLP(EN,n,d);
n d
DROL
DROL 32 bits Continuous EN ENO DROL(EN,n,d);
n d
DROLP
DROLP 32 bits Pulse EN ENO DROLP(EN,n,d);
n d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
Number of bits to be rotated
variable ANY16
n≤16(16-bit operation), n≤32(32-bit operation)
Output ENO Execution state Bit
variable Word device storing data to be rotated leftward ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 S1 S1 z z z S2 S3 zz z
z S2 z z
S: Refer to "Cautions".
210
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Function and operation explanation
Outline
1. 16-bit operation (ROL, ROLP)
"n" bits out of 16 bits of the device specified by are rotated leftward.
Command input ROL
EN ENO 2
Number of bits n d Leftward rotation data
Instruction List
to be rotated
• The final bit is stored in the carry flag (M8022).
• In a device with digit specification, K4 (16-bit instruction) is valid.
"n" bits (in the case of K4)
3
High order Low order
Instruction
Configuration of
Carry flag b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before
execution M8022 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
After the
instruction
is executed
The status of
once. b12 (16-n) to b15 are moved. 4
Instructions
Explanation of
How to Read
the bit "16-n" is copied. "n" bits
Leftward rotation
High order Low order
After b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1
5
Carry flag
M8022 Before shift Before shift
b11 to b0 b15 to b12
Basic Instruction
The contents of b12 are stored.
2. 32-bit operation (DROL, DROLP)
"n" bits out of 32 bits of the device specified by are rotated leftward.
Command input DROL 6
EN ENO
Instructions
Step Ladder
Number of bits n d Label1 *1
to be rotated
*1 This defines the device that stores the data to be rotated leftward.
• The final bit is stored in the carry flag (M8022).
• In a device with digit specification, K8 (32-bit instruction) is valid.
7
Instructions
Applied
"n" bits (in the case of K4)
High order Low order
Carry flag b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before
execution M8022 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
"16-n" bits After the 8
instruction
Function
and Pulse Catch
Interrupt Function
is executed
The status of once. b28 (32-n) to b31 are moved.
the bit "32-n"
is copied "n" bits
Leftward rotation
High order Low order
After
execution
b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 A
1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1
and addresses
between devices
Relationships
Carry flag
M8022 Before shift Before shift
b27 to b0 b31 to b28
The contents of b28 are stored.
211
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Related device
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description
M8022 Carry Turns ON when the bit shifted last from the highest position is "1".
Cautions
1) Some restrictions to applicable devices
S1:K4Y , K4M and K4S are valid for a 16-bit operation.
K8Y , K8M and K8S are valid for a 32-bit operation.
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
S3:The FX3U and FX3UC PLCs only are applicable.
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) In the case of continuous operation type instructions (ROL and DROL), note that shift and rotation are
executed in every scan time (operation cycle).
4) When a device with digit specification is specified as , only K4 (16-bit instruction) or K8 (32-bit
instruction) is valid (examples: K4Y010 or K8M0).
212
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4.3 RCR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction shifts and rotates the bit information rightward by the specified number of bits together with
the carry flag.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
RCR
RCR 16 bits Continuous EN ENO RCR(EN,n,d);
n d
RCRP 16 bits Pulse EN
RCRP
ENO RCRP(EN,n,d);
4
Instructions
Explanation of
How to Read
n d
DRCR
DRCR 32 bits Continuous EN ENO DRCR(EN,n,d);
n d
5
Basic Instruction
DRCRP
DRCRP 32 bits Pulse EN ENO DRCRP(EN,n,d);
n d
2. Set data
Data type
6
Instructions
Step Ladder
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
Number of bits to be rotated
variable ANY16
n≤16(16-bit operation), n≤32(32-bit operation)
Output ENO Execution state Bit 7
Instructions
Applied
variable Word device storing data to be rotated rightward ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand
type
System User Digit Specification
System
User
Special
Unit
Index Constant
Real Character
Number String
Pointer 8
Function
and Pulse Catch
Interrupt Function
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
S1 S1 S1 z z z S2 S2 zz z
z S2 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
213
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (RCR, RCRP)
"n" bits out of 16 bits of the device specified by and 1 bit (carry flag M8022) are rotated rightward.
Command input RCR
EN ENO
Number of bits n d Rightward rotation data
to be rotated
"n" bits (in the case of K4)
High order Low order Carry flag
Before b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 M8022
execution 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 When M8022 is ON
After the b3 (n-1) to
b2 (n-2) to b0 and the head bit instruction b3(n-1) b0 are
indicating the carry flag ON/OFF is executed moved. The status of the final
status are moved. once.
bit b3 (bit "n-1") is stored.
"n" bits Rightward rotation
High order Low order
After b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 Before shift b3
Carry flag
Before shift Before shift b15 to b4 M8022
b2 to b0
Before shift
Carry flagM8022
The carry flag is intervened in the rotation loop. If M8022 has been set to ON or OFF before the rotation
instruction, the carry flag is transferred to the destination.
2. 32-bit operation (DRCR, DRCRP)
"n" bits out of 32 bits of the device specified by and 1 bit (carry flag M8022) are rotated rightward.
Command input DRCR
EN ENO
Number of bits n d Label1 *1
to be rotated
*1 This defines the device that stores the data to be rotated rightward.
"n" bits (in the case of K4)
High order Low order
b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before
execution 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 0 0 0 0
b2 (n-2) to b0 and the head bit After the instruction
indicating the carry flag ON/OFF is executed once. Carry flagM8022
status are moved. When M8022 is OFF
"n" bits
Rightward rotation
High order The status
Low order of the final
After b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 bit b3 (bit "n-1")
execution 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 is stored.
Before shift Before shift b31 to b4
Carry flagM8022
b2 to b0 Before shift
Carry flagM8022 1
Before shift
b3
214
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Related device
Outline
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description
M8022 Carry Turns ON when the bit shifted last from the lowest position is "1".
Cautions
2
Instruction List
1) Some restrictions to applicable devices
S1:K4Y , K4M and K4S are valid for a 16-bit operation.
K8Y , K8M and K8S are valid for a 32-bit operation.
S2:The FX3U and FX3UC PLCs only are applicable.
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the 3
case of a simple project. Use a label to handle 32-bit data.
Instruction
Configuration of
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) In the case of continuous operation type instructions (RCR and DRCR), note that shift and rotation are
executed in every scan time (operation cycle).
4) When a device with digit specification is specified as , only K4 (16-bit instruction) or K8 (32-bit
4
Instructions
Explanation of
How to Read
instruction) is valid (examples: K4Y010 or K8M0).
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
215
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
7.4.4 RCL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction shifts and rotates the bit information leftward by the specified number of bits together with the
carry flag.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RCL
RCL 16 bits Continuous EN ENO RCL(EN,n,d);
n d
RCLP
RCLP 16 bits Pulse EN ENO RCLP(EN,n,d);
n d
DRCL
DRCL 32 bits Continuous EN ENO DRCL(EN,n,d);
n d
DRCLP
DRCLP 32 bits Pulse EN ENO DRCLP(EN,n,d);
n d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
Number of bits to be rotated
variable ANY16
n≤16(16-bit operation), n≤32(32-bit operation)
Output ENO Execution state Bit
variable Word device storing data to be rotated leftward ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 S1 S1 z z z S2 S2 zz z
z S2 z z
S: Refer to "Cautions".
216
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Function and operation explanation
Outline
1. 16-bit operation (RCL, RCLP)
"n" bits out of 16 bits of the device specified by and 1 bit (carry flag M8022) are rotated leftward.
Command input RCL
EN ENO 2
n d Leftward rotation data
Instruction List
Number of bits
to be rotated
"n" bits (in the case of K4)
High order Low order
Before b15 to b12
3
b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution (16-n) are 1 1 1 0 1 1 1 1 0 0 0 0 0 0 0 0
moved.
Instruction
Configuration of
1
Carry flag After the instruction
When M8022 is executed once.
is ON b15 to b13 (16-n+1) and the
head bit indicating the
"n" bits carry flag ON/OFF status
The status High order
Leftward rotation
Low order
are moved. 4
Instructions
Explanation of
How to Read
After of the final b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution bit b12 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1
(bit "16-n")
is stored.
Before shift b11 to b0 Before shift b15 to b13
Carry flag Before shift
0 M8022
Before shift b12
Carry flagM8022
5
Basic Instruction
The carry flag is intervened in the rotation loop. If M8022 has been set to ON or OFF before the rotation
instruction, the carry flag is transferred to the destination.
2. 32-bit operation (DRCL, DRCLP)
"n" bits out of 32 bits of the device specified by and 1 bit (carry flag M8022) are rotated leftward.
Command input DRCL
6
Instructions
Step Ladder
EN ENO
Number of bits n d Label1 *1
to be rotated
*1 This defines the device that stores the data to be rotated leftward.
"n" bits (in the case of K4)
7
High order Low order
Instructions
Applied
b31 to b28 b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before (b32-n) are
execution moved. 1 1 1 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1
b31 to b29 (32-n+1) and the head
Carry flag
When M8022
After the instruction
is executed once.
bit indicating the carry flag ON/OFF
status are moved.
8
is ON
Function
and Pulse Catch
Interrupt Function
Leftward rotation
The status High order Low order
After of the final b31b30b29b28b27b26b25b24b23b22b21b20b19b18b17b16b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution bit b28 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1
(bit "32-n")
is stored. A
Before shift b27 to b0 Before shift
and addresses
between devices
Relationships
Carry flag b31 to b29
0 M8022 Before shift
Before shift b28 Carry flagM8022
217
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Related device
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description
M8022 Carry Turns ON when the bit shifted last from the highest position is "1".
Cautions
1) Some restrictions to applicable devices
S1:K4Y , K4M and K4S are valid for a 16-bit operation.
K8Y , K8M and K8S are valid for a 32-bit operation.
S2:The FX3U and FX3UC PLCs only are applicable.
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) In the case of continuous operation type instructions (RCL and DRCL), note that shift and rotation are
executed in every scan time (operation cycle).
4) When a device with digit specification is specified as , only K4 (16-bit instruction) or K8 (32-bit
instruction) is valid (examples: K4Y010 or K8M0).
218
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4.5 SFTR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction shifts bit devices of the specified bit length rightward by the specified number of bits.
After shift, the bit device specified by is transferred by "n2" bits from the most significant bit.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
SFTR
EN ENO
SFTR 16 bits Continuous s d SFTR(EN,s,n1,n2,d);
n1
n2
4
Instructions
Explanation of
How to Read
SFTRP
EN ENO
SFTRP 32 bits Pulse s d SFTRP(EN,s,n1,n2,d);
n1
n2
5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Head bit device to be stored to the shift data after rightward shift. Bit
Input
variable Bit length of the shift data (see Caution). ANY16 6
Instructions
Step Ladder
Number of bits to be shifted rightward (see Caution) ANY16
Output ENO Execution state Bit
variable Head bit device to be shifted rightward Bit
3. Applicable devices
7
Bit Devices Word Devices Others
Instructions
Applied
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zzz z S1 z
zz z z 8
Function
and Pulse Catch
Interrupt Function
z z
z S2 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
219
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (SFTR, SFTRP)
For "n1" bits (shift register length) starting from the bit device specified by , "n2" bits are shifted rightward
(1) and 2) shown below).
After shift, "n2" bits from the bit device specified by are transferred to "n2" bits from +n1-n2 (3)
shown below).
Command input SFTR
EN ENO
Stored data s d Shift data
Bit data length n1
Number of bits n2
n2 (in the case of "n2 = 3")
s +2 s +1 s
Before
execution n1 (in the case of "n1 = 9")
d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
2) 1)
"n2" bits are Overflow
3) Copy shifted rightward (data to be deleted)
(n2 = 3).
After d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
execution
s +2 to s before shift (n2 = 3). d +8 to d +3 before shift (n2 = 3).
Cautions
1) Some restrictions to applicable devices
S1:Applicable only to the FX3U and FX3UC PLCs. Not indexed (V, Z).
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Note that "n2" bits are shifted every time the command input turns ON from OFF in SFTRP instruction,
but that "n2" bits are shifted in each scan time (operation cycle) in SFTR instruction.
4) Limitation to n1 and n2 differs from one PLC to another.
PLC Limit
FX3U, FX3UC, FX3G, FX1N, FX2N, FX1NC, FX2NC, FX2,
n2≤n1≤1024
FX2C
FX1S, FX0, FX0S, FX0N n2≤n1≤512
Error
If the transfer source specified by is equivalent to the shifted device specified by , an operation error
occurs (error code: K6710). (Applicable only to the FX3U and FX3UC PLCs)
220
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4.6 SFTL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction shifts bit devices of the specified bit length leftward by the specified number of bits.
After shift, the bit device specified by is transferred by "n2" bits from the least significant bit.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
SFTL
EN ENO
SFTL 16 bits Continuous s d SFTL(EN,s,n1,n2,d);
n1
n2
4
Instructions
Explanation of
How to Read
SFTLP
EN ENO
SFTLP 16 bits Pulse s d SFTLP(EN,s,n1,n2,d);
n1
n2
5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Head bit device to be stored to the shift data after leftward shift Bit
Input
variable Bit length of the shift data (see Caution). ANY16 6
Instructions
Step Ladder
Bit length of the shift data (see Caution). ANY16
Output ENO Execution state Bit
variable Head bit device to be shifted leftward Bit
3. Applicable devices
7
Bit Devices Word Devices Others
Instructions
Applied
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zzz z S1 z
zz z z 8
Function
and Pulse Catch
Interrupt Function
z z
z S2 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
221
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (SFTL, SFTLP)
For "n1" bits (shift register length) starting from the bit device specified by , "n2" bits are shifted leftward
(1) and 2) shown below).
After shift, "n2" bits from the bit device specified by are transferred to "n2" bits from the bit device
specified by (3) shown below).
Command input SFTL
EN ENO
Stored data s d Shift data
Bit data length n1
Number of bits n2
n2 (in the case of "n2 = 3")
s +2 s +1 s
Before
execution n1 (in the case of "n1 = 9")
d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
1) 2)
Overflow "n2" bits are shifted
leftward (n2 = 3) 3) Copy
(data to be deleted)
After d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
execution
d to d +5 before shift (n2 = 3) s +2 to s before shift (n2 = 3).
Cautions
1) Some restrictions to applicable devices
S1:Applicable only to the FX3U and FX3UC PLCs. Not indexed (V, Z).
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Note that "n2" bits are shifted every time the command input turns ON from OFF in SFTLP instruction, but
that "n2" bits are shifted in each operation cycle in SFTL instruction.
4) Limitation to n1 and n2 differs from one PLC to another.
PLC Limit
FX3U, FX3UC, FX3G, FX1N, FX2N, FX1NC, FX2NC, FXU,
n2≤n1≤1024
FX2C
FX1S, FX0, FX0S, FX0N n2≤n1≤512
Error
If the transfer source specified by is equivalent to the shifted device specified by , an operation error
occurs (error code: K6710). (Applicable only to the FX3U and FX3UC PLCs)
222
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Program examples(Conditional stepping of 1-bit data)
Outline
By setting X000 to X007 to ON in turn, Y000 to Y007 are activated in turn.
If the order is wrong, activation is disabled.
[Structured ladder]
X000 M8046 M0
Head data
2
Instruction List
Data input
M8046 X000 SFTL *1
EN ENO
3
M0 s d S0
S 0 X001 n1
K8
Instruction
Configuration of
K1 n2
S 1 X002
Bit 1 of M0 is regarded as the head input,
and 8-bit shift register is constructed by S0 to S7.
*1:By using a state relay (S), the state under operation
can be monitored by the dynamic monitoring function of
S 7 X000 the state relay. 4
Instructions
Explanation of
How to Read
M8000 MOV
EN ENO
(S7 to S0)→ (Y007 to Y000)
K2S0 s d K2Y000
M8047
STL monitor is valid.
5
Basic Instruction
X000
X001
Even if X000 is set to ON, Y000 is not activated. 6
Instructions
Step Ladder
X007
Y000
Y001
Y007 7
Instructions
Applied
[ ST ]
M0:= X000 AND NOT M8046;
SFTL((NOT M8046 AND X000) OR (S0 AND X001) ··· OR (S1 AND X002) R(S7 AND X000), M0, K8, K1, S0);
MOV(M8000, K2S0, K2Y000);
M8047:= M8000;
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
223
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
7.4.7 WSFR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction shifts word devices with "n1" data length rightward by "n2" words.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WSFR
EN ENO
WSFR 16 bits Continuous s d WSFR(EN,s,n1,n2,d);
n1
n2
WSFRP
EN ENO
WSFRP 16 bits Pulse s d WSFRP(EN,s,n1,n2,d);
n1
n2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device to be stored to the shift data after rightward shift ANY16
Input
variable Word data length of the shift data (n2 ≤ n1 ≤ 512) ANY16
Number of words to be shifted rightward (n2 ≤ n1 ≤ 512) ANY16
Output ENO Execution state Bit
variable Head word device storing data to be shifted rightward ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z
z z z z z z S1 S2 z
z z
z S1 z z
S: Refer to "Cautions".
224
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Function and operation explanation
Outline
1. 16-bit operation (WSFR, WSFRP)
For "n1" word devices starting from the device specified by , "n2" words are shifted rightward (1) and 2)
shown below)
After shift, "n2" words starting from the device specified by
the device specified by [ +n1-n2] (3) shown below).
are transferred to "n2" words starting from 2
Instruction List
Command input WSFR
EN ENO
Stored data s d Shift data
Word data length n1
Number of words n2
3
Instruction
Configuration of
n2 (in the case of "n2 = 3")
s +2 s +1 s
Before
execution n1 (in the case of "n1 = 9") 4
Instructions
Explanation of
How to Read
d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
2) 1)
Overflow
3) Copy "n2" words are shifted
rightward (n2 = 3).
(data to be deleted)
5
Basic Instruction
After d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
execution
s +2 to s before shift (n2 = 3). d +8 to d +3 before shift (n2 = 3).
Cautions
6
Instructions
Step Ladder
1) Note that "n2" words are shifted when the drive input turns ON in WSFRP instruction, but that "n2" words
are shifted in each operation cycle in WSFR instruction.
2) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable. 7
Instructions
Applied
Error
If the transfer source device specified by is equivalent to the shifted device specified by , an
operation error occurs (error code: K6710).
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
225
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Program examples
1. Shifting devices with digit specification
[Structured ladder]
X000 WSFR
EN ENO
K1X000 s d K1Y000
K4 n1
K2 n2
Specify a same digit for devices with digit specification.
Make sure that the number of digits is equivalent.(Kn )
X007 X006 X005 X004 X003 X002 X001 X000
3)
Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000
2) 1)
[ ST ]
WSFR(X000, K1X000, K4, K2, K1Y000);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4.8 WSFL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction shifts the word data information leftward by the specified number of words.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
WSFL
Instruction
Configuration of
EN ENO
WSFL 16 bits Continuous s d WSFL(EN,s,n1,n2,d);
n1
n2
WSFLP
4
Instructions
Explanation of
How to Read
EN ENO
WSFLP 16 bits Pulse s d WSFLP(EN,s,n1,n2,d);
n1
n2
2. Set data 5
Basic Instruction
Variable Description Data type
EN Execution condition Bit
Head device to be stored to the shift data after leftward shift ANY16
Input
variable Word data length of the shift data (n2 ≤ n1 ≤ 512) ANY16
Number of words to be shifted leftward (n2 ≤ n1 ≤ 512) ANY16 6
Instructions
Step Ladder
Output ENO Execution state Bit
variable Head word device storing data to be shifted leftward ANY16
3. Applicable devices
Bit Devices Word Devices
System Special
Others
Real Character
7
Operand System User Digit Specification Index Constant Pointer
Instructions
Applied
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z
z z z z z z S1 S2 z
z z 8
Function
and Pulse Catch
Interrupt Function
z S1 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
227
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (WSFL, WSFLP)
For "n1" word devices starting from the device specified by , "n2" words are shifted leftward (1) and 2)
shown below).
After shift, "n2" words starting from the device specified by are shifted to "n2" words starting from the
device specified by .
Command input WSFL
EN ENO
Stored data s d Shift data
Word data length n1
Number of words n2
n2 (in the case of "n2 = 3")
s +2 s +1 s
Before
execution n1 (in the case of "n1 = 9")
d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
1) 2)
Overflow "n2" words are shifted
(data to be deleted) 3) Copy
leftward (n2 = 3).
After d +8 d +7 d +6 d +5 d +4 d +3 d +2 d +1 d
execution
d +5 to d before shift (n2 = 3). s +2 to s before shift (n2 = 3).
Cautions
1) Note that "n2" words are shifted every time the drive input turns ON from OFF in WSFLP instruction, but
that "n2" words are shifted in each operation cycle in WSFL instruction.
2) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Error
If the transfer source specified by is equivalent to the shifted device specified by , an operation error
occurs (error code: K6710).
228
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Program examples
Outline
1. Shifting devices with digit specification
[Structured ladder]
X000
EN
WSFL
ENO 2
Instruction List
K1X000 s d K1Y000
K4 n1
K2 n2
Specify a same digit for devices with digit specification. 3
Instruction
Configuration of
Make sure that the number of digits is equivalent.(Kn )
X007 X006 X005 X004 X003 X002 X001 X000
3)
4
Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000
Instructions
Explanation of
How to Read
1) 2)
[ ST ]
WSFL(X000, K1X000, K4, K2, K1Y000);
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
229
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
7.4.9 SFWR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes data for first-in first-out (FIFO) and first-in last-out (FILO) control.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SFWR
EN ENO
SFWR 16 bits Continuous SFWR(EN,s,n,d);
s d
n
SFWRP
EN ENO
SFWRP 16 bits Pulse SFWRP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Word device storing data to be put in first ANY16
variable
Number of store points (for pointer, value is added by "+1".)
ANY16
2 ≤ n ≤ 512
Output ENO Execution state Bit
variable Head word device storing and shifting data. ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 z
z z
S: Refer to "Cautions".
230
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
Function and operation explanation
Outline
1. 16-bit operation (SFWR, SFWRP)
The contents of the device specified by are written to "n-1" devices from the device specified by +1,
and "1" is added to the number of data stored in the device specified by .
For example, when the device specified by
to the device specified by
is "0", the contents of the device specified by
+1. When the device specified by
are written
is "1", the contents of the device
2
Instruction List
specified by are written to the device specified by +2.
Command input SFWR
EN ENO
First-in data s d Storing device
Number of pieces
of data
n
3
Instruction
Configuration of
s
n
Before
execution
d+n ··· d+10 d+9 d+8 d+7 d+6 d+5 d+4 d+3 d+2 d+1 d
Pointer
Executed at the 1st time( d = 0)
4
Instructions
Explanation of
How to Read
s d +1 → d
(K0) (K1)
d+n ··· d+10 d+9 d+8 d+7 d+6 d+5 d+4 d+3 d+2 s d
After Pointer
execution Executed at the 2nd time
5
s d +1 → d
Basic Instruction
(K1) (K2)
d+n ··· d+10 d+9 d+8 d+7 d+6 d+5 d+4 d+3 s s d
Pointer
1) When X000 turns ON from OFF, the contents of the device specified by
specified by +1. So the contents of the device specified by
are stored to the device
+1 become equivalent to the
6
Instructions
Step Ladder
contents of the device specified by .
2) When the contents of the device specified by are changed and then the command input is set to ON
from OFF again, the new contents of the device specified by are stored to the device specified by
+2. So the contents of the device specified by +2 become equivalent to the contents of the
device specified by . (When the continuous operation type SFWR instruction is used, the contents
are stored in each operation cycle. Use the pulse operation type SFWRP instruction in programming.) 7
Instructions
Applied
3) Data are stored from the right end in the same way, and the number of stored data is indicated by the
contents of the pointer specified by .
Related device
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description 8
Function
and Pulse Catch
Interrupt Function
M8022 Carry When the contents of the pointer specified by exceeds "n-1", no operation is executed (data is not
written) and the carry flag M8022 turns ON.
Related instructions
Instruction Description
SFRD Shift read (for FIFO control) A
and addresses
between devices
Relationships
POP Last-in data read (for FILO control)
Cautions
1. In the case of continuous operation type (SFWR) instruction.
Note that data are stored (overwritten) in each scan time (operation cycle).
2. Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
231
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Program examples
1. Example of first-in first-out control
→ For a program example of FILO, refer to Section 7.21.3.
In the example below, the shift write (SFWR) and shift read (SFRD) instructions are used.
1) Contents of operation
- In this circuit example, a product number to be taken out now is output according to "first-in first-out" rule
while products which were put into a warehouse with their product numbers registered are taken out of
the warehouse.
- The product number is hexadecimal, and up to 4 digits. Up to 99 products can be stored in the
warehouse.
2) Program
[Structured ladder]
Button for request to put a product into warehouse
X020 MOVP
EN ENO The product number is input from X000 to X017,
and transferred to D256.
K4X000 s d D256
SFWRP
Pointer
EN ENO
D257: Data register for storing the product number
D256 s d D257 D258 to D356: (99 points)
K100 n
Button for request to take a product out of warehouse
X021 SFRDP
EN ENO The product number of a product put into first is
D257 s d D357 output to D357 in response to the request to take
K100 n a product out of the warehouse.
M8000 MOV
EN ENO The product number to be taken out is output to
RUN monitor Y000 to Y017 in a four-digit hexadecimal number.
D357 s d K4Y000
[ ST ]
MOVP(X020, K4X000, D256);
SFWRP(X020, D256, K100, D257);
SFRDP(X021, D257, K100, D357);
MOV(M8000, D357, K4Y000);
Digital switch 0000 to FFFF Seven-segment display unit
Request to Request to
1 2 3 4 put a product take a product
into warehouse out of warehouse
X017 to X000 X20 X21 Y017 to Y000
Command Command
MOV
+1 -1
6 D257 5 4 Shift
1 0320 D258 0320 D357 0320 0232
2 0232 D259 0232 0462
3 0462 MOV D260 0462 0539
4 0539 D261 0539 0142
5 0142 D262 0142 0
6 1234 D256 1234 D263 0 0
7 0 0
0
99 0 SFWRP D355 0 SFRDP 0
100 0 instruction D356 0 instruction 0
is executed. is executed.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
1
7.4.10 SFRD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction reads data for first-in first-out control.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
SFRD
Instruction
Configuration of
EN ENO
SFRD 16 bits Continuous SFRD(EN,s,n,d);
s d
n
SFRDP
SFRDP 16 bits Pulse
EN ENO
SFRDP(EN,s,n,d);
4
s d
Instructions
Explanation of
How to Read
n
2. Set data
Variable Description Data type
EN Execution condition Bit 5
Basic Instruction
Input Head word device storing data ANY16
variable
Number of store points (for pointer, value is added by "+1".)
ANY16
2 ≤ n ≤ 512
Output ENO Execution state Bit
variable Word device storing data taken out first ANY16
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
7
z z z z z z S1 S2 z
Instructions
Applied
z z z z z z S1 S2 zz z
z z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
233
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.4 Rotation and Shift Operation
Function and operation explanation
1. 16-bit operation (SFRD, SFRDP)
The data of the device specified by [ +1] written in turn by SFWR instruction is transferred (read) to the
device specified by , and "n-1" words from the device specified by +1 are shifted rightward by 1
word. "1" is subtracted from the number of data stored in the device specified by .
Command input SFRD
EN ENO
Readout data s d Storing device
Number of pieces n
of data
d
n
Before
execution
s+n ··· s+10 s+9 s+8 s+7 s+6 s+5 s+4 s+3 s+2 s+1 s s =n
Pointer
Executed at the 1st time
d s+1 s –1 → s
s+n s+n ··· s+10 s+9 s+8 s+7 s+6 s+5 s+4 s+3 s+2 s
After Word data is shifted. Pointer
execution Executed at the 2nd time
d s+2 s –1 → s
s+n s+n s+n ··· s+10 s+9 s+8 s+7 s+6 s+5 s+4 s+3 s
Word data is shifted. Pointer
1) When the command contact turns ON, the contents of the device specified by [ +1] are transferred
(read) to the device specified by .
2) Accompanied by this transfer, the contents of the pointer specified by decrease, and the data on the
left side are shifted rightward by 1 word. (When the continuous operation type SFRD instruction is used,
the contents are shifted in turn in each operation cycle. Use the pulse operation type SFRDP instruction
in programming.)
Related device
→ For the zero flag use method, refer to Section 1.3.4.
Device Name Description
Data is always read from the device specified by [ +1]. When the contents of the pointer specified
M8020 Zero
by become "0", the zero flag M8020 turns ON.
Related instructions
Instruction Description
SFWR Shift write (for FIFO/FILO control)
POP Last-in data read (for FILO control)
Cautions
1) The contents of the device specified by [ +n] do not change by reading.
2) In the case of continuous operation type (SFRD) instruction, data is read in turn in each scan time
(operation cycle), but the contents of the device specified by [ +n] do not change.
3) When pointer specified by is "0", data is not processed, and the contents of the device specified by
do not change.
4) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples
Refer to the program example provided for SFWR instruction.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
7.5 Data Operation
Outline
7.5.1 ZRST
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction resets devices located in a zone between two specified devices at one time.
Use this instruction for restarting operation from the beginning after pause or after resetting control data.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ZRST
ZRST 16 bits Continuous
EN ENO
ZRST(EN,d1,d2); 4
d1
Instructions
Explanation of
How to Read
d2
ZRSTP
EN ENO
ZRSTP 16 bits Pulse ZRSTP(EN,d1,d2);
d1
d2 5
Basic Instruction
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
ENO Execution state Bit 6
Instructions
Step Ladder
Output Head device to be reset at one time ANY_SIMPLE
variable
Last device to be reset at one time ANY_SIMPLE
3. Applicable devices
Bit Devices Word Devices Others 7
Operand System Special Real Character
Instructions
Applied
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zz z z z z S1 S2 z
zz z z z z S1 S2 z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
235
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Function and operation explanation
1. 16-bit operation (ZRST, ZRSTP)
Same type of devices specified by to are reset at one time.
When the devices specified by and are bit devices
"OFF (reset)" is written to the entire range from the devices specified by to at one time.
Command input ZRST
EN ENO Devices d1 through d2 are reset at one time.
d1 Head device
d2 Last device
Before
d2 ··· d1 +9 d1 +8 d1 +7 d1 +6 d1 +5 d1 +4 d1 +3 d1 +2 d1 +1 d1
execution
Executed
OFF
After
execution
OFF ··· OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF
When the devices specified by and are word devices
"K0" is written to the entire range from the devices specified by to at one time.
Command input ZRST
EN ENO Devices d1 through d2 are reset at one time.
d1 Head device
d2 Last device
Before
execution d2 ··· d1 +9 d1 +8 d1 +7 d1 +6 d1 +5 d1 +4 d1 +3 d1 +2 d1 +1 d1
Executed
K0
After
execution
K0 ··· K0 K0 K0 K0 K0 K0 K0 K0 K0 K0
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Related instructions
Outline
1. RST
As an independent reset instruction for devices, RST instruction can be used for bit devices (Y, M and S) and
word devices (T, C, D and R).
X001 RST 2
EN ENO
Instruction List
d M0
RST
EN ENO
d TN0
3
Instruction
Configuration of
RST
EN ENO
d D0
2. FMOV
FMOV instruction is provided to write a constant (example: K0) at one time. By using this instruction, "0" can 4
Instructions
Explanation of
How to Read
be written to word devices (KnY, KnM, KnS, T, C, D and R) at one time.
X002 FMOV
EN ENO
K0 s d D0 K0 is written to D0 to D99 at one time.
5
K100 n
Basic Instruction
Cautions
1) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
2) Specify same type of devices in the devices specified by
specified by
and . The device number of the device
should be smaller than or equal to the device number of the device specified by .
6
Instructions
Step Ladder
If the device number of the device specified by is larger than the device number of the device
specified by , only one device specified by is reset.
3) When specifying the high-speed counter, ZRST instruction is handled as the 16-bit type, but 32-bit
counters can be specified in and .
However, it is not possible to specify a 16-bit counter in the device specified by and specify a 32-bit 7
counter in the device specified by ; and should be a same type.
Instructions
Applied
Program example
Command input ZRST Command input ZRST
EN ENO
d1 CN180 16-bit counter
EN ENO
d1 CN180
8
Function
and Pulse Catch
Interrupt Function
d2 CN230 32-bit counter d2 CN199
ZRST
EN ENO
d1 CN200
d2 CN230 A
and addresses
between devices
Relationships
4) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
237
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Program examples
1. When using devices in the latch area as non-latch type devices
When the power of the PLC is turned ON or when the PLC mode is changed to RUN, the specified ranges of
bit devices and word devices are reset at one time.
[Structured ladder]
M8002 ZRST
EN ENO
Initial pulse d1 M500 M500 to M599 are reset at one time.
d2 M599
ZRST
EN ENO
d1 CN235 CN235 to CN255 are reset at one time.
d2 CN255 ("0" is written to them, and their contacts are reset.)
ZRST
EN ENO
d1 S500 S500 to S599 are reset at one time.
d2 S599
[ ST ]
ZRST(M8002, M500, M599);
ZRST(M8002, CN235, CN255);
ZRST(M8002, S500, S599);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
7.5.2 DECO
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts numeric data into ON bit.
A bit number which is set to ON by this instruction indicates a numeric value
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
DECO
EN ENO
DECO 16 bits Continuous DECO(EN,s,n,d);
s d
n
DECOP 4
Instructions
Explanation of
How to Read
EN ENO
DECOP 16 bits Pulse DECOP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type 5
Basic Instruction
EN Execution condition Bit
Input Data to be decoded or word device storing data ANY_SIMPLE
variable
Number of bits of device storing the decoding result (n = 1 to 8).
ANY16
(No processing is executed in the case of "n = 0".)
Output
variable
ENO Execution state
Device storing decoding result
Bit
ANY_SIMPLE
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type
X Y M T C S D
.b KnX KnY KnM KnS T C D R
User Unit
U
\G
V Z Modifier K H
Number String
E "
" P
7
Instructions
Applied
zzz z z z z S1 S2 zz z z z
zz z z z z S1 S2 z
z z
S: Refer to "Cautions". 8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
239
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Function and operation explanation
1. 16-bit operation (DECO, DECOP)
One bit among the devices specified by [ to +2n-1] is set to ON according to the value of the device
specified by .
1) When the device specified by is a bit device (1 ≤ n ≤ 8)
n bits (1 ≤ n ≤ 8) of a device specified by is decoded to the device specified by .
- When all bits of the devices specified by are "0", the bit device specified by turns ON.
- When "n" is "8", the bit device specified by occupies maximum 28 = 256 bits.
Command input DECO
EN ENO
Decoded data s d Resulting data
Number of bits n when it is Y, M or S
(1≤n≤8)
Ignored 8 bits when "n" is "8"
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 0 1 1 1 0 when s is D0
128
64
32
16
2n
1
4
2
K8 K7 K6 K5 K4 K3 K2 K1 n
Turns ON when all bits
of s are OFF.
Up to Up to Up to Up to
··· ··· ···
M255 M127 M63 M31
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 When d is M0
M255 M15M14 M13M12M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Up to 256 bits (The number of occupied bits varies depending on the specified "n" value.)
2) When the device specified by is word device (1 ≤ n ≤ 4)
n bits on the low-order side of the device specified by is decoded to the device specified by .
- When all bits of the device specified by are "0", b0 of the word device specified by turns
ON.
- In the case of "n ≤ 3", all of high-order bits of the device specified by become "0" (turn OFF).
Command input DECO
EN ENO
Decoded data s d Resulting data
When it is T, C, D, R, U\G, V, Z, K or H
Number of bits n
(1≤ n≤ 4)
Ignored 4 bits
When "n" is "4"
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 0 1 0 0 0 0 1 0 1 0 0 1 1 1 1 when s is D0
2n
8
1
4
2
K4 K3 K2 K1 n
Turns ON when all bits
of s are OFF.
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 When d is D2
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Up to 16 bits
240
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Cautions
Outline
1) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
2) While the command input is OFF, the instruction is not executed. The activated decode output is held in
the previous ON/OFF status.
3) When "n" is "0", the instruction executes no processing.
2
Instruction List
4) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples 3
Instruction
Configuration of
1. When setting bit devices to ON according to the value of a data register
The value of D0 (whose current value is "14" in this example) is decoded to M0 to M15.
[Structured ladder] [ ST ]
4
M8000 DECO DECO(M8000, D0, K4, M0);
EN ENO
Instructions
Explanation of
How to Read
D0 s d M0
K4 n
4 bits
Ignored (D0 b0 to b3)
(D0 b4 to b15)
5
b15 ··· 7 6 5 4 3 2 1 b0
When the value of
0 0 0 0 1 1 1 0 s
b0 to b3 of D0 is "14"
Basic Instruction
128
64
32
16
2n
8
1
4
K8 K7 K6 K5 K4 K3 K2 K1 2 n=K4
Turns ON when D0 is K0.
Up to Up to Up to Up to
M255 ··· M127 ··· M63 ··· M31
6
Instructions
Step Ladder
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 When d is M0
M255 M15M14 M13M12M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Up to 256 bits (The number of occupied bits varies depending on the specified "n" value.)
• When the value of b0 to b3 of D0 is "14 (=0+2+4+8)", M14 (which is the 15th from M0) becomes "1" (turns 7
ON).
Instructions
Applied
• When the value of D0 is "0", M0 becomes "1" (turns ON).
• When "n" is set to "K4", any one point among M0 to M15 turns ON according to the value of D0 (0 to 15).
• By changing "n" from K1 to K8, D0 can correspond to numeric values from 0 to 255.
However, because the device range of the device specified by
such device range should not be used for another control.
is occupied for decoding accordingly,
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
241
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
2. Turning ON the bit out of word devices according to the contents of bit devices
The value expressed by X000 to X002 is decoded to D0 (X000 and X001 are ON, and X002 is OFF in this
example).
[Structured ladder] [ ST ]
M8000 DECO DECO(M8000, X000, K3, D0);
EN ENO
X000 s d D0
K3 n
X2 X1 X0
0 1 1 s
2n
1
4
2
K3 K2 K1 n
Turns ON when all bits of s are OFF.
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 d =D0
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
All of these bits are "0" (OFF).
• When the values expressed by X000 to X002 are "3 (=1+2+0)", b3 (which is the 4th from b0) becomes "1"
(turns ON).
• When all of X000 to X002 are "0" (OFF), b0 becomes "1" (turns ON).
242
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
7.5.3 ENCO
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction obtains positions in which bits are ON in data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
ENCO
Instruction
Configuration of
EN ENO
ENCO 16 bits Continuous ENCO(EN,s,n,d);
s d
n
ENCOP 16 bits Pulse
EN
ENCOP
ENO
ENCOP(EN,s,n,d);
4
Instructions
Explanation of
How to Read
s d
n
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input Data to be encoded or word device storing data ANY_SIMPLE
variable
Number of bits of device storing the encoding result (n = 1 to 8)
ANY16
(When "n" is "0", no processing is executed.)
Output ENO Execution state Bit
variable Device storing the encoding result ANY16
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 7
zzz z z z z S1 S2 zz z
Instructions
Applied
z z z S1 S2 zz z
z z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
243
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Function and operation explanation
1. 16-bit operation (ENCO, ENCOP)
The 2n bit of the data specified by is encoded, and the result value is stored to the device specified by
.
This instruction converts data into binary data according to a bit position in the ON status.
1) When the device specified by is a bit device (1 ≤ n ≤ 8)
ON bit positions among "2n" bits (1 ≤ n ≤ 8) from the device specified by are encoded to the device
specified by .
- When "n" is "8", the device specified by occupies 28 = 256 bits (which is the maximum value).
- The encoding result of the device specified by is all "0" (OFF) from the most significant bit to the
low-order bit "n".
Command input ENCO
EN ENO
Encoded data s d Resulting data
Number of bits n when it is Y, M or S
(1≤n≤8)
M17 M16 M15 M14 M13 M12 M11 M10 When "n" is 3
0 0 0 0 1 0 0 0
s =M10
7 6 5 4 3) 2 1 0
b15 D10 4 2) 1)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 d
b0
All of them are "0"
2) When the device specified by is a word device (1 ≤ n ≤ 4)
ON bit positions among "2n" bits (1 ≤ n ≤ 4) from a device specified by are encoded to the device
specified by .
- The encoding result of the device specified by is all "0" (OFF) from the most significant bit to the
low-order bit "n".
Command input ENCO
EN ENO
Encoded data s d Resulting data
Number of bits n When it is T, C, D, R, U\G, V or Z
(1≤n≤4)
D0
2n = 8 (when n is 3)
b15 b0
0 1 0 1 0 1 0 1 0 0 0 0 1 0 0 0 s
6 5 4 3) 2 1 0
Ignored 7
b15 4 2) 1)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 d
b0
All of them are "0"
D2
244
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Cautions
Outline
1) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
2) When two or more bits are ON in the data specified by , the low-order side is ignored, and only the
ON position on the high-order side is encoded.
2
3) When the command input is OFF, the instruction is not executed. Activated encode outputs are latched in
Instruction List
the previous ON/OFF status.
4) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
3
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
245
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.4 SUM
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction counts the number of "1" (ON) bits in the data of a specified device.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SUM
SUM 16 bits Continuous EN ENO SUM(EN,s,d);
s d
SUMP
SUMP 16 bits Pulse EN ENO SUMP(EN,s,d);
s d
DSUM
DSUM 32 bits Continuous EN ENO DSUM(EN,s,d);
s d
DSUMP
DSUMP 32 bits Pulse EN ENO DSUMP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable Word device storing the data ANY16 ANY32
Output ENO Execution state Bit
variable Word device storing the result data ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 zz z
S: Refer to "Cautions".
246
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation (SUM ,SUMP)
The number of bits in the ON status in the device specified by is counted, and stored to the device
specified by .
• When all bits are 0 (OFF) in the device specified by , the zero flag M8020 turns ON. 2
Instruction List
Command input SUM
EN ENO Number of bits in the ON status in s ← d
SUM data s d Resulting data
Word data
16-bit data
K21847
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 3
Instruction
Configuration of
Before s 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
execution 9 ← 8 ← 7 ← 6 ← 5 ← 4 ← 3 2 1 (Number of "1" (ON))
K0
d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
K21847
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 4
After s 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
Instructions
Explanation of
How to Read
execution
32 16 8 4 2 1
K9
d 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
2. 32-bit operation (DSUM, DSUMP)
The number of bits in the ON status in the device specified by is counted, and stored to the device 5
specified by .
Basic Instruction
• The number of bits in the ON status is stored in the device specified by , and K0 is stored in +1.
• When all bits are 0 (OFF) in the device specified by , the zero flag M8020 turns ON.
Command input DSUM Number of bits in the ON status in [ s +1, s ]← d d
+1,
Label1 *1
EN
s
ENO
d Label2 *2 K0 is written.
6
Instructions
Step Ladder
*1 This defines the data that executes SUM_2 or the device number storing the source data.
*2 This defines the device that stores the result of executing SUM_2.
Word data
b31 ···
32-bit data
b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
7
Instructions
Applied
K21847
Before s 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
execution (Number of "1" (ON)) 9 ← 8 ← 7 ← 6 ← 5 ← 4 ← 3 2 1
K0 K0
d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
b31 ··· b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 8
K21847
Function
and Pulse Catch
Interrupt Function
After s 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
execution
32 16 8 4 2 1
K0 K9
d 0 0 0 0 0 0 0 0 0 00 00 00 01 0 0 01 0 1 0 0 1
A
and addresses
between devices
Relationships
247
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
3. Operation result of the device specified by according to the value specified by (in
16-bit operation)
M8020
Bit device Word device Zero flag
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 Decimal Hexadecimal
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000 0 ON
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0001 1 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2 0002 1 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 0003 2 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 4 0004 1 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 5 0005 2 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 6 0006 2 OFF
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 7 0007 3 OFF
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 8 0008 1 OFF
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 9 0009 2 OFF
0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 10 000A 2 OFF
0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 11 000B 3 OFF
OFF
...
...
...
...
1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 -5 FFFB 15 OFF
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 -4 FFFC 14 OFF
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 -3 FFFD 15 OFF
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 -2 FFFE 15 OFF
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -1 FFFF 16 OFF
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) While the command input is OFF, the instruction is not executed. The output of the number of bits in the
ON status is latched in the previous status.
3) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
Program examples
When X000 is ON, the number of bits in the ON status in D0 is counted, and stored to D2.
[Structured ladder] [ ST ]
X000 SUM SUM_2(X000, D0, D2);
EN ENO
The number of "1" in D0 is stored to D2.
D0 s d D2
D 0 = K0 D 2 = K0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
M8020=ON Zero flag
D 0 = K21847 D 2 = K9
32 16 8 4 2 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
M8020=OFF Zero flag
248
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
7.5.5 BON
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction checks whether a specified bit position in a device is ON or OFF.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
BON
Instruction
Configuration of
EN ENO
BON 16 bits Continuous BON(EN,s,n,d);
s d
n
EN
BONP
ENO
4
BONP 16 bits Pulse BONP(EN,s,n,d);
Instructions
Explanation of
How to Read
s d
n
DBON
EN ENO
DBON 32 bits Continuous
s d
DBON(EN,s,n,d);
5
n
Basic Instruction
DBONP
EN ENO
DBONP 32 bits Pulse DBONP(EN,s,n,d);
s d
n
6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input
EN Execution condition
Word device storing the data
Bit
ANY16 ANY32
7
Instructions
Applied
variable
Bit position to be checked
ANY16
[n=0 to 15 (16-bit instruction), n=0 to 31 (32-bit instruction)]
Output ENO Execution state Bit
variable Bit device to be driven Bit
8
3. Applicable devices
Function
and Pulse Catch
Interrupt Function
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z z z z z z z S2 S3 zz z z z A
and addresses
between devices
Relationships
zz z S1 z
z S2 z z
S: Refer to "Cautions".
249
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Function and operation explanation
1. 16-bit operation(BON, BONP)
The status (ON or OFF) of the bit "n" in the device specified by is output to the device specified by .
[When the bit "n" is ON, the device specified by is set to ON. When the bit "n" is OFF, the device
specified by is set to OFF.]
• When a constant (K) is specified as , it is automatically converted into the binary format.
Command input BON
EN ENO
SUM data s d Resulting data s d =ON/OFF status of bit "n"
Bit position n
(n=K0 to K15)
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 0 1 0 0 0 0 1 0 1 0 0 1 1 1 1
K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 K2 K1 K0 n d Bit device
n=5
0 (OFF)
n=8
1 (ON)
2. 32-bit operation(DBON, DBONP)
The status (ON or OFF) of the bit "n" in the device specified by is output to the device specified by .
[When the bit "n" is ON, the device specified by is set to ON. When the bit "n" is OFF, the device
specified by is set to OFF.]
• When a constant (K) is specified as , it is automatically converted into the binary format.
Command input DBON
EN ENO
Label 1*1 s d Resulting data [ s +1, s ] d =ON/OFF status of bit "n"
Bit position n
(n=K0 to K31)
*1 This defines the data that executes DBON or the device number storing the source data.
s +1, s
b31 b30 b29 ··· b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 0 1 ··· 1 1 1 0 1 0 0 0 0 1 0 1 0 0 1 1 1 1
K31 K30 K29 ··· K17 K16 K15 K14 K13 K12 K11 K10 K9 K8 K7 K6 K5 K4 K3 K2 K1 K0 n
d Bit device
n=5
0 (OFF)
n=29
1 (ON)
Cautions
1) Some restrictions to applicable devices
S1:Applicable only to the FX3U and FX3UC PLCs. Not indexed (V, Z).
S2:The FX3U, FX3UC and FX3G PLCs only are applicable.
S3:The FX3U and FX3UC PLCs only are applicable.
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
250
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Program examples
Outline
When the bit 9 (n=9) in D10 is "1" (ON), M0 is set to "1" (ON).
[Structured ladder] [ ST ]
X000 BON BON(X000, D10, K9, M0);
EN
s
ENO
d
2
D10 M0
Instruction List
K9 n
D 10
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 M 0=ON
b15 b8 b7
n=9
b0
3
Instruction
Configuration of
0 0 1 0 1 0 0 0 0 0 1 0 1 0 1 0 M 0=OFF
b15 b0
n=9
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
251
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.6 MEAN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction obtains the mean value of data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
MEAN
EN ENO
MEAN 16 bits Continuous MEAN(EN,s,n,d);
s d
n
MEANP
EN ENO
MEANP 16 bits Pulse MEANP(EN,s,n,d);
s d
n
DMEAN
EN ENO
DMEAN 32 bits Continuous DMEAN(EN,s,n,d);
s d
n
DMEAN_P
EN ENO
DMEAN_P 32 bits Pulse DMEAN_P(EN,s,n,d);
s d
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Head word device storing data to be averaged ANY16 ANY32
variable
Number of data to be averaged (n=1 to 64) ANY16
Output ENO Execution state Bit
variable Word device storing the mean value result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z
z z z z z z S1 S2 zz z
z S1 z z
S: Refer to "Cautions".
252
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation (MEAN, MEANP)
The mean value of "n" 16-bit data from the device specified by is stored to the device specified by .
• The sum is obtained as algebraic sum, and divided by "n".
• The remainder is ignored. 2
Instruction List
Command input MEAN
EN ENO
s + s +1+ ····· + s +n–1
Mean data s d Resulting data d
n
n
Number of
pieces of data
3
2. 32-bit operation (DMEAN, DMEANP)
Instruction
Configuration of
The mean value of "n" 32-bit data from the device specified by is stored to the device specified by .
• The sum is obtained as algebraic sum, and divided by "n".
• The remainder is ignored.
Command input DMEAN 4
EN ENO
Instructions
Explanation of
How to Read
Label 1*1 s d Label 2*2
Number of n
pieces of data
*1 This defines the head device number that stores the data to be averaged.
*2 This defines the device that stores the mean data.
[ s +1, s ]+[ s +3, s +2] + ····· + [{ s +n × 2–1}], [{ s +n × 2–2}]
5
Basic Instruction
[ d +1, d ]
n
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. 6
A 32-bit counter can be specified directly as it is a 32-bit long device.
Instructions
Step Ladder
Use a global label to specify a device.
2) The FXU PLC of V2.30 or earlier does not support 32-bit instructions.
3) When a device number is exceeded, "n" is handled as a smaller value in the possible range.
4) Some restrictions to applicable devices 7
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
Instructions
Applied
S2:The FX3U and FX3UC PLCs only are applicable.
Error
When "n" is any value outside the range from "1" to "64", an operation error (M8067) is caused.
8
Program examples
Function
and Pulse Catch
Interrupt Function
The data of D0, D1 and D2 are summed, divided by "3", and then stored to D10.
[Structured ladder]
X000 MEAN
EN
s
ENO
d
(D 0) + (D 1) + (D 2)
(D 10)
A
D0 D10 3
and addresses
between devices
Relationships
K3 n
[ ST ]
MEAN(X000, D0, K3, D10);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.7 ANS
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction sets a state relay as an annunciator.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ANS
EN ENO
ANS 16 bits Continuous ANS(EN,s,m,d);
s d
m
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Timer for evaluation time (100 ms timer) ANY16
variable
Evaluation time m=1 to 32,767(unit: 100 ms) ANY16
Output ENO Execution state Bit
variable Annunciator device to be set Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System User Digit Specification System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 z
z S3 z z
S2 z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation
When the command input remains ON for equivalent to or longer than the evaluation time [ m × 100 ms, timer
specified by ], the device specified by is set.
When the command input remains ON for less than the evaluation time [m × 100 ms] and then turns OFF, the
current value of the timer for evaluation specified by is reset and the device specified by is not set.
When the command input turns OFF, the timer for evaluation is reset.
Command input
Command input ANS
EN ENO d
Timer number s d Annunciator device
Evaluation time m Less than Equivalent to or longer
evaluation time than evaluation time
(m 100 ms) (m 100 ms)
254
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Related device
Outline
Device Name Description
M8049 Enable annunciator When M8049 is set to ON, M8048 and D8049 are valid.
M8048 Annunciator ON When M8049 is ON and one of the state relays S900 to S999 is ON, M8048 turns ON.
D8049
Smallest state relay
number in ON status
Among S900 to S999, the smallest state relay number in the ON status is stored. 2
Instruction List
Cautions
Some restrictions to applicable devices
S1:T0 to T199
S2:S900 to 999
S3:The FX3U, FX3UC and FX3G PLCs only are applicable. 3
Instruction
Configuration of
Program examples
1. Displaying a fault number using an annunciator
When the program for external fault diagnosis shown below is created and the content of D8049 (smallest
state relay number in the ON status) is monitored, the smallest state relay number in the ON status from S900 4
to S999 is displayed.
Instructions
Explanation of
How to Read
If two or more faults are present at the same time, the next smallest fault number is displayed after the fault of
the smallest fault number is cleared.
[Structured ladder]
0
M8000 M8049
When M8049 turns ON, monitoring becomes valid.
5
Basic Instruction
RUN monitor
Y005 X000 ANS
3 EN ENO
Forward Forward T0 s d S900 If the forward end detection input X000 does not turn
movement end ON within 1 second after the forward movement output
m
X001 X002
K10
ANS
Y005 is driven, S900 turns ON. 6
Instructions
Step Ladder
12 EN ENO If both the upper limit input X001 and the lower limit
Upper Lower T1 s d S901 input X002 are OFF for 2 seconds or more due to
limit limit K20 m a DOG error, S901 turns ON.
X003 X004 ANS
21
Continuous Cycle T2
EN
s
ENO
d S902
The switch X004 is set to ON in one operation cycle of
the machine. If the switch X004 is not set to ON while 7
Instructions
Applied
m the continuous operation mode input X003 is ON in the
K100
machine whose tact time is less than 10 seconds,
X005 Y005 S902 turns ON.
30
Forward movement
32
M8048 Y006
When one among S900 to S999 turns ON, M8048 8
Fault display turns ON and the fault display output Y006 turns ON.
Function
and Pulse Catch
Interrupt Function
Annunciator ON
X007 ANRP A state relay which was set to ON by the external fault
34 EN ENO diagnosis program is set to OFF by the reset button
Reset X007. Every time X007 is set to ON, an operation
state relay in the ON status with the smallest device
[ ST ] number is reset (set to OFF) in turn. A
and addresses
between devices
Relationships
M8049:= M8000;
ANS(Y005 AND NOT X000, T0, K10, S900);
ANS(NOT X001 AND NOT X002,T1, K20, S901);
ANS(X003 AND NOT X004, T2, K100, S902);
Y005:=X005;
Y006:=M8048;
ANRP(X007);
255
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.8 ANR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction resets an annunciator in the ON status with the smallest number.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ANR 16 bits Continuous
ANR ANR(EN);
EN ENO
ANRP 32 bits Pulse ANRP ANRP(EN);
EN ENO
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
- There are no applicable devices.
Function and operation explanation
1. 16-bit operation (ANR, ANRP)
When the command input turns ON, a state relay working as annunciator in the ON status is reset.
• If two or more state relays are ON, the state relay with the smallest number is reset.
When the command input is set to ON again, the state relay with the next smallest number is reset among
state relays working as annunciators in the ON status.
Command input ANR
EN ENO
Related device
Device Name Description
M8049 Enable annunciator When M8049 is set to ON, M8048 and D8049 are valid.
M8048 Annunciator ON When M8049 is ON and one of the state relays S900 to S999 is ON, M8048 turns ON.
Smallest state relay
D8049 Among S900 to S999, the smallest state relay number in the ON status is stored.
number in ON status
256
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Cautions
Outline
1. Execution in each operation cycle
• When ANR instruction is used, annunciators in the ON status are reset in turn in each operation cycle.
• When ANRP instruction is used, an annunciator in the ON status is reset only in one operation cycle (only
once). 2
Instruction List
Program examples
Refer to ANS instruction
→ For a program example, refer to Section 7.5.7.
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
257
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.9 SQR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction obtains the square root.
The DESQR instruction obtains the square root in floating point operation.
→ For DESQR instruction, refer to Section 7.12.15.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SQR
SQR 16 bits Continuous EN ENO SQR(EN,s,d);
s d
SQRP
SQRP 16 bits Pulse EN ENO SQRP(EN,s,d);
s d
DSQR
DSQR 32 bits Continuous EN ENO DSQR(EN,s,d);
s d
DSQRP
DSQRP 32 bits Pulse EN ENO DSQRP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable Word device storing data whose square root is obtained. ANY16 ANY32
Output ENO Execution state Bit
variable Data register storing the square root operation result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System User Digit Specification Index Pointer
type User Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S1 z z z
z S1 S1 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation (SQR, SQRP)
The square root of the data stored in the device specified by is calculated, and stored to the device
specified by ).
Command input SQR 2
Instruction List
EN ENO s d
Root data s d Resulting data
2. 32-bit operation (DSQR, DSQRP)
The square root of the data stored in the device specified by is calculated, and stored to the device
specified by ). 3
Instruction
Configuration of
Command input DSQR
EN ENO s +1, s d +1, d
Label 1*1 s d Label2*2
*1 This defines the device that stores the data whose square root is obtained.
*2 This defines the device that stores the square root operation result.
4
Instructions
Explanation of
How to Read
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device. 5
2) The obtained square root is an integer because the decimal point is ignored.
Basic Instruction
When the decimal point is ignored, M8021 (borrow flag) turns ON.
3) When the calculated value is true "0", M8020 (zero flag) turns ON.
4) Some restrictions to applicable devices
S1:The FX3U and FX3UC PLCs only are applicable.
6
Instructions
Step Ladder
Program examples
The square root of D10 is stored to D12.
The value of D10 is "100".
[Structured ladder]
7
X000 SQR D 10 D 12
Instructions
Applied
EN ENO
D10 s d D12 = 100 10
[ ST ]
SQR(X000, D10, D12);
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
259
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
7.5.10 FLT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts a binary integer into a binary floating point (real number).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FLT
FLT 16 bits Continuous EN ENO FLT(EN,s,d);
s d
FLTP
FLTP 16 bits Pulse EN ENO FLTP(EN,s,d);
s d
DFLT
DFLT 32 bits Continuous EN ENO DFLT(EN,s,d);
s d
DFLTP
DFLTP 32 bits Pulse EN ENO DFLTP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable Data register storing binary integer ANY16 ANY32
Output ENO Execution state Bit
variable Data register storing binary floating point (real number) ANY_SIMPLE
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System User Digit Specification Index Pointer
type User Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 z
z S1 S2 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation (FLT, FLTP)
The binary integer data of the device specified by is converted into binary floating point (real number),
and stored to the device specified by .
Command input FLT s ( d +1, d )
2
Instruction List
EN ENO
Binary integer Binary floating point (real number)
Binary data s d Label 1*1
*1 This defines the device that stores the binary floating point data.
2. 32-bit operation (DFLT, DFLTP) 3
The binary integer data of the device specified by is converted into binary floating point (real number),
Instruction
Configuration of
and stored to the device specified by .
Command input DFLT
EN ENO ( s +1, s ) ( d +1, d )
Label 1*1 s d Label 2*2 Binary integer Binary floating point (real number)
4
*1 This defines the device that stores the binary integer data.
Instructions
Explanation of
How to Read
*2 This defines the device that stores the binary floating point data.
Related instruction
Instruction Description
INT It is inverse of FLT instruction, and converts binary floating point into binary integer. 5
Basic Instruction
Related devices
→ For the method of the zero and borrow flags, refer to Section Section 1.3.4.
Device Name Description
M8020 Zero flag Turns ON when the value is true "0". 6
M8021 Borrow flag Turns ON when the floating point is rounded down..
Instructions
Step Ladder
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device. 7
Use a global label to specify a device.
Instructions
Applied
2) The FX3G PLC of V1.10 or later supports the instruction.
3) The FXU PLC of V3.07 or later supports the instruction.
4) The value of K or H specified in each instruction for binary floating point (real number) operation is
automatically converted into binary floating point (real number). It is not necessary to convert such a 8
constant by FLT instruction.
Function
and Pulse Catch
Interrupt Function
(K and H cannot be specified in RAD, DEG, EXP and LOGE instructions.)
5) Some restrictions to applicable devices
S1:The FX3U, FX3UC and FX3G PLCs only are applicable.
S2:The FX3U and FX3UC PLCs only are applicable.
A
and addresses
between devices
Relationships
261
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
Program examples
1. Arithmetic operations by binary floating point operations
The sequence program shown below is constructed as follows:
1) Calculation example
× K34.5 (D 11, D 10) Binary floating point
(D 0) (X017 to X010) operation
16-bit binary 2-digit BCD 6)
7) (D 13, D 12)
1) 2) 5) 4) Decimal floating point
operation for monitoring
(D 21, D 20) (D 22) (D 27, D 26) 8)
(D 15, D 14)
Binary floating point BIN Binary floating point 32-bit binary integer
operation operation
3)
(D 25, D 24)
Binary floating point
operation
(D 29, D 28)
Binary floating point
operation
262
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.5 Data Operation
1
2) Program
Outline
[Structured ladder]
M8000 1) FLT
(D 0) (D21, D20)
EN ENO BIN Binary floating point operation
2
s d *1
D0 Var_FLT1
BIN
Instruction List
(X017 to X010) (D22)
2) EN ENO BCD BIN
K2X010 s d D22
FLT
(D22) (D25, D24)
3) EN ENO BIN Binary floating point operation
D22 s d Var_FLT2*2
3
DEDIV
Instruction
Configuration of
4) EN ENO K345 K 10 (D27, D26)
Var_EDIV1*3 s1 d Var_EDIV3*5 Binary floating point operation
Var_EDIV2*4 s2
DEDIV
5) EN ENO (D21, D20) (D25, D24) (D29, D28) 4
Var_EDIV4*6 s1 d Var_EDIV6*8 Binary floating point division Binary floating point
Instructions
Explanation of
How to Read
Var_EDIV5*7 s2 operation
DEMUL
6) EN ENO
(D29, D28) × (D27, D26) (D11, D10)
Var_EMUL1*9 s1 d Var_EMUL3*11 Binary floating point multiplication
Var_EMUL2*10 s2 5
Basic Instruction
DEBCD
7) EN ENO (D11, D10) (D13, D12)
Binary floating point operation Decimal floating point
Var_EBCD1*12 s d Var_EBCD2*13
operation for monitoring
DINT
(D11, D10) (D15, D14)
8)
Var_DINT1*14
EN
s
ENO
d Var_DINT2 *15
Binary floating point operation 32-bit binary integer 6
Instructions
Step Ladder
[ ST ]
FLT(M8000, D0, Var_FLT1*1 );
BIN(M8000, K2X010, D22);
FLT(M8000, D22, Var_FLT2*2 );
DEDIV(M8000, Var_EDIV1*3 , Var_EDIV2*4 , Var_EDIV3*5 ); 7
DEDIV(M8000, Var_EDIV4*6 , Var_EDIV5*7 , Var_EDIV6*8 );
Instructions
Applied
DEMUL(M8000, Var_EMUL1*9 , Var_EMUL2*10 , Var_EMUL3*11 );
DEBCD(M8000, Var_EBCD1*12 , Var_EBCD2*13 );
DINT(M8000, Var_DINT1*14 , Var_DINT2*15 );
*1
*2
Var_FLT1 is a global label and is defined as D20.
Var_FLT2 is a global label and is defined as D24. 8
Function
and Pulse Catch
Interrupt Function
*3 Var_EDIV1 is a global label and is defined as K345.
*4 Var_EDIV2 is a global label and is defined as K10.
*5 Var_EDIV3 is a global label and is defined as D26.
*6 Var_EDIV4 is a global label and is defined as D20.
*7 Var_EDIV5 is a global label and is defined as D24.
*8 Var_EDIV6 is a global label and is defined as D28.
*9 Var_EMUL1 is a global label and is defined as D28. A
*10 Var_EMUL2 is a global label and is defined as D26.
and addresses
between devices
Relationships
*11 Var_EMUL3 is a global label and is defined as D10.
*12 Var_EBCD1 is a global label and is defined as D10.
*13 Var_EBCD2 is a global label and is defined as D12.
*14 Var_DINT1 is a global label and is defined as D10.
*15 Var_DINT2 is a global label and is defined as D14.
263
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
7.6 High Speed Processing
7.6.1 REF
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction immediately outputs the latest input (X) information or the current output (Y) operation result
in the middle of a sequence program operation.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
REF
EN ENO
REF 16 bits Continuous REF(EN, d, n);
d
n
REFP
EN ENO
REFP 16 bits Pulse REFP(EN, d, n);
d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Bit device (X or Y) to be refreshed Bit
Input variable
Number of bit devices to be refreshed (multiple of 8 in the range from 8 to
ANY16
256)
Output variable ENO Execution state Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Real Character
System User Digit Specification Index Constant Pointer
type User Unit Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 S2
S3 S3
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
Function and operation explanation
Outline
1. 16-bit operation(REF, REFP)
1) When refreshing outputs (Y)
"n" points are refreshed from the output of the device specified by . ("n" must be a multiple of 8.)
REF
2
Command input
Instruction List
EN ENO
Head device d
number
Number of n
points
* Refer to "Caution" for the head device number and the number of points.
- When this instruction is executed, the output latch memory is refreshed to the output status in the 3
specified range.
Instruction
Configuration of
Image memory
output (Y)
REF instruction
(executed)
END instruction
processing (output) 4
Instructions
Explanation of
How to Read
Output refresh
REF instruction ON
+ END processing
ON ON
Only END
processing Improved response delay time Improved response delay time
2) When refreshing inputs (X)
5
Basic Instruction
"n" points are refreshed from the input of the device specified by . ("n" must be a multiple of 8.)
Command input REF
EN ENO
Head device d
number
Number of
points
n
6
Instructions
Step Ladder
* Refer to "Caution" for the head device number and the number of points.
- If the input information is turned ON approximately 10 ms (response delay time of the input filter) before
the instruction is executed, the input image memory turns ON when the instruction is executed.
- The response delay time of the input filter can be changed.
→ For details, refer to "what should be understood before using the REF instruction" 7
described later.
Instructions
Applied
Does not turn ON.
Input terminal
5ms 20ms
Input signal (X) ON 8
10ms
Function
and Pulse Catch
Interrupt Function
10ms 10ms
Filter time
REF instruction (executed)
END instruction (input)
processing
Input refresh ON
A
REF instruction + END
and addresses
between devices
Relationships
instruction processing
Only END instruction ON
processing
Improved response delay time
265
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Cautions
1) When setting the specified head device number "d", make sure that the least significant digit number is
"0" such as "X000, X010, X020, ..." or "Y000, Y010, Y020, ...".
2) The FX0, FX0S or FX0N PLC does not support the instructions of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Some restrictions to applicable devices
S1: X000, X010, X020 ....Up to the final input number (The last digit number must be "0".)
S2: Y000, Y010, Y020 ....Up to the final output number (The last digit number must be "0".)
S3: Set a multiple of "8" to the number of refresh points "n", such as K8(H8), K16(H10), ..., K256 (H100).
Any number other than the above generates an error.
PLC n
FX3U, FX3UC, FX3G K8(H8), K16(H10), ..., K256(H100)
FX1S, FX1N, FX2N, FX1NC, FX2NC K8(H8), K16(H10), ..., K256(H100)
FX0, FX0S K8(H8) or K16(H10)
FX0N K8(H8), K16(H10), ..., K128(H80)
FXU, FX2C K8(H8), K16(H10), ..., K256(H100)
Program examples
1. When refreshing inputs
Only X010 to X017 (8 points in total) are refreshed.
[Structured ladder] [ST]
X000 REF
EN ENO REF(X000,X010,K8);
X010 d
K8 n
2. When refreshing outputs
Y000 to Y007, Y010 to Y017 and Y020 to Y027 (24 points in total) are refreshed.
[Structured ladder] [ST]
X001 REF
EN ENO REF(X001,Y000,K24);
Y000 d
K 24 n
What should be understood before using the REF instruction
1. Changing the input filter
The input filter value is determined by the contents of D8020 (initial value: 10 ms).
Use the MOV instruction, etc. to adjust the value in D8020, which represents the input filter value.
→ For details, refer to "FX Structured Programming Manual (Device & Common)."
266
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
2. Output response time
Outline
After the REF instruction is executed, the output (Y) sets the output signal to ON after the response time
shown below.
→ For details, refer to the respective PLC Hardware Edition manuals.
1) Relay output type
The output contact is activated after the response time of the output relay. 2
- Y000 and higher: Approximately 10 ms
Instruction List
2) Transistor output type
a) For FX3U and FX3UC (D, DSS) PLCs
- Y000, Y001, Y002: 5 μs or less (load current = 10 mA or more, 5 to 24 V DC)
- Y003 and higher: 0.2 ms or less (load current = 100 mA, 24 V DC)
b) For FX3UC-32MT-LT (-2) PLC 3
Instruction
Configuration of
- Y000, Y001, Y002, Y003: 5 μs or less (load current = 10 mA or more, 5 to 24 V DC)
- Y004 and higher: 0.2 ms or less (load current = 100 mA, 24 V DC)
c) For FX3G PLC (14-point, 24-point types)
- Y000, Y001: 5 μs or less (load current = 10 mA or more, 5 to 24 V DC)
- Y002 and higher: 0.2 ms or less (load current = 100 mA, 24 V DC)
d) For FX3G PLC (40-point, 60-point types) 4
Y000, Y001, Y002: 5 μs or less (load current = 10 mA or more, 5 to 24 V DC)
Instructions
Explanation of
How to Read
-
- Y003 and higher: 0.2 ms or less (load current = 100 mA, 24 V DC)
e) For FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs
- Y000, Y001: 15 μs to 30 μs or less
- Y002 and higher: 0.2 ms or less
f) For FX0, FX0S, FX0N, FXU and FX2C PLCs 5
- Y000 and higher: 0.2 ms or less
Basic Instruction
3. When using the REF instruction between FOR and NEXT instructions or between a label
(with a lower step number) and CJ instruction (with a higher step number)
Inputs and outputs can be refreshed in a routine program even when the input information or immediate
output is required in the middle of a routine program during control.
6
4. When using the input interrupt (I) function
Instructions
Step Ladder
When executing interrupt processing accompanied by I/O operations, I/O refresh can be executed in the
interrupt routine to receive the latest input (X) information and give the immediate output (Y) of the operation
result so that dispersion caused by the operation time is improved.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
267
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.2 REFF
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The digital input filter time of the inputs can be changed using this instruction or D8020.
Using this instruction, the status of inputs can be refreshed at an arbitrary step in the program for the
specified input filter time, and then transferred to the image memory.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
REFF
REF 16 bits Continuous EN ENO REF(EN, n);
n
REFFP
REFP 16 bits Pulse EN ENO REFP(EN, n);
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input variable
Digital input filter time (1 ms increment) ANY16
Output variable ENO Execution state Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System User Digit Specification Index Pointer
type User Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 S2
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation(REFF, REFFP)
The image inputs below are refreshed at the digital input filter time [n × 1 ms].
PLC Input
X000 to X017
FX3U, FX3UC
X000 to X007 in the FX3U-16M , and FX3UC-16M
X000 to X017
FX2N, FX2NC
X000 to X007 in the 16-input basic units
FXU, FX2C X000 to X007
Command input REFF
EN ENO
Digital input n
filter time
K0 to K60 (Filter constant from 0 to 60 ms)
268
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
• When the input turns ON "n × 1 ms" before the instruction is executed, the input image memory is set to
Outline
ON. When the input turns OFF "n × 1 ms" before the instruction is executed, the input image memory is set
to OFF.
• When the command input is ON, the REFF instruction is executed in each operation cycle.
• When the command input is OFF, the REFF instruction is not executed, and the input filter uses the set
value of D8020 (which is the value used during input processing). 2
Instruction List
Cautions
1. Function of the input filter
The filter time of the digital filter can be changed in 1 ms units within the range from 0 to 60 ms using
instructions. When the filter time is set to "0", the input filter value is as follows. 3
1) For FX3U and FX3UC PLCs
Instruction
Configuration of
Input number Input filter value when set to "0"
X000 to X005 5μs*2
X006, X007 50μs
X010 to X017 *3 200μs*3 4
Instructions
Explanation of
How to Read
*1. X000 to X007 in the FX3U-16M
, and FX3UC-16M
*2. When setting the input filter time to "5 μs", perform the following actions.
- Make sure that the wiring length is 5 m or less.
- Connect a bleeder resistor of 1.5 kΩ (1 W or more) to the input terminal, and make sure that the load current in the
open collector transistor output of the external equipment is 20 mA or more including the input current of the main
unit. 5
Basic Instruction
*3. The filter time is fixed to 10 ms in X010 to X017 when the FX3U-16M
or FX3UC-16M
is used.
2) For FX2N and FX2NC PLCs
Input number Input filter value when set to "0"
X000, X001 20μs
X002 to X017 50μs 6
Instructions
Step Ladder
3) For FXU and FX2C PLCs
Input number Input filter value when set to "0"
X000 to X007 50μs
2. Some restrictions to applicable devices
S1: Applicable to the FX3U and FX3UC PLCs only.
7
Instructions
Applied
S2: Set the filter time within the range of K0(H0) to K60(H3C) [0 to 60 ms].
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Program examples
1. Relationship between the program and the filter time
[ Structured ladder ]
X010 REFF When X010 is ON
EN ENO The image memory is refreshed Input processing
K1 n with an input filter of 1 ms. Set value of D8020
Sequence (Initial value: 10 ms)
X000 program
REFF instruction
X001 1 ms
REFF instruction
M8000 REFF
The image memory is refreshed 20ms
EN ENO
with an input filter of 20 ms. END
K 20 n
X000 Output processing
The image memory is refreshed
END
with the input filter value set in D8020.
[ST]
REFF(X010,K1);
REFF(M8000,K20);
END
What should be understood before using REFF instruction
Generally, a C-R filter of approximately 10 ms is provided for inputs in PLCs as countermeasures against
chattering and noise at the input contacts.
A digital filter is provided for some inputs (*1). The digital filter value can be changed within the range from 0
to 60 ms using instructions.
1. How to change the digital filter (executing END instruction)
The digital filter initial value (10 ms) is set in special data register D8020.
By changing this value using the MOV instruction, etc., the input filter value for X000 to X017*2 which is used
during execution of the END instruction can be changed.
REFF instruction D8020
When the When the END
command is ON instruction is executed
Digital filter
Input terminal*1
Initial value: 10 ms
Input image
memory
C-R filter
Input terminal
Fixed to 10 ms
*1. Where a digital filter is used on an input terminal, refer to the descriptions
on the functions and operations.
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1
2. Instruction in which the digital filter is automatically changed
Outline
Regardless of the change in the filter time executed by the REFF instruction, when the following functions and
instructions are executed, the input filter value is automatically changed (as shown in the caution).
However, if the digital filter is used in any other functions or instructions than the ones listed, the digital filter
uses the time set in D8020. As a result, the program will not run correctly if the ON or OFF duration of the
corresponding input signal is less than the input filter time. 2
• Input of interrupt pointer specified in the input interrupt function
Instruction List
• Input used in a high speed counter
• Input used in the SPD instruction
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
271
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.3 MTR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads matrix input as 8-point input × "n" output (transistor) in the time division method.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
MTR
EN ENO
MTR 16 bits Continuous MTR(EN, s, n, d1, d2);
s d1
n d2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device (X) number of matrix signal input
Input variable X000, X010, X020, ..., final input X number (Only "0" is allowed in the Bit
least significant digit of device numbers)
Number of columns in matrix input (K2 to K8/H2 to H8) ANY16
ENO Execution state Bit
Head device (Y) number of matrix signal output
Y000, Y010, Y020, ..., final output Y number (Only "0" is allowed in the Bit
least significant digit of device numbers.)
Output variable
Head bit device (Y, M or S) number of ON output destination
Y000, Y010, Y020, ..., final Y number, M000, M010, M020, ... , final M
Bit
number or S000, S010, S020, ..., final S number (Only "0" is allowed in
the least significant digit of device numbers.)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System User Digit Specification Index Pointer
type User Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z z
z
z z z
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Function and operation explanation
Outline
1. 16-bit operation(MTR)
An input signal of 8 points × "n" columns is controlled in the time division method using 8 inputs of the device
specified by and "n" transistor outputs of the device specified by . Each column is read in turn, and
then output to the device specified by . 2
Instruction List
Command input
(normally ON) MTR
EN ENO
Input number s d1 Output number
Number of n d2 ON output destination
columns
For each output, the I/O processing is executed immediately in turn in interrupt at every 20 ms under
consideration of the input filter response delay of 10 ms.
3
Instruction
Configuration of
The figure below shows an example of the FX3U series main unit (sink input / sink output). For the wiring,
refer to the manual of the PLC used.
Diode
Command
d2 +10
d2 +11
d2 +12
d2 +13
d2 +14
d2 +15
d2 +16
d2 +17
0.1A(50V)
contact
2nd column
1st column input is received.
4
Instructions
Explanation of
How to Read
d1 1) 3) 5)
d2 +1
d2 +2
d2 +3
d2 +4
d2 +5
d2 +6
d2 +7
2nd column input is received.
d2
1st column
d1 +1 2) 4) 6)
20ms 5
24V 0V S/S s s +1 s +2 s +3 s +4 s +5 s +6 s +7
Basic Instruction
M8029
Input (X) [Sink] (Execution complete)
PLC Output (Y) [Sink]
COM d1 d1 +1 d1 +2 d1 +3 d1 +4 d1 +5 d1 +6 d1 +7
6
Instructions
Step Ladder
"n" points are occupied.
Related devices
Device Name Description 7
Instructions
Applied
Instruction execution
M8029 Turns ON after the first cycle operation
complete
Cautions
1. Number of occupied devices 8
Function
and Pulse Catch
Interrupt Function
1) Eight input points are occupied from the input device number specified in .
2) "n" output points are occupied from the output device number specified in .
When specifying the output in , make sure that "n" output numbers specified in does not
overlap the output specified in .
2. Wiring
A
and addresses
between devices
Relationships
One diode of 0.1A/50V is required for each switch.
3. Output format
Use the transistor output format.
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(Basic & Applied Instruction) 7.6 High Speed Processing
Program examples
n = Three outputs (Y020, Y021 and Y022) are set to ON in turn repeatedly.
Every time an output is set to ON, eight inputs in the 1st, 2nd and 3rd columns are received in turn repeatedly,
and stored to M30 to M37, M40 to M47, and M50 to M57 respectively.
In this program example, the FX3U series main unit (sink input / sink output) is used. For the wiring, refer to
the manual of the PLC used.
[Structured ladder ] [ST]
M0 MTR
EN ENO MTR(M0,X020,K3,Y020,M30);
X020 s d1 Y020
K3 n d2 M30
M0
Diode
M 50
M 51
M 52
M 53
M 54
M 55
M 56
M 57
0.1A(50V) 1st column input is received.
3rd column
Y020 1) 4)
X021 X022 X023 X024 X025 X026 X027
2nd column input is received.
Diode
M 40
M 41
M 42
M 43
M 44
M 45
M 46
M 47
0.1A(50V) Y021 2) 5)
3rd column input is received.
2nd column
X021 X022 X023 X024 X025 X026 X027 Y022 3) 6)
Diode 20ms
M 30
M 31
M 32
M 33
M 34
M 35
M 36
M 37
0.1A(50V) M8029
(Execution complete)
1st column
24V 0V S/S X020 X021 X022 X023 X024 X025 X026 X027
Input (X) [Sink]
PLC Output (Y) [Sink]
COM Y020 Y021 Y022 Y023 Y024 Y025 Y026 Y027
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Operation and cautions for MTR instruction
Outline
1. Command input
1) Setting the command input to normally ON
For the MTR instruction, set the command input to normally ON.
M 2
(Normally ON) MTR
Instruction List
EN ENO
X020 s d1 Y040
K8 n d2 M0
2. Input numbers used in MTR instruction
1) Inputs available in MTR instruction
3
Instruction
Configuration of
Use inputs X020 and later under normal conditions.
(X010 and later for 16-point type main unit)
2) When using the inputs X000 to X017 (X000 to X007 for 16-point type main unit)
The receiving speed is higher. Because the output transistor recovery time is long and the input
sensitivity is high, however, erroneous input pulses may be counted.
To prevent erroneous input pulses, connect pull-up resistors (3.3 kΩ / 0.5W) to transistor outputs used in
4
Instructions
Explanation of
How to Read
MTR instruction.
For pull-up resistors, use the power supply shown in the table below.
Power supply used for pull-up resistors
AC power type PLC Service power supply
DC power type PLC Power supply for driving PLC
5
The figure below shows an example of the FX3U series main unit (sink input / sink output).
Basic Instruction
Matrix
circuit
Refer to the previous page.
24V S/S 0V X000 X001 X002 X003 X004 X005 X006 X007
6
Instructions
Step Ladder
FX3U-64MT/ES
Transistor output
COM5 Y020 Y021 Y022 Y023 Y024 Y025 Y026 Y027
3.3kΩ/0.5W
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
Pull-up resistor
3. ON/OFF duration of input signals
Because 64 input points (8 rows × 8 columns) are received in a cycle of 80 or 160 ms, the ON/OFF duration
of each input signal should be greater than or equal to the value shown below.
A
When inputs X000 to X017 *1 When inputs X020 *2
and addresses
between devices
Relationships
are used and later are used
80ms 80ms 160ms 160ms
*1. X000 to X007 for 16-point type main unit
*2. X010 and later for 16-point type main unit
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(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.4 DHSCS
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction compares a value counted by a high speed counter with a specified value at each count, and
immediately sets an external output (Y) if the two values are equivalent each other.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DHSCS
EN ENO
DHSCS 32 bits Continuous DHSCS(EN, s1, s2, d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Data to be compared with the current value of a high-speed counter or
Input variable ANY32
word device storing the data to be compared
Device of a high speed counter ANY32
EN0 Execution state Bit
Output variable Bit device to be set to ON when the compared two values are equivalent
Bit
to each other
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System User Digit Specification Index Pointer
type User Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S3 S4 z z z z
z z
zz z S1 z S2
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Function and operation explanation
Outline
1. 32-bit operation (DHSCS)
When the current value of a high speed counter of the device specified by becomes the comparison
value of the device specified by (for example, when the current value changes from "199" to "200" or
from "201" to "200" if the comparison value is K200), the bit device specified by is set to ON without 2
regard to the operation cycle. This instruction is executed after the counting processing in the high speed
Instruction List
counter.
Command input OUT_C_32
EN ENO
CC235 CCoil
CValue
3
Instruction
Configuration of
DHSCS
EN ENO Set to ON
s1 = s2 → d
*1 s1 d Output
Label
Comparison source s2 destination
*1. This defines the comparison value. 4
Instructions
Explanation of
How to Read
Operation
When the current value of the high speed counter C235 changes from "99" to "100" or from "101" to "100",
Y010 is set to ON (output refresh).
M8000 OUT_C_32 5
EN ENO
Basic Instruction
RUN CC235 CCoil
monitor CValue
DHSCS
EN ENO
Label *1 s1 d Y010
Set to ON
K100 = CN235 → Y010 6
CN235 s2
Instructions
Step Ladder
*1. This defines K100.
Related instruction
The following instructions can be combined with high speed counters.
7
Instructions
Applied
Instruction Instruction name
DHSCS High speed counter set
DHSCR High speed counter reset
DHSZ High speed counter zone compare
DHCMOV High speed counter move 8
DHSCT High speed counter compare with data table
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
277
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Cautions
1. Selection of the counter comparison method
When the DHSCS instruction is used, the maximum frequency and total frequency of the high speed counter
are affected.
Refer to the counting operation described below, and select according to the contents of control whether to
use this instruction or general-purpose comparison instruction.
1) Case to select DHSCS instruction
- When the output should be given when the counting result becomes equivalent to the comparison value
without regard to the scan time of the PLC.
2) Cases to select a general-purpose comparison instruction
- When the required frequency is beyond the counting performance.
- When counting is regarded as important, but the effect of the scan time can be ignored in operations
according to the counting result.
- When the number of an instruction exceeds the allowable limit.
For FX3U and FX3UC PLCs
M8000 DHCMOV
EN ENO
Label 1 *1 s d Label 2 *2
K0 n
LD<= SET
EN ENO EN ENO
Label 3 *3 s1 d Y010
Label 4 *4 s2
REF
EN ENO
Y010 d
K8 n
*1. This defines CN251.
*2. This defines D100.
*3. This defines K100.
*4. This defines D100.
For FX0, FX0S, FX0N, FXU, FX2C, FX1S, FX1N, FX1NC, FX2N, FX2NC and FX3G PLCs
LD<= SET
EN ENO EN ENO
Label 3 *1 s1 d Y010
Label 4 *2 s2
REF
EN ENO
Y010 d
K8 n
*1. This defines K100.
*2. This defines CN251.
2. Device specification range
Only high speed counters can be specified as .
For details, refer to the following manual.
→ FX Structured Programming Manual (Device & Common)
3. Some restrictions to applicable devices
S1: Applicable to the FX3U and FX3UC PLCs only.
Not indexed (V, Z).
S2: Use interrupt pointer when using counter interrupt.
(Not available for the FX0, FX0S, FX0N, FX1N, FX1S or FX3G PLC.)
→ For the counter interrupt using this instruction, refer to Section 8.6.
S3: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S4: Applicable to the FX3U and FX3UC PLCs only.
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
4. Specifying input and output variables
Outline
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
5. Precedence of DHSCS, DHSCR and DHSZ instructions to one particular high speed counter
2
Instruction List
→ Refer to caution 6 in "Common cautions on using instructions for high speed counter" which is
described later.
6. Reset operation by an external terminal
→ Refer to caution 5 in "Common cautions on using instructions for high speed counter" which is
described later. 3
Instruction
Configuration of
7. Other cautions on use
→ Refer to caution in "Common cautions on using instructions for high speed counter" which is
described later.
Program examples 4
With regard to the current value of a counter, different outputs (Y) are arbitrarily set to ON by two values.
Instructions
Explanation of
How to Read
[Structured ladder]
M8000 OUT_C_32
EN ENO
RUN CC251 CCoil
monitor
K2,147,483,647 CValue 5
Basic Instruction
Set the maximum counting value of high speed counter.
DHSCS
EN ENO
CN251=K100 → Y010=ON
VAR_01 *1 s1 d Y010
CN251 s2 *1. VER_01 is a global label and is defined as K100. 6
Instructions
Step Ladder
DHSCS
EN ENO
CN251=K150 → Y011=ON
VAR_02 *2 s1 d Y011
CN251 s2 *2. VER_02 is a global label and is defined as K150.
Instructions
Applied
151
150
... 149
101
100
... 99
C255 0
8
Y010
Function
and Pulse Catch
Interrupt Function
Y011
[ST]
OUT_C_32(M8000,CC251,K2147483647);
A
DHSCS(M8000,VAR_01,CC251,Y010);
and addresses
between devices
Relationships
DHSCS(M8000,VAR_02,CC251,Y011);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Common cautions on using instructions for high speed counter
DHSCS, DHSCR and DHSZ instructions are provided for high speed counters. This section explains common
cautions for these instructions.
1. Limitation in the number of an instruction in a program
DHSCS, DHSCR and DHSZ instructions can be used as many times as necessary in the same way as
general instructions. However, the number of simultaneously driven instructions is limited.
→ Refer to Section 1.3.7.
2. Response frequency of high speed counters
When DHSZ instruction is used, the maximum response frequency of every software counter and the total
frequency are limited. For details, refer to the following manual.
→ FX Structured Programming Manual (Device & Common)
3. Specification of output numbers (Y)
When using the same instruction for high speed counter repeatedly or when driving two or more instructions
for high speed counter at the same time, specify such output devices (Y) whose high-order two digits are the
same (in units of 8 devices).
1) When using devices of the same number (in units of 8 devices)
Example: when using Y000, specify Y000 to Y007. When using Y010, specify Y010 to Y017.
2) When using two or more instructions for high speed counter and non-consecutive output (Y) numbers
A program example is shown below:
M8000 DHSCS
EN ENO
VAR_01*1 s1 d Y000
CN255 s2
DHSCS
EN ENO
VAR_01*1 s1 d Y010
CN255 s2
*1. VER_01 is a global label and is defined as K100.
When C255 reaches K100, the output Y000 is driven by interrupt. Y010 is driven when END processing is
executed.
If interrupt drive is required, use an output number in the range from Y001 to Y007 whose high-order two
digits are equivalent.
4. Caution on the counting operation when the current value is changed
An instruction for the high speed counter gives the comparison result when a pulse is input to the input (X) of
the high speed counter.
However, the comparison result is not given when the current value of the high speed counter is changed in
the following method.
1) Change method (example)
a) Overwriting the contents of a word device used as the comparison value using DMOV instruction, etc.
b) Resetting the current value of a high speed counter in a program.
2) Operation
Even if the condition for setting the output to ON or OFF is given as the comparison result, the
comparison result does not change when an instruction is simply driven.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
*1
5. Reset operation by an external terminal [M8025 : DHSC (external reset) mode]
Outline
For a high speed counter equipped with an external reset terminal (R) such as C241, an instruction is
executed and the comparison result is output at the rising edge of the reset input signal.
(The FXU PLC of V2.1 or later and produced February 1990 or later are compatible with this function. The
FX0, FX0S, FX0N, FX1S, FX1N, FX1NC or FX3G is not compatible.)
1) Program 2
If an instruction for the high speed counter is used while M8025*1 is driven, the instruction is executed
Instruction List
again when the current value of the high speed counter C241 is cleared by an external reset terminal.
And the comparison result is output even if a counting input is not given.
M8000 *1
External reset mode
RUN
M8025
X001 External reset 3
monitor terminal for C241
Instruction
Configuration of
OUT_C_32
EN ENO
CC241 CCoil
K9,999 CValue
EN
DHSCR
ENO
4
Instructions
Explanation of
How to Read
VAR_01* s1 d Y000
CN241 s2
* VER_01 is a global label and is defined as K100.
*1. It is not necessary to drive M8025 for the FX0, FX0S, FX0N, FX1S, FX1N, FX1NC and FX3G PLCs.
The above reset operation takes place as a basic function.
5
2) Operation
Basic Instruction
When the external reset input X001 turns ON while the current value of C241 is "100", for example, the
current value of C241 is reset to "0". And Y000 is reset at this time even if a counting input is not given.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.6 High Speed Processing
6. Priority order in operations among DHSCS, DHSCR and DHSZ instructions for the same
high speed counter when the same comparison value is used.
1) FX3U and FX3UC PLCs
When the same comparison value is used for the same high speed counter in DHSCS, DHSCR and
DHSZ instructions, high speed counter reset (self-reset) by DHSCR instruction is executed with the
highest priority (as shown in the table below).
In this case, the comparison results do not change in DHSCS, DHSCR and DHSZ instructions whose
comparison value is programmed to be the same as the comparison value for self-reset by DHSCR
instruction. To change the comparison results, set the comparison value to "K0".
2) FX1S, FX1N, FX1NC, FX2N, FX2NC and FX3G PLCs
Comparison is executed in the programmed sequence without regard to the instructions.
Processing sequence
Program sequence
FX3U•FX3UC FX3G FX1N•FX1S•FX1NC•FX2N•FX2NC
DHSCS (1) DHSCR (6) (Self-reset) DHSCS (1) DHSCS (1)
DHSCS (2) DHSZ (4) DHSCS (2) DHSCS (2)
DHSCR (3) DHSCS (1) DHSCR (3) DHSCR (3)
DHSZ (4) DHSCS (2) DHSZ (4) (Not supported)
DHSCR (5) DHSCR (3) DHSCR (5) DHSCR (5)
DHSCR (6) (Self-reset) DHSCR (5) DHSCR (6) (Self-reset) DHSCR (6) (Self-reset)
M8000 OUT_C_32
EN ENO
CC235 CCoil
10000 CValue
DHSCS
EN ENO
VAR_01*1 s1 d Y000 (1)
CN235 s2
DHSCS
EN ENO
(2)
VAR_01*1 s1 d Y001
CN235 s2
DHSCR
EN ENO
(3)
VAR_01*1 s1 d Y002
CN235 s2
M8000 DHSZ
EN ENO
VAR_02*2 s1 d Y003
(4)
VAR_01*1 s2
CN235 s
DZCPP
EN ENO
VAR_02*2 s1 d Y003
VAR_01*1 s2
CN235 s3
M8000 DHSCR
EN ENO
(5)
VAR_01*1 s1 d Y006
CN235 s2
DHSCR
EN ENO
VAR_01*1 s1 d CC235 (6)
CN235 s2
Self-reset program
*1. VER_01 is a global label and is defined as K500.
*2. VER_02 is a global label and is defined as K250.
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Operation of FX3U and FX3UC PLCs
Outline
Current *1. To change the comparison results by the instructions (1) to (3)
value and (5) in the previous page, change the comparison value
500 "K500" in the instructions (1) to (3) and (5) in the previous
page to "K0".
250
*2. To set Y005 to ON in the DHSZ instruction (4) in the previous 2
0 page, set a value smaller than the comparison value "K500".
Instruction List
Y000 to Y002 and Y006 do not change.*1 However, due to the response delay at the output, the output
may not operate within the short time before the counter's
Y003 ON ON
current value is reset to "0" (to K500 (K0)).
Y004 OFF
Y005 OFF
It does not change.*2 3
Instruction
Configuration of
Operation of FX3G, FX2N, FX2NC, FX1N, FX1NC and FX1S PLCs.
Current *1. Due to the response delay at the output, the output may not
value operate within the short time before the counter's current value
is reset from "0" to "1".
500
4
250
Instructions
Explanation of
How to Read
0
Y000,Y001 ON
Y002 OFF
5
Current
Basic Instruction
Y003 ON ON value:1
Y004 ON
*1
Y005
Current
6
Instructions
Step Ladder
value:1
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
283
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.5 DHSCR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction compares the value counted by a high speed counter with a specified value at each count,
and immediately resets an external output (Y) when both values become equivalent to each other.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DHSCR
EN ENO
DHSCR 32 bits Continuous DHSCR(EN,s1,s2,d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Data to be compared with the current value of a high-speed counter or
Input variable ANY32
word device storing the data to be compared*1
Device of a high speed counter ANY32
EN0 Execution state Bit
Output variable Bit device to be set to ON when the compared two values are equivalent
Bit
to each other
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Cons Real Character
System User Digit Specification System User Index Pointer
type Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z
z z
zz z S1 S4 z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Function and operation explanation
Outline
1. 32-bit operation (DHSCR)
When the current value of the high speed counter of the device specified by becomes the comparison
value of the device specified by (for example, when the current value changes from "199" to "200" or
from "201" to "200" if the comparison value is K200), the bit device specified by is reset (set to OFF) 2
regardless of the operation cycle. In this instruction, the comparison processing is executed after the counting
Instruction List
processing in the high speed counter.
Command input OUT_C_32
EN ENO
CC235 CCoil
CValue 3
Instruction
Configuration of
DHSCR Reset
EN ENO s1 = s2 → d
Label *1 s1 d Output
Comparison source s2 destination
*1. This defines the comparison value. 4
Instructions
Explanation of
How to Read
Operation
When the current value of the high speed counter C255 changes (counts) from "99" to "100" or from "101" to
"100", Y010 is reset (output refresh).
M8000 OUT_C_32 5
EN ENO
Basic Instruction
RUN CC235 CCoil
monitor K2,147,483,647 CValue
DHSCR
6
EN ENO Reset
Label *1 s1 d Y010 K100 = CN235 → Y010
Instructions
Step Ladder
CN235 s2
*1. This defines K100.
Related instruction 7
The following instructions can be combined with high speed counters.
Instructions
Applied
Instruction Instruction name
DHSCS High speed counter set
DHSCR High speed counter reset
DHSZ
DHCMOV
High speed counter zone compare
High speed counter move
8
Function
and Pulse Catch
Interrupt Function
DHSCT High speed counter compare with data table
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Cautions
1. Selection of the counter comparison method
When the DHSCS instruction is used, the maximum frequency and total frequency of the high speed counter
are affected.
Refer to the counting operation described below, and select according to the contents of control whether to
use this instruction or general-purpose comparison instruction.
1) Case to select DHSCR instruction
- When the output should be given when the counting result becomes equivalent to the comparison value
without regard to the scan time of the PLC.
2) Cases to select a general-purpose comparison instruction
- When the required frequency is beyond the counting performance.
- When counting is regarded as important, but the effect of the scan time can be ignored in operations
according to the counting result.
- When the number of an instruction exceeds the allowable limit.
For FX3U and FX3UC PLCs
M8000 DHCMOV
EN ENO
Label 1 *1 s d Label 2 *2
K0 n
LD<= RST
EN ENO EN ENO
Label 3 *3 s1 d Y010
Label 4 *4 s2
REF
EN ENO
Y010 d
K8 n
*1. This defines CN251.
*2. This defines D100.
*3. This defines K1000.
*4. This defines D100.
For FX0, FX0S, FX0N, FXU, FX2C, FX1S, FX1N, FX1NC, FX2N, FX2NC and FX3G PLCs
LD<= SET
EN ENO EN ENO
Label 3 *1 s1 d Y010
Label 4 *2 s2
REF
EN ENO
Y010 d
K8 n
*1. This defines K100.
*2. This defines CN251.
2. Device specification range
Only high speed counters can be specified as .
For details, refer to the following manual.
→ FX Structured Programming Manual (Device & Common)
3. Some restrictions to applicable devices
S1: Applicable to the FX3U and FX3UC PLCs only.
Not indexed.
S2: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S3: Applicable to the FX3U and FX3UC PLCs only.
S4: The same counter of the device specified by can be used.
(See the program example.)
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
4. Specifying input and output variables
Outline
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
5. Precedence of DHSCS, DHSCR and DHSZ instructions to one particular high speed counter
2
Instruction List
→ Refer to caution 6 in "Common cautions on using instructions for high speed counter" which is
described in Section 7.6.4.
6. Reset operation by an external terminal
→ Refer to caution 5 in "Common cautions on using instructions for high speed counter" which is
described in Section 7.6.4. 3
Instruction
Configuration of
7. Other cautions on use
→ Refer to caution in "Common cautions on using instructions for high speed counter" which is
described in Section 7.6.4.
Program examples 4
Instructions
Explanation of
How to Read
1. Example of self-reset circuit
When the current value of C255 becomes "400", C255 is immediately reset. Its current value becomes "0",
and the output contact is set to OFF.
[Structured ladder]
M8000 OUT_C_32 Reset value of DHSCR 5
400
Basic Instruction
EN ENO Count-up value
RUN CC255 CCoil 300
monitor CValue
K300
Current value
of C255
DHSCR
VAR_01*1
EN
s1
ENO
d CC255 Output contact 6
of C255
Instructions
Step Ladder
CC255 s2
Output
Comparison source destination
Comparison value
*1. VER_01 is a global label and is defined as K400.
7
Instructions
Applied
[ST]
OUT_C_32(M8000,CC255,K300);
DHSCR(M8000,VAR_01,CC255,CC255);
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
287
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.6 DHSZ
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction compares the current value of a high speed counter with two values (one zone), and outputs
the comparison result to three bit devices (refresh).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DHSZ
EN ENO
DHSZ 32 bits Continuous s1 d DHSZ(EN,s1,s2,s,d);
s2
s
2. Set data
Variable Description Data type
EN Execution condition Bit
Data to be compared with the current value of a high-speed counter or word
ANY32
device storing the data to be compared (Comparison value 1)
Input variable
Data to be compared with the current value of a high-speed counter or word
ANY32
device storing the data to be compared (Comparison value 2)
Device of a high speed counter ANY32
EN0 Execution state Bit
Output variable Head device to which the comparison result is output based on upper and
Bit
lower comparison values
3. Applicable devices
Bit Devices Word Devices Data type
Operand Special Cons Real Character
System User Digit Specification System User Index Pointer
type Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z
z z z z z z z S2 S3 z z z z
z z
zz z S1 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
Function and operation explanation
Outline
1. 32-bit operation (DHSZ)
The current value of the high speed counter of the device specified by is compared with two comparison
points (comparison value 1 and comparison value 2). Based on the comparison result, "smaller than the lower
comparison value", "inside the comparison zone" or "larger than the upper comparison value", one among the 2
devices specified by is set to ON regardless of the operation cycle.
Instruction List
In this instruction, the comparison processing is executed after the count processing in the high speed
counter.
Command input OUT_C_32
EN ENO
High speed counter
specified by s CCoil 3
Instruction
Configuration of
K2,147,483,647 CValue Set to ON
s1 > s d
DHSZ
EN ENO s1 ≤ s ≤ s2 d +1
Label *1 s1 d Output s > s2 d +2
4
Label *2 s2 destination
Comparison source s
Instructions
Explanation of
How to Read
*1. This defines the comparison value 1.
*2. This defines the comparison value 2.
Comparison points
Make sure that the comparison value 1 and the comparison value 2 have the following relationship:
≤
5
Basic Instruction
Operation
When the current value of the high speed counter C251 changes (counts) as shown below, the comparison
result is output to one of the outputs Y000, Y001 or Y002.
M8000 OUT_C_32
EN ENO
6
Instructions
Step Ladder
RUN CCoil
CC251
monitor
K2,147,483,647 CValue
ON
DHSZ
EN ENO K1000 > C251 Y000
Label 1 *1 s1 d Y0 K1000 ≤ C251 ≤ K2000 Y001 7
Label 2 *2 s2 C251 > K2000 Y002
Instructions
Applied
C251 s
*1. This defines K1000.
*2. This defines K2000.
Comparison pattern Current value of C251
Y000
Change of output contact (Y)
Y001 Y002
8
Function
and Pulse Catch
Interrupt Function
1000> ON OFF OFF
> 999→1000 ON→OFF OFF→ON OFF
999←1000 OFF→ON ON→OFF OFF
999→1000 ON→OFF OFF→ON OFF
999←1000 OFF→ON
OFF
ON→OFF
ON
OFF
OFF
A
≤ ≤ 1000≤ ≤2000
and addresses
between devices
Relationships
2000→2001 OFF ON→OFF OFF→ON
2000←2001 OFF OFF→ON ON→OFF
2000→2001 OFF ON→OFF OFF→ON
< 2000←2001 OFF OFF→ON ON→OFF
>2000 OFF OFF ON
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(Basic & Applied Instruction) 7.6 High Speed Processing
Related instruction
The following instructions can be combined with high speed counters.
Instruction Instruction name
DHSCS High speed counter set
DHSCR High speed counter reset
DHSZ High speed counter zone compare
DHCMOV High speed counter move
DHSCT High speed counter compare with data table
Cautions
1. Selection of the counter comparison method
When the DHSCS instruction is used, the maximum frequency and total frequency of the high speed counter
are affected.
Refer to the counting operation described below, and select according to the contents of control whether to
use this instruction or general-purpose comparison instruction.
1) Case to select DHSCS instruction
- When the output should be given when the counting result becomes equivalent to the comparison value
without regard to the scan time of the PLC.
2) Cases to select a general-purpose comparison instruction
- When the required frequency is beyond the counting performance.
- When counting is regarded as important, but the effect of the scan time can be ignored in operations
according to the counting result.
- When the number of an instruction exceeds the allowable limit.
For FX3U and FX3UC PLCs
M8000 DHCMOV
EN ENO
Label 1 *1 s d Label 2 *2
0 n
LDD>
EN ENO Y010
Label 3 *3 s1
Label 4 *4 s2
LDD<= ANDD<=
EN ENO EN ENO Y011
Label 5 *5 s1 Label 7 *7 s1
Label 6 *6 s2 Label 8 *8 s2
LDD<
EN ENO Y012
Label 9 *9 s1
Label 10 *10 s2
M8000 REF
EN ENO
Y10 d
K8 n
*1. This defines CN251.
*2. This defines D100.
*3. This defines K10000.
*4. This defines D100.
*5. This defines K10000.
*6. This defines D100.
*7. This defines K20000.
*8. This defines D100.
*9. This defines K20000.
*10. This defines D100.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
For FX0, FX0S, FX0N, FXU, FX2C, FX1S, FX1N, FX1NC, FX2N, FX2NC and FX3G PLCs
Outline
LDD>
EN ENO Y010
Label 3 *1 s1
Label 4 *2
2
s2
LDD<= ANDD<=
Instruction List
EN ENO EN ENO Y011
Label 5 *3 s1 Label 7 *5 s1
Label 6 *4 s2 Label 8 *6 s2
LDD<
EN ENO
Label 9 *7 s1
Y012
3
Instruction
Configuration of
Label 10 *8 s2
M8000 REF
EN ENO
Y10 d
K8 n
4
*1. This defines K10000.
Instructions
Explanation of
How to Read
*2. This defines CN251.
*3. This defines K10000.
*4. This defines CN251.
*5. This defines K20000.
*6. This defines CN251.
*7. This defines K20000. 5
Basic Instruction
*8. This defines CN251.
2. Device specification range
Only high speed counters can be specified as .
For details, refer to the following manual.
→ FX Structured Programming Manual (Device & Common) 6
Instructions
Step Ladder
3. Some restrictions to applicable devices
S1: Applicable to the FX3U and FX3UC PLCs only.
Not indexed (V, Z).
S2: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S3: Applicable to the FX3U and FX3UC PLCs only.
7
4. Specifying input and output variables
Instructions
Applied
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
5. Caution on values set in the comparison value 1 and comparison value 2
8
Function
and Pulse Catch
Interrupt Function
Make sure that is smaller than or equivalent to .
6. Relationship between the comparison timing and the result output
1) DHSZ instruction executes comparison and outputs the result only when a counting pulse is input to a
high speed counter.
(When is "1000" and is "1999", the output is set to ON as soon as the current value of
A
and addresses
between devices
Relationships
C235 changes from "999" to "1000" or from "1999" to "2000".)
2) Because the comparison result cannot be obtained when restoring the power or when the PLC mode
switches from STOP to RUN, the result is not output even if the comparison condition is provided.
→ For details, refer to "Program in which comparison result is set to ON when power is turned ON
[ZCP] instruction" that is described later.
7. Precedence of DHSCS, DHSCR and DHSZ instructions to one particular high speed counter
→ Refer to caution 6 in "Common cautions on using instructions for high speed counter" which is
described in Section 7.6.4.
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(Basic & Applied Instruction) 7.6 High Speed Processing
8. Reset operation by an external terminal
→ Refer to caution 5 in "Common cautions on using instructions for high speed counter" which is
described in Section 7.6.4.
9. Number of occupied devices
1) The comparison value occupies two devices from or respectively.
2) The output occupies three devices from .
Program in which comparison result is set to ON when power is turned ON [ZCP]
instruction
DHSZ instruction outputs the comparison result only when a counting pulse is input. Even if the current value
of C235 is "0", Y010 remains OFF at the time of startup.
For initializing Y010, compare the current value of C235 with K1000 and K1200 and drive Y010 by DZCPP
instruction (for general zone comparison) as pulse operation only at the time of startup.
Refer to the program example shown below.
Explanation of operation
The outputs Y010 to Y012 are as shown below.
Y010 = ON Y011 = ON Y012 = ON
0 1,000 1,200
Current value of C235
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
Program examples
Outline
[Structured ladder]
X010 RST
EN ENO
d CC235 2
ZRST
Instruction List
EN ENO
d1 Y010 Y010 to Y012 are reset.
d2 Y012
M8000 OUT_C_32
RUN CC235
EN
CCoil
ENO
3
Instruction
Configuration of
monitor CValue
K999
Pulse input: X000
M8000 DZCPP Immediately after start, comparison is executed only once.
EN ENO
K1000 > CN235 :Y010 ON
K1000 ≤ CN235 ≤ K1200 :Y011 ON
Start VAR_01*1 s1 d VAR_04*4 K1200 < CN235 :Y012 ON
VAR_02*2 s2 4
VAR_03*3 s3
Instructions
Explanation of
How to Read
DHSZ Immediately after start, comparison is executed by
interrupt when each pulse is input from X000.
EN ENO
K1000 > CN235 :Y010 ON
VAR_05*5 s1 d Y010 K1000 ≤ CN235 ≤ K1200 :Y011 ON
VAR_06*6 s2 K1200 < CN235 :Y012 ON
CN235 s
5
Basic Instruction
*1. VER_01 is a global label and is defined as K1000.
*2. VER_02 is a global label and is defined as K1200.
*3. VER_03 is a global label and is defined as CN235.
*4. VER_04 is a global label and is defined as Y010.
*5. VER_05 is a global label and is defined as K1000.
*6. VER_06 is a global label and is defined as K1200. 6
Instructions
Step Ladder
[ST]
RST(NOT X010,);
ZRST(NOT X010,Y010,Y012);
OUT_C_32(M8000,CC235,K999 ); 7
Instructions
Applied
DZCPP(X010,VAR_01,VAR_02,VAR_03,VAR_04);
DHSZ(X010,VAR_05,VAR_06,CC235,Y010);
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
293
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Timing chart
In the part 1) in the timing chart, Y010 remains OFF if the current value of a high speed counter (C235 in the
example below) is "0" when restoring the power.
1) For initializing Y010, the current value of C235 is compared with K1000 and K1200, and Y010 is driven
using the DZCPP instruction (for general zone comparison) as pulse operation only in RUN.
2) The comparison result in Y010 is latched until an input pulse is input and the comparison output is driven
by the DHSZ instruction.
3) According to the current value of the counter, the DHSZ instruction drives the output A , B or C .
X000
(Input pulse
for C235)
X010
(Start)
Y010 1) A
(smaller than zone)
Y011 B
(inside zone)
Y012 C
(larger than zone)
1200
1000
0
(current value of counter)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
Table high speed comparison mode (M8130)
Outline
This section explains the table high speed comparison mode (high speed pattern output) of the DHSZ
instruction.
When two or more outputs should be activated at one time, use the DHSCT instruction which can change up
to 16 outputs.
(Valid for the FXU PLC, V3.07 or later) 2
Instruction List
1. Set data
Operand type Description Data type
Head word device number storing the data table (only data register D) ANY32
Number of lines in the table (only K or H) ... K1 to K128 or H1 to H80 ANY32
Device number of a high speed counter ANY32
3
Instruction
Configuration of
Special auxiliary relay for declaring the table high speed comparison mode Bit
Function and operation explanation
1. 32-bit operation (DHSZ)
When the special auxiliary relay M8130 for declaring the table high speed comparison mode is specified as
4
Instructions
Explanation of
How to Read
in the DHSZ instruction, the special function shown below is provided.
Command
input OUT_C_32
EN ENO
CC CCoil
K2,147,483,647 CValue 5
Basic Instruction
DHSZ
EN ENO
Head device s1 d M8130
Number of lines s2
6
Comparison source s
Table high speed comparison mode
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
295
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Comparison table
Comparison data Output (Y)
SET/RST Table counter (D8130)
(32 bits) number
0
+1, +2 +3
↓
1
+5, +4 +6 +7
↓
2
+9, +8 +10 +11
↓
to to to to
-1
+5, +4 +6 +7 ↓
Repeated from "0"
1) Specify the head number for the comparison table as
Because one line in the comparison table uses four devices, × 4 devices are occupied from .
2) Specify the number of lines in the comparison table as .
The created table starts from the head register , and has the number of lines specified in .
3) Comparison data
Make sure that the comparison data is 32 bits.
4) Output (Y) number
Specify each digit of the (Y) number in hexadecimal form.
Example: When specifying Y010, specify "H10".
When Specifying Y020, specify "H20".
5) Specification of set and reset
These set and reset are directly controlled as interrupt.
Contents of
setting
Set (ON) K1/H1
Reset (OFF) K0/H0
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
1
2. Operation
Outline
M8002 DMOV
EN ENO Comparison data
Label 1 *1 s d Label 2 *2
EN
MOV
ENO Output (Y) number
2
Instruction List
H10 s d D202
MOV
EN ENO
Output is set or reset
K1: Output is set.
K1 s d D203
DMOV
3
Instruction
Configuration of
EN ENO Comparison data
Label 3 *3 s d Label 4 *4
MOV
EN ENO Output (Y) number
H10 s d D206 4
Instructions
Explanation of
How to Read
MOV
EN ENO
Output is set or reset
K0: Output is set.
K0 s d D207
DMOV
EN ENO Comparison data 5
Label 5 *5 s d Label 6 *6
Basic Instruction
MOV
EN ENO Output (Y) number
H11 s d D210
EN
MOV
ENO
Output is set or reset 6
K1: Output is set.
Instructions
Step Ladder
K1 s d D211
DMOV
EN ENO Comparison data
Label 7 *7 s d Label 8 *8
MOV
7
Instructions
Applied
EN ENO Output (Y) number
H11 s d D214
MOV
EN ENO
Output is set or reset
K0: Output is set.
K0 s d D215 8
Function
and Pulse Catch
Interrupt Function
DMOV
EN ENO Comparison data
Label 9 *9 s d Label 10 *10
MOV
H11
EN
s
ENO
d D218
Output (Y) number
A
and addresses
between devices
Relationships
MOV
EN ENO
Output is set or reset
K1: Output is set.
K1 s d D219
297
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Command input OUT_C_32
EN ENO
CC251 CCoil
K2,147,483,647 CValue
DHSZ
EN ENO
Label 11 *11 s1 d M8130
Label 12 *12 s2
CC251 s Table high speed comparison mode
Reset
Command input RST
EN ENO
d CC251
RST
EN ENO
d Y011
*1. This defines K123.
*2. This defines D200.
*3. This defines K234.
*4. This defines D204.
*5. This defines K345.
*6. This defines D208.
*7. This defines D456.
*8. This defines D212.
*9. This defines D567.
*10.This defines D216.
*11.This defines D200.
*12.This defines K5.
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
Comparison table
Outline
Comparison Output (Y) Current value
SET/RST Table counter
data number of C251
D201, D200 D 202 D 203 0
K123 H10 K1 ↓ A program
2
to reset the
D205, D204 D 206 D 207 1 counter is
K234 H10 K0 ↓ 567 required.
Instruction List
D209, D208 D 210 D 211 2
K345 H11 K1 ↓ 456
D213, D212 D 214 D 215 3 345
K456 H11 K0 ↓
4 234
D217, D216
K567
D 218
H11
D 219
K1
↓ 3
Repeated from "0" 123
Instruction
Configuration of
1) When this instruction is executed, the top table
in the data table is set as the comparison
Y010
target data.
2) When the current value of the high speed A program
counter C251 is equivalent to the comparison
Y011 to reset the
output is
4
Instructions
Explanation of
How to Read
target data table, the output (Y) number required.
specified in the comparison data table is set or
reset.
This output processing is directly executed without regard to completion of output refresh by END
instruction.
3) "1" is added to the current value of the table counter D8130. 5
Basic Instruction
4) The comparison target data table is transferred to the next table.
5) The step 2) and 3) are repeated until the current value of the table counter D8130 becomes "4".
When the current value becomes "4", the program execution returns to the step 1), and the table counter
D8130 is reset to "0".
At this time, the complete flag M8131 turns ON.
6) When the command contact is set to OFF, execution of the instruction is stopped and the table counter
6
Instructions
Step Ladder
D8130 is reset to "0".
Cautions
1. Limitation in the number of DHSZ instruction
This instruction can be programmed only once in a program.
7
Instructions
Applied
With regard to the DHSCS, DHSCR, DHSZ and DHSCT instructions used for other purposes, a limited
number of instructions including the DHSZ instruction can be driven at one time.
2. When the command input is set to OFF in the middle of execution
Execution of the instruction is aborted, and the table counter D8130 is reset to K0.
However, outputs which have been set or reset remain in the current status. 8
Function
and Pulse Catch
Interrupt Function
3. Output start timing
After the DHSZ instruction is first executed, creation of the table is completed by END instruction. After that,
the DHSZ instruction becomes valid.
Accordingly, the output is activated from the second scan.
4. Current value of a high speed counter A
Be sure to execute the DHSZ instruction from a point where the current value of the high speed counter
and addresses
between devices
Relationships
(regarded as the operation target) is smaller than the value in the first line in the comparison table.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Frequency control mode (DHSZ, DPLSY) (M8132)
When the special auxiliary relay M8132 for declaring the frequency control mode is specified as in the
DHSZ instruction, the special function shown below is provided if DPLSY instruction is combined.
At this time, only a data register D can be specified as , and a constant K or H can be specified as .
The available range is limited to "1 ≤ K, H ≤ 128".
A high speed counter can be specified as .
This function is different from the zone comparison described above.
PLSY instruction is as shown on the next page, and only the pulse output can be changed by users.
(Valid for the FXU PLC, V3.07 or later)
1. Control example
Example of table configuration and data setting
Comparison data Frequency Table counter (D8131)
D 301, D 300 D 302, D 303 0
K 20 K300 ↓ Head device (32 bits) specified
as s1
D 305, D 304 D 306, D 307 1
K600 K500 ↓
D 309, D 308 D 310, D 311 2
K700 K200 ↓
Number of lines specified as s2
D 313, D 312 D 314, D 315 3
K800 K100 ↓
D 317, D 316 D 318, D 319 4
K 0 K 0 ↓
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FXCPU Structured Programming Manual 7 Applied Instructions
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Outline
Command input DMOVP
EN ENO Comparison
Label 1 *1 s d Label 2 *2 data
*1. This defines K20.
DMOVP
EN ENO Frequency *2. This defines D300. 2
Label 3 *3 s d Label 4 *4
Instruction List
*3. This defines K300.
DMOVP *4. This defines D302.
EN ENO Comparison
data *5. This defines K600.
Label 5 *5 s d Label 6 *6
*6. This defines D304.
DMOVP
*7. This defines K500.
3
EN ENO Frequency
Instruction
Configuration of
Label 7 *7 s d Label 8 *8 *8. This defines D306.
DMOVP *9. This defines D700.
EN ENO Comparison
*10.This defines D308.
Label 9 *9 s d Label 10 *10 data
*11.This defines D200. 4
DMOVP
Instructions
Explanation of
How to Read
*12.This defines D310.
EN ENO Frequency
*12
Label 11 *11 s d Label 12 *13.This defines K800.
*14.This defines D312.
DMOVP
EN ENO Comparison *15.This defines K100.
Label 13 *13 s d Label 14 *14 data
*16.This defines D314.
5
Basic Instruction
DMOVP *17.This defines K0.
EN ENO Frequency
Label 15 *15 s d Label 16 *16 *18.This defines D316.
*19.This defines K0.
DMOVP
EN ENO Comparison
data
*20.This defines D318. 6
Label 17 *17 s d Label 18 *18
Instructions
Step Ladder
*21.This defines the head device.
DMOVP *22.This defines the number of lines.
EN ENO
*23.This defines D8132.
Label 19 *19 s d Label 20 *20
*24.This defines K0.
DHSZ 7
EN ENO
Instructions
Applied
Label 21 *21 s1 d M8132
Label 22 *22 s2
CC251 s
Frequency control mode
PLS
EN ENO 8
d M10
Function
and Pulse Catch
Interrupt Function
M10 DPLSY
EN ENO
Label 23 *23 s1 d Y000
Label 24 *24
A
s2
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
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Output pulse characteristics
Output pulse
Frequency (Hz)
500
300
200
100
0
0 20 600 700 800
Current value of C251
1) Write prescribed data in advance to data registers constructing the table as shown in this program
example.
2) The output frequency of the DPLSY instruction remains in the value (D303, D302) until the current value
of a high speed counter specified in becomes equivalent to (D301, D300). (D302 specifies low-order
16 bits. D303 specifies high-order 16 bits, but is always "0".)
3) The operation in the second line is started after that, and then the operation in each line is executed in
turn.
4) When the operation in the last line is completed, the complete flag M8133 turns ON. The program
execution returns to the first line, and the operation is repeated.
5) For stopping the operation in the last line, set the frequency in the last table to K0.
6) When the command input is set to OFF, the pulse output turns OFF and the table counter D8131 is reset.
7) After DHSZ instruction is first executed, creation of the table is completed at the END instruction. The
DHSZ instruction becomes valid after that.
8) Accordingly, the contact of PLS M10 is used so that the DPLSY instruction is executed from the second
scan after the command input has been set to ON.
Data can be written to the table in a program as shown in this example or directly using keys in peripheral
equipment.
1) M8132: This is the special auxiliary relay for declaring the frequency control mode.
2) D8132: In the frequency control mode, the frequency set in the table is received by D8132 sequentially
according to the table counter D8131 count.
3) D8134 (low-order), D8135 (high-order):
In the frequency control mode, the comparison data in the table is received sequentially according to the
table counter count.
Cautions
1) DHSZ instruction can be used only once.
2) With regard to the DHSCS, DHSCR, DHSZ and DHSCT instructions for other purposes, a limited number
of instructions including the DHSZ instruction can be driven at one time.
3) Because the table is created when the END instruction is executed, it is necessary to delay execution of
the DPLSY instruction until creation of the table is completed.
4) Do not change the data table while the DHSZ instruction is driven.
5) In the frequency control mode, simultaneous output to Y000 to Y001 is not permitted.
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1
7.6.7 SPD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction counts the input pulse for a specified period of time as interrupt input.
The function of this instruction varies depending on the version.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form
Expression in each language
Structured ladder ST
3
Instruction
Configuration of
SPD
EN ENO
SPD 16 bits Continuous SPD(EN,s1,s2,d);
s1 d
s2
DSPD
4
Instructions
Explanation of
How to Read
EN ENO
DSPD 32 bits Continuous DSPD(EN,s1,s2,d);
s1 d
s2
2. Set data
5
Data type
Basic Instruction
Variable Description
16-bit operation 32-bit operation
EN Execution condition Bit
Input variable Device of pulse input (X) Bit
Time data (ms) or word device storing the data ANY16 ANY32
EN0 Execution state Bit 6
Instructions
Step Ladder
Output variable ARRAY [0..2] OF ARRAY [0..2] OF
Head word device storing the pulse density data
ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System User Digit Specification
System Special
Index
Cons Real Character
Pointer
7
type User Unit tant Number String
Instructions
Applied
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 z
z z z z z z z S2 S3 z z z z z
z z z S2 z z z 8
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
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Function and operation explanation
1. 16-bit operation (SPD)
The input pulse specified by is counted only for the period of "time specified by multiplied by 1 ms."
The measured value is stored in , the current value is stored in +1, and the remaining time is stored
in +2 (ms).
By repeating this operation, the measured value will store the pulse density (which is proportional to the
rotation speed).
Command
input SPD
EN ENO
Device for s1 d Label *1
pulse input
Time data s2
*1. This defines the device that stores the
pulse density data.
1) Timing chart
Command
input The command contact is set to ON.
s1
d +1 d
Current value Measured d +1 counts "OFF to ON" operation of s1 .
value s2 ms later, the counting result is stored to d .
Accompanied by this operation, d +1 is reset,
and then counting of the "OFF to ON" operation
of s1 is started again.
s2 ms s2 ms
Counting time Counting time
s2 ms d +2 is used to measure the remaining time.
d +2
Remaining time (ms)
2) The measured value is in proportion to the number of rotations as shown below.
Input X000
N (rpm)
60
N= 10 3 (r/min)
nt
t: Measurement time duration
Proximity switch specified as (ms).
"n" pulses/rotation
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1
2. 32-bit operation (DSPD) [FX3U, FX3UC Ver.2.20 or later]
Outline
The input pulse specified by is counted only for the period of "time specified by multiplied by 1 ms."
The measured value is stored in [ +1, ], the current value is stored in [ +3, +2], and the
remaining time is stored in [ +5, +4] (ms).
By repeating this operation, the measured value [ +1, ] will store the pulse density (which is
proportional to the rotation speed). 2
Instruction List
Command
input DSPD
EN ENO
Device for s1 d Label *1
pulse input
Time data s2
*1. This defines the device that stores the 3
pulse density data.
Instruction
Configuration of
1) Timing chart
Command
input The command contact is set to ON.
s1
4
Instructions
Explanation of
How to Read
[ d +1, d ]
[ d +3, d +2] Measured
value
Current value [ d +3, d +2] counts "OFF to ON" operation of s1 .
[ s2 +1, s2 ] ms later, the counting result is stored to
[ d +1, d ].
Accompanied by this operation, [ d +3, d +2] is reset,
and then counting of the "OFF to ON" operation of s1
5
Basic Instruction
is started again.
[ s2 +1, s2 ] ms [ s2 +1, s2 ] ms
Counting time Counting time
[ d +5, d +4] is used to measure the remaining time.
[ s2 +1, s2 ] ms
6
[ d +5, d +4]
Instructions
Step Ladder
Remaining time (ms)
2) The value [ +1, ] is in proportion to the number of rotations as shown below.
Instructions
Applied
Input X000
8
Function
and Pulse Catch
Interrupt Function
N (rpm)
60 [ +1, ]
N= 10 3 (r/min)
nt
t: Measurement time duration specified as
Proximity switch [ +1, ] (ms).
"n" pulses/rotation
A
and addresses
between devices
Relationships
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Cautions
1. Input specifications of the input specified by
1) can specify the following ranges.
FX3U, FX3UC, and FX3G PLCs: X000 to X007
FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs: X000 to X005
FXU and FX2C PLCs: X000 to X005
2) An input device X000 to X007 (X000 to X005) specified by cannot overlap the following functions or
instructions:
- High speed counter
- Input interrupt
- Pulse catch
- Pulse width measurement
- DSZR
- DVIT
- ZRN
3) For one input, this instruction can be used only once.
4) The maximum input frequency is shown below:
FX3U PLC
Used input number FX3UC PLC
Main unit FX3U-4HSX-ADP
X000 to X005 100kHz*1 100kHz*1
200kHz
X006 to X007 10kHz 10kHz
*1. When receiving pulses within the response frequency range of 50k to 100 kHz, perform the following
actions:
- Make sure that the wiring length is 5 m or less.
- Connect a bleeder resistor of 1.5 kΩ (1 W or more) to the input terminal, and make sure that the load current in the
open collector transistor output of the external equipment is 20 mA or more.
Used input number FX3G PLC
X000, X001, X003, X004 60kHz
X002, X005, X006, X007 10kHz
Used input number FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs
X000, X001 60kHz
X002, X003, X004, X005 10kHz
Used input number FXU and FX2C PLCs
X000, X002, X003 10kHz
X001, X004, X005 7kHz
2. Specifying input and output variables
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3. Occupied devices
1) When using the 16-bit operation
Three devices are occupied from a device specified in .
2) When using the 32-bit operation
Six devices are occupied from a device specified in .
4. Restrictions to devices
S1: X000 to X007 (X005) can be specified.
Refer to "Cautions".
S2: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S3: Applicable to the FX3U and FX3UC PLCs only.
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
7.6.8 PLSY
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction generates a pulse signal.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
PLSY
EN ENO
PLSY 16 bits Continuous PLSY(EN, s1, s2, d);
s1 d
s2
EN
DPLSY
ENO
4
DPLSY 32 bits Continuous DPLSY(EN, s1, s2, d);
Instructions
Explanation of
How to Read
s1 d
s2
2. Set data 5
Basic Instruction
Data type
Variable Description
16-bit operation 32-bit operation
EN Execution condition Bit
Input variable Frequency data (Hz) or the word device storing the data ANY16 ANY32
Pulse quantity data or the word device storing the data ANY16 ANY32
6
EN0 Execution state Bit
Instructions
Step Ladder
Output variable
Bit device (Y) from which pulses are output Bit
3. Applicable devices
Bit Devices Word Devices Others
7
Instructions
Applied
Operand System Special Cons Real Character
System User Digit Specification Index Pointer
type User Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z z
z z z z z z z S2 S3 z z z z z 8
S1
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
Function and operation explanation
1. 16-bit operation (PLSY)
A pulse train of frequency specified by is output in the quantity specified by from the output (Y)
specified by .
Command s2 Pulse quantity
input PLSY
EN ENO d
Frequency s1 d Bit device (Y) from which
data pulses are output
Pulse quantity
s1 Frequency
s2
data
For setting s1 , s2 and d , refer to the "cautions".
2. 32-bit operation (DPLSY)
A pulse train of frequency specified by is output in the quantity specified by from the output (Y)
specified by .
Command [ s2 +1, s2 Pulse quantity]
input DPLSY
EN ENO
Bit device (Y) from which d
Label 1 *1 s1 d
pulses are output [ s1 +1, s1 Frequency]
Label 2 *2 s2
*1. This defines the frequency data.
*2. This defines the pulse quantity data.
For setting s1 , s2 and d , refer to the "cautions".
Related devices
1. Instruction execution complete flag
The instruction execution complete flag M8029 used for PLSY instruction can be used also for other
instructions. When using other instructions, setting the M8029 flag to ON or OFF, or using two or more PLSY
instructions, be sure to use each M8029 flag just after an instruction to be monitored.
For the method of using the instruction execution complete flag, refer to the following manual.
→ FX Structured Programming Manual (Device & Common)
Device Name Description
ON : Generation of specified number of pulses is completed.
Instruction execution
M8029 OFF : Generation of pulses is paused before the specified number of pulses is reached or the
complete
continuous pulse generation operation is stopped.
Command Command
input 1 PLSY input 1 PLSY
EN ENO EN ENO
K1000 s1 d Y000 K1000 s1 d Y000
K0 s2 K0 s2
M8029 Command
input 2 DPLSY
EN ENO
Label 1 *1 s1 d Y001
Command
input 2 DPLSY Label 2 *2 s2
EN ENO Command
Label 1 *1 s1 d Y000 input 1 M8029
Label 2 *2 s2 Changes by DPLSY instruction
Command corresponding to the command
M8029 input 2 M8029
input 2.
*1. This defines K1000.
*2. This defines K0.
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(Basic & Applied Instruction) 7.6 High Speed Processing
1
2. Monitoring the current number of generated pulses
Outline
The number of pulses output from Y000 or Y001 is stored in the following special data resistors.
Device
Description Contents of data
High order Low order
D8141*1 D8140*1
Accumulated number of pulses
output from Y000
Accumulated number of pulses output from Y000 by PLSY and PLSR
instructions 2
Instruction List
Accumulated number of pulses Accumulated number of pulses output from Y001 by PLSY and PLSR
D8143*1 D8142*1 output from Y001 instructions
Total accumulated number of Total accumulated number of pulses output from Y000 and Y001 by
D8137*2 D8136*2 pulses output from Y000 and Y001 PLSY and PLSR instructions.
*1. The FX0, FX0S, FX0N, FXU or FX2C PLC is not compatible with this function.
*2. The FX0, FX0S or FX0N PLC is not compatible with this function.
3
Instruction
Configuration of
The FXU PLC of V3.07 or later is compatible.
The contents of each data register can be cleared using the following program.
Command
DMOV
4
input
EN ENO
Label 1 *3 s d Label 2 *4
Instructions
Explanation of
How to Read
*3. This defines K0.
*4. This defines the low order devices in the table above.
3. How to stop the pulse output
• When the command input is set to OFF, the pulse generation is immediately stopped. When the command
5
Basic Instruction
input is set to ON again, pulse generation operation restarts from the beginning.
• When the special auxiliary relays (M) shown below are set to ON, the pulse output is stopped.
Device
Description
FX3U, FX3UC FX3G FX1S, FX1N, FX1NC
M8349 M8145, M8349 M8145 Immediately stops pulse output from Y000. 6
Instructions
Step Ladder
M8359 M8146, M8359 M8146 Immediately stops pulse output from Y001.
To restart pulse output, set the device corresponding to the output signal to OFF, and then drive the pulse
output instruction again.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.6 High Speed Processing
Cautions
1. When a word device is specified as or
When the value of the word device is changed while the instruction is executed, the following operation
results.
• When the data in is changed, the output frequency changes accordingly.
• When the data in is changed, the change (new value) becomes valid the next time the instruction is
driven.
2. Frequency
When using transistor outputs in the main unit, set the output frequency specified by as follows.
• FX3U and FX3UC PLCs : 16-bit instruction→1 to 32,767Hz
32-bit instruction→1 to 200,000Hz (When using special high speed output
adapter)
→1 to 100,000Hz (When using main unit)
• FX3G PLC : 16-bit instruction→1 to 32,767Hz
32-bit instruction→1 to 100,000Hz
• FX2N and FX2NC PLCs : 2 to 20,000Hz
• FX1NC PLC : 1 to 10,000Hz
• FX1S and FX1N PLCs : 16-bit instruction→1 to 32,767Hz
32-bit instruction→1 to 100,000Hz
• FX0, FX0S and FX0N PLCs : 10 to 2,000Hz
• FXU and FX2C PLCs : 1 to 1,000Hz
3. Specifying input and output variables
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
4. Pulse quantity
The pulse quantity can be set in the range from 1 to 32767 (PLS) for 16-bit instructions and from 1 to
2,147,483,647 (PLS) for 32-bit instructions. If set to zero, pulse generates infinitely.
5. Pulse output
1) Only a transistor output on the main unit or the following special high speed output adapters*1 can be
specified in .
• FX3U, FX3UC and FX3G : Y000, Y001
• FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs : Y000, Y001
• FX0, FX0S and FX0N PLCs : Y000
• FXU and FX2C PLCs : Valid for all Y
When using the PLSY instruction with a relay output type FX3U PLC, a special high speed output adapter
is required.
*1. Special high speed output adapters can be connected only to the FX3U PLC.
2) The duration of the ON/OFF pulses is 50% (ON = 50%, OFF = 50%)
3) The pulse output is controlled by the dedicated hardware not affected by the sequence program
(operation cycle).
4) If the command input is set to OFF during continuous pulse output, the output from the device specified
by turns OFF.
6. Restrictions to target devices
S1: Refer to item 1 of "Cautions".
S2: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S3: Applicable only to the FX3U and FX3UC PLCs.
(Special high speed output adapters can be connected only to the FX3U PLC.)
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1
7. Handling of pulse output terminals in the main units
Outline
The outputs Y000 and Y001 are the high speed
response type.
When using a pulse output instruction or
positioning instruction, adjust the load current of
the open collector transistor output. 2
Instruction List
When the load is smaller, connect a dummy
resistor in parallel to the outside of a used output PLC
terminal (Y000 or Y001) as shown in the circuit Equipment (transistor output)
load Dummy
diagram below so that the specified current shown resistor resistor [sink output]
External
below flows in the output transistor. power
1) For FX3U, FX3UC and FX3G PLCs
supply
Input circuit
Y000 3
Instruction
Configuration of
Operating voltage range : DC5 to 24V COM1
Operating current range : 10 to 160 mA
Output frequency : 100 kHz or less
2) For FX2N and FX2NC PLCs
Operating voltage range : DC5V Operating voltage range : DC12 to 24V
Operating current range : 0.1A Operating current range : 0.1A 4
Instructions
Explanation of
How to Read
Output frequency : 20 kHz or less Output frequency : 10 kHz or less
3) For FX1NC PLC
Operating voltage range : DC5V Operating voltage range : DC12 to 24V
Operating current range : 10 to 100 mA Operating current range : 50 to 100 mA
Output frequency : 10 kHz or less Output frequency : 10 kHz or less
4) For FX1S and FX1N PLCs
5
Basic Instruction
Even without connecting a dummy resistor, a pulse output of 100 kHz or less can be generated under 5 to
24 VDC (10 to 100 mA).
5) For FX0, FX0S, FX0N, FXU and FX2C PLCs
Have a current of about 100 mA flow for the FX2C PLC and a current of about 200 mA flow for the FX0,
FX0S, FX0N and FXU PLCs and extension.
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.6 High Speed Processing
8. Cautions on using special high speed output adapters (FX3U PLC)
1) Outputs of special high speed output adapters work as differential line drivers.
2) Set the pulse output type setting switch in a special high speed output adapter to the "pulse train +
direction" (PLS - DIR) side.
If the switch is set to the "forward rotation pulse train - reverse rotation pulse train" (FP - RP) side, normal
operation is disabled. The pulse output destination changes depending on the PLC output status as
shown in the table below.
Pulse output Output affecting
Operation
destination operation
While Y004 is ON, pulses are output from Y000 in the high speed output adapter.
= Y000 Y004
While Y004 is OFF, pulses are output from Y004 in the high speed output adapter.
While Y005 is ON, pulses are output from Y001 in the high speed output adapter.
= Y001 Y005
While Y005 is OFF, pulses are output from Y005 in the high speed output adapter.
3) Set the pulse output type setting switch while the PLC is in STOP or while the power is OFF.
Do not manipulate the pulse output type setting switch while pulses are being output.
4) When special high speed output adapters are connected, the same output numbers in the main unit are
assigned as shown in the table below.
Only wire the appropriate terminals. (Use either one only. Do not connect to the other terminal.)
Outputs of special high speed output adapters and main units operate as follows.
Assignment of output numbers in special high speed output adapters
Setting name in Output number
Status of output type
Signal name each positioning 1st unit 2nd unit
setting switch
instruction 1st axis 2nd axis 3rd axis 4th axis
Forward rotation pulse Pulse output destina-
Y000 Y001 Y002 Y003
train (FP) tion
"FP - RP" side
Reverse rotation pulse Rotation direction
Y004 Y005 Y006 Y007
train (RP) signal
Pulse output destina-
Pulse train Y000 Y001 Y002 Y003
tion
"PLS - DIR" side
Rotation direction
Direction Y004 Y005 Y006 Y007
signal
Output operation
Output operation
While instruction is activated, relevant output is ON. (LED is also ON.)
Relay output type main unit
Use special high speed output adapter.
Operated (ON/OFF)
Special high speed output adapter
Set the output frequency to "200 kHz" or less.
Operated (ON/OFF)
Transistor output type main unit
Set the output frequency to "100 kHz" or less.
9. Others
1) When using the same output relay (Y000 or Y001) in several instructions.
While a pulse output monitor (BUSY/READY) flag is ON a pulse output instruction and positioning
instruction for the same output relay cannot be executed.
While a pulse output monitor flag is ON even after the instruction drive contact is set to OFF, a pulse
output instruction or positioning instruction for the same output relay cannot be executed.
Before executing such an instruction, wait until the pulse output monitor flag turns OFF and one or more
operation cycles pass.
(Only the FX3U, FX3UC, FX3G, FX1N, FX1NC and FX1S PLCs are compatible with the pulse output monitor
flags.)
Pulse output destination Pulse output monitor flag
device FX3U, FX3UC FX3G FX1N, FX1NC, FX1S
Y000 M8340 M8340, M8147 M8147
Y001 M8350 M8350, M8148 M8148
2) "Frequency control mode" in which DHSZ and DPLSY instructions are combined can be used only once
in a program.
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1
Program examples (When outputting pulses without any limitation)
Outline
When the device specified by is set to K0, pulses are output without any limitation.
[Structured ladder]
No limitation (K0)
Command
input
EN
DPLSY
ENO Y000 2
Instruction List
*1 s1 d
VAR_01 Y000 1000Hz
VAR_02 *2 s2
*1. VAR_01 is a global label and is defined as K1000.
*2. VAR_02 is a global label and is defined as K0.
3
[ST]
Instruction
Configuration of
DPLSY(X000,VAR_01,VAR_02,Y000);
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.6 High Speed Processing
7.6.9 PWM
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction outputs pulses with a specified period and ON duration.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
PWM
EN ENO
PWM 16 bits Continuous PWM(EN, s1, s2, d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Pulse width (ms) data or word device storing the data ANY16
variable
Period data (ms) or word device storing the data ANY16
Output ENO Execution state Bit
variable Device (Y) from which pulses are to be output Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Cons Real Character
System User Digit Specification System User Index Pointer
type Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z z
z z z z z z z S2 S3 z z z z z
S1 z
S: Refer to "Cautions".
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1
Function and operation explanation
Outline
1. 16-bit operation (PWM)
Pulses whose ON pulse width (ms) is specified by are output in periods (ms) specified by to the
device specified by
Command
input PWM t 2
Instruction List
EN ENO d
t s1 d Device (Y) from which
T0 s2 pulses are to be output T0
Period
Pulse width
• Specify the pulse width "t" in . 3
Allowable setting range: 0 to 32,767ms
Instruction
Configuration of
• Specify the period "T0" in
Allowable setting range: 1 to 32,767ms
• Specify the output (Y) number from which pulses are to be output in .
Allowable setting range: Refer to "Cautions".
4
Cautions
Instructions
Explanation of
How to Read
1. Setting the pulse width and period
Make sure that the pulse width and period satisfy the relationship " ≤ ".
2. Pulse output
5
1) Only the following outputs can be specified in according to the system configuration.
Basic Instruction
• For FX3U, FX3UC and FX3G PLCs
- When using special high speed output adapters*1: Y000, Y001, Y002*2, Y003*2
- When using transistor outputs on the main unit (that is, when not using special high speed output
adapters): Y000, Y001, Y002*3
*1. Special high speed output adapters can be connected only to the FX3U PLC.
6
Instructions
Step Ladder
When using the PWM instruction with a relay output type FX3U PLC, a special high speed output
adapter is required.
*2. When specifying Y002 or Y003 on a special high speed output adapter, a second special high
speed output adapter is required.
*3. "Y002" cannot be used for the 14- or 24-type FX3G PLC.
7
• For FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs
Instructions
Applied
Only Y000 or Y001 is valid (transistor output).
• For FX0, FX0S and FX0N PLCs
Only Y001 is valid (transistor output).
• For FXU and FX2C PLCs
All Ys are valid (transistor output). 8
2) The pulse output is controlled by interrupt processing not affected by the sequence program (operation
Function
and Pulse Catch
Interrupt Function
cycle).
3) If the command input is set to OFF, the output from the device specified by turns OFF.
4) While a pulse output monitor (BUSY/READY) flag is ON, a pulse output or positioning instruction for the
same output relay cannot be executed.
While a pulse output monitor flag is ON even after the instruction derive contact is set to OFF, a pulse A
and addresses
between devices
Relationships
output or positioning instruction for the same output relay cannot be executed.
Before executing a pulse output or positioning instruction, wait until the pulse output monitor flag turns
OFF and one or more operation cycles pass.
(Only the FX3U, FX3UC and FX3G PLCs are compatible with the pulse output monitor flags.)
Pulse output destination device Pulse output monitor flag
Y000 M8340
Y001 M8350
Y002 M8360
Y003 M8370
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3. Restrictions to target devices
S1: Refer to item 1 of "Cautions".
S2: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S3: Applicable only to the FX3U and FX3UC PLCs.
("Y002" cannot be used for the 14- or 24-type FX3G PLC.)
(Special high speed output adapters can be connected only to the FX3U PLC.)
4. Cautions on using special high speed output adapters
→ Refer to item 7 in 7.6.9 "Cautions".
Program examples
When the contents of D10 are changed in the range from "0" to "50" in the program example shown below,
the average output from Y000 will be in the range from 0 to 100%.
When the contents of D10 exceed "50", it becomes an error.
In this program example, the FX 3U series main unit (sink output) is used. For wiring details, refer to the
manual of the PLC used.
[Structured ladder]
X0 PWM D10
EN ENO Y000
D10 s1 d Y000
K50 s2
50ms
[ST]
PWM(X0,D10,K50,Y000);
Example of smoothing circuit
510Ω R
1kΩ (1kΩ)
0V 24V
PLC 5V P + 10V
1kΩ 22Ω E e V
12V C
1kΩ 470µF
1kΩ
COM1 Y000 Y001 Y002 Y003
R>>P
τ =R(k Ω) × C(µF)=470ms>>To
The time constant τ of the filter should be considerably larger than the pulse cycle T0.
The ripple value " Δ e" in the mean output current "e" is approximately " Δ e ≤ To ".
e τ
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1
7.6.10 PLSR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This pulse output instruction has the acceleration/deceleration function.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
PLSR
EN ENO
PLSR 16 bits Continuous s1 d PLSR(EN, s1, s2, s3, d);
s2
s3
DPLSR
4
Instructions
Explanation of
How to Read
EN ENO
DPLSR 32 bits Continuous s1 d DPLSR(EN, s1, s2, s3, d);
s2
s3
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
6
Maximum frequency data (Hz) or the word device storing the data ANY16 ANY32
Instructions
Step Ladder
Input Total number of output pulses (PLS) or word device storing the
variable ANY16 ANY32
data
Acceleration/deceleration time (ms) data or word device storing the
ANY16 ANY32
data
Output
variable
ENO Execution state
Device (Y) from which pulses are to be output
Bit
Bit
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System User Digit Specification
System Special
Index
Cons Real Character
Pointer
8
User Unit tant Number String
Function
and Pulse Catch
Interrupt Function
type
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z z
z z z z z z z S2 S3 z z z z z
z z z z z z z S2 S3 z z z z z A
S1 z
and addresses
between devices
Relationships
S: Refer to "Cautions".
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Function and operation explanation
1. 16-bit operation (PLSR)
Pulses are output from output (Y) specified by by the number of output pulses specified by with
acceleration/deceleration to the maximum frequency specified by over the time (ms) specified by .
Command input PLSR Pulse frequency (Hz) Maximum
frequency s1
EN ENO
Maximum frequency(HZ) s1 d Output number
Total number of output s2 (Y000,Y001)
pulses(PLS)
Acceleration/deceleration s3 Total number of
time(ms) output pulses
s2 (PLS)
Refer to "Cautions" for setting , , and
.
s3 Acceleration/ s3 Acceleration/
deceleration time deceleration time
2. 32-bit operation (DPLSR)
Pulses are output from output (Y) specified by by the number of output pulses specified by with
acceleration/deceleration to the maximum frequency specified by over the time (ms) specified by .
Command input DPLSR
EN ENO
Label 1 *1 s1 d Output number
Label 2 *2 s2 (Y000,Y001)
Label 3 *3 s3
*1. This defines the maximum frequency (Hz).
*2. This defines the total number of output pulses (PLS).
*3. This defines the acceleration/deceleration time (ms).
Refer to "Cautions" for setting , , and .
3. Pulse output specifications
• Simple positioning (with the acceleration/deceleration function)
The operation pattern is as shown below:
Pulse frequency s1 Maximum frequency (Hz)
(Hz)
s2 Total number of output pulses
s3 Acceleration/ s3 Acceleration/
deceleration time deceleration time
• Output processing
The pulse output is controlled by the dedicated hardware regardless of the operation cycle.
• Data change while the instruction is executed
Even if operands are overwritten while the instruction is executed, such changes are not reflected
immediately. The changes become valid the next time the instruction is driven.
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1
Related devices
Outline
1. Instruction execution complete flag
Device Name Description
OFF :The command input is OFF, or pulses are being output. (This flag does not turn ON if the pulse
M8029
Instruction execution
complete
output is interrupted in the middle of output.) 2
ON :Output of the number of pulses set in is completed.
Instruction List
2. Monitoring the number of generated pulses
The number of pulses output from Y000 or Y001 is stored in the following special data registers:
Device
High Low Description Contents of data 3
order order
Instruction
Configuration of
Accumulated number of pulses Accumulated number of pulses output from Y000 by PLSY and PLSR
D8141 D8140
output from Y000 instructions
Accumulated number of pulses Accumulated number of pulses output from Y001 by PLSY and PLSR
D8143 D8142
output from Y001 instructions
D8137 D8136
Total accumulated number of Total accumulated number of pulses output from Y000 and Y001 by PLSY and
pulses output from Y000 and Y001 PLSR instructions 4
Instructions
Explanation of
How to Read
The contents of each data register can be cleared using the following program.
Command
input DMOV
EN ENO
5
Label 1 *1 s d Label 2 *2
*1. This defines K0.
Basic Instruction
*2. This defines the low order device in the table above.
3. How to stop the pulse output
• When the command input is set to OFF, the pulse generation is immediately stopped. When the command
input is set to ON again, pulse generation operation restarts from the beginning. 6
• When the special auxiliary relays (M) shown below are set to ON, the pulse output is stopped.
Instructions
Step Ladder
Device
Description
FX3U, FX3UC FX3G FX1S, FX1N, FX1NC
M8349 M8145, M8349 M8145 Immediately stops pulse output from Y000.
M8359 M8146, M8359 M8146 Immediately stops pulse output from Y001.
7
To restart pulse output again, set the device corresponding to the output number to OFF, and then drive
Instructions
Applied
the pulse output instruction again.
Cautions
1. Maximum frequency 8
When using transistor outputs on the main unit, set the maximum frequency specified by as follows.
Function
and Pulse Catch
Interrupt Function
• For FX3U and FX3UC PLCs: 10 to 100,000 Hz or less (200,000 Hz or less when using special high speed
adapter.)
• For FX3G PLC : 10 to 100,000 Hz or less
• For FX2N and FX2NC PLCs : 10 to 20,000 Hz
A
• For FX1S and FX1N PLC : 10 to 100,000 Hz
and addresses
between devices
Relationships
• For FX1NC PLC : 10 to 10,000 Hz
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2. Total number of output pulses
Set the total number of output pulses specified by as follows.
• For FX3U and FX3UC PLCs : 16-bit instruction→1 to 32,767PLS
32-bit instruction→1 to 2,147,483,647PLS
• For FX3G PLC : 16-bit instruction→110 to 32,767PLS
32-bit instruction→110 to 2,147,483,647PLS
• For FX2N and FX2NC PLCs : 16-bit instruction→110 to 32,767PLS
32-bit instruction→110 to 2,147,483,647PLS
When setting a value less than "110", the operation is as follows.
PLC version V3.00 or before : The pulses are not generated normally.
PLC version V3.00 or later : One tenth of the maximum frequency is generated.
If the maximum frequency is 100 Hz or less, "10 Hz" is generated.
• For FX1S, FX1N and FX1NC PLCs : 16-bit instruction→110 to 32,767(PLS)
32-bit instruction→110 to 999,999(PLS)
When setting a value less than "110", the pulses are not generated normally.
3. Acceleration/deceleration time
Set the acceleration/deceleration time specified by as follows.
For FX3U, FX3UC and FX3G PLCs: 50 to 5000 (ms)
For FX2N and FX2NC PLCs: 5000 (ms) or less
Follow, however, the conditions a) through d).
a) Make the acceleration/deceleration time be 10 times or more the PLC's maximum scan time (value of
D8012 or greater). If set to less than 10 times, the acceleration/deceleration timing becomes instable.
b) The following equation defines the allowable minimum that can be set as the acceleration/
deceleration time.
90000
s3 ≥ ×5
s1
If setting a value less than the equation indicates, the error in the acceleration time becomes large. If
set to less than "90000/ , operation takes place while rounding it up to "90000/ ".
c) The following equation defines the allowable maximum that can be set as the acceleration/
deceleration time.
s2
s3 ≤ × 818
s1
d) The number of speed changes (steps) for the acceleration/deceleration is fixed to "10 times" as shown
in the previous page.
If unable to set the PLC to these conditions, lower the maximum frequency specified by .
• For FX1S, FX1N and FX1NC PLCs: 50 to 5000(ms)
4. Pulse output
• Only a transistor output on the main unit or Y000 or Y001 on a special high speed output adapter*1 can be
specified in .
*1. Special high speed output adapters can be connected only to the FX3U PLC.
When using the PLSR instruction with a relay output type FX3U PLC, a special high speed output
adapter is required.
• The duration of the ON/OFF pulses is 50% (ON = 50%, OFF = 50%)
• The pulse output is controlled by the dedicated hardware not affected by the sequence program (operation
cycle).
• If the command input is set to OFF during continuous pulse output, the output from the device specified by
turns OFF.
5. Specifying input and output variables
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
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1
6. Restrictions to target devices
Outline
S1: Refer to item 4 in "Cautions".
S2: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S3: Applicable only to the FX3U and FX3UC PLCs.
(Special high speed output adapters can be connected only to the FX3U PLC.)
7. Handling of pulse output terminals in the main units of the FX3U, FX3UC and FX3G PLCs.
2
Instruction List
→ Refer to item 6 in 7.6.8 "Cautions".
8. Cautions on using special high speed output adapters
→ Refer to item 7 in 7.6.8 "Cautions".
9. Others 3
1) When using the same output relay (Y000 or Y001) in several instructions.
Instruction
Configuration of
While a pulse output monitor (BUSY/READY) flag is ON a pulse output instruction and positioning
instruction for the same output relay cannot be executed.
While a pulse output monitor flag is ON even after the instruction drive contact is set to OFF, a pulse
output instruction or positioning instruction for the same output relay cannot be executed.
Before executing such an instruction, wait until the pulse output monitor flag turns OFF and one or more
operation cycles pass.
4
Instructions
Explanation of
How to Read
(Only the FX3U, FX3UC, FX1N, FX1NC and FX1S PLCs are compatible with the pulse output monitor flags.)
Pulse output destination Pulse output monitor flag
device FX3U, FX3UC FX3G FX1N, FX1N, FX1S
Y000 M8340 M8340, M8147 M8147
Y001 M8350 M8350, M8148 M8148 5
Basic Instruction
2) Minimum frequency for FX1S and FX1N PLCs
The output frequency of the PLSR instruction ranges from 10 to 100,000 Hz.
If the maximum speed or the speed during acceleration or deceleration goes out of this range, the value
is automatically rounded up or down to a value within the range.
Note, however, that the following equation defines the minimum output frequency actually generated.
minimum
6
Instructions
Step Ladder
maximum frequency S1 Hz (2 (acceleration or deceleration time S3 ms 1000)) = frequency of
output pulse
frequency
• Note that the frequency after the first step acceleration or the final frequency after deceleration does
not go below the value calculated by the above equation.
[Example] Maximum speed: 50000Hz Acceleration/deceleration time: 100ms
7
Instructions
Applied
50000 ÷ (2 × (100 ÷ 1000)) = 500Hz
When setting 50000 Hz into the maximum frequency S1
→ The actual output frequency is "500 Hz" at the first step of acceleration and the last step of
deceleration. 8
Function
and Pulse Catch
Interrupt Function
500Hz 500Hz
500Hz
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.7 Handy Instruction
7.7 Handy Instruction
7.7.1 IST
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for controlling the initial state and special auxiliary relay automatically in a program by
stepladder.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IST
EN ENO
IST 16 bits Continuous IST(E, s, d1, d2);
s d1
d2
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Beginning bit device of operation mode changeover switch Bit
ENO Execution state Bit
Output Minimum state of practical state in automatic mode [d1<d2] Bit
variable
Maximum state of practical state in automatic mode [d1<d2] Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zzz S1 z
S2 z
S2 z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.7 Handy Instruction
1
Function and operation explanation
Outline
Command input IST
EN ENO
Beginning bit device s d1 Minimum state
of operation mode d2 Maximum state
changeover switch
2
• In , designate beginning input of operation mode.
Instruction List
Selection switch for operation mode occupies 8 points from the beginning device designated in , and
the following switch functions are assigned individually.
As shown in the table below, when X020 is assigned, X020 to X024 must be set in rotary switch so as not
to be turned ON simultaneously.
Wiring is not needed for switches not in use, but such switches cannot be used in other applications 3
because they are occupied by IST command.
Instruction
Configuration of
Device No. Device No.
Source Switch function Source Switch function
(example) (example)
X020 Individual operation +4 X024 Continuous operation
X021 Return to home position X025 Return home start
+1
+2 X022 Stepping
+5
+6 X026 Automatic start
4
Instructions
Explanation of
How to Read
+3 X023 One-cycle operation +7 X027 Stop
• In , designate minimum number of practical state (for automatic mode).
• In , designate maximum number of practical state (for automatic mode).
1. Control of device by switch operation (occupied device)
5
Basic Instruction
When command input is turned ON, next device is automatically changed over and controlled. No change if
command input is turned OFF.
Device No. Operation function Device No. Operation function
M8040 Transfer ban S0 Initial state of individual operation
M8041*1 Transfer start S1 Initial state of return to home position 6
M8042 Start pulse S2 Initial state of automatic operation
Instructions
Step Ladder
M8043*1 Return home end
M8045 All output reset ban
M8047*2 STL monitor valid
*1. Cleared when changed from RUN to STOP
7
*2. Process during END command execution
Instructions
Applied
The following states should not be programmed as general states.
Device No. Operation function
Occupied for initial state.
S0 to S9
• S0 to S2 can be used for individual operation, return to home position, or automatic operation as specified
above.
8
Function
and Pulse Catch
Interrupt Function
• S3 to S9 can be used freely.
S10 to S19 Occupied for return to home position.
If return home end (M8043) is not ON, all outputs are OFF if changed over to individual (X020), return to
home position (X021), or automatic (X022, X023, X024).
Automatic operation can be resumed after returning to home position completely. A
→ Before introduction, refer to "IST command introduction examples (examples of work transfer
and addresses
between devices
Relationships
mechanism)" given below.
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Cautions
1. Devices designated in and switches to be used
Not all mode selection switches are used.
Vacant numbers (not usable in other applications) are designated in switches not in use.
2. Program sequence of IST command and STL command
• IST command must be programmed prior to a series of STL circuits such as states S0 to S2.
3. State to be used in operation for return to home position
Use S10 to S19 for state for return to home position.
In final state for return to home position, after setting M8043, terminate by self-resetting.
4. Limit times of use of command
IST command can be programmed only once in the program.
5. Object devices are restricted.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: The device range is limited as follows by the PLC.
S20 to S899, 1000 to S4095 (FX3U, FX3UC, FX3G PLCs)
S20 to S899 (FX2N, FX2NC PLCs) (FXU, FX2C PLCs)
S20 to S999 (FX1N, FX1NC PLCs)
S20 to S127 (FX1S PLC) (FX0N PLC)
S20 to S63 (FX0, FX0S PLCs)
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(Basic & Applied Instruction) 7.7 Handy Instruction
1
IST command equivalent circuit
Outline
Detail of special auxiliary relay (M) or initial state (S0 to S9) controlled automatically by IST command is as
shown in the following equivalent circuit. (Read as reference knowledge.)
This equivalent circuit cannot create program.
1. Equivalent circuit 2
X024 Conti- M8041 X027 X022 Stepping
Instruction List
nuous M8041 M8041 is put in action when start button is
One- pressed in automatic mode. In continuous mode,
Stop self-holding action is set, and it is canceled
X026 Automatic start X023 cycle Transfer
start when stop button is pressed.
Conti-
X024 nuous
X026 Automatic start X020
EN
PLS
ENO
*1
3
Instruction
Configuration of
X025 Return home Individual d M8042
start
Start pulse
X020 Individual
M8040 is put in action in stepping mode, and is
M8040
turned OFF every time start button is pressed.
X021 Return Transfer ban In return home or one-cycle mode, self-holding
home X027 Stop M8042
action is set when stop button is pressed, and
it is canceled when start button is pressed.
4
Start pulse
Instructions
Explanation of
How to Read
X022 Stepping
X023 One-
cycle X027 Stop
M8002 Initial pulse
M8040 Self-holding
5
Basic Instruction
M8000 RUN monitor
M8047
*1 STL monitor valid
X020 Individual M8044
S 0
Home
M8043 Initial state is changed over depending on each
mode input, and M8043 is also controlled. 6
However, M8044 and M8043 must be also
Instructions
Step Ladder
position Return home end
condition controlled by the user program.
*1 RST
X021 Return home X025
S 1 EN ENO
Return d M8043
home start
7
*1 Return home
X022 to X024 M8043 M8041 end signal reset
S 2
Instructions
Applied
Automatic Return Transfer start
home end
*1. Equivalent circuit is presented for explanation, and it cannot be actually programmed as shown
herein.
2. Changeover of operation mode 8
When the modes are changed over in individual, return home, and automatic modes, unless the machine is at
Function
and Pulse Catch
Interrupt Function
home position, all outputs and former states are reset in batch. (When M8045 is driven, all outputs*1 are not
reset.)
Return home S1 M8043
Changeover Batch resetting of former
A
X021 Return to
S2 home end individual states, and resetting of
Automatic related OUT output.
X020
and addresses
between devices
Relationships
X022 to X024
M8045
All output reset ban
Individual
X020 Changeover
to return All outputs Y are reset
S2 when M8045 is OFF.
Automatic home
X022 to X024 X021
If changed over from automatic to return home during action of S2, the states other than initial state and outputs are not reset.
*1. All outputs: outputs not driven from the state of the device designated in (Y), and outputs driven
by OUT, SET commands from the state of the device designated in (Y).
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IST command introduction examples (examples of work transfer mechanism)
1. Operation mode
Mechanism for transferring the work from
Stepping X022
Return
home
point A to point B by robot hand
Return to One-cycle
home position operation Y003 Right move X003
X021 X023
X025 Y004 Left move
X004
Individual Continuous Power supply
operation operation X002 Descend
X020 X024
Ascend Left move Unclamp Y002 Y000
X005 X006 X007 Start X026 Emergency stop Ascend X001
Descend Right move Clamp
X010 X011 X012 Stop X027 Clamp Y001
Unclamp Y001
Work
For individual operation of robot hand as shown on right
Pushbutton for external circuit for turning Point A Point B
ON/OFF power of load
Operation mode Operation content
Individual
Mode for turning ON/OFF each load by individual pushbutton.
operation:
Manual
Return to home
Mode for returning machine to home position automatically when return home pushbutton is pressed.
position:
Stepping: To advance process by process every time start button is pressed.
When start button is pressed at home position, the machine is operated by one cycle automatically and
One-cycle
stops at home position. If stop button is pressed on the way, the process stops immediately, and start button
Automatic operation:
is pressed, the operation is resumed from the stopped position, and stops automatically at home position.
Continuous When start button is pressed at home position, continuous repeating operation is started. When stop button
operation: is pressed, the machine operates to home position, and then stops.
2. Transfer mechanism
Start
Left limit X004
X026
4) Right move Y003
Home
position
8) Left move Y004
Upper limit
Right limit X002
1) Descend X003
Y000 Upper limit X002
5) Descend
Y000 7) Ascend
Lower limit 3) Ascend Y002
X001 Y002
Lower limit
X001
Home position condition?
Clamp Upper limit (X002=ON), left limit Unclamp
(X004=ON), unclamp (Y001=OFF).
2) Clamp 6) Unclamp
Y001 ON Y001 OFF
The home position is the upper left corner, and the work is sequentially transferred from left to right in the
sequence of descend, clamp, ascend, right move, descend, unclamp, ascend, and left move.
Solenoid valve of double solenoid (two inputs: drive/non-drive) is used for descend/ascend, left move/right
move, and solenoid of single solenoid (active only while energized) is used for clamp.
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1
3. Assignment of mode select inputs
Outline
In order to use IST command, inputs of the following serial numbers must be assigned in the mode inputs.
If the numbers are not serial, or modes are partly omitted, the array is modified by using auxiliary relays as
shown below, which is used as the mode designation beginning input.
- X020: Individual operation
- X021: Return to home position 2
- X022: Stepping
Instruction List
- X023: One-cycle operation
- X024: Continuous operation
- X025: Return home start
- X026: Automatic start
- X027: Stop
3
Instruction
Configuration of
When inputs are not serial numbers In the case of continuous/return In the case of continuous/
home mode only individual mode only
(Example) X030:Individual operation (Example) X030:Return to home position (Example) X030:Individual operation
4
X035:Return to home position X031:Continuous operation X031:Continuous operation
X033:Stepping X032:Common for automatic X032:Automatic start
X040:One-cycle operation start and return home start X033:Stop
Instructions
Explanation of
How to Read
X032:Continuous operation X033:Stop
X034:Return home start
X026:Automatic start
X041:Stop
Basic Instruction
X030 M8000 X030
M 0 Individual M 0 M 0 Individual
operation Not active operation
X035
RUN monitor
X030 M8000 6
M 1 Return to home M 1 Return to home M 1
Instructions
Step Ladder
position position
X033 M8000
M 2 Stepping M 2 Not active M 2
X040
7
M 3 One-cycle M 3 Not active M 3
operation
Instructions
Applied
X032 X031 X031
M 4 Continuous M 4 Continuous M 4 Continuous
operation operation operation
X034 X032 M8000
M 5 Return home M 5 Return home M 5
start start
X026
M 6 Automatic start M 6 Automatic start
X032
M 6 Automatic start
8
Function
and Pulse Catch
Interrupt Function
X041 X033 X033
M 7 Stop M 7 Stop M 7 Stop
In this example, M0 is used as the mode designation beginning input.
M8000 IST
A
and addresses
between devices
Relationships
EN ENO
RUN M0 s d1 S20
monitor d2 S29
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
4. Special auxiliary relays for IST command(M)
Auxiliary relays (M) used in IST command are divided into those controlled automatically by the command
depending on the circumstances, and others that must be controlled by the program depending on the
operation preparation or purpose of control.
1) Those controlled automatically by IST command
a) M8040: Transfer ban
When this auxiliary relay is put in action, transfer of all states is banned.
individual : Always M8040 is active.
Return home, one-cycle : When stop button is pressed, the operation is held until start button is
pressed.
Stepping : Always M8040 is active. However, only when start button is pressed, the
operation is stopped, and is transferred.
Other : Operation is held when PLC is changed from STOP to RUN, and is
canceled when start button is pressed.
In transfer ban state, the output in the state continues to operate.
b) M8041: Transfer start
This is the auxiliary relay required as transfer condition from initial state S2 to next state.
Individual, return home : Not active.
Stepping, one-cycle : Active only while start button is pressed.
Continuous : Operation is held when start button is pressed, and canceled when stop
button is pressed.
c) M8042: Start pulse
Active momentarily only when start button is pressed.
d) M8047: STL monitor valid
M8047 is turned ON when IST command is used.
STL monitor is valid when M8047 is ON, and active state numbers (S0 to S899) are stored in the
special auxiliary relays D8040 to D8047 in numerical order.
As a result, up to eight operation state numbers can be monitored.
If any one of these states is active, the special auxiliary relay M8046 operates.
2) Those driven by sequence program
→ For detail of these controls, see next page.
a) M8043: Return home end
In the return home mode, when the machine reaches the home position, operate this special auxiliary
relay (M) from the user side program.
b) M8044: Home position condition
You can drive this special auxiliary relay by detecting the home position condition of the machine. The
signal is valid in all modes.
c) M8045: All output reset ban
When the modes are changed over in individual, return home, and automatic modes, unless the
machine is at home position, all outputs and operation states are reset. However, when the M8045 is
driven, only the operation states are reset.
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1
5. Program examples
Outline
1) Circuit diagram
In the sequence circuit shown below, other portions than the shaded area are routine circuits. You can
program the shaded area circuit according to the content of the control.
a) Initial circuit
During operation of the machine, the operation can be changed over freely within the "automatic 2
operation' mode (stepping/one-cycle/continuous).
Instruction List
During operation of the machine, if changed over among "individual operation"/ "return home"/
"automatic operation", for safety precaution, all outputs are once reset, and the mode after
changeover is valid.
(You cannot reset when all outputs reset ban M8045 is turned ON.)
[Structured ladder] [ ST ] 3
The home position status is detected, and used as the M8044:= X004 AND X002 AND NOT Y001;
Instruction
Configuration of
condition for start of transfer to automatic operation. IST(M8000, X020, S20, S27);
X004 X002 Y001
M8044 Home position
condition
Left Upper Unclamp
limit
M8000
limit
IST
4
Initial
Instructions
Explanation of
How to Read
EN ENO state
RUN X020 s d1 S20
monitor d2 S27
b) Individual operation
Program is not required when individual mode is not available. 5
[Structured ladder] [ ST ]
Basic Instruction
Clamp SET(X012, Y001);
X012 Clamp command SET RST(X007, Y001);
EN ENO Y002:= X005 AND NOT Y000;
d Y001 Y000:= X010 AND NOT Y002;
X007 Unclamp command RST
Y004:= X006 AND X002 AND NOT Y003;
Y003:= X011 AND X002 AND NOT Y004;
6
Instructions
Step Ladder
EN ENO
d Y001
Ascend
X005 command Y000
Y002 Ascend
Descend
X010 command Y002
Y000 Descend 7
Instructions
Applied
X006 Left move X002 Y003
command
Y004 Left move
X011 Right move X002 Y004
command
Y003 Right move
Upper limit
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
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c) Return to home position
Program is not required when return home mode is not available. However, before automatic
operation, return home end M8043 must be once set.
[Structured ladder]
STL STL(TRUE, S1); Process
EN ENO SET(X025, S10); of S1
S1 s STL(TRUE, S10);
Process RST(TRUE, Y001);
of S1 Process
X025 SET RST(TRUE, Y000); of S10
EN ENO OUT(TRUE, Y002);
Return home start d S10
SET(X002, S11);
STL(TRUE, S11);
RST(TRUE, Y003); Process
STL OUT(TRUE, Y004); of S11
EN ENO SET(X004, S12);
S10 s STL(TRUE, S12);
Process
SET(TRUE, M8043); of S12
RST(M8043, S12);
RST Unclamp
EN ENO
d Y001
RST Descend Process
cancel of S10
EN ENO
d Y000
Y002 Ascend
X002 SET
EN ENO
Upper limit d S11
STL
EN ENO
S11 s
RST Right move
EN ENO cancel
d Y003 Process
of S11
Y004 Left move
X000 SET
EN ENO
Left limit d S12
STL
EN ENO
S12 s
SET Use states S10 to S19 in operation of return Process
EN ENO home, and in final state, by driving M8043, of S12
d you can self-reset.
M8043
M8043 RST
EN ENO
d S12
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FXCPU Structured Programming Manual 7 Applied Instructions
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1
d) Automatic operation (stepping/one-cycle/continuous)
Outline
[Structured ladder]
STL
EN ENO
S2 s
Process of S2
2
Instruction List
M8041 M8044 SET
EN ENO
Transfer Home position d S20
start condition
STL
EN ENO 3
S20 s
Instruction
Configuration of
Y000 Descend Process of S20
X001
EN
SET
ENO
4
Instructions
Explanation of
How to Read
Lower limit d S21
STL
EN ENO
S21
5
s
Basic Instruction
SET Clamp
EN ENO
d Y001
Process of S21
EN
OUT_T
ENO
6
Instructions
Step Ladder
TC0 TCoil
K10 TValue
TS0 SET
7
EN ENO
d S22
Instructions
Applied
STL
EN ENO
S22 s
Y002 Ascend Process of S22
8
Function
and Pulse Catch
Interrupt Function
X002 SET
EN ENO
Upper limit d S23
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
[Structured ladder]
STL
EN ENO
S23 s
Y003 Right move Process of S23
X003 SET
EN ENO
Right limit d S24
STL
EN ENO
S24 s
Y000 Descend Process of S24
X001 SET
EN ENO
Lower limit d S25
STL
EN ENO
S25 s
RST Unclamp
EN ENO
d Y001
Process of S25
OUT_T
EN ENO
TC1 TCoil
K10 TValue
TS1 SET
EN ENO
d S26
STL
EN ENO
S26 s
Y002 Ascend Process of S26
X002 SET
EN ENO
Upper limit d S27
STL
EN ENO
S27 s
Process of S27
Y004 Left move
X004
S2
Left limit
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(Basic & Applied Instruction) 7.7 Handy Instruction
Outline
[ ST ]
STL(TRUE, S2);
Process of S2
2
IF(M8041 AND M8044) THEN SET(TRUE, S20);
STL(TRUE, S20);
OUT(TRUE, Y000); Process of S20
Instruction List
SET(X001, S21);
STL(TRUE, S21);
SET(TRUE, Y001);
OUT_T(TRUE, TC0, K10); Process of S21
SET(TS0, S22);
STL(TRUE, S22);
OUT(TRUE, Y002); Process of S22
3
Instruction
Configuration of
SET(X002, S23);
STL(TRUE, S23);
OUT(TRUE, Y003); Process of S23
SET(X003, S24);
STL(TRUE, S24);
OUT(TRUE, Y000);
SET(X001, S25);
Process of S24
4
Instructions
Explanation of
How to Read
STL(TRUE, S25);
RST(TRUE, Y001);
Process of S25
OUT_T(TRUE, TC1, K10);
SET(TS1, S26);
STL(TRUE, S26);
5
OUT(TRUE, Y002); Process of S26
SET(X002, S27);
STL(TRUE, S27);
Basic Instruction
OUT(TRUE, Y004); Process of S27
OUT(X004, S2);
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.2 SER
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for searching same data and maximum value, minimum value from the table of data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SER
EN ENO
SER 16 bits Continuous s1 d SER(E, s1, s2, n, d);
s2
n
SERP
EN ENO
SERP 16 bits Pulse s1 d SERP(EN, s1, s2, n, d);
s2
n
DSER
EN ENO
DSER 32 bits Continuous s1 d DSER(EN, s1, s2, n, d);
s2
n
DSERP
EN ENO
DSERP 32 bits Pulse s1 d DSERP(EN, s1, s2, n, d);
s2
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Beginning device for searching same data, maximum value,
ANY16 ANY32
minimum value
Input
variable Value for searching same data, maximum value, minimum value,
ANY16 ANY32
or its storage destination device
The number for searching same data, maximum value, minimum
ANY16
value
ENO Execution state Bit
Output
variable Beginning device for storing the numbers after searching same ARRAY [1..5] ARRAY [1..5]
data, maximum value, minimum value OF ANY16 OF ANY32
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1
3. Applicable devices
Outline
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzz S1 S2 z
2
Instruction List
z z z z z z z S1 S2 zz z z z
z z z z z z S1 S2 z
z S1 z z
S: Refer to "Cautions". 3
Instruction
Configuration of
Function and operation explanation
1. 16-bit operation
In n pieces of data beginning from the device designated in , same data as the device designated in
is searched, and the result is stored in the device designated in . 4
Instructions
Explanation of
How to Read
Command input SER
EN ENO
Beginning device for searching same
data, maximum value, minimum value s1 d Label 3 *1
Value for searching same data,
maximum value, minimum value,
or its storage destination device
s2
5
Basic Instruction
The number for searching same data, n
maximum value, minimum value
*1. This is to define the beginning device for storing the numbers
after searching same data, maximum value, minimum value.
1) Content and result of searched data
a) When same data is found 6
In five devices beginning from the device designated in , the number of same data, initial/final
Instructions
Step Ladder
position, and positions of maximum value and minimum value are stored.
b) When same data is not found
In five devices beginning from the device designated in , the number of same data, initial/final
position, and positions of maximum value and minimum value are stored.
However, 0 is stored in three devices beginning from the device designated in (number of same 7
data, initial/final position).
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
335
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
2) Operation examples
a) Examples of composition of search result table and data
Value of of Value of of Search result
Searched device Position of
searched data comparative data Maximum Coincide Minimum
data
(ex.) (ex.) value +4 value +3
K100 0 3(Initial)
+1 K111 1
+2 K100 2 3
+3 K 98 3
+4 K123 4
K100
+5 K 66 5 3
+6 K100 6 3(Final)
+7 K 95 7
+8 K210 8 3
+9 K 88 9
b) Search result table
Device No. Content Search result item
3 Number of same data
+1 0 Position of same data (initial)
+2 6 Position of same data (final)
+3 5 Final position of minimum value
+4 8 Final position of maximum value
2. 32-bit operation(DSER, DSERP)
In n pieces of data beginning from the device designated in , same data as the device designated in
is searched, and the result is stored in the device designated in .
Command input DSER
EN ENO
Label 1 *1 s1 d Label 4 *3
Label 2 *2 s2
The number for searching n
same data, maximum value,
minimum value
*1. This is to define the beginning device for searching same data, maximum value, minimum value.
*2. This is to define the value of searching same data, maximum value, minimum value, or its storing destination device.
1) Content and result of searched data
a) When same data is found
In five points of 32-bit data beginning from the device designated in , the number of same data,
initial/final position, and positions of maximum value and minimum value are stored.
b) When same data is not found
In five points of 32-bit data beginning from the device designated in , the number of same data,
initial/final position, and positions of maximum value and minimum value are stored.
However, 0 is stored in three points of 32-bit data beginning from the device designated in
(number of same data, initial/final position).
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1
2) Operation examples
Outline
a) Examples of composition of search result table and data
Value of of Search result
Searched device Comparative Position
searched data Maximum Coincide Minimum
+1 data of data
(ex.)
[ +1, ] K100000 0
value +4
3(Initial)
value +3
2
Instruction List
[ +3, +2] K110100 1
[ +5, +4] K100000 2 3
[ +7, +6] K 98000 3
[ +9, +8] K123000 4
[ +11, +10] K 66000
K100000
5 3 3
Instruction
Configuration of
[ +13, +12] K100000 6 3(Final)
[ +15, +14] K 95000 7
[ +17, +16] K910000 8 3
[ +19, +18] K910000 9 3
b) Search result table 4
Instructions
Explanation of
How to Read
Device No. Content Search result item
[ +1, ] 3 Number of same data
[ +3, +2] 0 Position of same data (initial)
[ +5, +4] 6 Position of same data (final)
[ +7, +6] 5 Final position of minimum value 5
Basic Instruction
[ +9, +8] 9 Final position of maximum value
Cautions
1. Comparison of magnitude
To be calculated algebraically. (-10 < 2) 6
Instructions
Step Ladder
2. When minimum value and maximum value are present in a plurality
If there are a plurality of minimum value and maximum value in the data, the latter position is stored
individually.
3. Number of bits occupied
The search result occupies the following number of devices when this command is driven.
7
Instructions
Applied
Please be careful not to overlap with the devices used in the control of the machine.
1) In the case of 16-bit operation
A total of five points will be occupied, that is, , +1, +2, +3, +4.
2) In the case of 32-bit operation
A total of ten points will be occupied, that is, ( +1, ), ( +3, +2), ( +5, +4), 8
( +7, +6), ( +9, +8).
Function
and Pulse Catch
Interrupt Function
4. Designation of input and output variables
When handling array data or 32-bit data in structured program, you cannot designate the 16-bit device directly
unlike simple project. Please use the label when handling array data or 32-bit data.
However, with the 32-bit counter, you can designate the 32-bit data directly because it is a device of 32 bits
long. A
and addresses
between devices
Relationships
When designating a device, use the global label.
5. FXU PLC supports the command by V3.07 or higher.
6. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.3 ABSD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for creating multiple output patterns corresponding to the present value of the counter.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ABSD
EN ENO
ABSD 16 bits Continuous s1 d ABSD(EN, s1, s2, n, d);
s2
n
DABSD
EN ENO
DABSD 32 bits Continuous s1 d DABSD(EN, s1, s2, n, d);
s2
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Beginning device for storing table data (rise point, fall point) ANY16 ANY16
Input
variable Counter for present value monitor to compare with table data ANY16 ANY16
Number of lines of table and number of points of bit device to be
ANY16
output
Output ENO Execution state Bit
variable Beginning bit device to be output Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z
z z
zz z S1 z
z z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
IST command equivalent circuit
Outline
1. 16-bit operation(ABSD)
This is an example for explaining the ON/OFF control of the output by one revolution of table (0 to 360
degrees).
(Rotation angle signal one degree per pulse)
Data table (occupying n lines × 2 points) of n lines from the device designated in is compared with the
2
Instruction List
present value of the counter of the device designated in , and outputs of n points continuous from the
device designated in are controlled to be ON/OFF during one revolution.
Command input ABSD
EN ENO
Beginning device for storing
3
s1 d
Instruction
Configuration of
table data (rise point, fall point) Beginning bit device to be output
Counter for present value
monitor to compare with s2
table data (C )
Number of lines of table and
n
4
number of points of bit device
to be output
RST
Instructions
Explanation of
How to Read
CS X001
EN ENO
d CC
X001 OUT_C
EN ENO
CC CCoil 5
Basic Instruction
K360 CValue
Rotation angle signal one degree per pulse
1) Write the following data in to +2n+1, preliminarily by using transfer command.
Rise point
Data value (example)
Fall point
Data value (example)
Object output 6
Instructions
Step Ladder
40 +1 140
+2 100 +3 200 +1
+4 160 +5 60 +2
240 280
+6 +7 +3
7
…
- -
Instructions
Applied
+2n +2n+1 +n-1
For example, rise point data is stored in even-number device, and fall point data in odd-number device,
by 16-bit data.
2) Output pattern
When command input is turned ON, n points are changed as follows, starting from the device designated 8
Function
and Pulse Catch
Interrupt Function
in .
Rise point and fall point may be individually changed by rewriting data in to +n×2.
40 140
d
100 200 A
and addresses
between devices
Relationships
d +1
60 160
d +2
240 280
d +3
0 180 360
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
2. 32-bit operation(DABSD)
This is an example for explaining the ON/OFF control of the output by one revolution of table (0 to 360
degrees).
(Rotation angle signal one degree per pulse)
Data table (occupying n lines × 4 points) of n lines from the device designated in is compared with the
present value of the counter of the device designated in , and outputs of n points continuous from the
device designated in are controlled to be ON/OFF.
Command input ABSD
EN ENO
Beginning device for storing
table data (rise point, fall point) s1 d Beginning bit device to be output
Counter for present value
monitor to compare with s2
table data (C )
Number of lines of table and
number of points of bit device n
to be output
CS X001 RST
EN ENO
d CC
X001 OUT_C
EN ENO
CC CCoil
K360 CValue
Rotation angle signal one degree per pulse
1) Write the following data in ( , +1) to ( +4n+2, +4n+3), preliminarily by using transfer
command.
Rise point Fall point
Object
Data value Data value output
(example) (example)
[ +1, ] 40 [ +3, +2] 140
[ +5, +4] 100 [ +7, +6] 200 +1
[ +9, +8] 160 [ +11, +10] 60 +2
[ +13, +12] 240 [ +15, +14] 280 +3
…
- - …
[ +4n+1, +4n] [ +4n+3, +4n+2] +n-1
For example, rise point data is stored in even-number device, and fall point data in odd-number device,
by 32-bit data.
2) Output pattern
When command input is turned ON, n points are changed as follows, starting from the device designated
in .
Rise point and fall point may be individually changed by rewriting data in ( +1, ) to
( +(n×2)+3, +(n×2)+2).
40 140
d
100 200
d +1
60 160
d +2
240 280
d +3
0 180 360
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Cautions
Outline
1. Designation of high speed counter
DABSD command can designate a high speed counter in the device designated in .
In this case, as compared with the counter present value, the output pattern may have a response delay due
to scan cycle.
When using FX3U, FX3UC PLCs, the response may be enhanced by using table high speed comparison
2
Instruction List
function by DHSZ command or by using DHSCT command.
2. When designating the digits of bit device in
1) Device No.
Designate a multiple of 16 (0, 16, 32, 64, ...).
2) Number of digits
3
Instruction
Configuration of
- K4 only in the case of ABSD (16-bit operation)
- K8 only in the case of DABSD (32-bit operation)
3. Other cautions
• The number of output points of the object is determined by the value of n. (1 ≤ n ≤ 64) 4
• The output is not changed if the command input is turned OFF.
Instructions
Explanation of
How to Read
4. FXU PLC does not support 32-bit command at V2.30 or lower.
5. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable. 5
Basic Instruction
S2: FX3U, FX3UC, FX3G PLCs only are applicable.
S3: FX3U, FX3UC PLCs only are applicable.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
341
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.4 INCD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for creating multiple output patterns by using a pair of counters.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
INCD
EN ENO
INCD 16 bits Continuous s1 d INCD(EN, s1, s2, n, d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Beginning word device for storing the set value ANY16
variable Beginning device of counter for present value monitor (2 points occupied) ANY16
Number of bit devices to be output ANY16
Output ENO Execution state Bit
variable Beginning bit device to be output (n points occupied) Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z
z z
zz z S1 z
z z
S: Refer to "Cautions".
342
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Function and operation explanation
Outline
1. 16-bit operation(INCD)
Data table (n lines × 1 point occupied) of n lines from the device designated in is compared with the
present value of the counter of the device designated in , and by resetting when coinciding, outputs are
sequentially controlled to be ON/OFF.
INCD
2
Command input
Instruction List
EN ENO
Beginning word
device for storing s1 d Beginning bit device to be output
the set value
Beginning device of
s2
3
counter for present
value monitor
Number of bit devices n
Instruction
Configuration of
to be output
Count signal OUT_C
EN ENO
CC CCoil
4
K9999 CValue
Operation
Instructions
Explanation of
How to Read
X000 INCD
EN ENO
D300 s1 d M0
C0 s2
5
K4 n
Basic Instruction
M8013 OUT_C
EN ENO
1-second CC000 CCoil
clock
K9999 CValue
1) Timing chart
Write the following data beforehand by using transfer command. 6
Instructions
Step Ladder
Store device Output
Data value (example) Example
D300=20 M0
+1 D301=30 +1 M1
+2
+3
D302=10
D303=40
+2
+3
M2
M3
7
Instructions
Applied
…
…
…
+n-1 - +n-1 -
X000
30 40
20 20 20 8
C 0
Function
and Pulse Catch
Interrupt Function
Present 10
value
C 1 3
Present 2
1 1 1
value 0 0 0
A
and addresses
between devices
Relationships
M 0
M 1
M 2
M 3
M8029 Complete flag
343
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
2) M0 output is turned ON when command contact is turned ON.
3) Output (M0) is reset when the present value of C0 reaches comparative value D300, and the count value
of the process counter C1 is incremented by +1, and the present value of the counter C0 is also reset.
4) Next output M1 is turned ON.
5) Output M1 is compared with comparative value D301 of C0 present value, and when reaching the
comparative value, the count value of the process counter C1 is incremented by +1, and the present
value of the counter C0 is also reset.
6) Similarly compared up to the number of points designated in n(K4). (1 ≤ n ≤ 64)
7) When the final process designated in n is over, execution complete flag M8029 is turned ON for one
operation period.
M8029 is a command execution complete flag used by a plurality of commands, and is used as the
contact right after the command, and then you can set up a complete flag exclusively for this command.
8) Repeat outputs by returning to the beginning.
Cautions
1. When designating the digits of bit device in the device designated in
Designate a multiple of 16 (0, 16, 32, 64, ...) in the device number.
2. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC, FX3G PLCs only are applicable.
S3: FX3U, FX3UC PLCs only are applicable.
344
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
7.7.5 TTMR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This is a command for measuring the ON duration of TTMR command.
This is used when adjusting the timer setting time by pushbutton.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
TTMR
TTMR 16 bits Continuous EN ENO TTMR(EN, n, d);
n d
2. Set data
4
Instructions
Explanation of
How to Read
Variable Description Data type
Input EN Execution condition Bit
variable Multiplying factor number to be applied to teaching data ANY16
Output ENO Execution state Bit
variable Device for storing teaching data (2 points occupied) ANY16 5
Basic Instruction
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 6
Instructions
Step Ladder
z S1 z
z S1 z z
S: Refer to "Cautions".
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
345
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
Function and operation explanation
1. 16-bit operation(TTMR)
The pushing duration of command input (pushbutton) is measured in the unit of seconds, and is multiplied by
multiplying factor (10n), and transferred to the device designated in .
Command
Command input TTMR contact
EN ENO
Multiplying factor number n d Device for storing
to be applied to teaching teaching data d +1
data d +1
d
d
τ0 τ0
Pushing duration (sec) Pushing duration (sec)
The time to be transferred to the device designated in depends on the multiplying factor of n, supposing
the pushing duration to be τ0 (1 sec unit), and the value of the device actually designated in is as
follows.
Multiplying factor
K0 τ0 ×1
K1 10τ0 ×10
K2 100τ0 ×100
Related command
You can use such a convenient command.
Command Content
The command to issue the ON time of HOUR command by the time added and designated in 1
HOUR
hour unit.
Cautions
1. When command contact is turned OFF
The present value ( +1) of the pushing duration is reset, and the teaching time is not changed.
2. Number of bits occupied
Two devices are occupied starting from the device (teaching time) designated in .
Be careful not to overlap with the device used in control of the machine.
• : Teaching time
• +1: Present time of pushing duration
3. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
346
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Program examples
Outline
Write teaching time in ten data registers.
Set values should be preliminarily written in D400 to D409.
[Structured ladder]
X020 OUT_T
EN ENO 2
TC0 TCoil
Instruction List
D400 TValue
X021 OUT_T
EN ENO
Ten timers desired to be set
3
TC1 TCoil
TValue
Timers (T0 to T9) are 100 ms timers, and 1/10 of the
D401
teaching data is the actual operation time (in seconds).
Instruction
Configuration of
X032 OUT_T
4
EN ENO
TC9 TCoil
Instructions
Explanation of
How to Read
D409 TValue
M8000 BIN Timer selection by digital switch
EN ENO The input of one-digit digital switch connected to X000
RUN monitor s d to X003 is converted to BIN, and transferred to Z.
K1X000 Z
X010 TTMR Teaching measurement 5
Basic Instruction
EN ENO Pushing duration (seconds) of X010 is stored in D300.
Teaching button D300 n d K0
PLF Teaching button restore detection
X010
EN ENO
d M0
6
Instructions
Step Ladder
M0 MOV Writing set value of timer
EN ENO The teaching time (D300) is transferred to the setting
D300 s d D400Z register (D400Z) for the timer selected by digital switch.
[ ST ]
OUT_T (X020, TC0, D400);
OUT_T (X021, TC1, D401);
7
Instructions
Applied
OUT_T (X032, TC9, D409);
BIN(M8000, K1X000, Z);
TTMR(X010, D300, K0);
PLF(X010, M0);
MOV(M0, D300, D400Z);
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
347
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.6 STMR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is the command for creating the off-delay timer, one-shot timer or flicker timer easily.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
STMR
EN ENO
STMR 16 bits Continuous STMR(EN, s, m, d);
s d
m
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
Timer to be used [100ms timer] ANY16
variable
Set value of timer ANY16
Output ENO Execution state Bit
variable Beginning bit device to be output [4 points occupied] Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
z S2 z z
zz z S1 z
S: Refer to "Cautions".
348
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Function and operation explanation
Outline
1. 16-bit operation(STMR)
The value designated in m is determined as the set value for the timer of the device designated in , and
is issued to four points from the device designated in .
Create the program depending on the application by referring to the following example. 2
Instruction List
Command input STMR
EN ENO
Timer to be used s d Beginning bit device
to be output
Set value of timer m
Off-delay timer, one-shot timer
When T10 is assigned in , K100 in m, and M0 in
3
Instruction
Configuration of
Command input STMR
EN ENO
T10 s d M0
K100 m
• M0[ ] : This is an off-delay timer for turning OFF with set time delay of the timer after the command 4
contact is turned OFF.
Instructions
Explanation of
How to Read
• M1[ +1] : This is a one-shot timer for turning OFF after the timer set time by turning ON after the
command contact is changed from ON to OFF.
• M2[ +2] : Occupied. To be used for flicker application.
• M3[ +3] : Occupied. 5
Basic Instruction
Command
input
M0 d 10s 10s
M1 d +1 10s 10s
M2 d +2 10s
6
Instructions
Step Ladder
M3 d +3
Flicker
The flicker is issued to +1, +2 by preparing the program for turning OFF this command by the b-
contact of +3 as shown below. 7
and +3 are occupied.
Instructions
Applied
Command
input M3 STMR
EN ENO
T10 s d M0
K100 m 8
Function
and Pulse Catch
Interrupt Function
• M0[ ] : Occupied. (To be used in off-delay timer application. See previous page.)
• M1[ +1] : This is the flicker (a-contact) for repeating ON/OFF at timer time intervals.
• M2[ +2] : This is the flicker (b-contact) for repeating ON/OFF at timer time intervals.
• M3[ +3] : Occupied.
A
and addresses
between devices
Relationships
Command
input
M2 d +2 10s 10s 10s
M1 d +1 10s 10s
349
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
Cautions
1. Handling of designated timer
The timer number designated by this command cannot be used in overlap with other general circuit (OUT
command, etc.).
If overlapped, the timer does not operate correctly.
2. Number of bits occupied
Four devices are occupied from the one designated in .
Be careful not to overlap with the device used in control of the machine.
Function
Device Off-delay timer
Flicker
One-shot timer
Off-delay timer Occupied
+1 One-shot timer Flicker(a-contact)
+2 Occupied Flicker(b-contact)
+3 Occupied Flicker(b-contact)
3. When command contact is turned OFF
, +1, and +3 are turned OFF after the set time. The timers designated in +2 and are
reset immediately.
4. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC PLCs only are applicable.
350
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
7.7.7 ALT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This is the command for inverting the bit device (ON to OFF, OFF to ON) when the input is turned ON.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
ALT
ALT 16 bits Continuous EN ENO ALT(EN, d);
d
ALTP
4
Instructions
Explanation of
How to Read
ALTP 16 bits Pulse EN ENO ALTP(EN, d);
d
2. Set data
Variable Description Data type
5
Basic Instruction
Input
EN Execution condition Bit
variable
Output ENO Execution state Bit
variable Bit device to be output alternately Bit
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zz z S1 z 7
Instructions
Applied
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
351
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
Function and operation explanation
1. 16-bit operation(ALT, ALTP)
Alternate output (one stage)
Every time the command input is changed from OFF to ON, the bit device designated in is inverted from
ON to OFF, from OFF to ON.
Command
input ALTP Command
input ON ON ON
EN ENO
d
d ON ON
Frequency dividing output (alternate output (two stages))
By combining and using a plurality of ALTP commands, the frequency can be divided and issued in multiple
stages.
First stage
Command ON ON ON ON
Command input
input ALTP
EN ENO M0 d ON ON
d M0
Same device is designated. Second stage
M0 ALTP
EN ENO M1 d ON
d M1
Cautions
1. When using ALT command (continuous execution form)
When programmed by ATL command, the operation is inverted in every operation period.
When inverting by ON/OFF switching of command, use the ALTP command (pulse execution form) or
execute the command contact by LDP (pulse execution form).
2. FX0, FX0S, FX0N PLCs do not support the command of pulse execution form.
In the case of pulse execution form, convert the command execution form into pulses.
3. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
Program examples
1. Start/stop by one input
1) By pressing pushbutton X000, the start output Y001 is put in action.
2) By pressing pushbutton X000 again, the stop output Y000 is put in action.
[Structured ladder] [ST]
X000 ALTP ALTP(X000, M0);
EN ENO OUT(NOT M0, Y000);
d M0 OUT(M0, Y001);
M0
Y000 Stop
M0
Y001 Start
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
2. Flicker operation
Outline
1) When the input X006 is turned ON, the contact of timer T2 operates momentarily in every 5 seconds.
2) Every time the contact of T2 is turned ON, the output Y007 is alternately turned ON/OFF.
[Structured ladder]
X006 TS2 OUT_T ON
2
X006
Instruction List
EN ENO
TC2 TCoil 5s 5s 5s 5s 5s 5s 5s
K50 TValue
T2
3
X006 TS2 ALT Y007 ON ON ON
EN ENO
Instruction
Configuration of
d Y007
[ ST ]
OUT_T(X006 AND NOT TS2, TC2, K50);
Y007:= ALT(X006 AND TS2);
4
3. Alternate output operation using auxiliary relay (M) (same operation as ALT command)
Instructions
Explanation of
How to Read
The following circuit shows an example of alternate operation by using the basic command and auxiliary relay
(M) in the same operation as ALT command.
1) When the X000 is turned on, M0 is turned ON for one operation period only.
2) When M0 is turned ON for the first time, the Y000 operates by self-holding, and when turned ON second
time, the self-holding function is canceled. 5
Basic Instruction
[Structured ladder] [ST]
X000 M1 OUT(X000 AND NOT M1, M0);
M0 OUT(X000);
OUT((M0 OR NOT Y000) OR (NOT M0 AND Y000), Y000));
X000
M1 6
Instructions
Step Ladder
M0 Y000
Y000
M0 Y000
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
353
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.8 RAMP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for obtaining data changing n times when designated between the beginning (initial value)
and the end (target value).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RAMP
EN ENO
RAMP 16 bits Continuous s1 d RAMP(EN, s1, s2, n, d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Device storing initial value of ramp, setting of target value ANY16
variable Device storing initial value of ramp, setting of target value ANY16
Number of transfer scan times of ramp ANY16
Output ENO Execution state Bit
variable Device storing data of present value of ramp (2 points occupied) ANY16(0..1)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 z
z S1 z
z S1 z
z S1 z z
S: Refer to "Cautions".
354
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Function and operation explanation
Outline
1. 16-bit operation(RAMP)
The starting value and the desired end value are designated in and , and when the command input
is turned ON, the value equally divided by the number of times designated in n is added to sequentially
in every operation period, and the sum is stored in the device designated in . 2
This command and the analog output are combined, and the cushion start/stop command can be issued.
Instruction List
Command input RAMP
EN ENO
Initial value and
target value of s1 d Present value data of ramp
ramp 3
Transfer of ramp s2
Instruction
Configuration of
Scan times n
1) When s1 < s2 2) When s1 > s2
s2 s1 d 4
Instructions
Explanation of
How to Read
s2
s1 d
n scans n scans 5
Scan times d +1 Scan times d +1
Basic Instruction
• In +1, scan times (0 to n times) is stored.
• The time from start till end is scanned by operation period × n times.
• When the command input is turned OFF in the midst of operation, the execution is interrupted (present
value data of is held, and +1 scan times is cleared), and when turned ON again, is cleared, 6
and the operation is resumed from .
Instructions
Step Ladder
• After completion of transfer, the command execution complete flag M8029 is active, and the value of
returns to the value of .
Command
7
Instructions
Applied
s2
s1
d
8
Function
and Pulse Catch
Interrupt Function
(M8029)
• When obtaining operation results at specific time intervals (constant scan mode)
Write specified scan time in D8039 (a slightly longer value than actual scan time), and when the M8039 is
turned ON, the PLC is set in constant scan mode.
When this value is, for example, 20 ms and designated by n=100 times, the value of changes from A
and addresses
between devices
Relationships
to in 20 seconds.
355
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
2. Operation of mode flag (M8026)
In FX3U, FX3UC, FX2N, FX2NC, FX2C, FXU (V1.20 or higher) PLCs, by ON/OFF switching of mode flag M8026,
the content of +1 is changed as follows.
FX3G, FX1S, FX1N, FX0, FX0S, FX0N PLCs operate same as when the M8026 is turned ON.
FXU (V1.1 or lower) PLC operates same as when the M8026 is turned OFF.
1) In the case of M8026=OFF 2) In the case of M8026=ON
Command Command
s2 s2
d
s1 s1
d
(M8029) (M8029)
Related devices
→ As for the method of using the command execution complete flag, see paragraph 1.3.4.
Device Name Content
Command
M8029 execution After n operation periods, when becoming = , the device is turned ON.
complete
M8026*1 RAMP mode See the Operation of mode flag (M8026) explained above.
*1. Cleared when changed from RUN to STOP (applicable only in FX3U, FX3UC, FX2N, FX2NC, FX2C, FXU
PLCs).
Cautions
1. When designating power failure hold device (keep region) in the device designated in
When desired to keep the PLC in RUN (start) state while the command input is ON, the device designated in
should be cleared beforehand.
2. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
356
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
7.7.9 ROTC
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This is a command suited for turning the table by a shortcut route depending on the demanding window when
putting on or taking out articles on the rotary table.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
ROTC
EN ENO
ROTC 16 bits Continuous s d ROTC(EN, s, m1, m2, d);
m1
m2 4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Data register for counting (3 points occupied) ANY16 5
variable Number of divisions ANY16
Basic Instruction
Number of low speed sections ANY16
Output ENO Execution state Bit
variable Beginning bit device to be driven (8 points occupied) Bit
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S2 z
7
z z
Instructions
Applied
z z
zz z S1 z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
357
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
Function and operation explanation
1. 16-bit operation(ROTC)
As shown below, in order to put on or take out articles on the rotary table divided into m1 sections (=10),
depending on the demanding window, the table is controlled and moved by a shortcut route in the condition
designated in m2 or and .
Command ROTC
EN ENO
D200 s d M0
K10 m1 Call condition
K2 m2 register (bits)
Number of low speed sections
Number of divisions
Call condition register (bits)
0 point Article
detection
X002(M2)
8
9 7
0 6
X000(M0)
Normal
rotation
Detection
1 switch 5
X001(M1)
Window 1
2 4
3
Rotary table
1) Designation register of call condition
Register for counting
+1 Setting of calling window number To be set preliminarily by transfer command
+2 Setting of calling article number
2) Designation bit of calling condition
: Phase A signal
+1 Phase B signal
+2 0 point detection signal
+3 High speed normal rotation Internal contact circuit to be driven is preliminarily composed
+4 Low speed normal rotation of input signal (X).
+5 Stop
+6 Low speed reverse rotation
+7 High speed reverse rotation
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Operation condition
Outline
The condition necessary for using this command is as shown in the example below.
1) Rotation detection signal: X→
a) Please install two-phase switch (X000, X001) for detecting normal rotation/reverse rotation of table,
and switch X002 for operating when article number 0 comes to window number 0.
b) Create sequence program as shown in the example below.
2
Instruction List
Two-phase switch
d
X000 Phase A
M0
Up-count signal in normal rotation
3
d +1
X001 Phase B
M1
Instruction
Configuration of
d +2
X002
M2 0 point detection switch
By X000 to X002, you can exchange with internal contacts of d
Beginning device number for designating or d is arbitrary.
to d +2.
4
Instructions
Explanation of
How to Read
2) Designation of register for counting:
is a counter for counting article of which number is coming to window number 0.
3) Designation register of calling condition: +1, +2
a) In +1, you can set the window number desired to be called. 5
b) In +2, you can set the article number desired to be called.
Basic Instruction
4) Division number m1 and low speed period m2
To designate division number m1 of table and low speed operation section m2.
When the above condition is designated, the output of normal/reverse rotation, high speed/low speed/stop will
be obtained in the output of +3 to +7 designated in the beginning device of the command. 6
Instructions
Step Ladder
Cautions
1. Operation by ON/OFF of command input
• When this command is driven by turning ON the command input, results of +3 to +7 will be
obtained automatically. 7
Instructions
Applied
• By turning OFF the command input, +3 to +7 are turned OFF.
2. Operation of plural times in one division section of article of rotation detection signal (
to +2)
For example, rotation detection signal ( to +2) operates 10 times in one division section of article,
setting of division number, setting of calling window number, and setting of article number should be all 8
multiplied by 10.
Function
and Pulse Catch
Interrupt Function
As a result, the set value of low speed section can be set in an intermediate value of division number.
3. 0 point detection signal
When the command input is ON and 0 point detection signal (M2) is turned ON, the content of register for
counting is cleared to 0. You must start operation by executing this clearing operation beforehand. A
and addresses
between devices
Relationships
4. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
7.7.10 SORT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This command reshuffles the data table composed of data (columns) and group data (rows) in the ascending
order in column unit on the basis of designated group data (rows). In this command, the group data (rows) is
stored in continuous devices. Similarly, in SORT2 command, data (columns) is stored in continuous devices,
so that the data (columns) may be added easily, and reshuffling is applicable in both ascending order and
descending order.
→ As for SORT2 command, see paragraph 7.13.7.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SORT
EN ENO
s d
SORT 16 bits Continuous SORT(EN, s, m1, m2, n, d);
m1
m2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Beginning device storing data table (m1xm2 points occupied) ANY16
Input
Number of data (columns) ANY16
variable
Number of group data (rows) ANY16
Row of group data (rows) as basis of reshuffling ANY16
Output ENO Execution state Bit
variable Beginning device storing arithmetic results (m1 × m2 points occupied) ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1
z z
z z
z S1
z S1 z z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1
Function and operation explanation
Outline
1. 16-bit operation(SORT)
This command reshuffles the data table (reshuffling origin) composed of (m1×m2) points from the device
designated in in the ascending order in data columns on the basis of n rows of group data, and stores in
the data table (after reshuffling) of (m1×m2) points from the device designated in . 2
→ As for operation examples, see next page.
Instruction List
Command input SORT
EN ENO
Beginning device
storing data table s d Beginning device storing
Number of data m1
operation results
3
(columns)
Instruction
Configuration of
Number of group m2
data (rows)
Row of group data n
(rows) as basis of
reshuffling
Command execution complete flag 4
Instructions
Explanation of
How to Read
M8029
M Command execution complete flag of SORT command
• The data table composition is explained in an example of m1=K3, m2=K4 at the reshuffling origin. After
reshuffling, replace with in data table composition.
Row Group number m2 (in the case of m2=K4) 5
Basic Instruction
number 1 2 3 4
Column
Management number Height Weight Age
number
In the 1 +3 +6 +9
case of
data
number
2 +1 +4 +7 +10
6
3 +2 +5 +8 +11
Instructions
Step Ladder
m1=3
• When the command input is turned ON, the data arraying is started, and after m1 scan, the data arraying is
completed, and the command execution complete flag M8029 is turned ON.
→ As for the method of using the command execution complete flag, see paragraph 1.3.4.
2. Operation examples 7
When the following reshuffling origin data is executed in "n=K2 (row number 2)" and "n=K3 (row number 3)",
Instructions
Applied
the operation is as follows.
When a serial number such as management number is entered in the first row, it is convenient because you
can judge the original column number by its content.
Reshuffling origin data 8
Group number m2 (in the case of m2=K4)
Function
and Pulse Catch
Interrupt Function
Row
number 1 2 3 4
Column Management
Height Weight Age
number number
+5 +10 +15
1
1 150 45 20 A
and addresses
between devices
Relationships
+1 +6 +11 +16
2
In the 2 180 50 40
case of
+2 +7 +12 +17
data 3
number 3 160 70 30
m1=5 +3 +8 +13 +18
4
4 100 20 8
+4 +9 +14 +19
5
5 150 50 45
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.7 Handy Instruction
1) Reshuffling results when command is executed in n=K2 (row number 2)
Row
1 2 3 4
number
Column Management
Height Weight Age
number number
+5 +10 +15
1
4 100 20 8
+1 +6 +11 +16
2
1 150 45 20
+2 +7 +12 +17
3
5 150 50 45
+3 +8 +13 +18
4
3 160 70 30
+4 +9 +14 +19
5
2 180 50 40
2) Reshuffling results when command is executed in n=K3 (row number 3)
Row
1 2 3 4
number
Column Management
Height Weight Age
number number
+5 +10 +15
1
4 100 20 8
+1 +6 +11 +16
2
1 150 45 20
+2 +7 +12 +17
3
2 180 50 40
+3 +8 +13 +18
4
5 150 50 45
+4 +9 +14 +19
5
3 160 70 30
Related devices
→ As for the method of using the command execution complete flag, see paragraph 1.3.4.
Device Name Content
Command execution
M8029 To be ON when data arraying is complete.
complete
Cautions
1) Do not change the content of operand or data during operation.
2) When resuming the execution, once turn OFF the command input.
3) Limit of number of times of use of command
Usable only once in the program.
4) When designating same device in and
The original data is rewritten in the data sequence after reshuffling.
In particular, never change the content of the device designated in until the completion of execution.
5) FXU PLC supports the command by V3.07 or higher.
6) Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
7.8 External FX I/O Device
Outline
7.8.1 TKY
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This is a command for setting data in the timer or counter by the input of numeric keys 0 to 9.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
TKY
EN ENO
TKY 16 bits Continuous
s d1
TKY(EN, s, d1, d2);
4
d2
Instructions
Explanation of
How to Read
DTKY
EN ENO
DTKY 32 bits Continuous DTKY(EN, s, d1, d2);
s d1
d2 5
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit 6
Instructions
Step Ladder
variable Beginning bit device for entering numeric keys (10 points occupied) Bit
ENO Execution state Bit
Output Word device for storing data ANY16 ANY32
variable
Beginning bit device for turning ON key pushing information
Bit
(11 points occupied)
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
zzz z S1 z
Function
and Pulse Catch
Interrupt Function
z z z z z z S2 S2 zz z
zz z S1 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Function and operation explanation
1. 16-bit operation(TKY)
By pressing key from the input for connecting the numeric keys (device designated in ), the entered
numerical value is stored in the device designated in , and the key pushing information and key sense
output are issued to the device designated in .
1) Entered numerical value
- If more than 9,999, the value overflows from the higher digits.
- The entered numerical value is stored in the BIN (binary) value.
- In the diagram of next page, when numeric keys are pressed in the sequence of 1, 2, 3, 4, then "2,130"
is stored in the device designated in .
2) Key pushing information
- Key pushing information of to +9 is turned ON/OFF depending on the pushed key.
- Key sense output of +10 is ON when either key is being pushed.
Command input TKY s 4
EN ENO
Numeric key input
s +1 2
Beginning bit device s d1 Word device for
for entering numeric storing data
key s +2 1
d2 Beginning bit device
for turning ON key
pushing information s +3 3
s +9
The diagram below shows an example of FX3U PLC (sync
input). As for the wiring, see the manual of each PLC.
d2
Numeric key 0 1 2 3 4 5 6 7 8 9
Key pushing information
d2 +1
d2 +2
s s s s s s s s s s
24V 0V S/S
+1 +2 +3 +4 +5 +6 +7 +8 +9
d2 +3
PLC
d2 +9
d2 +10 1 2 3 4
Key sense output
2,130 is stored in d1 .
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
2. 32-bit operation(DTKY)
Outline
By pressing key from the input for connecting the numeric keys (device designated in ), the entered
numerical value is stored in the device designated in , and the key pushing information and key sense
output are issued to the device designated in .
1) Entered numerical value
- If more than 99,999,999, the value overflows from the higher digits. 2
Instruction List
- The entered numerical value is stored in the BIN (binary) value.
2) Key pushing information
- Key pushing information of to +9 is turned ON/OFF depending on the pushed key.
- Key sense output of +10 is ON when either key is being pushed.
Command input DTKY 3
Instruction
Configuration of
EN ENO
Beginning bit device s d1 Label *1
for entering numeric d2 Beginning bit device
key for turning ON key
pushing information
*1.To define the word device for storing data.
As for numeric key connection example and key pushing information, see the above explanation of 16-bit
4
Instructions
Explanation of
How to Read
operation (TKY).
Cautions
1. When keys are pressed simultaneously 5
Basic Instruction
When plural keys are pressed, only the first pressed key is valid.
2. When command contact is turned OFF
If turned OFF, the content of is not changed, but all of to +10 are turned OFF.
3. Number of bits occupied 6
1) When a numeric key is connected, 10 points are occupied from .
Instructions
Step Ladder
When numeric key is not connected (not used), the devices are occupied and cannot be used in other
applications.
2) A total of 11 points are occupied from the beginning device for output of key pushing information.
Be careful not to overlap with the device used in control of machine.
- to +9: Turned ON corresponding to the input of numeric keys 0 to 9. 7
Instructions
Applied
- +10: Kept ON while any one of 0 to 9 is being pressed (key sense output).
4. Limit of number of times of use of command
Only one of TKY command and DTKY command can be used in the program.
If desired to use plural times, you can program by the index modifier (V, Z) function.
8
5. Designation of input and output variables
Function
and Pulse Catch
Interrupt Function
When handling 32-bit data in a structured program, you cannot designate 16-bit device directly unlike in
simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a device of 32
bits long, and the device can be designated directly. When designating the device, please use the global
label.
6. Object devices are limited. A
S1: FX3U, FX3UC PLCs only are applicable.
and addresses
between devices
Relationships
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Program examples
This is an explanation of an example in which the input X000 is the beginning, and numeric keys 0 to 9 are
connected.
1. Program
[Structured ladder] [ST]
X030 TKY TKY(X030, X000, D0, M10);
EN ENO
X000 s d1 D0
d2 M10
2. Wiring diagram
This wiring diagram is an example of FX3U PLC (sync input). As for the actual wiring connection, see the
manual of the PLC.
Numeric key 0 1 2 3 4 5 6 7 8 9
24V 0V S/S X000 X001 X002 X003 X004 X005 X006 X007 X010 X011
PLC
3. Timing chart
X000 4
1) When numeric keys are pressed in the sequence of 1, 2, 3, 4,
the content of D0 is 2,130. X001 2
Numerical value more than 9,999 overflows sequentially from
the upper digits. (The actual content of D0 is BIN data.) X002 1
2) When X002 is pressed, M12 is set (ON) until other key is
pressed. It is the same when other key is pressed. X003 3
Thus, depending on the operation of input X000 to X011,
operation of M10 to M19 is carried out. X011
3) When any key is pressed, the key sense output M20 is kept ON
while being pressed. M 10
M 11
M 12
M 13
M 19
M 20 1 2 3 4
Key sense output
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
7.8.2 HKY
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This is a command for setting the input data of numerical value (0 to 9) or operation condition (function keys A
to F), by the input of keys from 0 to F (16 keys).
When the extension function is turned ON, the key input is entered in hexadecimal notation by keys 0 to F.
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
HKY
EN ENO
HKY 16 bits Continuous s d1 HKY(EN, s, d1, d2, d3);
d2
d3
4
Instructions
Explanation of
How to Read
DHKY
EN ENO
DHKY 32 bits Continuous s d1 DHKY(EN, s, d1, d2, d3);
d2
d3 5
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit 6
Instructions
Step Ladder
variable Beginning device for entering 16 keys (X) [4 points occupied]. Bit
ENO Execution state Bit
Beginning device for sending output (Y) [4 points occupied] Bit
Output
variable Device for storing numerical value entered from 16 keys ANY16 ANY32
Beginning bit device for turning ON key pushing information
Bit
7
[8 points occupied]
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
type
System user Digit designation
user unit
Index
tant number string
Pointer
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z z
z z
zzz S2 S2 zz z
zz z S1 z A
and addresses
between devices
Relationships
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Function and operation explanation
1. 16-bit operation(HKY)
The numerical value scanned by the signals of the input for connecting 16 keys (0 to F) (device designated in
) and the row output (device designated in ) and by pressing keys 0 to 9 is stored in the device
designated in , and the key sense output is issued to the device designated in .
When any one of keys A to F is pressed, the key pushing information corresponding to the key (device
designated in ) is turned ON, and the key sense output (device designated in ) is issued.
Command input HKY
EN ENO
Beginning device s d1 Beginning device to be output
for entering 16 keys
d2 Device for storing numerical
value entered from 16 keys
d3 Beginning bit device for turning
ON key pushing information
1) Numerical value input by keys 0 to 9
If more than 9,999, the value overflows from the higher digits.
- The entered numerical value is stored in as BIN (binary) value.
- The key sense output +7 is turned ON by pressing any one of keys 0 to 9.
2) Key pushing information of keys A to F
- To turn ON 6 points from corresponding to any one of keys A to F.
- The key sense output +6 is turned ON by pressing any one of keys A to F.
Key Key pushing information Key Key pushing information
A D +3
B +1 E +4
C +2 F +5
2. 32-bit operation(DHKY)
The numerical value scanned by the signals of the input for connecting 16 keys (0 to F) (device designated in
) and the row output (device designated in ) and by pressing keys 0 to 9 is stored in the device
designated in , and the key sense output is issued to the device designated in .
When any one of keys A to F is pressed, the key pushing information corresponding to the key (device
designated in ) is turned ON, and the key sense output (device designated in ) is issued.
Command input DHKY
EN ENO
Beginning device s d1 Beginning device to be output
for entering 16 keys
d2 Label *1
d3 Beginning bit device for turning
ON key pushing information
*1.To define the device for storing the numerical value entered from 16 keys.
1) Numerical value input by keys 0 to 9
- If more than 99,999,999, the value overflows from the higher digits.
- The entered numerical value is stored in ( +1, ) as BIN (binary) value.
- The key sense output +7 is turned ON by pressing any one of keys 0 to 9.
2) Key pushing information of keys A to F
As for the key pushing information, refer to the previous page on 16-bit operation (HKY).
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Extension function
Outline
When the extension function is validated by turning ON the M8167, the hexadecimal key pushing data of 0 to
F is stored in BIN.
Except for the following, this is same as the "function and operation explanation" given above.
FXU PLC: V2.30 or lower has no extension function.
1. 16-bit operation(HKY)
2
Instruction List
Hexadecimal data entered by keys 0 to F is directly written into the device designated in .
1) Numerical value input by keys 0 to F
- If more than FFFF, the value overflows sequentially from the upper digits.
- Example:
In the case of input of 1 → 2 → 3 → B → F, "23BF" is stored in BIN in the device designated in . 3
That is, 1 overflows at the time of input of F.
Instruction
Configuration of
Command input
M8167
EN
HKY
ENO 4
Instructions
Explanation of
How to Read
Beginning device s d1 Beginning device to be output
for entering 16 keys
d2 Device for storing numerical value
entered from 16 keys
d3 Beginning bit device for turning
ON key pushing information 5
Basic Instruction
2. 32-bit operation(DHKY)
Hexadecimal data entered by keys 0 to F is directly written into the device designated in .
1) Numerical value input by keys 0 to F
- If more than FFFFFFFF, the value overflows sequentially from the upper digits. 6
- Example:
Instructions
Step Ladder
In the case of input of 9 → 2 → 3 → B → F → A → F, "923BFAF" is stored in BIN.
Command input
M8167
DHKY 7
Instructions
Applied
EN ENO
Beginning device s d1 Beginning device to be output
for entering 16 keys
d2 Label *1
d3 Beginning bit device for turning 8
Function
and Pulse Catch
Interrupt Function
ON key pushing information
*1.To define the device for storing the numerical value entered from 16 keys.
Related devices
→ As for the method of using the command execution complete flag, see paragraph 1.3.4. A
and addresses
between devices
Relationships
Device Name Content
HEX data handling function of HKY command
M8167 Function extension flag OFF : numeric key + function key
ON : hexadecimal key
OFF : During scanning from to +3, or command not executed
Command execution
M8029 ON : To be turned ON after one-cycle operation of to +3 output (key scan of 0 to
complete
F).
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Cautions
1. Limit of number of times of use of command
Only one of HKY command and DHKY command can be used in the program.
If desired to use plural times, you can program by the index modifier (V, Z) function.
2. When keys are pressed simultaneously
When plural keys are pressed, only the first pressed key is valid
3. When command contact is turned OFF
If turned OFF, the content of is not changed, but all of to +7 are turned OFF.
4. Number of bits occupied
1) To occupy 4 points for connecting 16 keys from the beginning device of input (X).
2) To occupy 4 points for connecting 16 keys from the beginning device of output (Y).
3) To occupy 8 points from beginning device for output of key pushing information.
Be careful not to overlap with the device used in control of the machine.
- to +5 : Key pushing information of keys A to F
- +6 : Key sense output of keys A to F.
- +7 : Key sense output of keys 0 to 9
5. Intake timing of key input
HKY and DHKY commands are executed simultaneously with the operation period of PLC.
At the end of a series of key scan, a time of 8 scans is needed.
To prevent intake error due to filter delay of key input, you can utilize the function of "constant scan mode" or
"timer interruption."
6. Output format
Select and use the PLC of transistor output type.
7. Designation of input and output variables
When handling 32-bit data in a structured program, you cannot designate 16-bit device directly unlike in
simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a device of 32
bits long, and the device can be designated directly. When designating the device, please use the global
label.
8. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Program examples
Outline
[Structured ladder] [ST]
X004 HKY HKY(X004, X000, Y000, D0, M0);
EN ENO
X000 s d1
d2
Y000
D0
2
Instruction List
d3 M0
The wiring diagram below is an example of basic unit (sync input/sync output) of FX3U series.
For the actual wiring connection, see the manual of the PLC.
External wiring 3
C D E F
Instruction
Configuration of
8 9 A B
4 5 6 7 4
Instructions
Explanation of
How to Read
0 1 2 3
24V 0V S/S X000 X001 X002 X003
PLC
5
Basic Instruction
Transistor output
COM1 Y000 Y001 Y002 Y003
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
371
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
7.8.3 DSW
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for reading in the set value of digital switch.
You can read in the data of 4 digits and 1 set (n=K1), or 4 digits and 2 sets (n=K2).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DSW
EN ENO
DSW 16 bits Continuous DSW(EN, s, n, d1, d2);
s d1
n d2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
Beginning device for connecting digital switch (X) (4Xn points occupied) Bit
variable
Number of sets of digital switch (4 digits/1 set) [n=1 or 2] ANY16
ENO Execution state Bit
Output Beginning device of output of strobe signal (Y) (4 points occupied) Bit
variable
Device for storing numerical value of digital switch (n points occupied) ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
z z
z z z S1 S2 zz z
z z
S: Refer to "Cautions".
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(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Function and operation explanation
Outline
1. 16-bit operation(DSW)
The value of digital switch connected to the device designated in is processed by time division (entered
sequentially from the first digit by output signals at 100 ms intervals), and stored in the device designated in
. 2
Command input DSW
Instruction List
EN ENO
Beginning device for s d1
connecting digital switch Beginning device of strobe signal output
Number of sets of digital d2 Device for storing the numerical value of
n
switches digital switch
3
1) Data
Instruction
Configuration of
- You can read up to 4 digits from 0 to 9,999.
- Data is stored in BIN (binary value).
- First set is stored in , and second set in +1.
2) Designation of number of sets n
- When using 4 digits and 1 set × 1 (n=K1)
4
Instructions
Explanation of
How to Read
Digital switch of 4 digits in BCD connected to to +3 is sequentially read in by strobe signals
to +3, and stored in as BIN value.
- When using 4 digits and 1 set × 2 (n=K2)
Digital switch of 4 digits in BCD connected to to +3 is sequentially read in by strobe signals
to +3, and stored in as BIN value. 5
- Digital switch of 4 digits in BCD connected to +4 to +7 is sequentially read in by strobe signals
Basic Instruction
to +3, and stored in +1 as BIN value.
Related devices
→ As for the method of using the command execution complete flag, see paragraph 1.3.4.
Device Name Content
6
Instructions
Step Ladder
Command execution OFF : Scan continuous or command not executed from to +3.
M8029
complete ON : ON after one-cycle operation of to +3 output (scan of 1 to 4 digits)
Cautions
1. When command contact is turned OFF
7
Instructions
Applied
If turned OFF, the content of is not changed, but all of to +3 are turned OFF.
2. Number of bits occupied
1) When 4 digits and 2 sets (n=K2) are used, 2 points are occupied from .
2) occupies 4 points in the case of 4 digits and 1 set, and occupies 8 points in the case of 4 digits and 8
2 sets.
Function
and Pulse Catch
Interrupt Function
3. When connecting a digital switch of less than 4 digits
The wiring of strobe signal <output for digit designation> is not needed in the digit not in use, but the
output for digit not in use is occupied by this command, and cannot be used in other application. The output
not in use must be always kept vacant.
A
4. We recommend to use the transistor output type.
and addresses
between devices
Relationships
To take in the values of digital switch continuously, you must use the PLC of transistor output.
→ As for the relay output type, refer to the "Method of using by relay output type" shown later.
5. Digital switch
Use the digital switch of BCD output.
6. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Program examples
This is an example of explaining connection of digital switch starting from the input X010 and starting from the
digit designation output Y010.
1. Program
[Structured ladder] [ST]
X000 DSW DSW(X000, X10, K1, Y10, D0);
EN ENO
X10 s d1 Y10
K1 n d2 D0
2. Wiring diagram
This wiring connection diagram is an example of basic unit of FX3U series (sync input/sync output). As for the
actual wiring, see the manual of the PLC.
100
101 To second set
102
103
100 101 102 103
Digital switch
of BCD
Digital switch
of BCD
Diode of 0.1 A,
50 V is needed.
1
2 To second set
3
1 2 4 8 1 2 4 8 4
24V 0V S/S X010 X011 X012 X013 X014 X015 X016 X017
First set input Second set input
PLC
COM3 Y010 Y011 Y012 Y013
100 101 102 103
3. Timing chart
X000
Repeated
Y010 0.1 sec operation 0.1 sec 0.1 sec
Y011 0.1 sec
Y012 0.1 sec Interrupt
Y013 0.1 sec
M8029 Complete flag
Y010 to Y013 are turned ON sequentially in every 100 ms while X000 is being turned ON, and when
operation of one cycle is over, the execution complete flag M8029 is set up.
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1
4. Method of using by relay output type
Outline
You can also use the relay output type PLC by providing with "digital switch reading input."
When pushbutton (X000) is pressed, the DSW performs a series of operations. In the case of this program, if
Y010 to Y013 are relay outputs, there is no problem in relay contact life.
[Structured ladder] [ST]
IF(LDP(TRUE, X000)) THEN SET(TRUE, M0);
2
LDP SET
Instruction List
EN ENO EN ENO DSW(M0, X010, K1, Y010, D0);
X000 s d M0 RST(M8029, M0);
M0 DSW
3
EN ENO
X010 s d1 Y010
Instruction
Configuration of
K1 n d2 D0
M8029 RST
EN ENO
d M0
1) DSW is operating while the M0 (digital switch reading input) is being ON. 4
Instructions
Explanation of
How to Read
2) DSW continues to operate until operation of one cycle is over and execution complete flag (M8029) is set
up.
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
7.8.4 SEGD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for lighting up the 7-segement display unit (1 digit) by decoding the data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SEGD
SEGD 16 bits Continuous EN ENO SEGD(EN, s, d);
s d
SEGDP
SEGDP 16 bits Pulse EN ENO SEGDP(EN, s, d);
s d
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Beginning word device to be decoded ANY16
Output ENO Execution state Bit
variable Word device for storing 7-segment display data ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S1 zz z z z
z z z z z z S1 S1 zz z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Function and operation explanation
Outline
1. 16-bit operation(SEGD, SEGDP)
0 to F (hexadecimal) of lower 4 bits (1 digit) of the device designated in are decoded into 7-segment
display data, and stored in lower 8 bits of the device designated in .
Command input SEGD
2
Instruction List
EN ENO
Beginning word device s d Word device for storing
to be decoded 7-segment display data
2. 7-segement decoding table
Composition of 7
Display data
3
Hexadecimal b3 b2 b1 b0 segments B15 ••• B8 B7 B6 B5 B4 B3 B2 B1 B0
Instruction
Configuration of
0 0 0 0 0 - - 0 0 1 1 1 1 1 1
1 0 0 0 1 - - 0 0 0 0 0 1 1 0
2 0 0 1 0 - - 0 1 0 1 1 0 1 1 4
Instructions
Explanation of
How to Read
3 0 0 1 1 - - 0 1 0 0 1 1 1 1
4 0 1 0 0 - - 0 1 1 0 0 1 1 0
5 0 1 0 1 - - 0 1 1 0 1 1 0 1
5
B0
Basic Instruction
6 0 1 1 0 - - 0 1 1 1 1 1 0 1
7 0 1 1 1 B5 B1 - - 0 0 1 0 0 1 1 1
B6
8 1 0 0 0 B4 B2 - - 0 1 1 1 1 1 1 1
9 1 0 0 1 B3 - - 0 1 1 0 1 1 1 1
6
Instructions
Step Ladder
A 1 0 1 0 - - 0 1 1 1 0 1 1 1
B 1 0 1 1 - - 0 1 1 1 1 1 0 0
C 1 1 0 0 - - 0 0 1 1 1 0 0 1 7
Instructions
Applied
D 1 1 0 1 - - 0 1 0 1 1 1 1 0
E 1 1 1 0 - - 0 1 1 1 1 0 0 1
F 1 1 1 1 - - 0 1 1 1 0 0 0 1
8
Function
and Pulse Catch
Interrupt Function
B0 is the beginning of bit device or the
lowest bit of the word device.
Cautions A
and addresses
between devices
Relationships
1) Number of bits occupied
Lower 8 bits from the output of the device designated in are occupied, and the upper 8 bits are not
changed.
2) Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
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(Basic & Applied Instruction) 7.8 External FX I/O Device
7.8.5 SEGL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This is a command for controlling the 7-segment display unit with latch of 4 digits and 1 set or 4 digits and 2
sets.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SEGL
EN ENO
SEGL 16 bits Continuous SEGL(EN, s, n, d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Beginning word device for BCD conversion
Input
• n=K(H)0 to K(H)3: 1 point occupied ANY16
variable
• n=K(H)4 to K(H)7: 2 points occupied
Parameter ANY16
ENO Execution state Bit
Output Beginning device to be output (Y)
variable • n=K(H)0 to K(H)3: 8 points occupied Bit
• n=K(H)4 to K(H)7: 12 points occupied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant number string
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z
z z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation(SEGL)
The 4-digit numerical value of the device designated in is converted into BCD data, and is sequentially
divided in time digit by digit, and is sent into the 7-segment display unit with BCD decoder.
Command input SEGL
EN ENO
Word device for
BCD operation s d Beginning device to be output (Y)
Parameter n
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
When using 4 digits and 1 set(n=K0 to K3)
Outline
→ As for selection of "n", see the second item below.
1) Data and strobe signal
The 4-digit numerical value of is converted from BIN to BCD, and is issued sequentially by time
division digit by digit from to +3.
The strobe signal output ( +4 to +7) is also issued sequentially by time division, and the 7- 2
segment display of 4 digits and 1 set is latched.
Instruction List
2) In , BIN data in a range of 0 to 9,999 is valid.
3) Connection example of 7-segment display unit
The following diagram show an example of FX3U series basic unit (sync output). As for the actual wiring,
see the manual of the PLC.
3
Instruction
Configuration of
PLC (transistor output)
4
COM d d +1 d +2 d +3 d +4 d +5 d +6 d +7
1 2 4 8 100 101 102
103
Instructions
Explanation of
How to Read
103 102 101 100
V+
1
2
4 5
8
Basic Instruction
First set
When using 4 digits and 2 sets(n=K4 to K7)
→ As for selection of "n", see the item below.
1) Data and strobe signal
6
Instructions
Step Ladder
a) 4 digits, first set
The 4-digit numerical value of is converted from BIN to BCD, and is issued sequentially by time
division digit by digit from to +3.
The strobe signal output ( +4 to +7} is also issued sequentially by time division, and the 7-
segment display of 4 digits and 1 set is latched. 7
b) 4 digits, second set
Instructions
Applied
The 4-digit numerical value of +1 is converted from BIN to BCD, and is issued sequentially by
time division digit by digit from +10 to +13.
The strobe signal output ( +4 to +7) is also issued sequentially by time division, and the 7-
segment display of 4 digits and 2 sets is latched. (The strobe signal output ( +4 to +7) is
common in each set.) 8
2) In and +1, BIN data in a range of 0 to 9,999 is valid.
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
3) Connection example of 7-segment display unit
The following diagram show an example of FX3U series basic unit (sync output).
As for the actual wiring, see the manual of the PLC.
PLC
(transistor output)
COM d d +1 d +2 d +3 d +4 d +5 d +6 d +7 COM d +10 d +11 d +12 d +13
1 2 4 8 100 101 10 2
103 1 2 4 8
103 102 101 100 103 102 101 100
V+ V+
1 1
2 2
4 4
8 8
First set Second set
Related devices
→ As for the method of using the command execution complete flag, see paragraph 1.3.4.
Device Name Content
Command execution
M8029 To be turned ON when output of 4 digits is over.
complete
Cautions
1. Time for updating 7-segement 4-digit display
The time for updating the display of 4 digits (1 set or 2 sets) is required by 12 times of the scan time
(operation time).
2. Operation when command input is turned OFF
While the command input is ON, the operation is repeated, but once the command contact is turned OFF
during operation, the operation is interrupted, and when turned ON again, the operation is resumed from the
beginning.
3. Number of bits occupied
When using 4 digits and 1 set : 1 point is occupied from the beginning device designated in .
8 points are occupied from the beginning device designated in . If the
number of digits is smaller, the remainder cannot be used in other
application.
When using 4 digits and 2 sets: 2 points are occupied from the beginning device designated in .
12 points are occupied from the beginning device designated in . If the
number of digits is smaller, the remainder cannot be used in other
application.
4. Scan time (operation period) and display timing
SEGL command is executed in synchronism with the scan time (operation period) of the PLC.
For a series of display, the scan time of the PLC is required by 10 ms or more.
If less than 10 ms, you can operate in the scan time of 10 ms or more by using the constant scan mode.
5. Output format of PLC
Use the PLC of transistor output type.
6. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
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(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Selection procedure of 7-segment display unit
Outline
You can select the 7-segment display unit depending on the electrical content by referring to the example
below.
→ As for the actual wiring, see the hardware manual of the PLC main body.
1. Check points by 7-segment specification 2
1) Check if the data input, and input voltage and current characteristics of strobe signal are satisfying the
Instruction List
output specification of the PLC or not.
- Check if the input signal voltage (Lo) is about 1.5 V or less.
- Check if the input voltage is DC 5 V to DC 30 V.
2) Check if the BCD decoding or latching function is provided or not.
3
Instruction
Configuration of
Selection procedure of parameter n by specification of 7-segment display
The value to be set in parameter n varies with the signal logic of 7-segment display.
Select in the following procedure.
A check column is provided in the final line of the table. Check the corresponding positive or negative logic,
and select the parameter accordingly.
4
1. Role of parameter n
Instructions
Explanation of
How to Read
Parameter n is a number selected depending on the logic (positive or negative) of 7-segment data input, the
logic (positive or negative) of strobe signal, or control of 4 digits and 1 set or control of 2 sets.
2. Check the output logic of the PLC
The transistor output of the PLC is available in two types, sync output and source output. The specification is
different as shown below.
5
Basic Instruction
Logic Negative logic Positive logic
Output format Sync output [- common] Source output [+ common]
V+
+V0
Pull-up
resistance
ON 6
Instructions
Step Ladder
Logic 1 HIGH
Output circuit Y000 Logic 1
Y000
ON
LOW
COM1 Pull-down
PLC resistance PLC
7
Instructions
Applied
Because of transistor output (sync), when the internal logic Because of transistor output (source), when the internal
Explanation is 1 (ON output), the output is LOW level (0V). logic is 1 (ON output), the output is HIGH level (V+).
This is called the negative logic. This is called the positive logic.
Logic check
3. Check the logic of the 7-segment display unit. 8
1) Data input
Function
and Pulse Catch
Interrupt Function
Logic Negative logic Positive logic
d 1 H H d 1 H L H L
d +1 2 H d +1 2 H L
Timing chart d
d
+2 4
+3 8
d
d
+2 4
+3 8
H
H
A
and addresses
between devices
Relationships
7-segment 7-segment
display display
Explanation Becoming BCD data at LOW level Becoming BCD data at HIGH level
Logic check
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(Basic & Applied Instruction) 7.8 External FX I/O Device
2) Strobe signal
Logic Negative logic Positive logic
d 1 H d H
1
d +3 8 d +3 8
Timing chart
d +4 to d +7 H H d +4 to d +7 L H L H
Strobe display None None
Strobe display None None
change change
Latch Latch
Explanation Data latched at LOW level is held Data latched at HIGH level is held
Logic check
4. Selection of parameter n
Select by referring to the table below depending on the positive or negative logic of the PLC side, and the
positive or negative logic of the 7-segment display side.
Parameter n
PLC output logic Data input Strobe signal
4 digits × 1 set 4 digits × 2 sets
Negative logic (coinciding) 0 4
Negative logic (coinciding)
Positive logic (not coinciding) 1 5
Negative logic
Negative logic (coinciding) 2 6
Positive logic (not coinciding)
Positive logic (not coinciding) 3 7
Positive logic (coinciding) 0 4
Positive logic (coinciding)
Negative logic (not coinciding) 1 5
Positive logic
Positive logic (coinciding) 2 6
Negative logic (not coinciding)
Negative logic (not coinciding) 3 7
5. Explanation of selection method of parameter n by exemplary cases
When the following 7-segment display is connected, n=1 in the case of 4 digits × 1 set, and n=5 in the case of
4 digits × 2 sets.
1) Transistor output of PLC
- Sync output = negative logic
- Source output = positive logic
2) 7-segment display
- Data input = negative logic
- Strobe signal = positive logic
Parameter n
PLC output logic Data input Strobe signal
4 digits × 1 set 4 digits × 2 sets
Negative logic (coinciding) 0 4
Negative logic (coinciding)
Positive logic (not coinciding) 1 5
Negative logic
Negative logic (coinciding) 2 6
Positive logic (not coinciding)
Positive logic (not coinciding) 3 7
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(Basic & Applied Instruction) 7.8 External FX I/O Device
1
7.8.6 ARWS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
This instruction enters data by arrow switches for digit move and increase and decrease of numerical value of
Instruction List
each digit.
1. Format and operation, execution form
Instruction Execution Expression in each language
name
Operation
form Structured ladder ST 3
Instruction
Configuration of
ARWS
EN ENO
ARWS 16 bits Continuous ARWS(EN, s, n, d1, d2);
s d1
n d2
4
2. Set data
Instructions
Explanation of
How to Read
Variable Description Data type
EN Execution condition Bit
Input
Head bit device to be entered [4 points occupied] Bit
variable
ENO
Digit number specification of 7-segment display.
Execution state
ANY16
Bit
5
Basic Instruction
Output Word device in which BCD converted data is stored ANY16
variable
Head bit device (Y) for connecting 7-segment display unit [8 points
Bit
occupied]
3. Applicable devices
Bit Devices Word Devices Others
6
Instructions
Step Ladder
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zzz z S1 z
z z z S2 S2 zz z 7
z z
Instructions
Applied
z z
S: Refer to "Cautions".
Function and operation explanation 8
Four arrow switches are connected to the input of the device specified by , the 7-segment display unit
Function
and Pulse Catch
Interrupt Function
with BCD decoder is connected to the output of the device specified by , and the numeric value is
entered in the device specified by .
1. 16-bit operation (ARWS)
In the device specified by , 16-bit BIN value of 0 to 9,999 is stored, but for the convenience of A
explanation, BCD converted value is expressed.
and addresses
between devices
Relationships
When the command input is ON, then ARWS instruction operates as follows.
Command input ARWS
EN ENO
Head bit device to s d1 Word device in which BCD
be entered converted data is stored
Digit number n d2 Head bit device for connecting
specification 7-segment display unit
of 7-segment
display.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Content of display and operation unit
Display, operation panel
103
Strobe output
d2 +7
102
d2 +6 To PLC
101 output
d2 +5
100
d2 +4
Display for
selected digit
7-segment display unit
7-segment display unit with latch for
visual display of numeric value being set
Numeric value output
d2 +3
4
Increment d2 +2 To PLC
2 output
d2 +1
s +1 1
d2
Carry over Carry down s +3
Switch
s +3 s +2 s +2 To PLC
s input
s +1
Decrement s
Arrow switch (arrow-mark switch)
A switch for selecting each digit and increasing
or decreasing the numeric value of selected digit.
1) Digit specification n of 7-segment display unit with BCD decoder
In the following explanation of operation, four digits (103 digits) are supposed.
2) Operation of digit select switch ( +2, +3)
- Operation when carry-down switch +2 is ON
Every time the switch is pressed, the digit specification changes in the sequence of 103 → 102 → 101 →
100 → 103.
- When carry-over switch +3 is ON
Every time the switch is pressed, the digit specification changes in the sequence of 103 →100 → 101 →
102 → 103.
3) Operation of LED for selected digit display ( +4 to +7)
The specified digit is displayed by LED by strobe signals +4 to +7.
4) Operation of data change switch of digit unit ( , +1)
Data changes in the digit specified by the "digit select switch."
- Operation when increment input is ON
Every time the switch is pressed, the content of changes in the sequence of 0 → 1 → 2 → ... → 8
→ 9 → 0 → 1.
- Operation when decrement input is ON
Every time the switch is pressed, the content of changes in the sequence of 0 → 9 → 8 → 7 ... →
1 → 0 → 9.
The content can be displayed in 7-segment display unit.
Thus, by a series of operations, desired numeric values can be written into while observing the 7-
segment display unit.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Cautions
Outline
1. Setting of parameter n
Refer to the parameter setting of SEGL instruction. However, the setting range is 0 to 3.
2. Output format of PLC
Use the PLC of transistor output type.
2
Instruction List
3. Scan time (operation period) and display timing
ARWS instruction is executed in synchronism with the scan time (operation cycle) of the PLC.
To execute a series of displays, 10 ms or more is needed in the scan time of the PLC. If less than 10 ms, you
must use the constant scan mode and operate in scan time of 10 ms or more.
4. Number of bits occupied in device
3
Instruction
Configuration of
1) The input of the device specified by occupies 4 bits.
2) The output of the device specified by occupies 8 bits.
5. Limit of times of use of instruction
ARWS instruction can be used only once in the program. When using this instruction two or more times, use 4
index function to program.
Instructions
Explanation of
How to Read
6. Object devices are limited.
S1: FX3U FX3UC PLCs only are applicable.
However, index modifier (V, Z) is not applicable.
S2: FX3U, FX3UC PLCs only are applicable.
5
Basic Instruction
Program example
1. When changing the timer setting and displaying the current value
1) Specify the timer number by 3-digit digital switch
X010 6
X011
Instructions
Step Ladder
X012
X013
7
8 4 2 1 8 4 2 1 8 4 2 1
Instructions
Applied
102 101 100
Y012 Y011 Y010
2) Setting of constant value of timer by arrow switch
Y007 Y006 Y005 Y004 8
Function
and Pulse Catch
Interrupt Function
Read out 1
Y000
Y014 2
Y001
4
Y015 Y002
8
Y003
Write in
A
and addresses
between devices
Relationships
Read out
Setting
Write in
X004 X003 X002 X000 X001
Operation explanation
Every time read/write key is pressed, the read and write LED is changed over and displayed.
• When reading out
Press the setting switch (X003) after setting the timer number by digital switch.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
• When writing in
Press the X003 by setting the numeric value while observing the 7-segment display by the arrow switch.
Program
[Structured ladder]
X OUT_T
EN ENO
TC0 TCoil
D300 TValue
X
OUT_T
EN ENO
TCoil
Practical timer circuit
TC1
D301 TValue
X OUT_T
EN ENO
TC99 TCoil
D399 TValue
X000
M 0 Decrement
X001
M 1 Increment
X002
M 2 Carry down
M8000
M 3 Carry over
RUN monitor
X004 ALTP
EN ENO
Read/Write d M100
M100
Y014 Read display
M100
Y015 Write display
Y014 X003 DSW Digital switch → Z, 4 digits, 1 set
EN ENO
Read Setting X010 s d1 Y010
out
K1 n d2 Z
Y014 SEGL 4 digits, 1 set TOZ → 7-segment negative logic
EN ENO
Read out T0Z s d Y000
K1 n
Y015 MOVP (M0 to M3) → (D511) →(Y000 to Y007)
EN ENO → 7-segment 1 digit, 1 set
Write in D300Z s d D511
ARWS
EN ENO
M0 s d1 D511
K1 n d2 Y000
To next page
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(Basic & Applied Instruction) 7.8 External FX I/O Device
Outline
From previous page
Y015 X003 MOVP
EN ENO
Write Setting D511 s d D300Z
2
in
[ ST ]
Instruction List
OUT_T(X , TC0, D300);
OUT_T(X , TC1, D301);
OUT_T(X , TC99, D399);
3
Instruction
Configuration of
M0:= X000;
M1:= X001;
M2:= X002;
M3:= NOT M8000;
ALTP(X004, M100);
Y014:= NOT M100;
Y015= M100;
4
Instructions
Explanation of
How to Read
IF(Y014 AND X003) THEN DSW (TRUE, X010, K1, Y010, Z);
SEGL(Y014, T0Z, K1, Y000);
MOVP(Y015, D300Z, D511);
ARWS(Y015, M0, K1, D511, Y000);
IF(Y015 AND X003) THEN MOVP(TRUE, D511, D300Z);
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
387
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
7.8.7 ASC
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the 1-byte alphanumeric character string into ASCII code.
This is used when selecting and displaying plural messages in the external display unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ASC
ASC 16 bits Continuous EN ENO ASC(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable 1-byte alphanumerics of 8 characters entered from personal
ANY16
computer
Output ENO Execution state Bit
variable Head device for storing ASCII code ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z*1
z z z S1 S1 z
*1. In ASC instruction, double quotation marks (") are not needed before and after the character string
specified by .
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation (ASC)
1-byte alphanumeric character string specified by is converted into ASCII code, and transferred
sequentially to the device specified by .
• In the device specified by , 1-byte characters of A to Z, 0 to 9, and symbols can be handled. (2-byte
characters cannot be handled.)
By the programming tool, the character string is entered when programming.
• In the device specified by , converted ASCII code is stored by 2 characters/1 byte each in the
sequence of lower 8 bits and higher 8 bits.
Command input ASC Higher 8 bits Lower 8 bits
EN ENO d 42 (B) 41 (A)
1-byte alphanumerics of s d Head device for
8 characters entered from storing ASCII code
personal computer d +1 44 (D) 43 (C)
Example: ABCDEFGH d +2 46 (F) 45 (E)
d +3 48 (H) 47 (G)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Extension function
Outline
When the extension function is validated by turning ON M8161, the 1-byte alphanumeric character string of
the device specified by is converted into ASCII code, and sequentially transferred into the device
specified by only in the lower 8 bits (1 byte).
The extension function is not available when FXU PLC is V2.30 or earlier.
Command input
2
Instruction List
M8161
ASC
EN ENO
1-byte alphanumerics of Head device for storing
8 characters entered from s d
personal computer ASCII code
M8000 Example:
ABCDEFGH 3
M8161
Instruction
Configuration of
Higher 8 bits are H00.
Higher 8 bits Lower 8 bits Character string
00 41 A 4
Instructions
Explanation of
How to Read
+1 00 42 B
+2 00 43 C
+3 00 44 D
+4 00 45 E
+5 00 46 F 5
00 47 G
Basic Instruction
+6
+7 00 48 H
Related devices
Device Name Content 6
8-bit processing mode of ASC, RS, ASCI, HEX, CCD instruction
Instructions
Step Ladder
OFF : Every 2 characters are stored in the sequence of lower 8 bits, higher 8 bits (2 characters/
M8161 Function extension flag
word).
ON : Characters are stored in lower 8 bits character by character (1 character/word).
Cautions
7
1. Number of bits occupied in device
Instructions
Applied
1) When extension function is OFF
- The device specified by occupies the value of number of characters ÷ 2 bits. (The remainder is
carried over.)
2) When extension function is ON 8
- The device specified by occupies the same number as the number of characters.
Function
and Pulse Catch
Interrupt Function
2. When using RS, ASCI, HEX, CCD
The extension function flag M8161 is a common flag used in other instructions.
When above instructions are used together with ASC instruction, you must execute the program of turning
ON or OFF the M8161 immediately before the ASC instruction so as to avoid its effect.
A
3. Object devices are limited.
and addresses
between devices
Relationships
S1: FX3U, FX3UC PLCs only are applicable.
389
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
7.8.8 PR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction performs parallel output of ASCII code data to the output (Y).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
PR
PR 16 bits Continuous EN ENO PR(EN, s, d);
s d
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Head device for storing data of ASCII code. String
Output ENO Execution state Bit
variable Head device for output data of ASCII code. Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z S1 z
z z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation (PR)
ASCII code stored in lower 8 bits (1 byte) of to +7 is issued to to +7 sequentially in time
division character by character.
Command input PR
EN ENO
Head device for storing s d Head device for output
data of ASCII code. data of ASCII code.
The following timing chart explains the ASCII code stored in the device specified by .
The transmission sequence begins from ="A", and ends with +7="H", and 8 bytes are transmitted in
total.
+1 +2 +3 +4 +5 +6 +7
A(H41) B(H42) C(H43) D(H44) E(H45) F(H46) G(H47) H(H48)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
2. Timing chart
Outline
Command input
s1 s1 +1 s1 +2 s1 +3 s1 +7
d to d +7 Data A B C D H 2
Instruction List
T0 T0
T0: Scan time (ms)
T0
d +8 Strobe
d +9 Execution busy flag
3
Instruction
Configuration of
Type of output signal
• to +7 : Transmission output is the lower bit side, and +7 is the higher bit side.
• +8 : Strobe signal
• +9 : Execution busy flag Operation conforms to the timing chart above. 4
Instructions
Explanation of
How to Read
Extension function
1. 16-byte serial output
By ON/OFF control of special auxiliary relay M8027, the number of characters of output varies in every two
times of instruction drive. In the case of M8027=OFF, the operation is 8-byte serial output (fixed in 8
characters), and in the case of M8027=ON, it is 16-byte serial output (1 to 16 characters).
5
Basic Instruction
An example of display of 16 characters or less (1 character/byte) is explained by referring to a display device
(example: A6FD type external display unit*1).
The display data is supposed to be stored in hexadecimal code in D300 to D307, for example.
1) A6FD type external display unit*1 connection example 6
The PLC shown below is an example of FX2N-16EYT (sink output) connected to FX3U-32M .
Instructions
Step Ladder
PLC
Instructions
Applied
COM1 Y020 Y021 Y022 Y023 Y024 Y025 Y026 Y027 COM2 Y030 Y031 Y032 Y033
NC
12V
24V AC100/200V
~
8
COM D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 STR AC AC
Function
and Pulse Catch
Interrupt Function
A6FD type external display unit *1
LG
*1. A6FD type external display unit is out of production since November 2002.
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
2) Timing chart (When M8027=ON)
Operation starts when changed from X000=OFF to ON.
Drive input X000
Data Y007 to Y000 Head character End character *
T T T T: Operation cycle
or interrupt time
Strobe Y010
Execution busy flag Y011
Execution complete flag M8029
* If H00 (NUL code) exists in the data (in 16 characters), one character before H00 (NUL code) is the end character.
Related devices
Device Name Content
OFF : 8-byte serial output (fixed in 8 characters)
M8027*1 PR mode
ON : 16-byte serial output (1 to 16 characters)
*1. Cleared when changed from RUN to STOP.
Cautions
1. Command input and operation of instruction
Command input=ON : Even in the midst of continuous ON or pulse instruction execution, when the output of
one cycle is over, the execution is terminated.
M8029 operates only when M8027=ON.
Command input=OFF:All outputs are OFF.
2. Relation with scan time (operation time)
This instruction is executed in synchronism with the scan time.
If the scan time is short, it is driven by constant scan mode, or if too long, it is driven by using the timer
interrupt mode.
3. Output of PLC
Use the transistor output for the output of the PLC.
4. If 00H (NUL) exists in the data (when M8027=ON)
The instruction execution is completed, and the remaining data is not issued.
M8029 remains ON during 1 operation cycle.
5. Object devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
7.8.9 FROM
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction reads out the content of buffer memory (BFM) of special extension unit/block to the PLC.
If a large quantity of buffer memory (BFM) data is read out in batch by using this instruction, a watchdog timer
error may occur. When there is no bad influence for the control if the data is divided and read out, you can use
RBFM instruction.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FROM
EN ENO
FROM 16 bits Continuous n1
n2
d FROM(EN, n1, n2, n3, d);
4
Instructions
Explanation of
How to Read
n3
FROMP
EN ENO
FROMP 16 bits Pulse n1 d FROMP(EN, n1, n2, n3, d);
n2 5
n3
Basic Instruction
DFROM
EN ENO
DFROM 32 bits Continuous n1 d DFROM(EN, n1, n2, n3, d);
n2
n3
6
Instructions
Step Ladder
DFROMP
EN ENO
DFROMP 32 bits Pulse n1 d DFROMP(EN, n1, n2, n3, d);
n2
n3 7
Instructions
Applied
2. Set data
Data type
Variable Description 16-bit 32-bit
EN Execution condition Bit
operation operation
8
Function
and Pulse Catch
Interrupt Function
Input Unit No. of special extension unit/block ANY16 ANY32*1
variable Transfer origin buffer memory (BFM) number ANY16 ANY32*1
Number of transfer points ANY16 ANY32*1
ENO Execution state Bit
Variable
Transfer destination device A
• 16-bit operation: n3 points occupied ANY16 ANY32
and addresses
between devices
Relationships
• 32-bit operation: 2 × n3 points occupied
*1. In the case of FXU, FX1N, FX2N, FX2C, FX1NC, FX2NC series, the data type of DFROM, DFROMP of
32-bit operation is ANY16.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 z z
z S1 z z
z z z z z z S1 z z z
z S1 z z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation (FROM, FROMP)
→ As for the common terms of FROM/TO instruction, refer to the Common terms of FROM/TO
instruction (detail)
From special extension (BFM) to PLC (word device)
16-bit data of n3 points starting from buffer memory (BFM) n2 in the special extension unit/block of unit
number n1 is transferred (read out) by the portion of n3 points starting from the device specified by in
the PLC.
Command input FROM
EN ENO
Unit No. of special n1 d Transfer destination device
extension unit/block
Transfer origin buffer n2
memory (BFM) number
Number of transfer points n3
2. 32-bit operation (DFROM, DFROMP)
From special extension (BFM) to PLC (word device)
32-bit data of n3 points starting from buffer memory (BFM) [n2+1, n2] in the special extension unit/block of
unit number n1 is transferred (read out) by the portion of n3 points starting from the device specified by
in the PLC.
Command input DFROM
EN ENO
Unit No. of special n1 d Label *1
extension unit/block
Transfer origin buffer n2
memory (BFM) number
Number of transfer points n3
*1. This defines the transfer destination device.
Related devices
Device Name Content
Prohibit/permit interruption during execution of FROM/TO instruction.
→ As for the detail, refer to the following pages "Interrupt accept during
M8028 Interrupt permit flag execution of FROM/TO (M8028)."
OFF : Interrupt prohibit (interrupt executed after FROM/TO instruction process)
ON : Interrupt permit
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Cautions
Outline
1) Bit device digits to be specified by should be K1 to K4 in the case of 16-bit operation instruction, and
K1 to K8 in the case of 32-bit operation.
2) When handling 32-bit data in structured program, unlike the simple project, you cannot specify the 16-bit
device directly. Use the label when handling 32-bit data.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
2
Instruction List
Use the global label when specifying the device.
3) FXU PLC supports the instruction in V2.10 or later.
4) FX0N PLC does not support the instruction of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
5) Object devices are limited. 3
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
Instruction
Configuration of
Program example
By using direct specification*1 of FROM instruction or buffer memory, you can transfer (read out) the content
of buffer memory (BFM) of special extension unit/block to the digit specification of data register (D), extension
register (R), or auxiliary relay (M). 4
Instructions
Explanation of
How to Read
*1. FX3U, FX3UC PLCs only are available.
Example) Program for reading out BFM#4 (abnormal station information) of CC-Link/LT master (unit No. 0
fixed) built in FX3UC-32MT-LT(-2) to D0.
- In the case of FROM instruction
[Structured ladder] [ST]
5
Basic Instruction
FROM FROM(X001, K0, K4, K1, D0);
X001
EN ENO
K0 n1 d D0
K4 n2
K1 n3 Transfer
destination 6
Instructions
Step Ladder
Number of transfer points
BFM #4
Unit No. 0
- In the case of MOV instruction
[Structured ladder] [ST] 7
MOV(M8000, U0¥G4, D0);
Instructions
Applied
M8000 MOV
EN ENO
U0¥G4 s d D0
Unit No. 0 Transfer
BFM #4 destination
Program for reading out BFM#0 to #3 (remote station connection information) of CC-Link/LT master
8
Function
and Pulse Catch
Interrupt Function
(unit No. 0 fixed) built in FX3UC-32MT-LT(-2) to D10 to D13.
- In the case of FROM instruction
[Structured ladder] [ST]
M0 FROMP FROMP(M0, K0, K0, K4, D10);
K0
EN ENO A
n1 d D10
and addresses
between devices
Relationships
K0 n2
K4 n3 Transfer
destination
Number of transfer points
BFM #0
Unit No. 0
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
- In the case of BMOV instruction
[Structured ladder] [ST]
M0 BMOV BMOV(M0, U0¥G0, K4, D10);
EN ENO
U0¥G0 s d D10
K4 n
Transfer
destination
Number of transfer points
Unit No. 0
BFM #0
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Common terms of FROM/TO instruction (detail)
Outline
Specification content of operand
1. Unit number n1 of special extension unit/block
Unit number is used for specifying which equipment is the object of working for FROM/TO instruction. 2
Setting range: K0 to K7
Instruction List
Unit
No. 0
built-in Unit Unit Unit
CC-Link/LT No. 1 No. 2 No. 3
FX3UC-32MT Input/output Special Special Input/output Special 3
-LT(-2) extension extension extension extension extension
Instruction
Configuration of
Basic unit block block block block block
The unit number is assigned automatically to the special extension unit/block connected to the PLC.
The unit number is given from the one closest to the basic unit in the sequence of No. 0, No. 1, No.2, etc.
In the case of the FX3UC-32MT-LT(-2) PLC, since the CC-Link/LT master is built in, the unit number is given
from the one closest to the basic unit in the sequence of No. 1, No.2, No. 3, etc.
4
Instructions
Explanation of
How to Read
2. Buffer memory (BFM) number "n2"
In the special extension unit/block, 16-bit RAM is built in, and it is used as the buffer memory.
The buffer memory numbers are #0 to #32766, and the content is determined depending on the control
purpose of each equipment.
Setting range: K0 to K32766 5
• When BFM is handled in 32-bit instruction, the specified BFM is lower 16 bits, and the BFM of the next
Basic Instruction
number is higher 16 bits.
Higher 16 bits Lower 16 bits
BFM #10 BFM #9 ← Specified BFM number
3. Transfer points "n3"
6
Instructions
Step Ladder
Setting range: K1 to K32767
Number of transfer words is specified by n3.
"n =2" in a 16-bit instruction indicates the same meaning with "n = 1" in a 32-bit instruction.
Specified device Specified BFM Specified device Specified BFM 7
Instructions
Applied
D100 BFM #5
D100 BFM #5
D101 #6
D101 #6
D102 #7
D102 #7
D103 #8
D103 #8
D104 #9
8
Function
and Pulse Catch
Interrupt Function
16-bit operation when n=5 32-bit operation when n=2
Interrupt accept during execution of FROM/TO (M8028)
1. When M8028=OFF A
Interrupt is prohibited automatically during execution of FROM/TO instruction, and input interrupt or timer
and addresses
between devices
Relationships
interrupt is not executed.
An interrupt occurring in this period is executed immediately after completion of execution of FROM/TO
instruction.
FROM/TO instruction can be used also during the interrupt program.
2. When M8028=ON
When an interrupt occurs during execution of FROM/TO instruction, the execution is suspended, and the
interrupt program is executed.
However, FROM/TO instruction cannot be used during interrupt program.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
Handling in the event of occurrence of watchdog timer error
1. Cause of occurrence of watchdog timer error
Watchdog timer error may occur in the following cases.
1) When many special extension equipments are connected.
In a configuration of a large number of connected units of special extension equipments (positioning, cam
switch, link, analog, etc.), the initializing time of the buffer memory executed in PLC RUN mode is long,
and the operation time is extended, and a watchdog timer error may occur.
2) When FROM/TO instructions are driven simultaneously.
When many FROM/TO instructions are executed, or when multiple buffer memories are transferred, the
operation time is extended, and a watchdog timer error may occur.
2. Countermeasure
1) Method of using RBFM, WBFM instruction
→ As for BFM divided reading [RBFM], refer to section 7.25.1.
→ As for BFM divided writing [WBFM], refer to section 7.25.2.
2) Method of changing the time of watchdog timer
The detection time of the watchdog timer can be changed by rewriting the content of D8000 (watchdog
timer time).
By entering the following program, the subsequent sequence programs are monitored by the new
watchdog timer time.
M8002 MOV
0 EN ENO Watchdog timer time 300ms
Initial pulse K300 s d D8000
WDT Watchdog timer refresh
EN ENO
When WDT instruction is not programmed,
the value of D8000 is valid during END process.
3) Change of execution timing of FROM/TO instruction
Please shorten the operation time by deviating the execution of FROM/TO instruction.
Handling of special extension unit/block
As for the connection method of special extension unit/block, the number of units allowed to be connected,
and handling of input and output numbers, please refer to the manual of the PLC main body or the manual of
each special extension unit/block.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
7.8.10 TO
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction writes data from PLC into the buffer memory (BFM) of special extension unit/block.
By this instruction, when data is written into multiple buffer memories (BFM) in batch a watchdog timer error
may occur. When there is no bad influence for the control if the data is divided and written in, you can use
WBFM instruction.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
TO
EN ENO
TO 16 bits Continuous
s
n1
TO(EN, s, n1, n2, n3); 4
Instructions
Explanation of
How to Read
n2
n3
TOP
EN ENO
TOP 16 bits Pulse
s
n1
TOP(EN, s, n1, n2, n3); 5
Basic Instruction
n2
n3
DTO
EN ENO
DTO 32 bits Continuous
s
DTO(EN, s, n1, n2, n3);
6
n1
Instructions
Step Ladder
n2
n3
DTOP
EN
s
ENO
7
DTOP 32 bits Pulse DTOP(EN, s, n1, n2, n3);
Instructions
Applied
n1
n2
n3
2. Set data
Data type
8
Function
and Pulse Catch
Interrupt Function
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Transfer source data or device
• 16-bit operation: n3 points occupied ANY16 ANY32
Input
• 32-bit operation: 2 × n3 points occupied A
variable Unit No. of special extension unit/block
and addresses
between devices
Relationships
ANY16 ANY32*1
(Sequentially from the right side of basic unit, K0 to K7)
Transfer destination buffer memory (BFM) number ANY16 ANY32*1
Number of transfer points ANY16 ANY32*1
Output
ENO Execution state Bit
variable
*1. In the case of FXU, FX1N, FX2N, FX2C, FX1NC, FX2NC series, the data type of DTO, DTOP of 32-bit
operation is ANY16.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 z z
z S1 z z
z z z z z z z S1 zz z z z
z S1 z z
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation (TO, TOP)
→ As for common terms of FROM/TO instruction, refer to section 7.8.9.
From PLC (word device) to special extension (BFM)
You can transfer (write) 16-bit data for the portion of n3 points starting from buffer memory (BFM) n2 in
special extension unit/block of unit number n1, and for the portion of n3 points starting from the device
specified by in PLC.
Command input TO
EN ENO
Transfer source data or s
device
Unit No. of special n1
extension unit/block
Transfer destination buffer n2
memory (BFM) number
Number of transfer points n3
2. 32-bit operation (DTO, DTOP)
From PLC (word device) to special extension (BFM)
You can transfer (write) 32-bit data for the portion of n3 points starting from buffer memory (BFM) [n2+1, n2]
in special extension unit/block of unit number n1, and for the portion of n3 points starting from the device
specified by in PLC.
Command input DTO
EN ENO
Label *1 s
Unit No. of special n1
extension unit/block
Transfer destination buffer n2
memory (BFM) number
Number of transfer points n3
*1. This defines transfer destination data or device.
Related devices
Device Name Content
Prohibit/permit interruption during execution of FROM/TO instruction.
→ As for detail, refer to Subsection 7.8.9 "Interrupt accept during execution
M8028 Interrupt permit flag of FROM/TO (M8028)"
OFF : Interrupt prohibit (interrupt executed after FROM/TO instruction process)
ON : Interrupt permit
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.8 External FX I/O Device
1
Cautions
Outline
1) About bit device digit specification to be specified by
Specify K1 to K4 in the case of 16-bit operation instruction, or K1 to K8 in the case of 32-bit operation.
2) When handling 32-bit data in structured program, unlike the simple project, you cannot specify the 16-bit
device directly. Use the label when handling 32-bit data.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
2
Instruction List
Use the global label when specifying the device.
3) FXU PLC supports the instruction in V2.10 or later.
4) FX0N PLC does not support the instruction of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
5) Object devices are limited. 3
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
Instruction
Configuration of
Program example
By using direct specification *1 of TO instruction or buffer memory, you can write in (transfer) the digit
specification of data register (D), extension register (R), or auxiliary relay (M) or constants (K, H) to the buffer
memory (BFM) of special extension unit/block. 4
Instructions
Explanation of
How to Read
*1. FX3U, FX3UC PLCs only are available.
Example) Program for writing "H0" in BFM #27 (instruction) of CC-Link/LT master (unit No. 0 fixed) built in the
FX3UC-32MT-LT(-2).
- In the case of TO instruction
5
[Structured ladder] [ST]
Basic Instruction
M1 TO TO(M1, H0, K0, K27, K1);
EN ENO
H0 s
K0 n1
K27
K1
n2
n3
6
Instructions
Step Ladder
- In the case of MOV instruction
[Structured ladder] [ST]
M1 MOVP MOVP(M1, H0, U0¥G27);
7
EN ENO
H0 s d U0¥G27
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
401
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
7.9 External Device (optional device)
7.9.1 RS
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction sends and receives data in no-protocol communication by way of a serial port (only the ch1) in
accordance with RS-232C or RS-485 provided in the main unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RS
EN ENO
RS 16 bits Continuous s d RS(EN, s, m, n, d);
m
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device storing data to be sent ANY16
Input
variable Number of bytes of data to be sent ANY16
Head device storing received data when receiving is completed ANY16
Output ENO Execution state Bit
variable Number of bytes to be received ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 z
z S1 z z
z S1 z
z S1 z z
S: Refer to "Cautions".
402
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
Function and operation explanation
Outline
1. 16-bit operation (RS)
This instruction sends and receives data in no-protocol communication by way of serial ports in accordance
with RS-232C or RS-485 provided in the main unit.
→ For detailed explanation, refer to the Data Communication Edition manual.
2
Instruction List
Command input RS
EN ENO
Head device storing s d Number of bytes
data to be sent to be received
3
Number of bytes of
m
data to be sent
Head device storing
Instruction
Configuration of
received data when n
receiving is completed
Related devices
→ For detailed explanation, refer to the Data Communication Edition manual. 4
Device Name Device Name
Instructions
Explanation of
How to Read
M8063 Serial communication error 1 D8120 Communication format setting
M8121 Sending wait flag D8122 Remaining number of data to be sent
M8122 Sending request D8123 Monitor for number of received data
M8123 Receiving complete flag D8124 Header
M8124*1 Carrier detection flag D8125 Terminator 5
M8129*2 Time-out check flag D8129*2 Time-out time setting
Basic Instruction
M8161 8-bit processing mode D8063 Error code number of serial communication error 1
D8405*3 Communication parameter display
D8419*3 Operation mode display
*1. Not supported by the FX0N PLC.
6
*2. FXU, FX2C PLCs are applicable at Ver.3.30 or later.
Instructions
Step Ladder
*3. Not supported by the FX1S, FX1N, FX2N, FX1NC, FX2NC, FXU, FX2C and FX0N PLCs.
System configuration
To use this instruction, it is necessary to attach one of the products shown in the table below to the main unit.
→ For the system configuration, refer to the respective PLC Hardware Edition manual. 7
→ For detailed explanation, refer to the Data Communication Edition manual.
Instructions
Applied
Differences between RS instruction and RS2 instruction
RS2 instruction is not supported by the FX1S, FX1N, FX2N, FX1NC, FX2NC, FXU and FX0N PLCs.
Item
Header size
RS2 instruction RS instruction Remarks
1 to 4 characters (bytes) Up to 1 character (byte) For the RS2 instruction, up to 4 characters (bytes) can be
8
Function
and Pulse Catch
Interrupt Function
Terminator size 1 to 4 characters (bytes) Up to 1 character (byte) specified as a header or terminator.
For the RS2 instruction, the check sum can be automatically
The check sum should
Attachment of check The check sum can be attached to the sent and received data.
be attached by a user
sum automatically attached. In this case, however, make sure to use a terminator with the
program.
communication frame to be sent and received.
In RS2 instruction is as follows:
Ch2 is not available in 14-point and 24-point type FX3G
A
Used channel number ch1 ch0, ch1, ch2
and addresses
between devices
Relationships
PLCs.
Ch0 is available only in FX3G PLCs.
403
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Cautions
→ For other cautions, refer to the Data Communication Edition manual.
1. For FX3U, FX3UC and FX3G PLCs.
1) RS instruction can be used for ch1 only (cannot be used for ch2).
Ch2 is not provided for the FX1S, FX1N, FX2N, FX1NC, FX2NC, FXU, FX2C and FX0N PLCs.
2) Do not drive two or more RS and/or RS2 instructions for the same port at the same time.
FX1S, FX1N, FX2N, FX1NC, FX2NC, FXU, FX2C and FX0N PLCs does not support the RS2 instruction.
2. FXU PLC supports the instruction at V3.07 or later.
3. FX0N PLC supports the instruction at V1.20 or later.
4. Number of bytes of data to be sent(m), Number of bytes to be received(n)
1) For FX3U, FX3UC, FX3G, FX2N and FX2NC PLCs
m, n: 0 to 4096 points
(However, "m + n" should not be more than 8000 points in FX2N and FX2NC PLCs.)
2) For FX1S, FX1N, FX1NC, FX0N, FXU and FX2C PLCs
m, n: 0 to 256 points
5. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
404
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.2 PRUN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction handles the device number specified by and specified by digits as octal number,
and transfers data.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
PRUN
PRUN 16 bits Continuous EN ENO PRUN(EN, s, d);
s d
PRUNP 16 bits Pulse EN
PRUNP
ENO PRUNP(EN, s, d);
4
Instructions
Explanation of
How to Read
s d
DPRUN
DPRUN 32 bits Continuous EN ENO DPRUN(EN, s, d);
s d
5
DPRUNP
Basic Instruction
DPRUNP 32 bits Pulse EN ENO DPRUNP(EN, s, d);
s d
2. Set data
Data type 6
Variable Description
Instructions
Step Ladder
16-bit operation 32-bit operation
EN Execution condition Bit
Input
variable Specification of digits (the lowest digit of specified device
ANY16 ANY32
number is 0.)
ENO Execution state Bit
Output
variable Transfer destination device (the lowest digit of specified device
ANY16 ANY32
7
number is 0.)
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z z z
z z z
A
and addresses
between devices
Relationships
405
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Function and operation explanation
1. 16-bit operation(PRUN, PRUNP)
From octal number bit device to decimal number bit device
Command input PRUN
EN ENO X000 ~ X017 → M0 ~ M7, M10 ~ M17
K4X000 s d K4M0
Octal number bit device(X)
X17 X16 X15 X14 X13 X12 X11 X10 X7 X6 X5 X4 X3 X2 X1 X0
M17 M16 M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Decimal number bit device(M)
Not changed
From decimal number bit device to octal number bit device
Command input PRUN
EN ENO M0 ~ M7, M10 ~ M17 → Y0 ~ Y17
K4M0 s d K4Y000
Not transferred
Decimal number bit device(M)
M17 M16 M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Y17 Y16 Y15 Y14 Y13 Y12 Y11 Y10 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
Octal number bit device(Y)
2. 32-bit operation(DPRUN, DPRUNP)
From octal number bit device to decimal number bit device
Command input DPRUN
EN ENO X000 ~ X027 → M0 ~ M7, M10 ~ M17, M20 ~ M27
K6X000 s d K6M0
Octal number bit device(X)
X27 • • • X20 X17 • • • X10 X7 X6 X5 X4 X3 X2 X1 X0
M27 • • • M20 M19 M18 M17 • • • M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Not changed
Decimal number bit device(M)
From decimal number bit device to octal number bit device
Command input DPRUN
EN ENO
M0 ~ M7, M10 ~ M17, M20 ~ M27 →Y000 ~ Y027
K6M0 s d K6Y000
Decimal number bit device(M)
Not transferred Not transferred
M27 • • • M20 M19 M18 M17 • • • M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0
Y27 • • • Y20 Y17 • • • Y10 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
Octal number bit device(Y)
406
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.3 ASCI
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts HEX code into ASCII code.
Also available are BINDA instruction for converting BIN data into ASCII code, and DESTR instruction for
converting binary floating decimal point data into ASCII code.
→ As for BINDA instruction, refer to section 7.23.6.
→ As for DESTR instruction, refer to section 7.12.4.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ASCI
ASCI 16 bits Continuous
EN
s
ENO
d
ASCI(EN, s, n, d); 4
Instructions
Explanation of
How to Read
n
ASCIP
EN ENO
ASCIP 16 bits Pulse ASCIP(EN, s, n, d);
s d
n 5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable
Head device in which HEX code to be converted is stored ANY16
6
Number of characters in HEX code to be converted (number of digits) ANY16
Instructions
Step Ladder
Output ENO Execution state Bit
variable Head device for storing converted ASCII code ANY16
3. Applicable devices
Bit Devices Word Devices Others 7
Instructions
Applied
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z z z z z
z z z z z z S1 S2 z
8
z S1 z z
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
407
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Function and operation
1. 16-bit operation(ASCI/ASCIP)
Of the HEX code stored after the device specified by , n characters (digits) are converted into ASCII
code, and stored in the device after the one specified by .
In this instruction, the mode usable when converting includes 16-bit mode and 8-bit mode. As for the
operation of each mode, refer to the following pages.
Command input ASCI
EN ENO
Head device in which HEX s d1 Head device for storing
code to be converted is stored converted ASCII code
Number of characters in n
HEX code to be converted
(number of digits)
2. <16-bit conversion mode> When M8161=OFF(M8161 is used commonly with RS, HEX, CCD,
CRC instructions)
Each digit of HEX data stored after the device specified by is converted into ASCII code, and transferred
to lower and higher 8 bits (bytes) each in each device after the one specified by . The number of digits
(characters) to be converted is specified by n.
The device specified by is divided into lower 8 bits and higher 8 bits, and ASCII data is stored.
M8161 is used commonly with RS, HEX, CCD, CRC instructions. When using in 16 bits, you must keep
always OFF.
M8161 is cleared when changed from RUN to STOP.
M8000 OUT
EN ENO
d M8161 16-bit mode
Command input ASCI
EN ENO
Head device in which HEX s d1 Head device for storing
code to be converted is stored converted ASCII code
Number of characters in n
HEX code to be converted
(number of digits)
Operation
In the case of the program shown below, the conversion is executed as follows.
M8000 OUT
EN ENO
d M8161 16-bit mode
X10 ASCI
EN ENO
D100 s d D200
K4 n
Devices after
(D100)=0ABCH
(D101)=1234H
(D102)=5678H
408
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
Number of digits (characters) specified and result of conversion
Outline
K1 K2 K3 K4 K5 K6 K7 K8 K9
D 200 lower C) B) A) 0) 4) 3) 2) 1) 8)
D 200 higher
D 201 lower
C) B)
C)
A)
B)
0)
A)
4)
0)
3)
4)
2)
3)
1)
2)
2
Instruction List
D 201 higher C) B) A) 0) 4) 3)
D 202 lower C) B) A) 0) 4)
D 202 higher C) B) A) 0)
D 203 lower Not changed C) B) A)
D 203 higher C) B) 3
D 204 lower C)
Instruction
Configuration of
Bit composition in the case of n=K4
D 100=ABCH
0 0 0 0 1 0 1 0 1 0 1 1 1 1 0 0 ASCII code
0 A B C 0)=30H
A)=41H
1)=31H
2)=32H
5)=35H
6)=36H
4
D 200
Instructions
Explanation of
How to Read
B)=42H 3)=33H 7)=37H
0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0
C)=43H 4)=34H 8)=38H
A) 41H 0) 30H
D 201
0 1 0 0 0 0 1 1 0 1 0 0 0 0 1 0
C) 43H B) 42H 5
Basic Instruction
• When issuing as BCD data by printer or the like, before execution of this instruction, you must convert from
BIN to BCD.
3. <8-bit conversion mode> When M8161=ON (M8161 is used commonly with RS, HEX, CCD,
CRC instructions)
Each digit of HEX data stored after the device specified by is converted into ASCII, and stored in lower 8 6
bits (bytes) in each device after the one specified by . The number of digits (characters) to be converted
Instructions
Step Ladder
is specified by n.
In the device specified by , higher 8 bits are 0.
M8161 is used commonly with RS, HEX, CCD, CRC instructions. When using in 8 bits, you must keep always
ON.
M8161 is cleared when changed from RUN to STOP. 7
Instructions
Applied
M8000 OUT
EN ENO When M8161=ON, 8-bit mode is established,
d
and the conversion is executed as follows.
8-bit mode
16 bits
Command input ASCI
EN ENO
0
Destination
Lower 8 bits
8
Function
and Pulse Catch
Interrupt Function
Head device in which HEX s d1 Head device for storing
code to be converted is stored converted ASCII code
Number of characters in HEX n
code to be converted
(number of digits)
Operation A
and addresses
between devices
Relationships
In the case of the program shown below, the conversion is executed as follows.
M8000 OUT
EN ENO
d M8161 8-bit mode
X10 ASCI
EN ENO
D100 s d D200
K4 n
409
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Devices after
(D100)=0ABCH
(D101)=1234H
(D102)=5678H
Number of digits (characters) specified and result of conversion
K1 K2 K3 K4 K5 K6 K7 K8 K9
D 200 C) B) A) 0) 4) 3) 2) 1) 8)
D 201 C) B) A) 0) 4) 3) 2) 1)
D 202 C) B) A) 0) 4) 3) 2)
D 203 C) B) A) 0) 4) 3)
D 204 C) B) A) 0) 4)
D 205 C) B) A) 0)
D 206 Not changed C) B) A)
D 207 C) B)
D 208 C)
Bit composition in the case of n=K2
D 100=0ABCH
0 0 0 0 1 0 1 0 1 0 1 1 1 1 0 0 ASCII code
0 A B C 0)=30H 1)=31H 5)=35H
A)=41H 2)=32H 6)=36H
ASCII code of D200=B=42H B)=42H 3)=33H 7)=37H
0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 C)=43H 4)=34H 8)=38H
4 2
ASCII code of D201=C=43H
0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1
4 3
• When issuing as BCD data by printer or the like, before execution of this instruction, you must convert from
BIN to BCD.
Cautions
1) FXU PLC supports the instruction at V3.07 or later.
FX0N PLC supports the instruction at V1.20 or later.
2) FX0N PLC does not support the instruction of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
410
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.4 HEX
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts ASCII code into HEX code.
Also available are DABIN instruction for converting ASCII code into BIN data, and DEVAL instruction for
converting ASCII code into binary floating decimal point data.
→ As for DABIN instruction, refer to section 7.23.5.
→ As for DEVAL instruction, refer to section 7.12.5.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
HEX
HEX 16 bits Continuous
EN
s
ENO
d
HEX(EN, s, n, d); 4
Instructions
Explanation of
How to Read
n
HEXP
EN ENO
HEXP 16 bits Pulse HEXP(EN, s, n, d);
s
n
d
5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable
Head device in which ASCII code to be converted is stored ANY16 6
Instructions
Step Ladder
Number of characters in ASCII code to be converted (number of bytes) ANY16
Output ENO Execution state Bit
variable Head device for storing converted HEX code ANY16
3. Applicable devices 7
Bit Devices Word Devices Others
Instructions
Applied
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z z z
z z z z z z S1 S2 z z z 8
Function
and Pulse Catch
Interrupt Function
z S1 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
411
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Function and operation explanation
1. 16-bit operation(HEX/HEXP)
Of the ASCII code stored after the device specified by , n characters are converted into HEX code, and
stored in the device after the one specified by . In this instruction, the mode usable when converting
includes 16-bit mode and 8-bit mode. As for the operation of each mode, refer to the following pages.
Command input HEX
EN ENO
Head device in which ASCII s d Head device for storing
code to be converted is stored converted HEX code
Number of characters in n
ASCII code to be converted
(number of bytes)
2. <16-bit conversion mode> When M8161=OFF(M8161 is used commonly with RS, ASCI,
CCD, CRC instructions)
ASCII characters stored in higher and lower 8 bits (bytes) in the device specified by are converted into
HEX data, and transferred to the device specified by in every four digits. The number of characters to be
converted is specified by n.
M8161 is used commonly with RS, ASCI, CCD, CRC instructions. When using in 16 bits, you must keep
always OFF.
M8161 is cleared when changed from RUN to STOP.
M8000 OUT
EN ENO
d M8161 16-bit mode
Command input HEX
EN ENO
Head device in which ASCII s d Head device for storing
code to be converted is stored converted HEX code
Number of characters in n
ASCII code to be converted
(number of bytes)
Operation
In the case of the program shown below, the conversion is executed as follows.
M8000 OUT
EN ENO
d M8161 16-bit mode
X010 HEX
EN ENO
D200 s d D100
K4 n
Conversion source data
ASCII code HEX conversion
D 200 lower 30H 0
D 200 higher 41H A
D 201 lower 42H B
D 201 higher 43H C
D 202 lower 31H 1
D 202 higher 32H 2
D 203 lower 33H 3
D 203 higher 34H 4
D 204 lower 35H 5
412
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
Number of characters specified and result of conversion
Outline
"." is 0.
In the case of n=K4
D 102 D 101 D 100
D 200 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0
1 ...0H
2 ..0AH
41H A) 30H 0)
2
Not changed
Instruction List
3 .0ABH D 201 0 1 0 0 0 0 1 1 0 1 0 0 0 0 1 0
4 0ABCH 43H C) 42H B)
5 ...0H ABC1H
D 100 0 0 0 0 1 0 1 0 1 0 1 1 1 1 0 0
6 ..0AH BC12H
7 .0ABH C123H 0 A B C
8 0ABCH 1234H
3
Instruction
Configuration of
9 ...0H ABC1H 2345H
• When the input data is BCD, after execution of this instruction, you must convert from BCD to BIN.
• In the case of HEX instruction, if the data stored in the device specified by is not ASCII code, it is an
operation error, and HEX conversion is disabled. In particular, if M8161 is OFF, you must store the ASCII
code also in the higher 8 bits of the device specified by .
4
Instructions
Explanation of
How to Read
3. <8-bit conversion mode> When M8161=ON(M8161 is used commonly with RS, ASCI, CCD,
CRC instructions)
ASCII characters stored in lower 8 bits in are converted into HEX data, and transferred to in every
four digits. The number of characters to be converted is specified by n.
M8161 is used commonly with RS, ASCI, CCD, CRC instructions. When using in 8 bits, you must keep 5
always ON.
Basic Instruction
M8161 is cleared when changed from RUN to STOP.
M8000 OUT 16 bits
EN ENO Ignored Lower 8 bits
d M8161 8-bit mode
Source data 6
Instructions
Step Ladder
Command input HEX
EN ENO
Head device in which ASCII s d Head device for storing
code to be converted is stored converted HEX code
Number of characters in
ASCII code to be converted
n 7
Instructions
Applied
(number of bytes)
Operation
In the case of the program shown below, the conversion is executed as follows.
M8000
EN
OUT
ENO
8
Function
and Pulse Catch
Interrupt Function
d M8161 8-bit mode
X010 HEX
EN ENO
D200
K4
s
n
d D100
A
and addresses
between devices
Relationships
413
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Conversion source data
ASCII code HEX conversion
D 200 30H 0
D 201 41H A
D 202 42H B
D 203 43H C
D 204 31H 1
D 205 32H 2
D 206 33H 3
D 207 34H 4
D 208 35H 5
Number of characters specified and result of conversion
"." is 0.
In the case of n=K2
D 102 D 101 D 100
D 200 0 0 1 1 0 0 0 0
1 ...0H
30H 0)
2 ..0AH
Not changed
3 .0ABH D 201 0 1 0 0 0 0 0 1
4 0ABCH 41H A)
5 ...0H ABC1H
D 100 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0
6 ..0AH BC12H
7 .0ABH C123H 0 A
8 0ABCH 1234H
9 ...0H ABC1H 2345H
• When the input data is BCD, after execution of this instruction, you must convert from BCD to BIN.
Cautions
1) FXU PLC supports the instruction at V3.07 or later.
FX0N PLC supports the instruction at V1.20 or later.
2) FX0N PLC does not support the instruction of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
414
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.5 CCD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction calculates the horizontal parity value or check sum value of error check method used in
communication or the like. The error check method also includes cyclic redundancy check (CRC). Use the
CRC instruction when determining the CRC value.
→ As for CRC instruction, refer to section 7.18.4.
→ As for complementary number [NEG instruction], refer to section 7.3.10.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
CCD
CCD 16 bits Continuous
EN ENO
CCD(EN, s, n, d); 4
s d
Instructions
Explanation of
How to Read
n
CCDP
EN ENO
CCDP 16 bits Pulse CCDP(EN, s, n, d);
s
n
d
5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable
Head object device ANY16 6
Instructions
Step Ladder
Number of data (n=1 to 256) ANY16
Output ENO Execution state Bit
variable Head storage destination device of calculated data ANY16
3. Applicable devices
7
Bit Devices Word Devices Others
Instructions
Applied
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z
z z z z z z S1 z 8
Function
and Pulse Catch
Interrupt Function
z S1 z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
415
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Function and operation explanation
1. 16-bit operation(CCD/CCDP)
The addition data and horizontal parity of the data stored in the device specified by are calculated, and
the addition data and the horizontal parity are stored in the device specified by .
In this instruction, the mode usable when calculating includes 16-bit mode and 8-bit mode. As for the
operation of each mode, refer to the following pages.
Command input CCD
EN ENO
Head object device s d Head storage destination
device of calculated data
Number of data n
2. <16-bit conversion mode> When M8161=OFF(M8161 is used commonly with RS, ASCI, HEX,
CRC instructions)
Of the data of n points starting from the device specified by , the addition data and the horizontal parity
data of higher and lower 8 bits are stored in the device specified by .
M8161 is used commonly with RS, ASCI, HEX, CRC instructions. When using in 16 bits, you must keep
always OFF.
M8161 is cleared when changed from RUN to STOP.
M8000 OUT
EN ENO
d M8161 16-bit mode
Command input CCD
EN ENO
Head object device s d Head storage destination
device of calculated data
Number of data n
Example of 16-bit conversion
In the case of the program shown below, the conversion is executed as follows.
M8000 OUT
EN ENO
d M8161 16-bit mode
X010 CCD
EN ENO
D100 s d D0
K10 n
Example of data content
D 100 lower K100 = 01100100
D 100 higher K111 = 0110111 ←
D 101 lower K100 = 01100100
D 101 higher K 98 = 01100010
D 102 lower K123 = 0111101 ←
D 102 higher K 66 = 01000010
D 103 lower K100 = 01100100
D 103 higher K 95 = 0101111 ←
D 104 lower K210 = 11010010
D 104 higher K 88 = 01011000
Total K1091
Horizontal parity 1000010 ←When the number of "1" is an odd number, the horizontal parity is 1.
When the number of "1" is an even number, the horizontal parity is 0.
416
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Outline
D0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1091 in BCD.
D1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 Horizontal parity
3. <8-bit conversion mode> When M8161=ON(M8161 is used commonly with RS, ASCI, HEX, 2
Instruction List
CRC instructions)
Of the data of n points (lower 8 bits only) starting from the device specified by , the addition data and the
horizontal parity data are stored in the device specified by .
M8161 is used commonly with RS, ASCI, HEX, CRC instructions. When using in 8 bits, you must keep always
ON.
M8161 is cleared when changed from RUN to STOP. 3
Instruction
Configuration of
M8000 OUT
EN ENO 16 bits
d M8161 8-bit mode Ignored Lower 8 bits
Source data
Command input
EN
CCD
ENO
4
Instructions
Explanation of
How to Read
Head object device s d Head storage destination
device of calculated data
Number of data n
Example of 8-bit conversion 5
In the case of the program shown below, the conversion is executed as follows.
Basic Instruction
M8000 OUT
EN ENO
d M8161 8-bit mode
X010 CCD 6
Instructions
Step Ladder
EN ENO
D100 s d D0
K10 n
Example of data content
D 100 K100 = 01100100 7
D 101 K111 = 0110111 ←
Instructions
Applied
D 102 K100 = 01100100
D 103 K 98 = 01100010
D 104 K123 = 0111101 ←
D 105 K 66 = 01000010
D 106 K100 = 01100100 8
Function
and Pulse Catch
Interrupt Function
D 107 K 95 = 0101111 ←
D 108 K210 = 11010010
D 109 K 88 = 01011000
Total K1091
Horizontal parity 1000010 ← When the number of "1" is an odd number, the horizontal
parity is 1.
A
and addresses
between devices
Relationships
When the number of "1" is an even number, the horizontal
parity is 0.
D0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1091 in BCD.
D1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 Horizontal parity
417
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Cautions
1) FXU PLC supports the instruction at V3.07 or later.
FX0N PLC supports the instruction at V1.20 or later.
2) FX0N PLC does not support the instruction of pulse operation type.
To execute pulse operation, make the instruction execution condition pulse type.
3) Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
418
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.6 VRRD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction reads out the value determined by the variable resistor.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
VRRD
VRRD 16 bits Continuous EN ENO VRRD(EN, s, d);
s d
VRRDP
VRRDP 16 bits Pulse EN ENO VRRDP(EN, s, d); 4
s d
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input
variable
EN Execution condition Bit
5
Variable resistor No. to be read out ANY16
Basic Instruction
Output ENO Execution state Bit
variable Storage destination of variable resistor value ANY16
3. Applicable devices
Bit Devices Word Devices Others 6
Instructions
Step Ladder
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 S1 z z z
zz z z z z z z z S1 zz z 7
Instructions
Applied
S: Refer to "Cautions".
Function and operation explanation
The analog value of variable resistor No. is converted into BIN 8 bits, and
X000 VRRD
EN ENO
0 to 255 are transferred to D0.
As an application example, D0 is used as timer preset value.
8
K0 s d D0
Function
and Pulse Catch
Interrupt Function
The analog timer is obtained by this operation.
X001 OUT_T As the timer constant value, if a value of more than 256 is necessary, the
EN ENO product of take-in value multiplied by the constant by MUL instruction is
TC0 TCoil set indirectly as the timer constant.
TValue
A
D0
and addresses
between devices
Relationships
Cautions
1) FX1NC, FX2NC PLCs are not provided with variable resistors for reading out by this instruction, and hence
do not function even if programmed.
2) FX3G PLC supports the instruction at V1.10 or later.
3) Object devices are limited
S1: FX3G PLCs only are applicable.
419
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Program example
Variable resistor values are read out sequentially.
Depending on variable resistors VR0 to VR7, the specified values of VRRD instruction are K0 to K7.
In the example below, being decorated by index (Z = 0 to 7), K0Z is K0 to K7.
[Structured ladder]
M8000 RST Reset of index register
EN ENO (Z) = 0
RUN monitor d Z
FOR Range of FOR to NEXT is
EN ENO repeated 8 times.
K8 n
Variable resistor value is FOR instruction is repeated 8 times
M8000 VRRD as specified.
EN ENO stored in data register.
In this period, the value of index
K0Z s d D200Z register Z is increased sequentially
from 0 to 1, 2, ..., 7, and the value
INC (Z)+1 (Z) is transferred 8 times, from VR0 to
EN ENO D200, VR1 to D201,..., VR7 to D207.
d Z
NEXT
EN ENO
X000 OUT_T
EN ENO
TC0 TCoil
D200 TValue
TS0
Y000
X001 OUT_T This is a timer circuit.
EN ENO Depending on graduations 0 to 10 of
TC1 TCoil the variable resistor, values of 0 to
D201 TValue 255 are stored in the data register.
T0 to T7 are 100 ms timers, and 0 to
TS1 25.5 sec are obtained corresponding
Y001
to the set values of 0 to 255.
X007 OUT_T
EN ENO
TC7 TCoil
D207 TValue
TS7
Y007
[ ST ]
RST(M8000, Z);
FOR(TRUE, K8);
VRRD(M8000, K0Z, D200Z);
INC(M8000, Z);
NEXT(TRUE);
OUT_T(X000, TC0, D200);
OUT(TS0, Y000);
OUT_T(X001, TC1, D201);
OUT(TS1, Y001);
OUT_T(X007, TC7, D207);
OUT(TS7, Y007);
420
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.7 VRSC
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction reads out the value determined in the variable resistor graduations.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
VRSC
VRRD 16 bits Continuous EN ENO VRSC(EN, s, d);
s d
VRSCP
VRRDP 16 bits Pulse EN ENO VRSCP(EN, s, d); 4
s d
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input
variable
EN Execution condition Bit
5
Variable resistor number for reading out the graduations ANY16
Basic Instruction
Output ENO Execution state Bit
variable Storage destination of variable resistor graduations ANY16
3. Applicable devices
Bit Devices Word Devices Others 6
Instructions
Step Ladder
Operand Special Cons Real Character
System User Digit designation System User Index Pointer
type Unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S1 S1 z z z
zz z z z z z z z S1 zz z
7
S: Refer to "Cautions".
Instructions
Applied
Function and operation explanation
This instruction reads the value of a variable analog potentiometer on the
X000 VRSC
variable analog potentiometer board attached to the main unit as a
K1
EN
s
ENO
d D1
numeric value in the range from 0 to 10. 8
However, the actual scale value does not always correspond to the
Function
and Pulse Catch
Interrupt Function
switching position of the variable analog potentiometer scale (0 to 10).
This instruction converts into a binary value the scale value of a variable
analog potentiometer specified in , and transfers the converted binary
value to .
A
Cautions
and addresses
between devices
Relationships
1) FX1NC, FX2NC PLCs are not provided with variable resistors for reading out by this instruction, and hence
do not function even if programmed.
2) FX3G PLC supports the instruction at V1.10 or later.
3) Object devices are limited
S1: FX3G PLCs only are applicable.
421
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Program example
This is an example of use as rotary switch.
Depending on variable resistor graduations 0 to 10, any one of auxiliary relays M0 to M10 is turned ON.
By DECO instruction, the auxiliary relays are occupied from M0 to M15.
[Structured ladder] [ ST ]
X000 VRSC VRSC(X000, K1, D1);
EN ENO DECO(X001, D1, K4, M0);
K1 s d D1 OUT(M0, ···);
OUT(M1, ···);
X001 DECO
EN ENO
s
OUT(M10, ···);
D1
K4 n d M0
M0
ON at graduation 0
M1
ON at graduation 1
M10
ON at graduation 10
422
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
7.9.8 RS2
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transmits and receives data by no-procedure communication via serial port of RS-232C or
RS-485 installed in the basic unit.
In the case of FX3G PLC, data can be transmitted and received by no-procedure communication also via
standard built-in port (RS-422).
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RS2
EN ENO
RS2 16 bits Continuous
s
m
d
RS2(EN, s, m, n, n1, d); 4
Instructions
Explanation of
How to Read
n
n1
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Head device in which transmission data is stored
ANY16
• 16-bit processing mode: m÷2 points *1 occupied
Input
variable Number of transmission data bytes [Setting range: 0 to 4096] ANY16
Number of reception data bytes [Setting range: 0 to 4096] ANY16
Used channel number [Setting content: K0: ch0, K1: ch1, K2: ch2] *2 ANY16
6
Instructions
Step Ladder
ENO Execution state Bit
Output
Head device for storing reception data upon completion of reception
variable ANY16
• 16-bit processing mode: n÷2 points *1 occupied
*1. Rounding up below the decimal point
*2. In the case of 14-point or 24-point type of FX3G PLC, ch2 cannot be used. Ch0 is applicable to FX3G 7
Instructions
Applied
PLC only.
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Const Real Character
type
System User Digit designation
User Unit
Index
ant Number String
Pointer
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H "
"
Function
and Pulse Catch
Interrupt Function
E P
z z z
z z z z
z z z
z z z z A
and addresses
between devices
Relationships
z z
423
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Function and operation explanation
1. 16-bit operation(RS2)
This instruction transmits and receives data by no-procedure communication via serial port of RS-232C or
RS-485 installed in the basic unit.
→ As for the detailed explanation, refer to the communication control manual.
Command input RS2
EN ENO
Head device in which s d Head device for storing reception
transmission data is stored data upon completion of reception
Number of transmission m
data bytes
Number of reception n
data bytes
ch used n1
Related devices
→ As for the detailed explanation, refer to the communication control manual.
Device Device
Name Name
*1 *1 *1
ch0 ch1 ch2 ch0 ch1 ch2*1
M8371 M8401 M8421 Transmission waiting flag*2 D8370 D8400 D8420 Communication format setting
M8372 M8402 M8422 Transmission request*2 - - - -
M8373 M8403 M8423 Reception complete flag*2 D8372 D8402 D8422 Transmission data remainder points*2
- M8404 M8424 Carrier detection flag D8373 D8403 D8423 Reception points monitor*2
- M8405 M8425 Data set ready (DSR) flag*3 D8375 D8405 D8425 Communication parameter display
- - - - D8379 D8409 D8429 Time out time setting
M8379 M8409 M8429 Time out judging flag D8380 D8410 D8430 Headers 1, 2
D8381 D8411 D8431 Headers 3, 4
D8382 D8412 D8432 Terminators 1, 2
D8383 D8413 D8433 Terminators 3, 4
- - - - D8384 D8414 D8434 Reception sum (reception data)
D8385 D8415 D8435 Reception sum (calculation result)
D8386 D8416 D8436 Transmission sum
D8389 D8419 D8439 Operation mode display
Error code number of serial
M8062 M8063 M8438 Serial communication error D8062 D8063 D8438
communication error
*1. ch0 is applicable to FX3G PLC only.
In the case of 14-point or 24-point type of FX3G PLC, ch2 cannot be used.
*2. Cleared when changed from RUN to STOP.
*3. FX3U, FX3UC PLCs are applicable at Ver.2.30 or later.
424
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
System configuration
Outline
In order to use this instruction, you must install any one of the following products in the basic unit.
→ As for the system configuration, refer to the hardware manual of the corresponding
PLC main unit.
→ As for the detailed explanation, refer to the communication control manual.
PLC
Type of
Option
2
communication
Instruction List
RS-232C
FX3U-232-BD or FX3U-232ADP(-MB)
FX3U, communication
FX3UC-32MT-LT(-2) RS-485
FX3U-485-BD or FX3U-485ADP(-MB)
communication
RS-232C
FX3UC(D, DSS)
communication
FX3U-232ADP(-MB)
3
RS-485
Instruction
Configuration of
FX3U-485ADP(-MB)
communication
RS-232C FX3G-232-BD or FX3U-232ADP(-MB) (FX3G-CNV-ADP is needed)
communication RS-232C/RS-422 converter*1 (FX-232AW, FX-232AWC, FX-232AWC-H)
FX3G
RS-485
FX3G-485-BD or FX3U-485ADP(-MB) (FX3G-CNV-ADP is needed)
communication
4
*1. Required to use ch0 (standard built-in RS-422 port) in FX3G PLCs.
Instructions
Explanation of
How to Read
Difference between RS instruction and RS2 instruction
Item RS2 instruction RS instruction Remarks
Header size 1 to 4 characters (bytes) Up to 1 character (byte) For the RS2 instruction, up to 4 characters
Terminator size 1 to 4 characters (bytes) Up to 1 character (byte)
(bytes) can be specified as a header or 5
terminator.
Basic Instruction
For the RS2 instruction, the check sum can be
automatically attached to the sent and received
Attachment of check The check sum can be The check sum should be data.
sum automatically attached. attached by a user program. In this case, however, make sure to use a
terminator with the communication frame to be
sent and received.
In RS2 instruction is as follows:
6
Instructions
Step Ladder
Used channel Ch2 is not available in 14-point and 24-point
ch1 ch0, ch1, ch2
number type FX3G PLCs.
Ch0 is available only in FX3G PLCs.
Function change by version
Corresponding version 7
Item Outline of function
Instructions
Applied
FX3G FX3U FX3UC
ch1 When DR (DSR) signal of ch1 is ON, special device
Ver. 1.00 Ver. 2.30 Ver. 2.30 Data set ready (DSR) flag M8405 is turned ON.
or later or later or later ch2 When DR (DSR) signal of ch2 is ON, special device
Data set ready (DSR) flag M8425 is turned ON.
8
Cautions
Function
and Pulse Catch
Interrupt Function
→ As for other cautions, refer to the communication control manual.
1) With RS, RS2 instructions, do not drive the same port simultaneously by plural instructions.
2) You cannot use RS, RS2 instructions, and IVCK, IVDR, IVRD, IVWR, IVBWR instructions on the same
port.
3) When using the header or terminator, please set the data of the header or terminator in the special D
A
and addresses
between devices
Relationships
before driving the RS2 instruction. Do not change the values of the header or terminator during driving of
RS2 instruction.
425
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
7.9.9 PID
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes PID control for changing the output values depending on the change value of the
input.
→ As for the detail, refer to the analog control manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
PID
EN ENO
PID 16 bits Continuous s1 d PID(EN, s1, s2, s3, d);
s2
s3
2. Set data
Variable Description Data type
EN Execution condition Bit
Data register for storing the target value (SV) ANY16
Input
variable Data register for storing the measured value (PV). ANY16
Data register for storing the parameter [29 points occupied]*1 ANY16
Output ENO Execution state Bit
variable Data register for storing the output value (MV) ANY16
*1. Variable depending on the setting content of the parameter.
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2
z S1 S2
z S1
z S1 S2
S: Refer to "Cautions".
Function and operation explanation
1. 16-bit operation(PID)
When the program is executed by setting the target value of the device specified by , the measured
value of the device specified by , and the parameter of the device specified by , at every
sampling time of the device specified by , the calculation result (MV) is stored in the output value of
the device specified by .
Command input PID
EN ENO
Target value(SV) s1 d Output value(MV)
Measured value(PV) s2
Parameter s3
426
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
2. Setting items
Outline
No. of points
Setting items Content
occupied
• To set the target value (SV).
• PID instruction does not change the contents of setting.
• Cautions when using auto-tuning (limit cycle method)
Target value(SV)
If the target value for auto-tuning and the target value for PID control are different, the
1 point
2
value to which the bias value is added is set, and the actual target value must be stored
Instruction List
when the auto-tuning flag is turned OFF.
Measured
Input value of PID operation. 1 point
value(PV)
1) Auto-tuning: In the case of limit cycle method
The devices are occupied by 29 points from the head device specified by . 29 points
2) Auto-tuning: In the case of step response method
a) Action setting (ACT) setting: When all of bit1, bit2, bit5 are other than "0"
3
Parameter*1
Instruction
Configuration of
The devices are occupied by 25 points from the head device specified by . 25 points
b) Action setting (ACT) setting: When all of bit1, bit2, bit5 are "0"
20 points
The devices are occupied by 20 points from the head device specified by .
1) In the case of PID control (in ordinary processing)
The initial output value is set at the user side before instruction drive.
Thereafter, operation results are stored.
2) Auto-tuning: In the case of limit cycle method
4
Instructions
Explanation of
How to Read
Output value(MV) ULV value or LLV value is automatically issued during auto-tuning, and specified MV 1 point
value is set after auto-tuning.
3) Auto-tuning: In the case of step response method
Please set the step output value at the user side before instruction drive.
During auto-tuning, the MV output cannot be changed at the PID instruction side.
*1. When the auto-tuning is not used, the same number of points as in the step response method are
occupied.
5
Basic Instruction
3. List of parameters to +28
Setting items Content of setting Remarks
Value shorter than operation cycle cannot be
Sampling time(TS) 1 to 32767 [ms]
executed.
bit0 0: Normal action 1:Reverse action
0: Input change amount alarm absent
Direction of action
6
bit1
Instructions
Step Ladder
1: Input change amount alarm valid
0: Output change amount alarm absent
bit2 Do not turn ON bit2 and bit5 simultaneously.
1: Output change amount alarm valid
bit3 Not usable.
0: Auto-tuning inaction
Action setting bit4*2
+1 (ACT)
1: Auto-tuning execute
0: Output value upper and lower limit 7
setting absent
Instructions
Applied
*2 Do not turn ON bit2 and bit5 simultaneously.
bit5 1: Output value upper and lower limit
setting valid
0: Step response method
bit6*2,*3 Selection of auto-tuning mode
1: Limit cycle method
bit7 to bit15 Not usable.
+2 Input filter constant (α) 0 to 99 [%] No input filter in the case of 0 8
Function
and Pulse Catch
Interrupt Function
+3 Proportional gain (KP) 1 to 32767 [%]
+4 Integral time(TI) 0 to 32767 [×100ms] Handled as ∞ in the case of 0 (No integral)
+5 Differential gain (KD) 0 to 100 [%] No differential gain in the case of 0
+6 Differential time(TD) 0 to 32767 [×10ms] No differentiation in the case of 0
:
+7
Occupied by the internal processing of PID operation. Do not change the data.
A
and addresses
between devices
Relationships
+19
Input change amount (increase
+20*1 side) alarm setting value
0 to 32767 Direction of action(ACT): valid if + 1 bit1 is 1
Input change amount (decrease
+21*1 side) alarm setting value
0 to 32767 Direction of action(ACT): valid if + 1 bit1 is 1
*1. + 20 to + 24 will be occupied in the case of bit1 = 1, bit2 = 1, or bit5 = 1 of + 1 action setting
(ACT)
*2. FXU, FX2C PLCs are not usable.
*3. FX1S, FX1N, FX2N, FX1NC, FX2NC PLCs are not usable.
427
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
Setting items Content of setting Remarks
Output change amount (increase Direction of action (ACT):
0 to 32767
side) alarm setting value +1 bit2 = 1, bit5 = 0; valid
+22*1
Direction of action (ACT):
Output upper limit setting value -32768 to 32767
+1 bit2 = 0, bit5 = 1; valid
Output change amount (decrease Direction of action (ACT):
0 to 32767
side) alarm setting value +1 bit2 = 1, bit5 = 0; valid
+23*1
Direction of action (ACT):
Output lower limit setting value -32768 to 32767
+1 bit2 = 0, bit5 = 1; valid
0: Input change amount (increase
side) not over Direction of action (ACT):
bit0
1: Input change amount (increase +1 bit1 = 1 or bit2 = 1; valid
side) over
0: Input change amount (decrease side) not over
+24*1 Alarm output bit1
1: Input change amount (decrease side) over
0: Output change amount (increase side) not over
bit2
1: Output change amount (increase side) over
0: Output change amount (decrease side) not over
bit3
1: Output change amount (decrease side) over
The following setting is required when using the limit cycle method (in the case of action direction (ACT) b6: ON).
PV value threshold (hysteresis) To be set according to fluctuation
+25*2 width (SHPV) of measured value (PV).
Setting of maximum output value
+26*2 Output value upper limit (ULV)
(ULV) of output value (MV) Action setting (ACT) b6:
Setting of minimum output value Occupied when limit cycle method (ON) is
+27*2 Output value lower limit (LLV)
(LLV) of output value (MV) selected.
Weight setting parameter from end
+28*2 of tuning cycle to start of PID control -50 to 32717%
(KW)
*1. + 20 to + 24 will be occupied in the case of bit1 = 1, bit2 = 1, or bit5 = 1 of + 1 action setting
(ACT)
*2. FX2N, FX2NC, FX1N, FX1NC, FX1S, FXU, FX2C PLCs are not usable.
Cautions
1. Cautions when using a plurality of instructions
Possible to execute plural times simultaneously (the number of loops is not limited), but you must be careful
so that the device numbers may not be overlapped in the devices used in or used in operation.
2. Number of parameters occupied
1) In the case of limit cycle method
- Devices are occupied by 29 points from the head device specified by .
2) In the case of step response method
- Action setting (ACT) setting: when all of bit1, bit2, bit5 are other than "0"
Devices are occupied by 25 points from the head device specified by .
- Action setting (ACT) setting: when all of bit1, bit2, bit5 are "0"
Devices are occupied by 20 points from the head device specified by .
3. When specifying a device in power failure hold region
As for the output value (MV) of PID instruction, specify the data register excluding the power failure hold
region.
(When specifying the data register in the power failure hold region, you must clear the content of backup while
the PLC is ON by the following program.)
Program example
M8002 RST
EN ENO
Initial pulse d D
Data register number of battery backup region specified by d
428
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.9 External Device (optional device)
1
4. FXU, FX2C PLCs support the instruction at V3.30 or later.
Outline
5. FX2N PLC supports the upper and lower limit setting functions of the auto-tuning and output
value at V3.00 or later.
6. Object devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable. 2
Instruction List
S2: FX3U, FX3UC PLCs only are applicable.
Error
If an operation error occurs, special auxiliary relay M8067 is turned ON, and the error code is stored in special
data register D8067.
3
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
429
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10 External Device
7.10.1 MNET
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction exchanges ON/OFF signals between the FXU, FX2C PLCs, and F-16NP/NT type interface
unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
MNET
MNET 16 bits Continuous EN ENO MNET(EN, s, d);
s d
MNETP
MNETP 16 bits Pulse EN ENO MNETP(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head input number of FX2-24EI connected to F-16NP/NT (16 points
Bit
occupied)
ENO Execution state Bit
Output
variable Head output number of FX2-24EI connected to F-16NP/NT (8 points
Bit
occupied)
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System User Digit designation System User Index Pointer
type Unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z
Function and operation explanation
X000 MNET • To exchange signals with
EN ENO F-16NP/NT.
X040 s d Y030 • Head input and output numbers are determined by the connection
position of FX2-24EI type special block.
The following signals are exchanged by the above instruction.
Y030 to Y037 8 points
FXU PLC A-series
FX2C PLC Link data PLC
F-16NP/NT type
Y050 to Y037 interface unit 8 points
FX2-24EI type X044 to X047
special block Status signal
430
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
Cautions
Outline
1) In the case of FX-16NP/NT, FX-16NP/NT-S3 type interface block, this instruction is not used, and FX2-
24EI is not needed.
2) FXU, FX2C PLCs do not support the instruction at V3.30 or later.
This instruction is disused from V3.30 and later.
2
Instruction List
3
Instruction
Configuration of
4
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
431
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10.2 ANRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes the analog input of F2-6A type analog input and output unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ANRD
EN ENO
ANRD 16 bits Continuous ANRD(EN, s, n, d1, d2);
s d1
n d2
ANRDP
EN ENO
ANRDP 16 bits Pulse ANRDP(EN, s, n, d1, d2);
s d1
n d2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Head input number of FX2-24EI connected to F2-6A (16 points occupied) Bit
variable
Channel number of analog input (n=10,11,12,13) ANY16
ENO Execution state Bit
Output Head output number of FX2-24EI connected to F2-6A (8 points occupied) Bit
variable
Device storing analog input value (8-bit binary) ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z z
z
z z z z z z z z z
Function and operation explanation
ANRD
• To read in analog input of F2-6A type analog input and output unit.
X000
EN ENO • The content of the device specified by , is determined by the
X040 s d1 Y030 connection position of FX2-24EI type special adapter.
K10 n d2 D300
• In the device specified by , 8-bit binary analog data is stored.
To read out from analog
input CH10 to D300.
Caution
FXU, FX2C PLCs do not support the instruction at V3.30 or later.
This instruction is disused from V3.30 and later.
432
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
Program example
Outline
This is intended to determine the average of three points of time series data in 100 ms unit in order to
suppress fluctuations of the analog input.
[Structured ladder]
M8000
EN
ANRD
ENO
To store the data of input channel 10 of F2-6A
type analog input and output unit connected 2
Instruction List
from X040, Y030, in the D20.
RUN monitor X040 s d1 Y030
K10 n d2 D20
M8012 WSFLP The content of D20 is shifted to D0, D1, D2
EN ENO in 100 ms unit.
100 ms D20 s d D0 3
clock K3 n1
Instruction
Configuration of
K1 n2
MEANP The average of D0, D1, D2 is stored in the D10.
EN ENO
D0
K3
s
n
d1 D10
4
Instructions
Explanation of
How to Read
[ ST ]
ANRD(M8000, X040, K10, Y030, D20);
WSFLP(M8012, D20, K3, K1, D0);
MEANP(M8012, D0, K3, D10);
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
433
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10.3 ANWR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes data from the PLC in the F2-6A type analog input and output unit, and issues as analog
data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ANWR
EN ENO
ANWR 16 bits Continuous s1 d ANWR(EN, s1, s2, n, d);
s2
n
ANWRP
EN ENO
ANWRP 16 bits Pulse s1 d ANWRP(EN, s1, s2, n, d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Device for storing analog output data (8-bit binary) ANY16
Input
variable Head input number of FX2-24EI connected to F2-6A Bit
Channel number of analog output ANY16
Output ENO Execution state Bit
variable Head output number of FX2-24EI connected to F2-6A Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
z z
z z
z
Function and operation explanation
X000 ANWR • Data is written in from PLC into F2-6A type analog input and output
EN ENO unit, and issued as analog data.
D310 s1 d Y030
s2
• The content of the device specified by , is determined by the
X040
n
connection position of FX2-24EI type special adapter.
K0
To write in from D310 • In the device specified by , 8-bit binary data is stored.
into analog input CN0
Caution
FXU, FX2C PLCs do not support the instruction at V3.30 or later.
This instruction is disused from V3.30 and later.
434
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
7.10.4 RMST
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction gives start signal from the PLC or receives status information, in the F 2 -32RM type
programmable cam switch.
1. Format and operation, execution form
Expression in each language
Instruction
name
Operation
Execution
form Structured ladder ST 3
Instruction
Configuration of
RMST
EN ENO
RMST 16 bits Continuous RMST(EN, s, n, d1, d2);
s d1
n d2
2. Set data
4
Instructions
Explanation of
How to Read
Variable Description Data type
EN Execution condition Bit
Input Head input number of FX2-24EI connected to F2-32RM (16 points
Bit
variable occupied)
Program (bank) number of F2-32RM (n = 0, 1). ANY16 5
ENO Execution state Bit
Basic Instruction
Output Head output number of FX2-24EI connected to F2-32RM (8 points
Bit
variable occupied)
Head of device storing status information (8 points occupied) Bit
3. Applicable devices 6
Bit Devices Word Devices Others
Instructions
Step Ladder
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z z 7
Instructions
Applied
z
zz z z
Function and operation explanation
• This instruction gives start command from the PLC or receives status
8
X000 RMST
Function
and Pulse Catch
Interrupt Function
EN ENO information, in the F2-32RM type programmable cam switch.
X040 s d1 Y030
• The content of the device specified by , is determined by the
K0 n d2 M300
connection position of FX2-24EI type special adapter.
FXU→FX2-32RM Start command • In the device specified by , the status information is stored as
F2-32RM→FXU Status information follows. A
and addresses
between devices
Relationships
M307 M306 M305 M304 M303 M302 M301 M300
ON Normal Normal CW Normally 1.0° START BANK1
ON
OFF S/W error H/W error CCW 0.5° STOP Normally BANK0
OFF
As for the meaning of each status, please refer to the user's manual of F2-32RM type programmable cam
switch.
435
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10.5 RMWR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction sends output prohibit information from the PLC to the F2-32RM type programmable cam
switch.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RMWR
EN ENO
RMWR 16 bits Continuous RMWR(EN, s1, s2, d);
s1 d
s2
RMWRP
EN ENO
RMWRP 16 bits Pulse RMWRP(EN, s1, s2, d);
s1 d
s2
DRMWR
EN ENO
DRMWR 32 bits Continuous DRMWR(EN, s1, s2, d);
s1 d
s2
DRMWRP
EN ENO
DRMWRP 32 bits Pulse DRMWRP(EN, s1, s2. d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head bit device of output prohibit table
Input • 16-bit operation: 16 points occupied Bit
variable • 32-bit operation: 32 points occupied
Head input number of FX2-24EI connected to F2-32RM (16 points
Bit
occupied)
ENO Execution state Bit
Output
variable Head output number of FX2-24EI connected to F2-32RM (8 points
Bit
occupied)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
zzz z z
z
z
436
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
Function and operation explanation
Outline
RMWR
• This instruction sends output prohibit information from the PLC to the
X000
EN ENO F2-32RM type programmable cam switch.
M500 s1 d Y030 • The content of the device specified by , is determined by the
X040 s2 connection position of FX2-24EI type special adapter. 2
• The device specified by is an output prohibit table, and is handled
Instruction List
Writing of output prohibit information
as octagonal number as shown in the example below.
Output number of
Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000
3
F2-32RM
M507 M506 M505 M504 M503 M502 M501 M500
RMWR
Instruction
Configuration of
RMWRP
Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 For example, when
M517 M516 M515 M514 M513 M512 M511 M510 M500 is turned ON,
Y000 is output
prohibited, and
Y027 Y026 Y025 Y024 Y023 Y022 Y021 Y020
cannot be turned ON. 4
DRMWR
Instructions
Explanation of
How to Read
DRMWRP M527 M526 M525 M524 M523 M522 M521 M520
Y037 Y036 Y035 Y034 Y033 Y032 Y031 Y030
Auxiliary relay number
M537 M536 M535 M534 M533 M532 M531 M530
of FXU, FX2C 5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
437
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10.6 RMRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads out the ON/OFF state of output of the F2-32RM type programmable cam switch to the
PLC.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RMRD
EN ENO
RMRD 16 bits Continuous RMRD(EN, s, d1, d2);
s d1
d2
RMRDP
EN ENO
RMRDP 16 bits Pulse RMRDP(EN, s, d1, d2);
s d1
d2
DRMRD
EN ENO
DRMRD 32 bits Continuous DRMRD(EN, s, d1, d2);
s d1
d2
DRMRDP
EN ENO
DRMRDP 32 bits Pulse DRMRDP(EN, s, d1, d2);
s d1
d2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head input number of FX2-24EI connected to F2-32RM (16 points
Bit
occupied)
ENO Execution state Bit
Head output number of FX2-24EI connected to F2-32RM (8 points
Bit
Output occupied)
variable Bit device for storing output status (ON/OFF).
• 16-bit operation: 16 points occupied Bit
• 32-bit operation: 32 points occupied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z
zz z z
438
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
Function and operation explanation
Outline
X000 RMRD • This instruction reads out the ON/OFF state of output of the F2-32RM
EN ENO type programmable cam switch to the PLC.
X040 s d1 Y030
• The content of the device specified by , is determined by the
d2 M660
connection position of FX2-24EI type special adapter. 2
• If X000 is turned OFF, the content of the device specified by is not
Instruction List
Reading of ON/OFF information
changed.
• The ON/OFF information being read out is stored in the device
specified by , and is handled as octagonal number as shown in the
example below.
3
Instruction
Configuration of
Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000 Output number of
M607 M606 M605 M604 M603 M602 M601 M600 F2-32RM
RMRD
RMRDP
Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010
M617 M616 M615 M614 M613 M612 M611 M610
For example,
if the Y000 is ON,
4
Instructions
Explanation of
How to Read
the M600 is turned ON.
DRMRD Y027 Y026 Y025 Y024 Y023 Y022 Y021 Y020
DRMRDP M627 M626 M625 M624 M623 M622 M621 M620
Basic Instruction
Y037 Y036 Y035 Y034 Y033 Y032 Y031 Y030
M637 M636 M635 M634 M633 M632 M631 M630 Auxiliary relay number
of FXU, FX2C
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
439
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
7.10.7 RMMN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads out the rotating speed (rpm) or present angle of the resolver connected to the F2-32RM
type programmable cam switch to the PLC.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RMMN
EN ENO
RMMN 16 bits Continuous RMMN(EN, s, d1, d2);
s d1
d2
RMMNP
EN ENO
RMMNP 16 bits Pulse RMMNP(EN, s, d1, d2);
s d1
d2
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Head input number of FX2-24EI connected to F2-32RM. Bit
ENO Execution state Bit
Output Head output number of FX2-24EI connected to F2-32RM. Bit
variable
Device for storing data of rotating speed and present angle (2 points
ANY16
occupied)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z
z
z z z z z z z z z
Function and operation explanation
X000 RMMN • The rotating speed (rpm) or present angle of the resolver connected to
EN ENO the F2-32RM type programmable cam switch is read out to the PLC.
X040 s d1 Y030 Whether the rotating speed or the present angle is determined by the
d2 D100 setting switch #4 of F2-32RM, whether OFF or ON.
• The content of the device specified by , is determined by the
Monitor of rotating connection position of FX2-24EI type special adapter.
speed or present angle
• In the device specified by , the data of the rotating speed or the
present angle being read out is stored.
D100 8 3 0 In the case of rotating speed (rpm) (actually binary value)
D100 3 5 0 In the case of present angle (deg) (binary value by rounding down 0.5°)
440
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
7.10.8 BLK
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction specifies the block number for the F2-30GM type pulse output unit from the PLC.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
BLK
Instruction
Configuration of
EN ENO
BLK 16 bits Continuous BLK(EN, s1, s2, d);
s1 d
s2
EN
BLKP
ENO 4
BLKP 16 bits Pulse BLKP(EN, s1, s2, d);
Instructions
Explanation of
How to Read
s1 d
s2
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input Block number (K0 to K31) ANY16
variable
Head input number of FX2-24EI connected to F2-30GM Bit
Output ENO Execution state Bit
variable Head output number of FX2-24EI connected to F2-30GM Bit
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
7
Instructions
Applied
z z
z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
441
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
Function and operation explanation
• The block number is specified from the PLC to the F2-30GM type pulse
X000 BLK
EN ENO output unit.
K0 s1 d Y030 The block number is the content of the device specified by , and
X040 s2 the value is BIN, but is valid in a range of 0 to 31 as converted to BCD.
• When using the BCD digital switch as , it is converted to BIN
FXU, FX2C→FX2-30GM
Block numbers 0 to 31 (decimal) value, and the result must be specified.
(Constant K is automatically converted into BIN value, and 0 to 31 can
be directly entered.)
• The content of the device specified by and is determined by the connection position of the FX2-
24EI type special block.
• You must always use this instruction when using the F2-30GM.
If block number specification is not needed from FXU, FX2C PLCs to F2-30GM, please program as follows.
M8000 BLK
EN ENO
K0 s1 d Y030
X040 s2
• In the FX-1GM type pulse output unit, TO instruction is used instead of BLK instruction, and the FX2-24EI
type interface block is not needed.
Caution
FXU, FX2C PLCs do not support the instruction at V3.30 or later.
This instruction is disused from V3.30 and later.
442
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.10 External Device
1
7.10.9 MCDE
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction sends the M code numbers M0 to M77 to the PLC from the F2-30GM type pulse output unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
MCDE
Instruction
Configuration of
EN ENO
MCDE 16 bits Continuous MCDE(EN, s, d1, d2);
s d1
d2
EN
MCDEP
ENO 4
MCDEP 16 bits Pulse MCDEP(EN, s, d1, d2);2
Instructions
Explanation of
How to Read
s d1
d2
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Input
Basic Instruction
variable Head input number of FX2-24EI connected to F2-30GM Bit
ENO Execution state Bit
Output Head output number of FX2-24EI connected to F2-30GM Bit
variable
Bit device for issuing M code number (78 points occupied) Bit
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z 7
Instructions
Applied
z
zz z
Function and operation explanation
X000 MCDE • From F2-30GM type pulse output unit, M code number M0 to M77 is 8
Function
and Pulse Catch
Interrupt Function
EN ENO sent out to the PLC.
X040 s d1 Y030
• The content of the device specified by , is determined by the
d2 M500
connection position of FX2-24EI type special block.
FX2-30GM→FXU,FX2C • When M code output instruction is executed at the F2-30GM side, input
M code number M0 to 77 (octal) X is operated according to the value 0 to 77 (octal), and the result is A
stored in M500 to M577 in octal notation.
and addresses
between devices
Relationships
For example, in the case of M code 23, M523 is turned ON.
• For the ease of understanding of correspondence of M code number between the PLC side and the F2-
30GM side, it is recommended to set 00 in the lower two digits of device M, S specified by .
• In the FX-1GM type pulse output unit, FROM instruction is used instead of MCDE instruction.
Cautions
FXU, FX2C PLCs do not support the instruction at V3.30 or later.
This instruction is disused from V3.30 and later.
443
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.11 Data Transfer 2
7.11 Data Transfer 2
7.11.1 ZPUSH
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction temporarily retracts the present values of index registers V0 to V7, Z0 to Z7.
To return the retracted present values to the original values, use the ZPOP instruction.
→ As for ZPOP instruction, refer to section 7.11.2.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ZPUSH
ZPUSH 16 bits Continuous EN ENO ZPUSH(EN, d);
d
ZPUSHP
ZPUSHP 16 bits Pulse EN ENO ZPUSHP(EN, d);
d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
ENO Execution state Bit
Output
variable Head device for retracting contents of index registers V0 to V7, Z0 to Z7
ANY16
temporarily [(1+16 × times of retraction) occupied]
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
444
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.11 Data Transfer 2
1
Function and operation explanation
Outline
1. 16-bit operation (ZPUSH/ZPUSHP)
Command
input ZPUSH
EN ENO
d Head device for retracting
2
Instruction List
the contents of index register
1) Contents of index registers V0 to V7, Z0 to Z7 are temporarily retracted in and after the device specified
by . When the contents of index registers are retracted, the number of retracting of the device
specified by is incremented by +1.
2) To restore the data, use ZPOP instruction. 3
Use ZPUSH, ZPOP instructions in pair.
Instruction
Configuration of
3) By specifying by the same device, ZPUSH and ZPOP instructions can be used as nesting. In this
case, every time the ZPUSH instruction is executed, the region to be used after the device specified by
is added by 16 points each. Hence, you must preliminarily reserve the region for the number of
times to be used by nesting.
4
4) The composition of the data to be retracted after the device specified by is as shown below.
Instructions
Explanation of
How to Read
No action of nesting With action of nesting
Index Retraction Index Retraction
register data register data
Z0 1) +1 to number
d +0 Times of retraction Z0 d +0 Times of retraction
V0
Z1
of times of
retraction d
+1
+2
Z0
V0
V0
Z1
1) ZPUSH instruction
Times of retraction
+1
+2
Z0
V0
5
Basic Instruction
by ZPUSH
V1 instruction
+3 Z1 V1 d :0→1 +3 Z1
First time of nesting Portion of
Z2 +4 V1 Z2 Times of retraction
+4 V1
one nesting:
V2 +5 Z2 4) ZPOP d =1 +5 Z2 16 points
2) -1 to number instruction
+6 V2 Z7
of times of d :1→0
Z7 V7 +15 Z7
6
retraction d
V7 by ZPOP +15 Z7 2) ZPUSH instruction +16 V7
instruction +16 V7 d :1→2 +17 Z0
Instructions
Step Ladder
Second time of nesting
Times of retraction +18 V0
3) ZPOP d =2 +19 Z1
instruction
+20 V1
d :2→1
7
Related instructions
Instructions
Applied
Instruction Content
ZPOP This instruction restores the index registers V0 to V7, Z0 to Z7 once retracted by ZPUSH instruction.
Cautions
8
• Without action of nesting, please clear the number of retraction of the device specified by before
Function
and Pulse Catch
Interrupt Function
execution of ZPUSH instruction.
• With action of nesting, please clear the number of retraction of the device specified by before first
execution.
Error A
and addresses
between devices
Relationships
It is an operation error in the following case, and error flag M8067 is turned ON, and error code is stored in
D8067.
• When the range of the number of points used after the device specified by by ZPUSH exceeds the
range of the corresponding device.
(Error code: K6706)
• In ZPUSH instruction execution, when the number of retraction of the device specified by is negative.
(Error code: K6707)
445
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.11 Data Transfer 2
Program example
This is a program for retracting the contents of index registers Z0 to Z7, V0 to V7 before execution of
subroutine program after D0, when using the index register in the subroutine after pointer P0.
[Structured ladder] [ ST ]
M8002 RST RST(M8002, D0);
EN ENO MOVP(X005, K5, V0);
d D0 MOVP(NOT X005, K10, V0);
OUT(X000V0, Y000);
ZPUSH(M8000, D0);
X005 MOVP
EN ENO FBDD(····················);
K5 s d V0 Function block of the function
corresponding to the subroutine
program.
X005 MOVP
EN ENO ZPOP(M8000, D0);
K10 s d V0
X000 V0
Y000
X000 CALL
EN ENO
P0 p
FEND
EN ENO
M8000 ZPUSH
P0 EN ENO
RUN monitor d D0
X006 MOVP
EN ENO
K5 s d V0
X006 MOVP
EN ENO Index register and
K10 s d V0 programs being used
X030 OUT_T
EN ENO
TC0 TCoil
D100 V0 TValue
M8000 ZPOP
EN ENO
d D0
SRET
EN ENO
446
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.11 Data Transfer 2
1
7.11.2 ZPOP
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction returns the contents of index registers V0 to V7, Z0 to Z7 once retracted by the ZPUSH
instruction to the original state.
→ As for ZPUSH (FNC102) instruction, refer to section 17.1.
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
ZPOP
ZPOP 16 bits Continuous EN ENO ZPOP(EN, d);
d
ZPOPP
4
Instructions
Explanation of
How to Read
ZPOPP 16 bits Pulse EN ENO ZPOPP(EN, d);
d
2. Set data
Input
Variable Description Data type
5
EN Execution condition Bit
Basic Instruction
variable
ENO Execution state Bit
Output
variable Head device once retracting the contents of index registers V0 to V7, Z0 to
ANY16
Z7 [(1+16 × times of retraction) occupied]
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Con Real Character
System user Digit designation Index Pointer
type user unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
7
Instructions
Applied
Function and operation explanation
1. 16-bit operation (ZPOP/ZPOPP)
→ As for the function and operation, refer also to section 7.11.1.
Command
ZPOP
8
input
Function
and Pulse Catch
Interrupt Function
EN ENO
d Head device once retracting
the contents of index registers
1) The contents of index registers Z0 to Z7, V0 to V7 once retracted after the device specified by by
ZPUSH instruction are restored in the original index register. When the contents of the index register are A
restored, the number of retraction of the device specified by is processed by -1.
and addresses
between devices
Relationships
2) Use ZPUSH instruction for temporary retraction of data.
Use ZPUSH, ZPOP instructions in pair.
447
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.11 Data Transfer 2
Related instructions
Instruction Content
ZPUSH This instruction temporarily retracts the present values of index registers V0 to V7, Z0 to Z7.
Error
It is an operation error in the following case, and error flag M8067 is turned ON, and error code is stored in
D8067.
• When the content of the number of retraction of the device specified by during execution of ZPOP
instruction is 0 or negative. (Error code: K6706)
Program example
→ As for program examples, refer to section 7.11.1.
448
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12 Floating Point
Outline
7.12.1 DECMP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction compares two data (binary floating decimal point), and issues the result of greater, smaller, or
equal to the bit device (3 points).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
3
Instruction
Configuration of
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DECMP
4
Instructions
Explanation of
How to Read
EN ENO
DECMP 32 bits Continuous DECMP(EN, s1, s2, d);
s1 d
s2
DECMPP
DECMPP 32 bits Pulse
EN
s1
ENO
d
DECMPP(EN, s1, s2, d); 5
Basic Instruction
s2
2. Set data
Variable Description Data type
EN Execution condition Bit 6
FLOAT(Single
Instructions
Step Ladder
Input Device for storing binary floating point data to be compared
Precision)
variable
FLOAT(Single
Device for storing binary floating point data to be compared
Precision)
Output ENO Execution state Bit
variable Head bit device for output of result (3 points occupied) Bit
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System user Digit designation System user Index Pointer
type unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
z S1 S2 z z z S1
Function
and Pulse Catch
Interrupt Function
z S1 S2 z z z S1
zz z S3 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
449
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DECMP, DECMPP)
The compared value specified by and the comparison source specified by are compared as
floating decimal point data, and depending on the result of greater, smaller, or equal, any bit of devices ( ,
+1, and +2) specified by is turned ON.
• When constants (K, H) are specified in the devices specified by , , the values are automatically
converted from BIN and handled as binary floating decimal point data.
Command DECMP
EN ENO
Label 1 *1 s1 d Head bit device
Label 2 *2 s2 for output of result
*1. To define the device for storing binary floating
d
ON when decimal point data (data 1) to be compared.
s1 > s2 *2. To define the device for storing binary floating
d +1 decimal point data (data 2) to be compared.
ON when
s1 = s2
d +2
ON when
s1 < s2
If the command input is OFF and DECMP instruction cannot be executed, the device specified by d holds
the state before the command input is turned OFF.
Cautions
1. Number of devices occupied
occupies 3 points.
Be careful not to overlap with the devices used in other applications.
2. Specification of input and output variables
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device,
and can be specified directly. When specifying the device, use the global label.
3. The instruction is provided in the FX3G PLC Ver. 1.10 or later.
4. Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
S3: FX3U, FX3UC PLCs only are applicable.
However, index decoration is not applicable.
450
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.2 DEZCP
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction compares the comparison range of upper and lower two points and the data (binary floating
decimal point), and issues the result to the bit device (3 points) depending on the greater, smaller or the band.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEZCP
EN ENO
DEZCP 32 bits Continuous s1
s2
d DEZCP(EN, s1, s2, s3, d);
4
Instructions
Explanation of
How to Read
s3
DEZCPP
EN ENO
DEZCPP 32 bits Pulse s1 d DEZCPP(EN, s1, s2, s3, d);
s2 5
s3
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Device for storing binary floating point data to be compared
FLOAT(Single 6
Precision)
Instructions
Step Ladder
Input
variable FLOAT(Single
Device for storing binary floating point data to be compared
Precision)
FLOAT(Single
Device for storing binary floating point data to be compared
Precision)
Output
variable
ENO Execution state Bit
7
Head bit device for output of result (3 points occupied) Bit
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System user Digit designation System user Index Pointer
type unit stant Number String
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z S1 S1 z z z S1
z S1 S1 z z z S1
z S1 S1 z z z S1
zz z S2 z A
S: Refer to "Cautions".
and addresses
between devices
Relationships
451
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DEZCP, DEZCPP)
The compared value specified by , and the comparison source specified by are compared as
floating decimal point data, and depending on the result of smaller, within range, or greater, any bit of devices
( , +1, and +2) specified by is turned ON.
• When constants (K, H) are specified in the devices specified by , , , the values are
automatically converted and handled as binary floating decimal point data.
Command input DEZCP
EN ENO
Label 1*1 s1 d Head bit device for output of result
Label 2*2 s2
Label 3*3 s3
d
ON when s1 > s3
d +1
ON when s1 ≤ s3 ≤ s2
d +2
ON when s3 > s2
If the command input is OFF and DEZCP instruction cannot be executed, the device specified by d holds
the state before the command input is turned OFF.
*1. To define the device for storing binary floating decimal point data (data 1) to be compared.
*2. To define the device for storing binary floating decimal point data (data 2) to be compared.
*3. To define the device for storing binary floating decimal point data (data 3) to be compared.
Cautions
1. Number of devices occupied
occupies 3 points.
Be careful not to overlap with the devices used in other applications.
2. Comparison data of and
The magnitude relation of comparison data is ≤ .
In the case of > , the value of is regarded to be same as , and is compared.
3. Specification of input and output variables
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
4. Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
However, index decoration is not applicable.
452
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.3 DEMOV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transfers binary floating point data.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DEMOV
DEMOV 32 bits Continuous EN ENO DEMOV(EN, s, d);
s d
DEMOVP
4
Instructions
Explanation of
How to Read
DEMOVP 32 bits Pulse EN ENO DEMOVP(EN, s, d);
s d
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
variable Binary floating decimal point data of transfer source, or device storing the FLOAT(Single
data Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Transfer destination device of binary floating decimal point data
Precision)
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand Special Con Real Character
System user Digit designation System user Index Pointer
type unit stant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z S1 z z
7
Instructions
Applied
z z S1 z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
453
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DEMOV/DEMOVP)
The content (binary floating decimal point data) of transfer source of device specified by is transferred to
the device specified by . Real number (E) can be directly specified in the device specified by .
s +1 s d +1 d
Command input DEMOV Transfer
EN ENO 4.23542 4.23542
Label 1*1 s d Label 2 *2
Binary floating decimal point Binary floating decimal point
*1. To define the device storing (real number) (real number)
the transfer source data.
*2. To define the transfer destination device.
Program example
1. This is a program for storing the real number of D11, D10 in D1, D0 when X007 is turned ON.
[Structured ladder]
X007 DEMOVP D11 D10 D1 D0
EN ENO 36.475 36.475
VAR_01*1 s d VAR_02*2
*1. VAR_01 is global label, and D10 is defined.
*2. VAR_02 is global label, and D0 is defined.
[ST]
DEMOVP(X007,VAR_01,VAR_02);
2. This is a program for storing the real number -1.23 in D11, D10 when X007 is turned ON.
[Structured ladder]
X007 DEMOVP D11 D10
EN ENO -1.23 -1.23
VAR_011*1 s d VAR_021*2
*1. VAR_011 is global label, and E-1.23 is defined.
*2. VAR_021 is global label, and D10 is defined.
[ST]
DEMOVP(X007,VAR_011,VAR_021);
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
3) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
454
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.4 DESTR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts the binary floating decimal point data into character string (ASCII code) in a specified
number of digits. You can also use the STR instruction for converting BIN data into character string (ASCII
code).
→ As for character string, refer to FX Structured Programming Manual (Device & Common).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common). 3
→ As for STR instruction, see section 7.20.1.
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DESTR
4
Instructions
Explanation of
How to Read
EN ENO
DESTR 32 bits Continuous DESTR(EN, s1, s2, d1);
s1 d1
s2
DESTRP
DESTRP 32 bits Pulse
EN ENO
DESTRP(EN, s1, s2, d1);
5
s1 d1
Basic Instruction
s2
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
6
Instructions
Step Ladder
FLOAT(Single
Input Binary floating decimal point data to be converted, or device storing the data
Precision)
variable
Head device storing the display specification of the numeric value to be
ANY16
converted (3 points occupied).
ENO Execution state Bit
Output
variable Head of the storing destination device of the converted character string (all
String
7
digits + 1) ÷2 points occupied (fractions are rounded up).
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Con Real Character
System user Digit designation System user Index Pointer
type unit stant Number String
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z z z z z
z z z z z z z z z z
z z z z z z z z z
A
and addresses
between devices
Relationships
455
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DESTR/DESTRP)
The content (binary floating decimal point data) of the device specified by is converted into character
string depending on the content of the device specified by , and stored in or after the device specified by
. Real number can be directly specified in the device specified by .
Command
input DESTR
EN ENO
Label 1*1 s1 d1 Label 2 *2
Head device storing s2
the display specification
of the numeric value
to be converted.
*1. To define the binary floating decimal point data to be
converted, or the device storing the data.
*2. To define the head of the storing destination device of
the converted character string.
• The converted data differs depending on the display specification specified by .
0: Decimal point type The converted data differs
s2
1: Exponential type depending on the type of s2 .
s2 +1 All digits Setting range is 2 to 24.
s2 +2 Number of digits
below decimal point
2. In the case of decimal point type
s2 Decimal point type b15 b8 b7 b0
s2 +1 All digits ASCII code of digit number
d (all digits specified value - 1)
ASCII code of the sign
Number of digits
s2 +2 below decimal point
ASCII code of digit number ASCII code of digit number
d +1
(all digits specified value - 3) (all digits specified value - 2)
ASCII code of digit number ASCII code of
d +2 (all digits specified value - 5) decimal point (.)
(Decimal part) (2EH)
Sign
ASCII code of digit number ASCII code of digit number
d +3 (all digits specified value - 7) (all digits specified value - 6)
s1 +1 s1 (Decimal part) (Decimal part)
d +4 0000H
Binary floating decimal point (real number)
To be stored automatically at the end of character string.
• The number of all digits that can be specified by +1 is as follows. (Maximum: 24 digits)
When the number of digits below decimal point is "0" . . . . . . . . . . . .All digits ≥ 2
When the number of digits below decimal point is other than "0" . . . .All digits ≥ (decimal digits + 3)
• Decimal digits that can be specified by +2 is 0 to 7 digits.
However, please set in the range of decimal digits ≤ (all digits - 3).
456
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
For example, in the case of all digits of 8 and decimal digits of 3, when -1.23456 is specified, the data after
Outline
is stored as follows.
s2 0
All digits
s2 +1 8 Number of digits
s2 +2 3
below decimal point b15 b8 b7 b0 2
20H(space) 2DH(-)
Instruction List
d
d +1 31H(1) 20H(space)
1 2 3 5
d +2 32H(2) 2EH(.)
Sign d +3 35H(5) 33H(3)
d +4 0000H
3
s1 +1 s1
Instruction
Configuration of
-1.23456
To be stored automatically at the end of character string.
Binary floating decimal point (real number)
• The converted character string data is stored in the device after as follows.
- For the sign, "20H" (space) is stored when the binary floating decimal point data is positive, and
4
Instructions
Explanation of
How to Read
"2DH" (-) is stored when negative.
- When the decimal part of binary floating decimal point data does not settle within the decimal digits, the
lower decimal digits are rounded off.
5
s2 0: Decimal point type
s2 +1 8 (All digits) All digits
Basic Instruction
s2 +2 2below
(Number of digits
decimal point) 1 2 3 4 5 6
Number of digits
s1 +1 s1 Rounded off.
below decimal point
-1.23456
6
- When the number of decimal digits is set in other than "0", automatically "2EH" (.) is stored at the
Instructions
Step Ladder
specified decimal digits + 1 digit.
However, when the number of decimal digits is "0", "2EH" (.) is not stored.
s2 0: Decimal point type
s2 +1 8 (All digits) All digits 7
Instructions
Applied
2 (Number of digits
s2 +2 below decimal point) 1 2 3
s1 +1 s1 Number of digits below decimal point
Added automatically.
-1.23456
- When the number of digits subtracting the sign, decimal point, and decimal part from the total number of
8
Function
and Pulse Catch
Interrupt Function
digits is greater than the integer part of the binary floating decimal point data, "20H" (space) is inserted
between the sign and the integer part.
s2 0
s2 +1 8 All digits
A
and addresses
between devices
Relationships
s2 +2 2 1 2 3
s1 +1 s1 Number of digits below decimal point
"20H" (space) is inserted.
-1.23456
- "00H" or "0000H" is automatically stored at the end of the converted character string.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
3. In the case of exponential type
b15 b8 b7 b0
ASCII code of digit number
s2 Exponential type d ASCII code of the sign
(all digits specified value - 1)
s2 +1 All digits
d +1
ASCII code of ASCII code of digit number
s2 +2 Number of digits decimal point (.) (2EH) (all digits specified value - 2)
below decimal point
ASCII code of digit number ASCII code of digit number
d +2 (all digits specified value - 5) (all digits specified value - 4)
(Decimal part) (Decimal part)
E ASCII code of digit number ASCII code of digit number
d +3 (all digits specified value - 7) (all digits specified value - 6)
(Decimal part) (Decimal part)
Sign (integer part) Sign
(exponential part) ASCII code of the sign
d +4 45H(E)
(exponential part)
s1 +1 s1 Added
automatically. ASCII code of digit number ASCII code of digit number
d +5 (all digits specified value - 11) (all digits specified value - 10)
(exponential part) (exponential part)
Binary floating decimal point (real number) d +6 0000H
To be stored automatically at the end of character string.
• The number of all digits that can be specified by +1 is as follows. (Maximum: 24 digits)
When the number of digits below decimal point is "0" . . . . . . . . . . . .No. of digits ≥ 6
When the number of digits below decimal point is other than "0" . . . .No. of digits ≥ (decimal digits + 7)
• Decimal digits that can be specified by +2 is 0 to 7 digits. Please set within the range of decimal digits
≤ (total digits - 7).
For example, in the case of all digits of 12 and decimal digits of 4, when -12.34567 is specified, the data after
is stored as follows.
s2 1
All digits b15 b8 b7 b0
s2 +1 12
Number of digits d 20H (space) 2DH(-)
below decimal point
s2 +2 4
d +1 2EH(.) 31H(1)
d +2 33H(3) 32H(2)
1 2 3 4 6 E + 0 1 d +3 36H(6) 34H(4)
2 digits fixed
d +4 2BH(+) 45H(E)
Sign (integer part) Sign (exponential part)
d +5 31H(1) 30H(0)
s1 +1 s1
d +6 0000H
-12.34567
Binary floating decimal point (real number) To be stored automatically at the end of character string.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
• The converted character string data is stored in the device after as follows.
Outline
- For the sign of integer part, "20H" (space) is stored when the binary floating decimal point data is
positive, and "2DH" (-) is stored when negative.
- The integer part is fixed in one digit.
Between the integer part and the sign, "20H" (space) is inserted.
2
1 All digits (12)
Instruction List
s2
s2 +1 12 1 digit fixed
s2 +2 4 1 2 3 4 6 E + 0 1
s1 +1 s1 "20H" (space) is inserted. 3
Instruction
Configuration of
-12.34567
- When the decimal part of binary floating decimal point data does not settle within the decimal digits, the
lower decimal digits are rounded off.
4
s2 1
s2 +1 12 All digits (12)
Instructions
Explanation of
How to Read
s2 +2 4 1 2 3 4 6 6 7 E + 0 1
s1 +1 s1
Number of digits Rounded and discarded.
below decimal point (4)
-12.34567
5
- When the number of decimal digits is set in other than "0", automatically "2EH" (.) is stored at the
Basic Instruction
specified decimal digits + 1 digit.
However, when the number of decimal digits is "0", "2EH" (.) is not stored.
s2 1
s2 +1 12 All digits (12) 6
Instructions
Step Ladder
s2 +2 4 1 2 3 4 6 E + 0 1
s1 +1 s1 Number of digits below decimal point (4)
-12.34567 Added automatically.
- For the sign of exponential part, "2BH" (+) is stored when the index is positive, and "2DH" (-) is stored
7
Instructions
Applied
when negative.
- The exponential part is fixed in two digits.
When the exponential part is one digit, between the exponential part and the sign, "30H" (0) is inserted.
All digits (12)
s2 1
8
s2 +1 12 2 digits fixed
Function
and Pulse Catch
Interrupt Function
s2 +2 4 1 2 3 4 6 E + 0 1
s1 +1 s1 "30H" (0) is inserted.
-12.34567 A
- "00H" or "0000H" is automatically stored at the end of the converted character string.
and addresses
between devices
Relationships
Cautions
When handling character string data or 32-bit data in structured program, you cannot specify 16-bit device
directly unlike the simple project. When handling character string data or 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly. When specifying the device,
use the global label.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Related instructions
Instruction Content
EVAL This instruction converts the character string (ASCII code) data into binary floating decimal point data.
STR This instruction converts BIN data into character string (ASCII code).
VAL This instruction converts the character string (ASCII code) data into BIN data.
Error
In the following cases, it is an operation error, and error flag (M8067) is turned ON, and error code is stored in
D8067.
• When is not within the following range. (Error code: K6706)
0, ±2-126 ≤ < ±2128
• When the type specification specified by is other than 0, 1. (Error code: K6706)
• When the all digits specification specified by +1 is out of the following range. (Error code: K6706)
In the case of decimal point type
When the number of digits below decimal point is "0" . . . . . . . . . . . All digits ≥ 2
When the number of digits below decimal point is other than "0" . . All digits ≥ (decimal digits + 3)
In the case of exponential type
When the number of digits below decimal point is "0" . . . . . . . . . . . All digits ≥ 6
When the number of digits below decimal point is other than "0" . . All digits ≥ (decimal digits + 7)
• When the decimal digits specification specified by +2 is out of the following range. (Error code: K6706)
In the case of decimal point type: Decimal digits ≤ (all digits - 3)
In the case of index type: Decimal digits ≤ (all digits - 7)
• When the device range for storing the character string specified by is over the range of the
corresponding device.
(Error code: K6706)
• When the result of conversion exceeds the specified all digits. (Error code: K6706)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Program example
Outline
1) This is a program for converting the content (binary floating decimal point data) of R0, R1 depending on
the content specified by R10 to R12 when the X000 is turned ON, and storing after the D0.
[Structured ladder] [ST]
X000 DESTRP DESTRP(X000,VAR_01,R10,VAR_02); 2
EN ENO
Instruction List
VAR_01*1 s1 d1 VAR_02 *2
R10 s2
*1. VAR_01 is global label, and R10 is defined.
*2. VAR_02 is global label, and D0 is defined. 3
Instruction
Configuration of
Conversion b15 b8 b7 b0
R10 0 type
D0 20H(space) 20H(space)
R11 7 All digits All digits
Number of D1 2EH(.) 30H(0)
R12 3 digits below
decimal point
0 0 3 3
D2 33H(3) 30H(0)
4
Instructions
Explanation of
How to Read
Space Number of digits D3 00H 33H(3)
R1 R0
below decimal point
0.0327457
Stored automatically.
2) This is a program for converting the content (binary floating decimal point data) of R0, R1 depending on 5
the content specified by R10 to R12 when the X000 is turned ON, and storing after the D10.
Basic Instruction
[Structured ladder] [ST]
X000 DESTRP DESTRP(X000,VAR_01,R10,VAR_02);
EN ENO
VAR_01 *1
R10
s1
s2
d1 VAR_02 *2 6
Instructions
Step Ladder
*1. VAR_01 is global label, and R0 is defined.
*2. VAR_02 is global label, and D10 is defined.
7
R10 1(Index type) Conversion
Instructions
Applied
type
R11 12 All digits All digits
Number of
R12 4 digits below 3 2 7 4 6 E 0 2
decimal point
R1 R0
Space Number of digits
below decimal point b15 b8 7b b0 8
Function
and Pulse Catch
Interrupt Function
0.0327457 D10 20H(space) 20H(space)
D11 2EH(.) 33H(3)
D12 37H(7) 32H(2)
D13 36H(6) 34H(4)
A
D14 2DH(-) 45H(E)
and addresses
between devices
Relationships
D15 32H(2) 30H(0)
D16 0000H
Stored automatically.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
7.12.5 DEVAL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the character string (ASCII code) into binary floating decimal point data.
You can also use the VAL instruction for converting the character string (ASCII code) into BIN data.
→ As for character string, refer to FX Structured Programming Manual (Device & Common).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
→ As for VAL instruction, refer to section 7.20.2.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEVAL
DEVAL 32 bits Continuous EN ENO DEVAL(EN, s, d);
s d
DEVALP
DEVALP 32 bits Pulse EN ENO DEVALP(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head device storing the character string to be converted into binary floating
String
point decimal data.
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the converted binary floating point decimal data.
Precision)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z
Function and operation explanation
1. 32-bit operation (EVAL/EVALP)
The character string stored after the device specified by is converted into binary decimal floating point
data, and stored in the device specified by .
Command
input DEVAL
EN ENO
Label 1 *1 s d Label 2 *2
*1. To define the head device storing the character string data
to be converted into binary floating point decimal data.
*2. To define the device for storing the converted binary floating
point decimal data.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
The character string specified can be converted into binary floating point decimal data whether in decimal
Outline
point type or in specified type.
b15 b8 b7 b0
s ASCII code of first character ASCII code of the sign
s +1 ASCII code of third character ASCII code of second character
d +1 d
2
Instruction List
s +2 ASCII code of fifth character ASCII code of fourth character
s +3 ASCII code of seventh character ASCII code of sixth character Binary floating decimal
point (real number)
s +4 00H
Showing the end of character string.
3
Instruction
Configuration of
a) In the case of decimal point type
b15 b8 b7 b0
s 31H(1) 2DH(-)
s +1 30H(0) 2EH(.)
d +1
-1.07812
d
4
Instructions
Explanation of
How to Read
s +2 38H(8) 37H(7)
s +3 32H(2) 31H(1) Binary floating decimal
point (real number)
s +4 00H
1 0 7 8 1 2 5
b) In the case of exponential type
Basic Instruction
b15 b8 b7 b0
s 20H(space) 2DH(-)
s +1 2EH(.) 31H(1)
s +2 32H(2) 33H(3)
d +1 d 6
Instructions
Step Ladder
-1.3201E+10
s +3 31H(1) 30H(0)
s +4 2BH(+) 45H(E) Binary floating decimal
point (real number)
s +5 30H(0) 31H(1)
s +6 00H 7
Instructions
Applied
1 3 2 0 1 E + 1 0
• When the character string to be converted into the binary floating decimal point specified by is more
than 7 digits excluding the sign, decimal point, and the exponential part, the data after the seventh digit is
cut off.
a) In the case of decimal point type
8
Function
and Pulse Catch
Interrupt Function
b15 b8 b7 b0
s 20H(space) 2DH(-)
s +1 31H(1) 20H(space)
s +2 33H(3) 2EH(.) d +1 d A
and addresses
between devices
Relationships
s +3 31H(1) 30H(0) -1.30156
s +4 36H(6) 35H(5) Matched exactly up to the sixth digit.
s +5 31H(1) 38H(8)
Binary floating decimal point (real number)
s +6 00H 32H(2)
1 3 0 1 5 6 8 1 2
To be cut off.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
b) In the case of exponential type
b15 b8 b7 b0
s 20H(space) 2DH(-)
s +1 2EH(.) 31H(1)
s +2 35H(5) 33H(3)
d +1 d
s +3 33H(3) 30H(0)
-1.35034E-2
s +4 31H(1) 34H(4)
s +5 45H(E) 32H(2) Binary floating decimal
point (real number)
s +6 30H(0) 2DH(-)
00H 32H(2)
1 3 5 0 3 4 1 2 E 0 2
To be cut off.
• To be converted as positive value when "2BH" (+) is specified by the sign or the sign is omitted in the
decimal point type. To be converted as negative value when "2DH" (-) is specified by the sign.
• To be converted as positive value when "2BH" (+) is specified in the exponential part sign or the sign is
omitted in the exponential type. To be converted as negative value when "2DH" (-) is specified in the
exponential part sign.
• When "20H" (space) or "30H" (0) is present among the numeric values except for the first "0" in the
character string specified by , "20H" or "30H" is ignored in the converting operation.
b15 b8 b7 b0
s 20H(space) 2DH(-)
s +1 31H(1) 30H(0) d +1 d
s +2 32H(2) 2EH(.) -1.231
s +3 31H(1) 33H(3)
Binary floating decimal
s +4 00H point (real number)
0 1 2 3 1
To be ignored.
• When "30H" (0) is present between "E" and the numeric value in the character string in the exponential
type, "30H" is ignored in the converting operation.
b15 b8 b7 b0
20H(space) 2DH(-)
2EH(.) 31H(1)
34H(4) 30H(0) d +1 d
33H(3) 35H(5) -1.0453E+3
2BH(+) 45H(E)
33H(3) 30H(0)
00H
1 0 4 5 3 E + 0 3
To be ignored.
• The character string can be set in a maximum of 24 characters.
In the character string, "20H" (space) or "30H" (0) is counted as one character.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Caution
Outline
When handling character string data or 32-bit data in structured program, you cannot specify 16-bit device
directly unlike the simple project. When handling character string data or 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2
Related devices
Instruction List
→ As for the manner of using the zero, borrow, or carry flag, refer to the FX Structured Programming
Manual (Device & Common).
Content
Device Name
Condition
The conversion result is really
Operation
3
Instruction
Configuration of
M8020 Zero zero Zero flag (M8020) is ON.
(when the mantissa part is "0")
Absolute value of conversion The value of is the smallest value (2-126) of 32-bit real number,
M8021 Borrow
result < 2-126 and borrow flag (M8021) is ON.
Absolute value of conversion The value of is the largest value (2128) of 32-bit real number,
M8022 Carry
result ≥ 2128 and carry flag (M8022) is ON. 4
Instructions
Explanation of
How to Read
Related instructions
Instruction Content
ESTR This instruction converts the binary floating decimal point data into character string (ASCII code).
STR
VAL
This instruction converts BIN data into character string (ASCII code).
This instruction converts the character string (ASCII code) data into BIN data.
5
Basic Instruction
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When other characters than "30H" (0) to "39H" (9) are present in the integer part or the decimal part. 6
(Error code : K6706)
Instructions
Step Ladder
• When two or more "2EH" (.) are present in the character string specified by . (Error code : K6706)
• When other characters than "45H" (E), "2BH" (+), or "2DH" (-) are present in the exponential part, or when
there are plural exponential parts. (Error code : K6706)
• When "00H" is not present in the corresponding device range from . (Error code : K6706) 7
Instructions
Applied
• When the number of characters after is 0 or exceeds 24 characters. (Error code : K6706)
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
465
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Program example
1) This is a program for converting the character string stored after R0 when the X000 is turned ON, into
binary floating decimal point, and storing in D0, D1.
[Structured ladder] [ST]
X000 DEVALP DEVAR(X000,VAR_01,VAR_02);
EN ENO
VAR_01 *1 s d VAR_02 *2
*1. VAR_01 is global label, and R0 is defined.
*2. VAR_02 is global label, and D0 is defined.
b15 b8 b7 b0
R0 20H(space) 2DH(-)
R1 31H(1) 30H(0)
R2 32H(2) 2EH(.) D1 D0
-1.23452
R3 34H(4) 33H(3)
R4 32H(2) 35H(5)
R5 00H 31H(1)
0 1 2 3 4 5 2 1
To be ignored. To be cut off.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
2) This is a program for converting the character string stored after D10 when the X000 is turned ON, into
Outline
binary floating decimal point, and storing in D100, D101.
[Structured ladder] [ST]
X000 DEVALP DEVALP(X000,VAR_01,VAR_02);
VAR_01 *1
EN
s
ENO
d VAR_02 *2
2
Instruction List
*1. VAR_01 is global label, and D10 is defined.
*2. VAR_02 is global label, and D100 is defined.
b15 b8 b7 b0
D10 20H(space) 20H(space)
3
D11 2EH(.) 31H(1)
Instruction
Configuration of
D12 33H(3) 32H(2)
D101 D100
D13 35H(5) 34H(4) 1.2345E-2
D14 2DH(-) 45H(E)
D15 32H(2) 30H(0) 4
Instructions
Explanation of
How to Read
D16 00H
1 2 3 4 5 E 0 2
To be ignored. To be ignored.
5
Operation in overflow, underflow, zero mode
Basic Instruction
Condition Operation
Absolute value of conversion result The value of is the smallest value (2-126) of 32-bit real number, and borrow flag (M8021) is
< 2-126 ON.
Absolute value of conversion result
≥ 2128
The value of is the largest value (2128) of 32-bit real number, and carry flag (M8022) is ON.
6
The conversion result is really zero
Instructions
Step Ladder
Zero flag (M8020) is ON.
(when the mantissa part is "0")
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
467
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
7.12.6 DEBCD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the binary floating decimal point in the device into decimal floating decimal point.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEBCD
DEBCD 32 bits Continuous EN ENO DEBCD(EN, s, d);
s d
DEBCDP
DEBCDP 32 bits Pulse EN ENO DEBCDP(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable FLOAT(Single
Device for storing binary floating decimal point data.
Precision)
Output ENO Execution state Bit
variable Device for storing the converted decimal floating decimal point data. ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S1 z
z S1 S1 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Function and operation explanation
Outline
1. 32-bit operation (DEBCD, DEBCDP)
The binary floating decimal point of the device specified by is converted into decimal floating decimal
point, and is transferred to the device specified by .
Command
DEBCD
2
input
Instruction List
EN ENO [ s +1, s ] → [ d +1, d ]
Label 1 *1 s d Label 2 *2 Binary floating Decimal floating
decimal point decimal point
*1. To define the device for storing the binary
floating decimal point data.
*2. To define the device for storing the converted
decimal floating decimal point data.
3
Instruction
Configuration of
Higher position Lower position
Before b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution Exponential part (8 bits) Mantissa part (23 bits)
Sign (1 bit)
s +1 s 4
Instructions
Explanation of
How to Read
After execution
Higher position Lower position
After b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution Exponential part Mantissa part
d +1 d
5
Basic Instruction
d +1
d
×10
Cautions 6
Instructions
Step Ladder
1) In the floating decimal point operation, all operations are executed at the binary floating decimal point.
However, since the binary floating decimal point is a difficult numeric value (exclusive monitor method),
by converting it into decimal floating decimal point, it is easier for monitoring by peripheral devices or the
like.
Meanwhile, GX Works 2 or GOT is provided with a function for monitoring or displaying the binary floating
decimal point directly. 7
Instructions
Applied
2) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly. When specifying the
device, use the global label.
3) Applicable devices are limited.
S: FX3U, FX3UC PLCs only are applicable. 8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
469
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
7.12.7 DEBIN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the decimal floating decimal point in the device into binary floating decimal point.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEBIN
DEBIN 32 bits Continuous EN ENO DEBIN(EN, s, d);
s d
DEBINP
DEBINP 32 bits Pulse EN ENO DEBINP(EN, s, d);
s d
2. Set data
Variable Description Data type
Input ENO Execution condition Bit
variable Device for storing decimal floating decimal point data. ANY32
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the converted binary floating decimal point data.
Precision)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S1 z
z S1 S1 z
S: Refer to "Cautions".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Function and operation explanation
Outline
1. 32-bit operation (DEBIN, DEBINP)
The decimal floating decimal point of the device specified by is converted into binary floating decimal
point, and is transferred to the device specified by .
Command
2
Instruction List
input DEBIN
EN ENO [ s +1, s ] → [ d +1, d ]
Label 1*1 s d Label 2*2 Decimal floating Binary floating
decimal point decimal point
*1. To define the device for storing
the decimal floating decimal point data.
*2. To define the device for storing 3
the converted binary floating decimal point data.
Instruction
Configuration of
Higher position Lower position
Before b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution Exponential part Mantissa part
s +1 s
4
Instructions
Explanation of
How to Read
s +1
s
×10
After execution
5
Basic Instruction
Higher position Lower position
After b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
execution Exponential part (8 bits) Mantissa part (23 bits)
Sign (1 bit)
d +1 d 6
Instructions
Step Ladder
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
7
Instructions
Applied
2) Applicable devices are limited.
S: FX3U, FX3UC PLCs only are applicable.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Program example
By using the DEBIN instruction, the numeric value including the decimal point can be directly converted into
the binary floating decimal point.
Example: Binary floating decimal point conversion of 3.14
3.14=314×10-2 (Decimal floating decimal point)
[Structured ladder]
X002 MOVP
EN ENO K314 → D0
K314 s d D0
314×10 -2
MOVP
EN ENO K-2 → D1 [D0] [D1]
K-2 s d D1
DEBIN
(D1,D0)→(D11,D10)
EN ENO
VAR_01 *1 s d VAR_02*2 314×10-2 Binary floating decimal point
*1. VAR_01 is global label, and D0 is defined.
*2. VAR_02 is global label, and D10 is defined.
[ST]
MOVP(X002,K314,D0);
MOVP(X002,K-2,D1);
DEBIN(Y002,VAR_01,VAR_02);
→ As for program example of floating decimal point operation, refer to section 7.5.10.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.8 DEADD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction adds two binary floating decimal points.
→ As for program example of floating decimal point operation, refer to section 7.5.10.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
→ As for the operation of the flag, refer to the FX Structured Programming Manual (Device &
Common). 3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEADD 4
EN ENO
DEADD 32 bits Continuous DEADD(EN, s1, s2, d);
Instructions
Explanation of
How to Read
s1 d
s2
DEADDP
DEADDP 32 bits Pulse
EN
s1
ENO
d
DEADDP(EN, s1, s2, d); 5
Basic Instruction
s2
2. Set data
Variable Description Data type
EN Execution condition Bit 6
FLOAT(Single
Instructions
Step Ladder
Input Device for storing binary floating decimal point data to be added.
Precision)
variable
FLOAT(Single
Device for storing binary floating decimal point data to be added.
Precision)
ENO Execution state Bit
Output
variable Device for storing the added binary floating decimal point data.
FLOAT(Single
Precision) 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
Function
and Pulse Catch
Interrupt Function
z S1 S2 z z z S1
z S1 S2 z z z S1
z S1 S2 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
473
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DEADD, DEADDP)
The binary floating decimal point data in the device specified by and in the device specified by are
added, and the result is transferred to the device specified by in binary floating decimal point.
Command input DEADD
EN ENO [ s1 +1, s1 ] + [ s2 +1, s2 ] → [ d +1, d ]
Label 1*1 s1 d Label 3*3 Binary floating Binary floating Binary floating
Label 2*2 s2 decimal point decimal point decimal point
*1.To define the device for storing binary floating decimal point data to be added.
*2.To define the device for storing binary floating decimal point data to be added.
*3.To define the device for storing the added binary floating decimal point data.
When constants (K, H) are specified in the device specified by or in the device specified by , the
values are automatically converted and handled as binary floating decimal point.
Command input DEADD
EN ENO [ s1 +1, s1 ] + [ K2346 ] → [ d +1, d ]
Label 1*1 s1 d Label 3 *3 Binary floating Automatic conversion Binary floating
Label 2*2 s2 decimal point into binary floating decimal point
decimal point
*1. To define the device for storing binary floating decimal point data to be added.
*2. To define the device for storing binary floating decimal point data to be added.
*3. To define the device for storing the added binary floating decimal point data.
Cautions
1) When the same devices are specified, the same device numbers can be specified in and and
. In this case, when the continuous execution type instruction (DEADD) is used, it must be noted that
the addition result changes in every operation cycle.
2) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
3) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
4) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
474
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.9 DESUB
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction subtracts two binary floating decimal points.
→ As for program example of floating decimal point operation, refer to section 7.5.10.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
→ As for the operation of the flag, refer to the FX Structured Programming Manual (Device &
Common). 3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
EN
DESUB
ENO
4
DESUB 32 bits Continuous DESUB(EN, s1, s2, d);
Instructions
Explanation of
How to Read
s1 d
s2
DESUBP
EN ENO
DESUBP 32 bits Pulse
s1 d
DESUBP(EN, s1, s2, d);
5
s2
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
FLOAT(Single
6
Input Device for storing binary floating decimal point data to be subtracted.
Instructions
Step Ladder
Precision)
variable
FLOAT(Single
Device for storing binary floating decimal point data to be subtracted.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the subtracted binary floating decimal point data.
Precision) 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
z S1 S2 z z z S1
Function
and Pulse Catch
Interrupt Function
z S1 S2 z z z S1
z S1 S2 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
475
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DESUB, DESUBP)
The binary floating decimal point data in the device specified by are subtracted from the device specified
by , and the result is transferred to the device specified by in binary floating decimal point.
Command input DESUB
EN ENO [ s1 +1, s1 ] - [ s2 +1, s2 ] → [ d +1, d ]
Label 1*1 s1 d Label 3*3 Binary floating Binary floating Binary floating
Label 2*2 s2 decimal point decimal point decimal point
*1. To define the device for storing binary floating decimal point data to be subtracted.
*2. To define the device for storing binary floating decimal point data to be subtracted.
*3. To define the device for storing the subtracted binary floating decimal point data.
When constants (K, H) are specified in the device specified by or in the device specified by , the
values are automatically converted and handled as binary floating decimal point.
Command input DESUB
EN ENO [ s1 +1, s1 ] - [ K2346 ] → [ d +1, d ]
Label 1*1 s1 d Label 3*3 Binary floating Automatic conversion Binary floating
Label 2*2 s2 decimal point into binary floating decimal point
decimal point
*1. To define the device for storing binary floating decimal point data to be subtracted.
*2. To define the device for storing binary floating decimal point data to be subtracted.
*3. To define the device for storing the subtracted binary floating decimal point data.
Cautions
1) When the same devices are specified, the same device numbers can be specified in and and
. In this case, when the continuous execution type instruction (DESUB) is used, it must be noted that
the subtraction result changes in every operation cycle.
2) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
3) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
4) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
476
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.10 DEMUL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction multiplies two binary floating decimal points.
→ As for program example of floating decimal point operation, refer to section 7.5.10.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DEMUL
EN ENO
DEMUL 32 bits Continuous DEMUL(EN, s1, s2, d);
s1
s2
d
4
Instructions
Explanation of
How to Read
DEMULP
EN ENO
DEMULP 32 bits Pulse DEMULP(EN, s1, s2, d);
s1 d
s2
5
2. Set data
Basic Instruction
Variable Description Data type
EN Execution condition Bit
FLOAT(Single
Input Device for storing binary floating decimal point data to be multiplied.
Precision)
variable
Device for storing binary floating decimal point data to be multiplied.
FLOAT(Single 6
Precision)
Instructions
Step Ladder
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the multiplied binary floating decimal point data.
Precision)
3. Applicable devices
Bit Devices Word Devices Others
7
Instructions
Applied
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 z z z S1
z S1 S2 z z z S1 8
Function
and Pulse Catch
Interrupt Function
z S1 S2 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
477
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DEMUL, DEMULP)
The binary floating decimal point data in the device specified by and in the device specified by are
multiplied, and the result is transferred to the device specified by in binary floating decimal point.
Command
input DEMUL
EN ENO [ s1 +1, s1 ] × [ s2 +1, s2 ] → [ d +1, d ]
Label 1*1 s1 d Label 3 *3 Binary floating Binary floating Binary floating
Label 2*2 s2 decimal point decimal point decimal point
*1. To define the device for storing binary floating decimal point data to be multiplied.
*2. To define the device for storing binary floating decimal point data to be multiplied.
*3. To define the device for storing the multiplied binary floating decimal point data.
When constants (K, H) are specified in the device specified by or in the device specified by , the
values are automatically converted and handled as binary floating decimal point.
Command
input DEMUL
EN ENO [ s1 +1, s1 ] × [ K100 ] [ d +1, d ]
Label 1*1 s1 d Label 3*3 Binary floating Automatic conversion Binary floating
Label 2*2 s2 decimal point into binary floating decimal point
decimal point
*1. To define the device for storing binary floating decimal point data to be multiplied.
*2. To define the device for storing binary floating decimal point data to be multiplied.
*3. To define the device for storing the multiplied binary floating decimal point data.
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
3) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
478
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.11 DEDIV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction divides two binary floating decimal points.
→ As for program example of floating decimal point operation, refer to section 7.5.10.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
→ As for the operation of the flag, refer to the FX Structured Programming Manual (Device &
Common). 3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
EN
DEDIV
ENO
4
DEDIV 32 bits Continuous DEDIV(EN, s1, s2, d);
Instructions
Explanation of
How to Read
s1 d
s2
DEDIVP
EN ENO
DEDIV 32 bits Pulse
s1 d
DEDIVP(EN, s1, s2, d);
5
s2
Basic Instruction
2. Set data
Variable Description Data type
6
EN Execution condition Bit
FLOAT(Single
Input Device for storing binary floating decimal point data to be divided.
Instructions
Step Ladder
Precision)
variable
FLOAT(Single
Device for storing binary floating decimal point data to be divided.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the divided binary floating decimal point data.
Precision)
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
z S1 S2 z z z S1
Function
and Pulse Catch
Interrupt Function
z S1 S2 z z z S1
z S1 S2 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
479
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DEDIV, DEDIVP)
The binary floating decimal point data in the device specified by and in the device specified by are
divided, and the result is transferred to the device specified by in binary floating decimal point.
Command
input DEDIV Dividend Divisor
EN ENO
[ s1 +1, s1 ] ÷ [ s2 +1, s2 ] → [ d +1, d ]
Label 1*1 s1 d Label 3*3
Binary floating Binary floating Binary floating
Label 2*2 s2
decimal point decimal point decimal point
*1. To define the device for storing binary floating decimal point data to be divided.
*2. To define the device for storing binary floating decimal point data to be divided.
*3. To define the device for storing the divided binary floating decimal point data.
When constants (K, H) are specified in the device specified by or in the device specified by , the
values are automatically converted and handled as binary floating decimal point.
Command
input DEDIV Dividend Divisor
EN ENO [ s1 +1, s1 ] ÷ [ K100 ] → [ d +1, d ]
Label 1*1 s1 d Label 3*3 Binary floating Automatic conversion Binary floating
Label 2*2 s2 decimal point into binary floating decimal point
decimal point
*1. To define the device for storing binary floating decimal point data to be divided.
*2. To define the device for storing binary floating decimal point data to be divided.
*3. To define the device for storing the divided binary floating decimal point data.
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
3) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
480
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.12 DEXP
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes exponential operation whose base is "e (2.71828)".
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DEXP
DEXP 32 bits Continuous EN ENO DEXP(EN, s, d);
s d
4
DEXPP
Instructions
Explanation of
How to Read
DEXPP 32 bits Pulse EN ENO DEXPP(EN, s, d);
s d
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
variable Head device for storing binary floating decimal point data for exponential FLOAT(Single
operation. Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision)
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
7
z z z z z
Instructions
Applied
z z z z
Function and operation explanation
1. 32-bit operation (DEXP/DEXPP) 8
By exponential operation of the device specified by , the operation result is stored in the device specified
Function
and Pulse Catch
Interrupt Function
by . Real number can be directly specified in the device specified by .
Command
input DEXP *1. To define the head device for storing the binary floating decimal
EN ENO point data for exponential operation.
Label 1*1 s d Label 2*2 *2. To define the head device for storing the operation result. A
• In exponential operation, the bottom (e) is supposed to be 2.71828.
and addresses
between devices
Relationships
s +1 s d +1 d
e Binary floating decimal point
(real number)
Binary floating decimal point
(real number)
481
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When the operation result is out of the following range. (Error code: K6706)
2-126 ≤ | Operation result | < 2128
Program example
This is a program for executing exponential operation of the values set in BCD two digits in X020 to X027
when the X000 is turned ON, and storing in binary floating decimal points D0, D1.
[Structured ladder]
X000 BIN
Input of data for
EN ENO
exponential operation (1))
K2X20 s d D20
LD>
EN ENO M0 Checking of range of operation values
(see the following check point 1).
D20 s1
K88 s2
M0 FLT
Input data is converted into binary
EN ENO
floating decimal point (real number).(2))
D20 s d VAR_01*1
DEXP
EN ENO Exponential operation(3))
VAR_02*2 s d VAR_03*3
*1. VAR_01 is global label, and D10 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D0 is defined.
[ST]
BIN(X060,K2X20,D20);
M0:=LD>(TRUE,D20,K88);
FLT(NOT M0,D20,VAR_01);
DEXP(NOT M0,VAR_02,VAR_03);
Operation when 13 is specified in X020 to X027.
2) Conversion of binary
1) BIN D20 floating decimal point
X027 X020 conversion b15 b0 (real number) D11 D10 3) EXP conversion D1 D0
1 3 13 13 442413.4
BCD value BIN BIN value FLT Value of binary floating EXP Value of binary floating
decimal point (real number) decimal point (real number)
Points
1) The operation result is less than 2128 only when the BCD value of X020 to X027 is smaller than 88,
because log e 2128 = 88.7. When a value greater than 89 is specified, it is an operation error, and
therefore when a value greater than 89 is specified, M0 is turned ON, so that the operation is not carried
out.
2) Conversion from natural logarithm into common logarithm
The CPU operates in natural logarithm.
To determine value in common logarithm, please specify the value of common logarithm divided by
0.4342945 in +1, .
X
0.4342945
X
10 =e
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
482
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.13 DLOGE
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes natural logarithm operation.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
DLOGE
Instruction
Configuration of
DLOGE 32 bits Continuous EN ENO DLOGE(EN, s, d);
s d
DLOGEP
DLOGEP 32 bits Pulse EN
s
ENO
d
DLOGEP(EN, s, d);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head device for storing the binary floating decimal point data for natural FLOAT(Single 5
logarithm operation. Precision)
Basic Instruction
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision)
3. Applicable devices
Bit Devices Word Devices Others
6
Instructions
Step Ladder
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z 7
Instructions
Applied
Function and operation explanation
1. 32-bit operation (DLOGE/DLOGEP)
By natural logarithm operation of the device specified by (logarithm supposing e (2.71828) to be the
bottom), the operation result is stored in the device specified by . Real number can be directly specified 8
Function
and Pulse Catch
Interrupt Function
in the device specified by .
Command s +1 s d +1 d
input DLOGE
EN ENO loge
Label 1*1 s d Label 2*2
Binary floating decimal
point (real number)
Binary floating decimal
point (real number) A
and addresses
between devices
Relationships
*1. To define the head device for storing the binary floating
decimal point data for natural logarithm operation.
*2. To define the head device for storing the operation result.
• The value to be specified by can be set in positive number only. (Negative number cannot be
operated.)
483
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When the value specified by is negative. (Error code: K6706)
• When the value specified by is 0. (Error code: K6706)
Program example
This is a program for determining the natural logarithm of "10" set in D50 when the X000 is turned ON, and
storing in D30, D31.
[Structured ladder]
X000 MOV
EN ENO Setting of data for natural logarithm operation.(1))
K10 s d D50
FLT
Conversion of operation data into binary floating
EN ENO
decimal point (real number).(2))
D50 s d VAR_01*1
DLOGE
EN ENO Operation of natural logarithm.(3))
VAR_02*2 s d VAR_03*3
*1. VAR_01 is global label, and D40 is defined.
*2. VAR_02 is global label, and D40 is defined.
*3. VAR_03 is global label, and D30 is defined.
[ST]
MOV(X000,K10,D50);
FLT:=(X000,D50,VAR_01);
DLOGE(X000,VAR_02,VAR_03);
2) Conversion of binary
D50 floating decimal point 3) LOG
1) b15 b0 (real number) D41 D40 operation D31 D30
10 10 10 2.302585
MOV BIN value FLT Value of binary floating LOGE Value of binary floating
decimal point (real number) decimal point (real number)
484
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.14 DLOG10
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes common logarithm operation.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DLOG10
DLOG10 32 bits Continuous EN ENO DLOG10(EN, s ,d);
s d
4
DLOG10P
Instructions
Explanation of
How to Read
DLOG10P 32 bits Pulse EN ENO DLOG10P(EN ,s ,d);
s d
2. Set data
Variable Description Data type 5
Basic Instruction
EN Execution condition Bit
Input
variable Head device for storing the binary floating decimal point data for common FLOAT(Single
logarithm operation. Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision) 6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
7
z z z z z
Instructions
Applied
z z z z
Function and operation explanation
1. 32-bit operation (DLOG10/DLOG10P) 8
Function
and Pulse Catch
Interrupt Function
By common logarithm operation of the device specified by (logarithm supposing 10 to be the bottom),
the operation result is stored in the device specified by .
Real number can be directly specified in the device specified by .
Command s +1 s d +1 d
input
EN
DLOG10
ENO log10 A
and addresses
between devices
Relationships
Label 1 *1 s d Label 2 *2
Binary floating decimal Binary floating decimal
point (real number) point (real number))
*1. To define the head device for storing the binary floating
decimal point data for common logarithm operation.
*2. To define the head device for storing the operation result.
• The value to be specified by can be set in positive number only. (Negative number cannot be
operated.)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When the value specified by is negative. (Error code: K6706)
• When the value specified by is 0. (Error code: K6706)
Program example
This is a program for determining the common logarithm of "15" set in D50 when the X000 is ON, and storing
in D30, D31.
[Structured ladder]
X000 MOV
EN ENO Setting of data for common logarithm operation. (1))
K15 s d D50
FLT
Conversion of operation data into binary
EN ENO
floating decimal point (real number). (2))
D50 s d VAR_01*1
DLOGIO
EN ENO Operation of common logarithm (3))
VAR_02*2 s d VAR_03*3
*1. VAR_01 is global label, and D40 is defined.
*2. VAR_02 is global label, and D40 is defined.
*3. VAR_03 is global label, and D30 is defined.
[ST]
MOV(X000,K15,D50);
FLT:=(X000,D50,VAR_01);
DLOGIO(X000,VAR_02,VAR_03);
2) Conversion of binary
D50 floating decimal point 3) LOG
1) b15 b0 (real number) D41 D40 operation D31 D30
10 15 15 1.176091
MOV BIN value FLT Value of binary floating DLOG10 Value of binary floating
decimal point (real number) decimal point (real number)
486
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.15 DESQR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes the square root operation of binary floating decimal point.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DESQR
DESQR 32 bits Continuous EN ENO DESQR(EN, s, d);
s d
DESQRP
4
Instructions
Explanation of
How to Read
DESQRP 32 bits Pulse EN ENO DESQRP(EN, s, d);
s d
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
variable Device for storing binary floating decimal point data for square root FLOAT(Single
operation Precision)
ENO Execution state Bit
Output
variable Device for storing binary floating decimal point data after square root FLOAT(Single
operation Precision)
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D U
\G
V Z Modifier K H "
"
z S1
R
S2 z z z
E
S1
P
7
Instructions
Applied
z S1 S2 z
S: Refer to "Cautions".
Function and operation explanation
8
1. 32-bit operation (DESQR, DESQRP)
Function
and Pulse Catch
Interrupt Function
The data in the device specified by is operated by square root (binary floating decimal point), and the
result is transferred to the device specified by .
Command
DESQR
A
input
EN ENO [ s +1, s ] → [ d +1, d ]
Label 1*1 s d Label 2*2 Binary floating Binary floating
and addresses
between devices
Relationships
decimal point decimal point
*1. To define the device for storing binary floating
decimal point data for square root operation
*2. To define the device for storing binary floating
decimal point data after operation of square root
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Related devices
→ As for the manner of using the zero flag, refer to the FX Structured Programming Manual (Device &
Common).
Device Name Content
M8020 Zero To be turned ON when the operation result is true 0.
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
3) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
Error
The content of the device specified by is valid only in positive number, and negative number leads to
operation error (M8067), and the instruction is not executed.
488
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.16 DENEG
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction inverts the sign of binary floating decimal point (real number) data.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DENEG
DENEG 32 bits Continuous EN ENO DENEG(EN, d);
d
DENEGP
4
Instructions
Explanation of
How to Read
DENEGP 32 bits Pulse EN ENO DENEGP(EN, d);
d
2. Set data
Variable Description Data type 5
Input
Basic Instruction
EN Execution condition Bit
variable
ENO Execution state Bit
Output
variable Head device for storing the binary floating decimal point data of which sign FLOAT(Single
is to be inverted. Precision)
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z
7
Instructions
Applied
Function and operation explanation
1. 32-bit operation (DENEG/DENEGP)
The sign of the binary floating decimal point data of the device specified by is inverted, and stored in the
device specified by .
8
Command
Function
and Pulse Catch
Interrupt Function
input DENEG
EN ENO
d Label 1*1
*1. To define the head device for storing the binary floating
decimal point data of which sign is to be inverted.
A
and addresses
between devices
Relationships
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Program example
This is a program for inverting the sign of the binary floating decimal point data of D100, D101 when the X000
is turned ON, and storing in D100, D101.
[Structured ladder]
X000 DENEGP
D101 D100 D101 D100
EN ENO
d
1.2345 -1.2345
VAR_01*1
*1. VAR_01 is global label, and D100 is defined.
[ST]
DENEGP(X000,VAR_01);
490
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.17 INT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts the binary floating decimal point into BIN integer in normal data type in the PLC.
(From binary floating decimal point data to BIN integer)
→ As for program example of floating decimal point operation, refer to section 7.5.10.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
INT
INT 16 bits Continuous EN
s
ENO
d
INT(EN, s, d);
4
Instructions
Explanation of
How to Read
INTP
INTP 16 bits Pulse EN ENO INTP(EN, s, d);
s d
DINT 32 bits Continuous EN
DINT
ENO DINT(EN, s, d);
5
Basic Instruction
s d
DINTP
DINTP 32 bits Pulse EN ENO DINTP(EN, s, d);
s d
6
2. Set data
Instructions
Step Ladder
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable Device for storing the binary floating decimal point data to be converted
FLOAT(Single Precision)
7
into BIN integer.
Instructions
Applied
Output ENO Execution state Bit
variable Device for storing the converted BIN integer. ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others 8
Function
and Pulse Catch
Interrupt Function
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z S1 S2 z
z S1 S2 z
A
S: Refer to "Cautions".
and addresses
between devices
Relationships
491
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 16-bit operation (INT, INTP)
The binary floating decimal point of the device specified by is converted into BIN integer, and is
transferred to the device specified by .
Command
input INT
EN ENO s +1, s → d
Label 1*1 s d The device for storing Binary floating To discard below the decimal
the converted data. decimal point point of 16-bit BIN integer.
*1. To define the device for storing the data
to be converted into BIN integer.
Instruction of reverse converting operation
Reverse converting operation of the operation of this instruction is FLT.
→ As for FLT instruction, refer to 7.5.10.
2. 32-bit operation (DINT, DINTP)
The binary floating decimal point of the device specified by is converted into BIN integer, and is
transferred to the device specified by .
Command
DINT
input
EN ENO s +1, s → d +1, d
Label 1*1 s d Label 2*2 Binary floating To discard below the decimal
decimal point point of 32-bit BIN integer.
*1. To define the device for storing the data to be converted into BIN integer.
*2. To define the device for storing the converted data.
Instruction of reverse converting operation
Reverse converting operation of the operation of this instruction is DFLT(FNC49) instruction.
→ As for FLT instruction, refer to 7.5.10.
Related devices
→ As for the manner of using the zero, borrow, and carry flag, refer to the FX Structured Programming
Manual (Device & Common).
Device Name Content
M8020 Zero To be turned ON when the operation result is 0.
M8021 Borrow To be turned ON when less than 1 is discarded in convertion.
To be turned ON when the operation result overflows by exceeding the range of -32, 768 to 32,
M8022 Carry 767 (in 16-bit operation), or -2, 147, 483, 648 to 2, 147, 483, 647 (in 32-bit operation).
(Operation result is not reflected.)
Cautions
1) Fractions below the decimal point are discarded in operation.
2) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
3) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
4) Applicable devices are limited.
S1: FX3U, FX3UC and FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
492
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.18 DSIN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction determines the SIN value of angle (RAD).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DSIN
DSIN 32 bits Continuous EN ENO DSIN(EN, s, d);
s d
DSINP 32 bits Pulse
DSINP
DSINP(EN, s, d);
4
EN ENO
Instructions
Explanation of
How to Read
s d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit 5
FLOAT(Single
Basic Instruction
variable Device for storing the RAD (angle) of binary floating decimal point.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the SIN value of binary floating decimal point.
Precision)
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 z
z S1
S1
S1 z
S1
7
Instructions
Applied
S: Refer to "Cautions".
Function and operation explanation
1. 32-bit operation (DINT, DINTP) 8
The value of angle (binary floating decimal point) specified by is converted into SIN value, and is
Function
and Pulse Catch
Interrupt Function
transferred to the device specified by .
Command
DSIN
input [ s +1, s ]RAD → [ d +1, d ]SIN
EN ENO
Binary floating decimal Binary floating decimal
A
Label 1*1 s d Label 2*2
point value point value
and addresses
between devices
Relationships
RAD value (angle × π/180)
s s +1 s Binary floating decimal point value is specified.
d d +1 d SIN value
Binary floating decimal point value
*1. To define the device for storing RAD (angle).
*2. To define the device for storing SIN value.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) Applicable devices are limited.
S: FX3U, FX3UC PLCs only are applicable.
Program example
[Structured ladder]
X001 MOVP
EN ENO (K45)→(D0)
K45 s d D0 Angle is selected by
X001, X002 input.
X002 MOVP
EN ENO (K90)→(D0)
K90 s d D0
M8000 FLTP
EN ENO (D0)→(D5, D4) Binary floating decimal point value
RUN D0 s d VAR_01 *1
DEDIV
EN ENO (π/180)→(D21, D20)
VAR_02 *2 s1 d VAR_04 *4 Binary floating decimal point value
VAR_03 *3 s2
DEMUL
DEDIV
(D5, D4) angle × (π/180)
EN ENO
*5 *7
→(D31, D30)RAD
VAR_05 s1 d VAR_07 Binary floating decimal point value
VAR_06 *6 s2
DSIN
(D31, D30) RAD→(D101, D100) SIN
EN ENO
Binary floating decimal point value
VAR_08 *8 s d VAR_09 *9
*1. VAR_01 is global label, and D4 is defined.
*2. VAR_02 is global label, and K31415926 is defined.
*3. VAR_03 is global label, and K1800000000 is defined.
*4. VAR_04 is global label, and D20 is defined.
*5. VAR_05 is global label, and D4 is defined.
*6. VAR_06 is global label, and D20 is defined.
*7. VAR_07 is global label, and D30 is defined.
*8. VAR_08 is global label, and D30 is defined.
*9. VAR_09 is global label, and D100 is defined.
[ST]
MOVP(X001,K45,D0);
MOVP(X002,K90,D0);
FLTP(M8000,D0,VAR_01);
DEDIV(M8000,VAR_02,VAR_03,VAR_04);
DEMUL(M8000,VAR_05,VAR_06,VAR_07);
DSIN(M8000,VAR_08,VAR_09);
494
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.19 DCOS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction determines the COS value of angle (RAD).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DCOS
DCOS 32 bits Continuous EN ENO DCOS(EN, s, d);
s d
DCOSP 4
DCOSP 32 bits Pulse EN ENO DCOSP(EN, s, d);
Instructions
Explanation of
How to Read
s d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit 5
FLOAT(Single
Basic Instruction
variable Device for storing the RAD (angle) of binary floating decimal point.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the COS value of binary floating decimal point.
Precision)
3. Applicable devices 6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S1 z S1
7
z S1 S1 z
Instructions
Applied
S: Refer to "Cautions".
Function and operation explanation
1. 32-bit operation (DCOS, DCOSP) 8
Function
and Pulse Catch
Interrupt Function
The value of angle (binary floating decimal point) specified by is converted into COS value, and is
transferred to the device specified by .
Command
DCOS
input [ s +1, s ]RAD → [ d +1, d ]COS
EN ENO
Label 1 *1
s d Label 2 *2 Binary floating
decimal point value
Binary floating
decimal point value A
and addresses
between devices
Relationships
RAD value (angle × π/180)
s s +1 s Binary floating decimal point value is specified.
d d +1 d COS value
Binary floating decimal point value
*1. To define the device for storing RAD (angle).
*2. To define the device for storing the COS value.
495
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) Applicable devices are limited.
S: FX3U, FX3UC PLCs only are applicable.
496
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.20 DTAN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction determines the TAN value of angle (RAD).
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DTAN
DTAN 32 bits Continuous EN ENO DTAN(EN, s, d);
s d
DTANP
4
Instructions
Explanation of
How to Read
DTANP 32 bits Pulse EN ENO DTANP(EN, s, d);
s d
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input
variable FLOAT(Single
Device for storing the RAD (angle) of binary floating decimal point.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Device for storing the TAN value of binary floating decimal point.
Precision)
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S1 z S1 7
Instructions
Applied
z S1 S1 z
S: Refer to "Cautions".
Function and operation explanation
8
1. 32-bit operation (DTAN, DTANP)
Function
and Pulse Catch
Interrupt Function
The value of angle (binary floating decimal point) specified by is converted into TAN value, and is
transferred to the device specified by .
Command
input DTAN
[ s +1, s ]RAD → [ d +1, d ]TAN
Label 1*1
EN
s
ENO
d Label 2*2 Binary floating Binary floating A
decimal point value decimal point value
and addresses
between devices
Relationships
RAD value (angle × π/180)
s s +1 s Binary floating decimal point value is specified.
d d +1 d TAN value
Binary floating decimal point value
*1. To define the device for storing RAD (angle).
*2. To define the device for storing the TAN value.
497
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Cautions
1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the
simple project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
2) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
498
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.21 DASIN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes SIN-1 operation.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
DASIN
DASIN 32 bits Continuous EN ENO DASIN(EN, s, d);
s d
4
DASINP
Instructions
Explanation of
How to Read
DASINP 32 bits Pulse EN ENO DASINP(EN, s, d);
s d
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
variable FLOAT(Single
Head device for storing the SIN value for SIN-1 (reverse sine) operation. Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision)
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
7
Instructions
Applied
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
499
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DASIN/DASINP)
The angle is determined from the SIN value specified by , and the operation result is stored in the device
specified by . In the device specified by , real number can be directly specified.
Command
input DASIN
EN ENO
Label 1*1 s d Label 2*2
s +1 s d +1 d
-1
SIN
Binary floating decimal Binary floating decimal
point (real number) point (real number)
*1. To define the head device for storing
the SIN value for SIN-1 operation.
*2. To define the device for storing the operation result.
• The SIN value specified by can be set in a range of -1.0 to 1.0.
• The angle (operation result) to be stored in the device specified by stores the value of radian (-π/2 to
π/2). As for conversion from radian to angle or vice versa, refer to DRAD instruction or DDEG instruction.
→ As for DRAD instruction, refer to section 7.12.24.
→ As for DDEG instruction, refer to section 7.12.25.
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When the value specified by is out of the range of -1.0 to 1.0. (Error code: K6706)
500
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Program example
Outline
This is a program for determining SIN-1 of D0, D1 (binary floating decimal point) when the X000 is ON, and
sending the angle to Y040 to Y057 in BCD four digits.
[Structured ladder]
X000 DASIN 2
Calculation of angle (radian) by
Instruction List
EN ENO
SIN-1 operation. (1))
VAR_01 *1 s d VAR_02 *2
DDEG
EN ENO Conversion of radian into angle. (2))
VAR_03 *3 s d VAR_04 *4
INT
3
Instruction
Configuration of
EN ENO Conversion of angle of binary floating
VAR_05 *5 s d D30 decimal point (real number) into integer (BIN). (3))
BCD
Output of angle converted to integer (BIN)
EN ENO
to display unit. (4))
D30 s d K4Y40
4
Instructions
Explanation of
How to Read
*1. VAR_01 is global label, and D0 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D10 is defined.
*4. VAR_04 is global label, and D20 is defined.
*5. VAR_05 is global label, and D20 is defined.
5
[ST]
Basic Instruction
DASIN(X000,VAR_01,VAR_02);
DDEG:=(X000,VAR_03,VAR_04);
INT(X000,VAR_05,D30);
6
BCD(X000,D30,K4Y10);
Operation when the value of D0, D1 is 0.5.
Instructions
Step Ladder
1) SIN-1
D1 D0 conversion D11 D10
0.5 0.5235988
Value of binary floating
decimal point (real number)
DASIN Value of binary floating
decimal point (real number) 7
Instructions
Applied
2) Angle conversion
DDEG
3) BIN D30 4) BCD
D21 D20 conversion b15 b0 operation Y057 Y040
30 0 0 3 0
30
Value of binary floating INT BIN value BCD BCD value
8
Function
and Pulse Catch
Interrupt Function
decimal point (real number)
A
and addresses
between devices
Relationships
501
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
7.12.22 DACOS
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes COS-1 operation.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DACOS
DACOS 32 bits Continuous EN ENO DACOS(EN, s, d);
s d
DACOSP
DACOSP 32 bits Pulse EN ENO DACOSP(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head device for storing the COS value for COS-1 (reverse cosine) FLOAT(Single
operation. Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z
502
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Function and operation explanation
Outline
1. 32-bit operation (DACOS/DACOSP)
The angle is calculated from the COS value specified by , and the operation result is stored in the device
specified by . Real number can be directly specified by the device specified by .
Command 2
DACOS
Instruction List
input
EN ENO
Label 1*1 s d Label 2*2
s +1 s d +1 d
3
-1
COS
Instruction
Configuration of
Binary floating decimal Binary floating decimal
point (real number) point (real number)
*1. To define the head device for storing
the COS value for COS-1 operation.
*2. To define the device for storing the operation result.
4
• The COS value specified by can be set in a range of -1.0 to 1.0.
Instructions
Explanation of
How to Read
• The angle (operation result) to be stored in the device specified by stores the value 0 to π in the
radian unit.
As for conversion from radian to angle or vice versa, refer to DRAD instruction or DDEG instruction.
→ As for DRAD instruction, refer to section 7.12.24.
→ As for DDEG instruction, refer to section 7.12.25. 5
Basic Instruction
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label. 6
Instructions
Step Ladder
Error
In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in
D8067.
• When the value specified by is out of the range of -1.0 to 1.0. (Error code: K6706)
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
503
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Program example
This is a program for determining COS-1 of D0, D1 (binary floating decimal point) when the X000 is ON, and
sending the angle to Y040 to Y057 in BCD four digits.
[Structured ladder]
X000 DACOS
EN ENO
Calculation of angle (radian) by
COS-1 operation. (1))
VAR_01 *1 s d VAR_02 *2
DDEG
EN ENO Conversion of radian into angle. (2))
VAR_03 *3 s d VAR_04 *4
INT
EN ENO Conversion of angle of binary floating
VAR_05 *5 s d D30 decimal point (real number) into integer (BIN). (3))
BCD
Output of angle converted to
EN ENO
integer to display unit. (4))
D30 s d K4Y40
*1. VAR_01 is global label, and D0 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D10 is defined.
*4. VAR_04 is global label, and D20 is defined.
*5. VAR_05 is global label, and D20 is defined.
[ST]
DACOS(X000,VAR_01,VAR_02);
DDEG:=(X000,VAR_03,VAR_04);
INT(X000,VAR_05,D30);
BCD(X000,D30,K4Y10);
Operation when the value of D0, D1 is 0.5.
1) COS-1
D1 D0 conversion D11 D10
0.5 1.047198
Value of binary floating DACOS Value of binary floating
decimal point (real number) decimal point (real number)
2) Angle conversion
DDEG
3) BIN D30 4) BCD
D21 D20 conversion b15 b0 operation Y057 Y040
60 60 0 0 6 0
Value of binary floating INT BIN value BCD BCD value
decimal point (real number)
504
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.23 DATAN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction executes TAN-1 operation.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
DATAN
DATAN 32 bits Continuous EN ENO DATAN(EN, s, d);
s d
DATANP
4
Instructions
Explanation of
How to Read
DATANP 32 bits Pulse EN ENO DATANP(EN, s, d);
s d
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input
variable Head device for storing the TAN value for TAN-1 operation (reverse FLOAT(Single
tangent). Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the operation result.
Precision)
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z 7
Instructions
Applied
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
505
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Function and operation explanation
1. 32-bit operation (DATAN/DATANP)
The angle is calculated from the TAN value specified by , and the operation result is stored in the device
specified by . Real number can be directly specified by the device specified by .
Command
input DATAN
EN ENO
Label 1*1 s d Label 2*2
s +1 s d +1 d
-1
TAN
Binary floating decimal Binary floating decimal
point (real number) point (real number)
*1. To define the head device for storing
the TAN value for TAN-1 operation.
*2. To define the device for storing the operation result.
• The angle (operation result) to be stored in the device specified by stores the value larger than (−π/2)
and smaller than (π/2) in the radian unit.
As for conversion from radian to angle or vice versa, refer to DRAD instruction or DDEG instruction.
→ As for DRAD instruction, refer to section 7.12.24.
→ As for DDEG instruction, refer to section 7.12.25.
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
506
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Program example
Outline
This is a program for determining TAN-1 of D0, D1 (binary floating decimal point) when the X000 is ON, and
sending the angle to Y040 to Y057 in BCD four digits.
[Structured ladder]
X000 DATAN 2
Calculation of angle (radian)
Instruction List
EN ENO
by TAN-1 operation. (1))
VAR_01 *1 s d VAR_02 *2
DDEG
EN ENO Conversion of radian into angle. (2))
VAR_03 *3 s d VAR_04 *4
INT
3
Instruction
Configuration of
EN ENO Conversion of angle of binary floating
VAR_05 *5 s d D30 decimal point (real number) into integer (BIN). (3))
BCD
Output of angle converted to integer
EN ENO
(BIN) to display unit. (4))
D30 s d K4Y40
4
Instructions
Explanation of
How to Read
*1. VAR_01 is global label, and D0 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D10 is defined.
*4. VAR_04 is global label, and D20 is defined.
*5. VAR_05 is global label, and D20 is defined.
5
[ST]
Basic Instruction
DATAN(X000,VAR_01,VAR_02);
DDEG:=(X000,VAR_03,VAR_04);
INT(X000,VAR_05,D30);
6
BCD(X000,D30,K4Y10);
Instructions
Step Ladder
Operation when the value of D0, D1 is 1.
1) TAN-1
D1 D0 conversion D11 D10
1 0.785398
Value of binary floating
decimal point (real number)
DATAN Value of binary floating
decimal point (real number) 7
Instructions
Applied
2) Angle conversion
DDEG
D30 4) BCD
3) BIN
D21 D20 conversion b15 b0 operation Y057 Y040
45 45 0 0 4 5
Value of binary floating INT BIN value BCD BCD value 8
Function
and Pulse Catch
Interrupt Function
decimal point (real number)
A
and addresses
between devices
Relationships
507
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
7.12.24 DRAD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the value of angle unit to the radian unit.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DRAD
DRAD 32 bits Continuous EN ENO DRAD(EN, s, d);
s d
DRAD_P
DRADP 32 bits Pulse EN ENO DRAD_P(EN, s, d);
s d
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable FLOAT(Single
Head device for storing the angle to be converted to radian unit.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the value having been converted to radian unit
Precision)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z
508
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
Function and operation explanation
Outline
1. 32-bit operation (DRAD/DRADP)
The angle specified by is converted from the degree unit to the radian unit, and is stored in the device
specified by . Real number can be directly specified in the device specified by .
Command
2
DRAD
Instruction List
input
EN ENO
Label 1 *1 s d Label 2 *2
s +1 s d +1 d
º rad
3
Instruction
Configuration of
Binary floating decimal Binary floating decimal
point (real number) point (real number)
*1. To define the head device for storing
the angle to be converted to the radian unit.
*2. To define the head device for storing
the value having been converted to the radian unit. 4
Instructions
Explanation of
How to Read
• Conversion from degree unit to radian unit is as follows.
π
Radian unit = degree unit ×
180
Caution
5
Basic Instruction
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
509
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Program example
This is a program for converting the angle set in BCD four digits in X020 to X037 when the X000 is ON, and
storing in binary floating decimal point in D20, D21.
[Structured ladder]
X000 BIN
EN ENO Input of angle to be converted to radian value. (1))
K4X20 s d D0
FLT
EN ENO
Conversion of input angle to binary floating
decimal point (negative number).) (2))
D0 s d VAR_01 *1
DRAD
EN ENO Conversion of angle to radian value. (3))
VAR_02 *2 s d VAR_03 *3
*1. VAR_01 is global label, and D10 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D20 is defined.
[ST]
BIN(X000,K4X20,D0);
FLT:=(X000,D0,VAR_01);
DRAD(X000,VAR_02,VAR_03);
Operation when 120 is specified in X020 to X037.
2) Conversion of binary
1) BIN D0 floating decimal point 3) Radian
X037 X020 conversion b15 b0 (real number) D11 D10 conversion D21 D20
0 1 2 0 120 120 2.094395···
BCD value BIN BIN value FLT DRAD
510
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
1
7.12.25 DDEG
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts the radian unit value into the angle (DEG) unit.
→ As for handling of floating decimal point, refer to FX Structured Programming Manual (Device &
Common).
1. Format and operation, execution form
Instruction Execution Expression in each language 3
Operation
Instruction
Configuration of
name form Structured ladder ST
DDEG
DDEG 32 bits Continuous EN ENO DDEG(EN, s, d);
s d
DDEG_P 4
DDEGP 32 bits Pulse EN ENO DDEG_P(EN, s, d);
Instructions
Explanation of
How to Read
s d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit 5
Basic Instruction
variable FLOAT(Single
Head device for storing the radian angle to be converted to degree unit.
Precision)
ENO Execution state Bit
Output
variable FLOAT(Single
Head device for storing the value having been converted to degree unit.
Precision)
3. Applicable devices
6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z 7
z z z z
Instructions
Applied
Function and operation explanation
1. 32-bit operation (DDEG/DDEGP)
(DDEG/DDEGP) 8
The unit of the angle specified by is converted from the radian unit to the degree unit, and is stored in
Function
and Pulse Catch
Interrupt Function
the device specified by .
Command
input DDEG s +1 s d +1 d
EN ENO rad º
Label 1*1 s d Label 2 *2 A
Binary floating decimal Binary floating decimal
and addresses
between devices
Relationships
point (real number) point (real number)
*1. To define the head device for storing the radian angle to be converted to degree unit.
*2. To define the head device for storing the value having been converted to degree unit.
• Conversion from radian unit to degree unit is as follows.
180
Degree unit = radian unit ×
π
511
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.12 Floating Point
Caution
When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple
project. When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
Program example
This is a program for converting the radian value set in binary floating decimal point in D20, D21 to the angle
when the X000 is ON, and issuing to the Y040 to Y057 in BCD value.
[Structured ladder]
X000 DDEG
EN ENO Radial value is converted to angle. (1))
VAR_01 *1 s d VAR_02 *2
INT
EN ENO Angle of binary floating decimal point (real number)
VAR_03 *3 s d D0 is converted to integer. (2))
BCD
EN ENO The converted integer value is issued
D0 s d K4Y40 to the display unit. (3))
*1. VAR_01 is global label, and D20 is defined.
*2. VAR_02 is global label, and D10 is defined.
*3. VAR_03 is global label, and D10 is defined.
[ST]
DDEG(X000,VAR_01,VAR_02);
INT:=(X000,VAR_03,D0);
BCD(X000,D0,K4Y40);
Operation when the value of D20, D21 is 1.435792.
1) Angle 2) BIN D0 3) BCD
D21 D20 conversion D11 D10 conversion b15 b0 conversion Y057 Y040
1.435792 82.26482 82 0 0 8 2
Value of binary floating DDEG Value of binary floating INT BIN value BCD BCD value
decimal point (real number) decimal point (real number)
512
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
7.13 Data Operation 2
Outline
7.13.1 WSUM
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction calculates the total value of continuous 16-bit data or 32-bit data.
Please use the CCD when calculating the sum data (total value) in byte (8-bit) unit.
→ As for the CCD, refer to section 7.9.5.
3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WSUM 4
EN ENO
Instructions
Explanation of
How to Read
WSUM 16 bits Continuous WSUM(EN, s, n, d);
s d
n
WSUMP
EN ENO
WSUMP 16 bits Pulse
s d
WSUMP(EN, s, n, d);
5
n
Basic Instruction
DWSUM
EN ENO
DWSUM 32 bits Continuous DWSUM(EN, s, n, d);
s d
n
6
Instructions
Step Ladder
DWSUMP
EN ENO
DWSUMP 32 bits Pulse DWSUMP(EN, s, n, d);
s d
n
2. Set data 7
Data type
Instructions
Applied
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Head device for storing the data for calculating the total value (n
ANY16 ANY32
variable points occupied).
8
Number of data (0<n) ANY16
Function
and Pulse Catch
Interrupt Function
ENO Execution state Bit
Output
variable ARRAY [1..4]
Head device for storing the total value. ANY32
OF ANY16
A
and addresses
between devices
Relationships
513
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z
z z z z z z
z z z z
Function and operation explanation
1. 16-bit operation (WSUM/WSUMP)
The total value of n points of 16-bit data from the device specified by is stored in the device specified by
as 32-bit data.
Command
input WSUM
EN ENO
Head of device s d Label
Number of data n (The head device for storing
the total value is defined.)
s +0 K4444
+1 K3333
+2 K1234 n points Total of n points [ d +1, d ]
+3 K-5426 (n=6)
K13914
+4 K326
+5 K10000
2. 32-bit operation (DWSUM/DWSUMP)
The total value of n points of 32-bit data from the device specified by is stored in the device specified by
as 64-bit data.
Command
input DWSUM
EN ENO
Head of device s d Label
n (The head device for storing
Number of data
the total value is defined.)
[ s +1, s ] K32767000
[ s +3, s +2 ] K6000
n points Total of n points [ d +3, d +2, d +1, d ]
[ s +5, s +4 ] K35392000
(n=5) K68640000
[ s +7, s +6 ] K-11870000
[ s +9, s +8 ] K12345000
Related instructions
Instruction Content
Check code
CCD
This instruction calculates the total value and the horizontal parity of 16-bit data in byte (8-bit) unit.
514
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
Cautions
Outline
1) In 32-bit operation, the total value becomes 64-bit data. FX3U, FX3UC PLCs cannot handle 64-bit data.
However, when the total value is in the numeric value range of 32-bit data (K-2,147,483,648 to
K2,147,483,647), higher 32-bit data is ignored, and the lower 32-bit data can be handled as the total
value.
2) When handling array data or 32-bit data in structured program, you cannot specify 16-bit device directly 2
Instruction List
unlike the simple project. When handling array data or 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and can be specified directly.
When specifying the device, use the global label.
3) FX3U, FX3UC PLCs support the instruction at V2.20 or later.
Error 3
Instruction
Configuration of
In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in
D8067.
1) When n devices from the device specified by exceed the device range. (Error code: K6706)
2) When n ≤ 0. (Error code: K6706)
3) When the device specified by exceeds the range. (Error code: K6706)
4
Instructions
Explanation of
How to Read
Program example
This is a program for storing the total value of 16-bit data of D10 to D14 when the X010 is turned ON to [D101,
D100].
[Structured ladder] 5
Basic Instruction
D10 K4500
X10 WSUMP
EN ENO D11 K2500 WSUMP
D12 K-3276 instruction [D101,D100]
D10 s d VAR_SUM
D13 K6780 K14948
K5 n
D14 K4444
VAR_SUM is a global label, 6
and D100 is defined.
Instructions
Step Ladder
[ST]
WSUMP(X10,D10,K5,VAR_SUM);
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
515
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
7.13.2 WTOB
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction separates continuous 16-bit data in byte (8-bit) unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WTOB
EN ENO
WTOB 16 bits Continuous WTOB(EN, s, n, d);
s d
n
WTOBP
EN ENO
WTOBP 16 bits Pulse WTOBP(EN, s, n, d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Head device for storing the data to be separated in byte unit. ANY16
variable
Number of byte data to be separated. (0≤n) ANY16
Output ENO Execution state Bit
variable Head device for storing the result separated in byte unit. ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z z
z z z z
516
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
Function and operation explanation
Outline
1. 16-bit operation (WTOB/WTOBP)
1) This instruction separates n/2 points of 16-bit data stored after the device specified by into n bytes,
and stores into n devices starting from the device specified by as explained below.
Command
2
Instruction List
input WTOB
EN ENO
Head device of the data to be separated. s d Head device for storing the
Number of byte data to be separated. n result separated in byte unit.
b15 b8 b7 b0 b15 b8 b7 b0 3
s +0 Higher byte Lower byte d +0 00H Lower byte
Instruction
Configuration of
+1 Higher byte Lower byte +1 00H Higher byte
+2 00H Lower byte
+n/2* Higher byte Lower byte +3 00H Higher byte n bytes
4
+n-2 00H Lower byte
* If n is an odd number,
fractions are rounded up. +n-1 00H Higher byte
Instructions
Explanation of
How to Read
In the case of n=5, the result is s +3.
00H is stored.
2) 00H is stored in the higher byte (8 bits) of the device for storing the separated byte data (after the device
specified by ).
3) In the case of n = odd number, the final data of separation source is applicable only to the data in the
lower byte (8 bits) as shown below. 5
Basic Instruction
For example, in the case of n=5, data of lower byte (8 bits) of to +2 is stored in to
+4.
b15 b8 b7 b0 b15 b8 b7 b0
s +0 12H 39H d +0 00H 39H
+1
+2
56H
FEH
78H
DCH
+1
+2
00H
00H
12H
78H
In the case of 6
n=5
Instructions
Step Ladder
+3 00H 56H
Ignored when n=5.
+4 00H DCH
00H is stored.
4) Instruction is not processed in the case of n=0.
7
Instructions
Applied
Related instructions
Instruction Content
BTOW This instruction couples the lower 8 bits (lower byte) of continuous 16-bit data.
Cautions 8
Function
and Pulse Catch
Interrupt Function
1) The device storing the separation source data and the device storing the separated data can be used in
overlap. However, in the case of n = odd number, it must be noted that the data of the higher byte (8 bits)
of the final data of the separation source may be overwritten and erased as shown below.
b15 b8 b7 b0 b15 b8 b7 b0
A
s =D12 32H 31H d =D12 00H 31H
D13 34H 33H D13 00H 32H
In the case
and addresses
between devices
Relationships
D14 36H 35H D14 00H 33H of n=5
D15 00H 34H
Ignored when n=5, and
devices s and d are D16 00H 35H
overlapped, and "36H"
00H is stored.
is overwritten and erased.
2) FX3UC PLC supports at V2.20 or later.
517
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Error
In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in
D8067.
1) When devices to +n/2 of separation source exceed the device range of specified devices.
When n is an odd number, the devices are required in the number by rounding up. (Error code: K6706)
2) When devices to +n-1 for storing the separated data exceed the device range of specified
devices. (Error code: K6706)
Program example
This is a program for separating the data of D10 to D12 into byte unit when the X000 is turned ON, and
storing in D20 to D25.
[Structured ladder]
X000 WTOBP
EN ENO
D10 s d D20
K6 n
b15 b8 b7 b0 b15 b8 b7 b0
D10 FDH D58H D20 00H 58H
D11 57H E2H D21 00H FDH
D12 34H 44H D22 00H E2H 6 bytes
D23 00H 57H
D24 00H 44H
D25 00H 34H
00H is stored.
[ST]
WTOBP(X000,D10,K6,D20);
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
7.13.3 BTOW
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction couples the lower 8 bits (lower byte) of continuous 16-bit data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
BTOW
Instruction
Configuration of
EN ENO
BTOW 16 bits Continuous BTOW(EN, s, n, d);
s d
n
BTOWP 16 bits Pulse
EN
BTOWP
ENO
BTOWP(EN, s, n, d);
4
Instructions
Explanation of
How to Read
s d
n
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input Head device for storing the data to be coupled in byte unit. ANY16
variable
Number of byte data to be coupled (0≤n) ANY16
Output ENO Execution state Bit
variable Head device for storing the coupled result in byte unit. ANY16
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z 7
Instructions
Applied
z z z z z
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
519
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Function and operation explanation
1. 16-bit operation (BTOW/BTOWP)
1) This instruction stores the 16-bit data coupling lower byte (8 bit) of 16-bit data of n points from the device
specified by , into n/2 devices starting from as follows.
Command
input BTOWP
EN ENO
Head device of data to be coupled s d Head device for storing the coupled result in byte unit.
Number of byte data to be coupled n
b15 b8 b7 b0 b15 b8 b7 b0
s +0 First byte data d +0 Second byte First byte
+1 Second byte data +1 Fourth byte Third bytes
n bytes +2 Third byte data
+n/2* n-th byte n-1-th byte
+n-1 n-th byte data
* If n is an odd number, refer to 3).
Higher bytes are ignored.
2) Higher byte (8 bits) of 16-bit data (after ) in the coupling source is ignored.
3) When n is an odd number, as shown below, higher byte (8 bits) of the data coupled in the last place is set
to 00H. For example, in the case of n=5, data of lower byte (8 bits) of to +4 is stored in
to +2. Higher byte (8 bits) of +2 is 00H.
b15 b8 b7 b0 b15 b8 b7 b0
s +0 ABH 12H d +0 34H 12H
+1 CDH 34H +1 78H 56H
In the case +2 EFH 56H +2 00H 9AH
of n=5
+3 ABH 78H
In the case of n=5, "H00" is set.
+4 CDH 9AH
Higher bytes are ignored.
4) Instruction is not processed in the case of n=0.
Related instructions
Instruction Content
WTOB This instruction separates continuous 16-bit data in byte (8-bit) unit.
520
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
Cautions
Outline
1) The device storing the coupling source data and the device storing the coupled data can be used in
overlap. However, it must be noted that the higher byte (8 bits) of the coupling source data stored in the
device used in overlap is erased because the data of the higher byte (8 bits) is overwritten by the coupled
data.
b15 b8 b7 b0 b15 b8 b7 b0
2
Instruction List
s =D11 ABH 12H d =D10 34H 12H
D12 CDH 34H D11 78H 56H
In the case D13 EFH 56H D12 BCH 9AH
of n=6 D14 ABH 78H D13 EFH 56H
D15 CDH 9AH D14 ABH 78H
D16 EFH BCH D15 CDH 9AH 3
D16 EFH BCH
Instruction
Configuration of
Higher bytes are ignored.
Not changed.
Since devices are overlapped, "ABH" and "CDH"
are overwritten and erased.
2) FX3UC PLC supports at V2.20 or later.
4
Error
Instructions
Explanation of
How to Read
In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in
D8067.
1) When the devices to ( +n-1) at the coupling source exceeds the device range of the specified
devices. (Error code: K6706)
5
2) When the devices to ( +n/2) for storing the coupled data exceeds the device range of the
Basic Instruction
specified devices. When n is an odd number, the devices are required in the number by rounding up.
(Error code: K6706)
Program example
This is a program for coupling the data of lower byte (8 bits) of D20 to D25 when the X000 is turned ON, and 6
storing into D10 to D12.
Instructions
Step Ladder
[Structured ladder]
X000 BTOWP
EN ENO
D20 s d D10 7
K6 n
Instructions
Applied
b15 b8 b7 b0 b15 b8 b7 b0
D20 00H 78H D10 12H 78H
6 bytes
D21
D22
31H
36H
12H
49H
D11
D12
55H
31H
49H
67H
8
Function
and Pulse Catch
Interrupt Function
D23 44H 55H
D24 48H 67H
D25 49H 31H
Higher bytes are
ignored.
A
and addresses
between devices
Relationships
[ST]
BTOWP(X000,D20,K6,D10);
521
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
7.13.4 UNI
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction couples lower 4 bits of continuous 16-bit data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
UNI
EN ENO
UNI 16 bits Continuous UNI(EN,s,n,d);
s d
n
UNIP
EN ENO
UNIP 16 bits Pulse UNIP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
Head device for storing the data to be coupled. ANY16
variable
Number of couples (no processing in the case of 0 to 4, n=0) ANY16
Output ENO Execution state Bit
variable Head device for storing the coupled data. ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z z
z z z z
522
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
Function and operation explanation
Outline
1. 16-bit operation (UNI/UNIP)
1) 16-bit data coupling lower 4 bits of 16-bit data of n points from the device specified by is stored in
the device specified by as shown below.
Command
2
Instruction List
input UNIP
EN ENO
Head device of data to be coupled s d Head device for storing the coupled data.
Number of couples n
b15 b4 b3 b0 3
Instruction
Configuration of
s +0 Lower 4 bits
n points 1 Lower 4 bits
2 Lower 4 bits b15 b12b11 b8 b7 b4 b3 b0
3 Lower 4 bits d
Ignored. Data to be coupled
4
2) Any one of 1 to 4 is specified by n.
Instructions
Explanation of
How to Read
In the case of n=0, instruction is not processed.
3) In the case of 1 ≤ n ≤ 3, higher (4×(4-n)) bits of the device specified by are 0.
For example, in the case of n=3, lower 4 bits of to ( +2) are stored in b0 to b11 of , and
higher 4 bits of are 0.
5
Basic Instruction
b15 b4 b3 b0
s +0 Lower 4 bits
+1 Lower 4 bits b15 b12b11 b8 b7 b4 b3 b0
+2 Lower 4 bits d 0 0 0 0
Ignored. Data to be coupled In the case of n=3,
b12 to b15 are 0.
6
Instructions
Step Ladder
Related instructions
Instruction Content
DIS This instruction separates 16-bit data in 4-bit unit.
7
Instructions
Applied
Cautions
FX3UC PLC supports at V2.20 or later.
Error
In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in 8
D8067.
Function
and Pulse Catch
Interrupt Function
1) When to ( +n) exceeds the device range of the specified devices. (Error code: K6706)
2) When n is specified other than 0 to 4. (Error code: K6706)
A
and addresses
between devices
Relationships
523
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Program example
This is a program for coupling lower 4 bits of D0 to D2 when the X000 is turned ON, and storing in D10.
[Structured ladder]
UNIP
X000
EN ENO
D0 s d D10
K3 n
b15 b4 b3 b0 b15 b12 b11 b4 b3 b0
D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D10 0 0 0 0 1 0 0 1 0 1 0 1 0 0 0 1
D1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
D2 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
Data to be coupled 0 is set
because n=K3.
[ST]
UNIP(X000,D0,K3,D10);
524
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
7.13.5 DIS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction separates 16-bit data in 4-bit unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
DIS
Instruction
Configuration of
EN ENO
DIS 16 bits Continuous DIS(EN,s,n,d);
s d
n
EN
DISP
ENO
4
DISP 16 bits Pulse DISP(EN,s,n,d);
Instructions
Explanation of
How to Read
s d
n
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
Device for storing the data to be separated. ANY16
variable
Number of separates (no processing in the case of 0 to 4, n=0) ANY16
Output ENO Execution state Bit
variable Head device for storing the separated data. ANY16
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
7
Instructions
Applied
z z z z z
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
525
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Function and operation explanation
1. 16-bit operation (DIS/DISP)
1) This instruction separates 16-bit data of the device specified by in 4-bit unit, and storing in the
device specified by as follows.
Command
input DISP
EN ENO
Device for storing the data to be separated. s d Head device for storing the separated data.
Number of separates n
b15 b12 b11 b8 b7 b4 b3 b0 b15 b4 b3 b0
s d +0 Lower 4 bits
+1 Lower 4 bits
n points
+2 Lower 4 bits
+3 Lower 4 bits
To be set in 0. Storing area
2) Any one of 1 to 4 is specified by n.
In the case of n=0, instruction is not processed.
3) 0 is set in higher 12 bits in the device of n points from the device specified by .
Related instructions
Instruction Content
UNI This instruction couples lower 4 bits of 16-bit data.
Cautions
FX3UC PLC supports at V2.20 or later.
Error
In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in
D8067.
1) When the range of n points from the device specified by exceeds the device range of specified
device. (Error code: K6706)
2) When n is specified other than 0 to 4. (Error code: K6706)
Program example
This is a program for separating D0 in 4 bits each when the X000 is turned ON, and storing in D10 to D13.
[Structured ladder] [ST]
DISP(X000,D0,K4,D10);
X000 DISP
EN ENO
D0 s d D10
K4 n
b15 b12 b11 b8 b7 b4 b3 b0 b15 b4 b3 b2 b1 b0
D0 1 1 0 0 1 0 0 1 0 1 0 1 0 0 0 1 D10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
D11 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
D12 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
D13 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0
To be set in 0. Storing area
526
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
7.13.6 SWAP
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction swaps higher 8 bits and lower 8 bits of word data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
SWAP
Instruction
Configuration of
SWAP 16 bits Continuous EN ENO SWAP(EN,s);
s
SWAPP
SWAPP 16 bits Pulse EN
s
ENO SWAPP(EN,s);
4
Instructions
Explanation of
How to Read
DSWAP
DSWAP 32 bits Continuous EN ENO DSWAP(EN,s);
s
DSWAPP 5
DSWAPP 32 bits Pulse EN ENO DSWAPP(EN,s);
Basic Instruction
s
2. Set data
Data type
Variable Description 16-bit 32-bit 6
operation operation
Instructions
Step Ladder
Input EN Execution condition Bit
variable Device for swapping higher and lower bytes. ANY16 ANY32
Output
ENO Execution state Bit
variable
7
3. Applicable devices
Instructions
Applied
Bit Devices Word Devices Others
Operand Cons Real Character
System user Digit designation Special unit Index Index Pointer
type tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z zzz S1 S1 z z z 8
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
527
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Function and operation explanation
1. 16-bit operation (SWAP, SWAPP, DSWAP, DSWAPP)
This instruction swaps lower 8 bits and higher 8 bits.
Command
input SWAPP
s
EN ENO
Device for swapping higher Higher 8 bits Lower 8 bits
and lower bytes.
2. 32-bit operation (DSWAP, DSWAPP)
In the case of 32-bit instruction, too, lower 8 bits and higher 8 bits are swapped individually.
Command
input DSWAPP
EN ENO s +1 s
Label s Higher 8 bits Lower 8 bits , Higher 8 bits Lower 8 bits
In the label, the head device data for
swapping higher and lower is defined.
Cautions
1) When the continuous execution instruction is used, it must be noted that the swap takes place in every
operation cycle.
2) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
3) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable.
528
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
7.13.7 SORT2
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction sorts the data table composed of data (rows) and group data (columns) in the ascending
order/descending order in row unit on the basis of the specified group data (rows). In this instruction, data
(row direction) is stored in continuous devices, and it is easy to add the data (row).
In SORT, sorting is in ascending order only, and data composition is different (data is composed in devices
continuous in row direction).
→ As for SORT, refer to section 7.7.10. 3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
EN
SORT2
ENO
4
Instructions
Explanation of
How to Read
s d
SORT2 16 bits Continuous SORT2(EN,s,m1,m2,n,d);
m1
m2
n
DSORT2 5
EN ENO
Basic Instruction
s d
DSORT2 32 bits Continuous DSORT2(EN,s,m1,m2,n,d);
m1
m2
n
6
2. Set data
Instructions
Step Ladder
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Head device for storing data table [m1 × m2 points occupied] ANY16 ANY32 7
Input
Instructions
Applied
Number of data (rows) [1 to 32] ANY16 ANY32
variable
Number of group data (columns) [1 to 6] ANY16 ANY32
Columns of group data (columns) as reference for sorting [1 to m2] ANY16 ANY32
Output ENO Execution state Bit
variable Head device for storing operation result [m1 × m2 points occupied] ANY16 ANY32
8
Function
and Pulse Catch
Interrupt Function
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
A
z z
and addresses
between devices
Relationships
z z z z
z z
z z
z z z z
529
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
Function and operation explanation
1. 16-bit operation (SORT2)
This instruction sorts the data rows of data table (sorting source) of (m1×m2) points from the device specified
by in the ascending order/descending order on the basis of group data of n rows, and stores in data
table (after sorting) of (m1×m2) points from the device specified by .
→ As for operation example, refer to 3. Operation examples.
Command
input SORT2
EN ENO
Head device for storing data table. s d Head device for storing
Number of data (rows) m1 the operation result.
Number of group data (columns) m2
Columns of group data (columns) n
as reference for sorting
Instruction execution complete flag
M8029
M
The data table is composed of m1=K3, m2=K4 in the sorting source as explained in this case. In the data
table after sorting, exchange and .
Number of groups m2 (in the case of m2=K4)
Column
1 2 3 4
number
Row
Management number Height Body weight Age
number
In the 1 +1 +2 +3
case of
2 +4 +5 +6 +7
number of
data m1=3 3 +8 +9 +10 +11
1) Sorting is set depending on the ON/OFF state of M8165.
Setting of sorting order
M8165=ON Descending
M8165=OFF Ascending
2) Data sorting is started when the instruction input is ON, and is completed after m1 scan, and instruction
execution complete flag M8029 is turned ON.
→ As for the manner of using the instruction execution complete flag, refer to section 1.3.4.
530
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
2. 32-bit operation (DSORT2)
Outline
This instruction sorts the data rows of data table (sorting source) of (m1×m2) points from the device specified
by in the ascending order/descending order on the basis of group data of n rows, and stores in data
table (after sorting) of (m1×m2) points from the device specified by .
→ As for operation example, refer to 3. Operation examples.
Command
2
DSORT2
Instruction List
input
EN ENO
Label 1 *1 s d Label 2 *2
Number of data (rows) m1
Number of group data (columns) m2
3
Columns of group data (columns) n
as reference for sorting
Instruction
Configuration of
Instruction execution complete flag
M8029
M
*1. Head device for storing the data table is defined in label 1.
4
*2. Head device for storing the operation result is defined in label 1.
The data table is composed of m1=K3, m2=K4 in the sorting source as explained in this case. In the data
Instructions
Explanation of
How to Read
table after sorting, exchange and .
Number of groups m2 (in the case of m2=K4)
Column
1 2 3 4
number
Row
number
Management number Height Body weight Age 5
Basic Instruction
In the 1 [ +1, ] [ +3, +2] [ +5, +4] [ +7, +6]
case of
2 [ +9, +8] [ +11, +10] [ +13, +12] [ +15, +14]
number of
data m1=3 3 [ +17, +16] [ +19, +18] [ +21, +20] [ +23, +22]
1) Sorting is set depending on the ON/OFF state of M8165. 6
Sorting order
Instructions
Step Ladder
M8165=ON Descending
M8165=OFF Ascending
2) When using data register D or extension register R for m1, the data length is 32 bits. For example, when
m1 is specified by D0, m1 is 32-bit data of [D1, D0].
3) Data sorting is started when the instruction input is ON, and is completed after m1 scan, and instruction
7
Instructions
Applied
execution complete flag M8029 is turned ON.
→ As for the manner of using the instruction execution complete flag, refer to section 1.3.4.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
531
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
3. Operation example
The operation is as follows when the following sorting source data is executed in "n=K2 (column number 2)",
"n=K3 (column number 3)".
The operation example is a case of 16-bit operation. In the case of 32-bit operation, the data table should be
composed of BIN 32 bits.
When a serial number such as management number is entered in the first column, it is convenient because
the original row number can be judged from its content.
Sorting source data
Number of groups m2 (in the case of m2=K4)
Column
1 2 3 4
number
Row Management
Height Body weight Age
number number
+1 +2 +3
1
1 150 45 20
+4 +5 +6 +7
2
2 180 50 40
In the
case of +8 +9 +10 +11
3
number of 3 160 70 30
data m1=5
+12 +13 +14 +15
4
4 100 20 8
+16 +17 +18 +19
5
5 150 50 45
1) Sorting result when instruction is executed in n=K2 (column number 2) (ascending order)
Column
1 2 3 4
number
Row Management
Height Body weight Age
number number
+1 +2 +3
1
4 100 20 8
+4 +5 +6 +7
2
1 150 45 20
+8 +9 +10 +11
3
5 150 50 45
+12 +13 +14 +15
4
3 160 70 30
+16 +17 +18 +19
5
2 180 50 40
2) Sorting result when instruction is executed in n=K3 (column number 3) (descending order)
Column
1 2 3 4
number
Row Management
Height Body weight Age
number number
+1 +2 +3
1
3 160 70 30
+4 +5 +6 +7
2
2 180 50 40
+8 +9 +10 +11
3
5 150 50 45
+12 +13 +14 +15
4
1 150 45 20
+16 +17 +18 +19
5
4 100 20 8
532
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.13 Data Operation 2
1
Related devices
Outline
→ As for the manner of using the instruction execution complete flag, refer to section 1.3.4.
Device Name Content
Instruction execution
M8029 Turned ON when data sorting instruction is complete.
complete
Sorted in descending order when M8165=ON.
2
M8165 Descending order
Instruction List
Sorted in ascending order when M8165=OFF.
Related instructions
Instruction Content
Data sorting
This instruction sorts the data table composed of data (rows) and group data (columns) in ascending order
3
SORT
Instruction
Configuration of
in row unit on the basis of the specified group data (columns). In this instruction, the group data (column
direction) is stored in continuous devices.
Cautions
1) During operation, do not change the content of the operand or data.
4
2) When executing again, once turn OFF the command input.
Instructions
Explanation of
How to Read
3) Limitation of times of instruction
Up to two instructions can be driven simultaneously in the program.
4) The circuit block including this instruction cannot be written during RUN.
5) When specifying same device in and
The original data is sorted in the data order after sorting.
5
Basic Instruction
In particular, be careful not to change the content of until instruction execution is complete.
6) Be careful not to allow overlap of original data and sorted data due to deviation.
D10 D30 D10 D30
Original data Original data
6
D2 D22 D20 D40
Instructions
Step Ladder
Sorted data Sorted data
D10
Original data
D30 D10
Original data
D30
7
Instructions
Applied
D10 D30 D35 D55
Sorted data Sorted data
8
D50 D70
Function
and Pulse Catch
Interrupt Function
Original data
D20 D40
Sorted data
A
and addresses
between devices
Relationships
7) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
8) FX3UC PLC supports at V2.20 or later.
533
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
7.14 Positioning Control
7.14.1 DSZR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction matches the mechanical position and the current value register in the PLC by zero return.
This instruction can perform following operation which is not supported by ZRN.
• Corresponding action of DOG search function
• Zero return is possible by using near-point DOG and zero-point signal.
Zero point cannot be determined by counting the zero-point signals.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DSZR
EN ENO
DSZR 16 bits Continuous DSZR(EN,s1,s2,d1,d2);
s1 d1
s2 d2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
Device for entering the near-point signal (DOG) Bit
variable
Device for entering zero-point signal Bit
ENO Execution state Bit
Output
Device for issuing pulse (Y) Bit
variable
Device of rotating direction signal Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z S1 z
S2 z
S3 z
S4 z z S1 z
S: Refer to "Cautions".
534
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
Function and operation explanation
Outline
Command
input DSZR
EN ENO
Device for entering the near-point signal (DOG) s1 d1 Device for issuing pulse
Device for entering zero-point signal s2 d2 Device of rotating direction signal
2
Instruction List
Cautions
1) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S2: Please specify X000 to X007.
S3: Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3
3
Instruction
Configuration of
of high speed output special adapter*2.
*1. Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2. High speed output special adapter can be connected only in FX3U PLC.
*3. When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points
4
Instructions
Explanation of
How to Read
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
S4: When high speed output special adapter is used at the pulse output destination in the FX3U PLC, as
the rotating direction signal, use the output shown in the table below.
Connection position of high speed
Pulse output
Rotating direction 5
output special adapter signal
Basic Instruction
=Y000 =Y004
First unit
=Y001 =Y005
=Y002 =Y006
Second unit
=Y003 =Y007
6
When built-in transistor output is used at the pulse output destination in the FX3U, FX3UC, FX3G
Instructions
Step Ladder
PLCs, as the rotating direction signal, use the transistor output.
2) Output number of rotating direction signal
Operation changes as follows depending on polarity of output pulse frequency.
[+ (Positive)] → : ON
[- (Negative)] → : OFF 7
Instructions
Applied
Cautions about writing during RUN
Avoid writing during RUN while DSZR is being executed (during pulse output).
If, during pulse output, writing during RUN is attempted in the circuit block including this instruction, it must be
noted that the pulse output slows down and stops.
8
Function changes by version
Function
and Pulse Catch
Interrupt Function
This instruction includes the function changes as shown in the table below depending on the version.
→ As for the explanation of the instruction and contents of function changes, refer to the positioning
control manual.
Corresponding version
FX3G FX3U FX3UC
Item Outline of function A
and addresses
between devices
Relationships
Clear signal
When special auxiliary relay corresponding to is turned ON, the clear
Ver. 1.00 Ver. 2.20 Ver. 2.20 output destination
signal output specification is changed to the output number specified by special
or later or later or later designating
function data register corresponding to
535
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
7.14.2 DVIT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes one-speed interrupt inching.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DVIT
EN ENO
DVIT 16 bits Continuous DVIT(EN,s1,s2,d1,d2);
s1 d1
s2 d2
DDVIT
EN ENO
DDVIT 32 bits Continuous DDVIT(EN,s1,s2,d1,d2);
s1 d1
s2 d2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
Number of output pulses after interrupt (relative address) ANY16 ANY32
variable
Output pulse frequency ANY16 ANY32
ENO Execution state Bit
Output
Device for issuing pulse (Y) Bit
variable
Device of rotating direction signal Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z zzzz z z z z
z z z z zzzz z z z z
S1 z
S2 z z S3 z
S: Refer to "Cautions".
536
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
Function and operation explanation
Outline
Command
input DVIT
EN ENO
Number of output pulses after interrupt s1 d1 Device for issuing pulse (Y)
Output pulse frequency s2 d2 Device of rotating direction signal
2
Instruction List
Command
input DDVIT
EN ENO
Label 1 *1 s1 d1 Device for issuing pulse (Y)
Label 2 *2 s2 d2 Device of rotating direction signal
3
*1. Number of output pulses after interrupt is defined.
Instruction
Configuration of
*2. Number of output pulses is defined.
Cautions about writing during RUN
Avoid writing during RUN while DVIT is being executed (during pulse output).
If, during pulse output, writing during RUN is attempted in the circuit block including this instruction, it must be 4
noted that the pulse output slows down and stops.
Instructions
Explanation of
How to Read
Function changes by version
This instruction includes the function changes as shown in the table below depending on the version.
→ As for the explanation of the instruction and contents of function changes, refer to the positioning
control manual.
5
Basic Instruction
Corresponding version
Item Outline of function
FX3U FX3UC
Interrupt input When M8336 is turned ON, the interrupt input signal corresponding to Y000 to
Ver. 2.20 or Ver. 1.30 or
signal designating Y003 is changed to input number (X000 to X007) specified by D8336.
later later
function However, Y003 cannot be specified when transistor output of basic unit is used.
When 8 is specified by D8336 in interrupt input signal corresponding to Y000 to 6
Y003 and M8336 is turned ON, the interrupt input signal is changed to special
Instructions
Step Ladder
Ver. 2.20 or Ver. 2.20 or auxiliary relay. When the changed special auxiliary relay is changed from OFF
User interrupt mode
later later to ON by input interrupt program, the interrupt operation is started. However,
when this function is used, the logic of interrupt input cannot be inverted.
However, Y003 cannot be specified when transistor output of basic unit is used.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
537
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
2) Applicable devices are limited.
S1: Please specify Y000, Y001, Y002 of transistor output of basic unit, or Y000, Y001, Y002*2, Y003*2 of
high speed output special adapter*1.
*1. High speed output special adapter can be connected only in FX3U PLC.
*2. When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
S2: When high speed output special adapter is used at the pulse output destination in the FX3U PLC, as
the rotating direction signal, use the output shown in the table below.
Connection position of high speed Rotating direction
Pulse output
output special adapter signal
=Y000 =Y004
First unit
=Y001 =Y005
=Y002 =Y006
Second unit
=Y003 =Y007
When built-in transistor output is ussed at the pulse output destination in the FX3U and FX3UC PLCs,
as the rotating direction signal, use the transistor output.
S3: In D
.b, index (V, Z) decoration is disabled.
3) Number of output pulses after interrupt is specified (specified by ).
The setting range is as follows.
a) In the case of 16-bit operation
-32,768 to +32,767 (excluding 0)
b) In the case of 32-bit operation
-999,999 to +999,999 (excluding 0)
4) Output pulse frequency is specified (specified by ).
The setting range is as follows.
a) In the case of 16-bit operation
10 to 32,767 (Hz)
b) In the case of 32-bit operation
Pulse output destination Setting range
FX3U PLC High speed output special adapter 10 to 200,000 (HZ)
FX3U, FX3UC PLCs Basic unit (transistor output) 10 to 100,000 (HZ)
5) Output number of rotating direction signal
Operation changes as follows depending on polarity of output pulse frequency.
[+ (Positive)] → : ON
[- (Negative)] → : OFF
538
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
7.14.3 DTBL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction operates the instruction predetermined in the data table by GX Works2 by one specified table.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
DTBL
DTBL 32 bits Continuous EN ENO DTBL(EN,n,d);
n d
4
2. Set data
Instructions
Explanation of
How to Read
Variable Description Data type
Input EN Execution condition Bit
variable Table number to be executed (n=1 to 100) ANY32
Output
variable
ENO Execution state
Device for issuing pulse (Y)
Bit
Bit
5
Basic Instruction
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type
X Y
user unit
M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H
tant Number
E
String
"
" P
6
Instructions
Step Ladder
S1
z z
S: Refer to "Cautions".
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
539
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Function and operation explanation
Command
input DTBL
EN ENO
Table number to be executed n d Device for issuing pulse (Y)
Cautions about writing during RUN
The circuit block including DTBL cannot be written during RUN.
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
2) FX3UC PLC supports at V2.20 or later.
3) Applicable devices are limited.
S1: Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3
of high speed output special adapter*2.
*1. Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2. High speed output special adapter can be connected only in FX3U PLC.
*3. When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
540
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
7.14.4 DABS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction connects with our company's MR-H, MR-J2(S) or MR-J3 type servo amplifier (with absolute
position detecting function), and reads out the absolute position (ABS) data. The data is read out in pulse
converted value.
→ As for explanation of the instruction, see the positioning control manual.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DABS
EN ENO
DABS 32 bits Continuous DABS(EN,s,d1,d2);
s d1
d2
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head device for entering the output signal for absolute value (ABS) data
Bit
5
from the servo amplifier (3 points occupied).
Basic Instruction
ENO Execution state Bit
Output Head device for issuing the control signal for absolute value (ABS) data to
Bit
variable the servo amplifier (3 points occupied).
Storing destination device of absolute value (ABS) data (32-bit value) ANY32
3. Applicable devices
6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z S2 z 7
S1 z z S2 z
Instructions
Applied
z z z z z z S3 S4 zz z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
541
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Function and operation explanation
Command
input DABS
EN ENO
Head device for entering the output signal s d1 Head device for issuing the control signal for absolute
for absolute value (ABS) data from the value (ABS) data to the servo amplifier
servo amplifier d2 Label
(Storing destination device of absolute value (ABS)
data is defined.)
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
2) FX2N, FX2NC PLCs support the instruction at V3.00 or later.
3) Since ABS data is read out in pulse converted value, please specify "Motor system" for parameter setting
(BFM#3) of FX2N-1PG. (FX1S, FX1N, FX2N, FX1NC, FX2NC PLCs.)
4) Writing of ABS data into FX2N-10PG should be addressed to the current value registers (BFM#40, #39) in
which the pulse converted values are stored. (FX1S, FX1N, FX2N, FX1NC, FX2NC PLCs.)
5) Applicable devices are limited.
S1: Please designate the transistor output.
S2: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S3: FX3U, FX3UC, FX3G PLCs only are applicable.
S4: FX3U, FX3UC PLCs only are applicable.
542
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
7.14.5 ZRN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction matches the mechanical position and the current value register in the PLC by zero return.
Please use DSZR when DOG search function is necessary.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ZRN
EN ENO
ZRN 16 bits Continuous s1
s2
d ZRN(EN,s1,s2,s3,d);
4
Instructions
Explanation of
How to Read
s3
DZRN
EN ENO
DZRN 32 bits Continuous s1 d DZRN(EN,s1,s2,s3,d);
s2 5
s3
Basic Instruction
2. Set data
Data type
Variable Description 16-bit
operation
32-bit
operation 6
Instructions
Step Ladder
EN Execution condition Bit
Input Speed when starting to zero return ANY16 ANY32
variable Creep speed ANY16 ANY32
Device for entering the near-point signal (DOG) Bit
Output
variable
ENO Execution state Bit
7
Device for issuing pulse Bit
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
type
System user Digit designation
user unit
Index
tant Number String
Pointer
8
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
Function
and Pulse Catch
Interrupt Function
z z z z z z z S3 S2 zz z z z
z z z z z z z S3 S2 zz z z z
z z z z S1 z
S4 z A
and addresses
between devices
Relationships
S: Refer to "Cautions".
543
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Function and operation explanation
Command
input ZRN
EN ENO
Speed when starting to zero return s1 d Device for issuing pulse
Creep speed s2
Device for entering the near-point s3
signal (DOG)
Command
input DZRN
EN ENO
Label 1 *1 s1 d Device for issuing pulse
Label 2 *2 s2
Device for entering the near-point s3
signal (DOG)
*1. The speed when starting to zero return is defined.
*2. The creep speed is defined.
Cautions about writing during RUN
1) Avoid writing during RUN while ZRN or DZRN is being executed (during pulse output).
(FX3U, FX3UC, FX3G PLCs.)
If, during pulse output, writing during RUN is attempted in the circuit block including this instruction, it
must be noted that the pulse output slows down and stops.
2) While ZRN or DZRN is being executed, the following writing during RUN is prohibited.
(FX1S, FX1N, FX1NC PLCs.)
Program change of circuit block including this instruction.
Program change of circuit block immediately before or immediately after the circuit block including this
instruction.
Addition or deletion of circuit block immediately before or immediately after the circuit block including this
instruction.
544
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
Function changes by version
Outline
This instruction includes the function changes as shown in the table below depending on the version.
→ As for the explanation of the instruction and contents of function changes, refer to the positioning
control manual.
1. FX3U. FX3UC PLCs 2
[V2.20 or later]
Instruction List
When the special auxiliary relay corresponding to is turned ON, the output destination of clear signal is
changed to the output number specified by the special data register corresponding to .
2. FX1S PLC
[Before V2.00]
After resetting the "rotating direction signal" (normal rotation output) used in other positioning instruction by 3
Instruction
Configuration of
RST, start to zero return.
When started to zero return while the "rotating direction signal" is in normal rotation output state, the motor
moves to the normal rotation, not zero return.
[After V2.00]
When driving of other positioning instruction is turned OFF, the rotating direction signal is turned OFF at the
same time, and processing of before V2.00 is not required. 4
Instructions
Explanation of
How to Read
3. FX1S, FX1N PLCs
[Before V2.00]
If the zero return speed does not reach the speed specified by the instruction, change the acceleration or
deceleration speed (D8148) to other value than given below.
(For example, if the current value is 150, change to 149 or 151.)
50, 75, 90, 100, 125, 150, 225, 250, 375, 450, 500, 750, 900, 1120, 1500, 2250, 4499, 4500 5
[After V2.00]
Basic Instruction
The above processing is not required.
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
6
Instructions
Step Ladder
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
2) Instruction driving timing (FX1S, FX1N, FX1NC PLCs)
This is an instruction allowed to program as many times as desired, but you are advised to design the
instruction driving timing according to the following cautions. 7
Instructions
Applied
a) Do not drive simultaneously the positioning instruction using the same output relay (Y000 or Y001).
If driven simultaneously, it is handled as double coil, and normal function is disabled.
b) After turning OFF the direction input of the instruction, drive again after the following condition is
established.
Condition: Re-driving is allowed after one operation cycle or more from the OFF moment of "pulse
output mode monitor (Y000: [M8147], Y001: [M8148]" of the positioning instruction driven 8
previous time.
Function
and Pulse Catch
Interrupt Function
This is because one or more OFF operation is required for re-driving of the positioning instruction.
c) We recommend the step-ladder instruction (STL) as a method of programming correctly the
positioning instruction according to the cautions mentioned above.
3) Not applicable to DOG search function, please start the zero return operation from the front side of the
near-point signal. (FX1S, FX1N, FX1NC PLCs.) A
and addresses
between devices
Relationships
4) Not applicable to zero-point signal of servo motor, please adjust to the position of near-point signal (DOG)
when fine adjustment of zero point is necessary. (FX1S, FX1N, FX1NC PLCs.)
545
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
5) While zero return, the numeric values of the current value registers (Y000: [D8141, D8140], Y001:
[D8143, D8142]) move in the decreasing direction. (FX1S, FX1N, FX1NC PLCs)
When zero return in reverse direction, please control the output relay (Y) wired as "rotating direction
signal" by the program in the following procedure.
1) Set (ON) Y
(rotating direction signal).
2) Execute zero return instruction.
3) Reset (OFF) Y
(rotating direction signal) by execution complete flag (M8012) of zero return
instruction.
6) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S2: FX3U, FX3UC PLCs only are applicable.
S3: FX3U, FX3UC, FX3G PLCs only are applicable.
S4: <FX3U, FX3UC, FX3G PLCs>
Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3
of high speed output special adapter*2.
*1 Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2 High speed output special adapter can be connected only in FX3U PLC.
*3 When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
<FX1S, FX1N, FX1NC PLCs>
Specify Y000 or Y001.
As the output of the PLC, please use the transistor output.
7) Specify the speed of return zero point in .
The setting range is as follows.
a) In the case of 16-bit operation
• FX3U, FX3UC, FX3G PLCs
10 to 32,767 (Hz)
• FX1S, FX1N PLCs
10 to 32,767 (Hz)
• FX1NC PLC
10 to 10,000 (Hz)
b) In the case of 32-bit operation
• FX3U, FX3UC, FX3G PLCs
Pulse output destination Setting range
FX3U PLC High speed output special adapter 10 to 200,000 (HZ)
FX3U, FX3UC, FX3G PLCs Basic unit (transistor output) 10 to 100,000 (HZ)
• FX1S, FX1N PLCs
10 to 100,000 (Hz)
• FX1NC PLC
10 to 10,000 (Hz)
546
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
7.14.6 PLSV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction issues a variable speed pulse with the rotating direction.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
PLSV
EN ENO
PLSV 16 bits Continuous PLSV(EN,s,d1,d2);
s d1
d2
4
Instructions
Explanation of
How to Read
DPLSV
EN ENO
DPLSV 32 bits Continuous DPLSV(EN,s,d1,d2);
s d1
d2
2. Set data 5
Basic Instruction
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable
ENO
Output pulse frequency
Execution state
ANY16
Bit
ANY32
6
Instructions
Step Ladder
Output
Device for issuing pulse (Y) Bit
variable
Device of rotating direction signal Bit
3. Applicable devices
Bit Devices Word Devices Others 7
System Special Cons Real Character
Instructions
Applied
Operand System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S4 S5 zz z z z
S1 z
S2 z z S3 z
8
Function
and Pulse Catch
Interrupt Function
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
547
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Function and operation explanation
Command
input PLSV
EN ENO
Output pulse frequency s d1 Device for issuing pulse (Y)
d2 Device of rotating direction signal
Command
input DPLSV
EN ENO
Label s d1 Device for issuing pulse(Y)
(Output pulse frequency d2 Device of rotating direction signal
is defined.)
Cautions about writing during RUN
1) Avoid writing during RUN while PLSV or DPLSV is being executed (during pulse output).
(FX3U, FX3UC, FX3G PLCs)
If, during pulse output, writing during RUN is attempted in circuit block including this instruction, it must be
noted that the pulse output becomes as follows.
Operation when written during RUN while instruction
is being executed
When operating with
Pulse output slows down and stops.
acceleration or deceleration*1
When operating without
Pulse output stops immediately.
acceleration or deceleration
*1. Only available for FX3U/FX3UC PLC Ver.2.20 or later and FX3G PLC.
2) While PLSV or DPLSV is being executed, the following writing during RUN is prohibited.
(FX1S, FX1N, FX1NC PLCs.)
Program change of circuit block including this instruction.
Program change of circuit block immediately before or immediately after the circuit block including this
instruction.
Addition or deletion of circuit block immediately before or immediately after the circuit block including this
instruction.
Function changes by version
This instruction includes the function changes as shown in the table below depending on the version.
→ As for the explanation of the instruction and contents of function changes, refer to the positioning
control manual.
Corresponding version
Added function Outline of function
FX3G FX3U FX3UC
Acceleration or When M8338 is turned ON, the operation accelerates or decelerates up to
Ver. 1.00 Ver. 2.20 Ver. 2.20
deceleration by setting of acceleration time or deceleration time corresponding to
or later or later or later
operation function when is changed.
FX1N, FX1NC, FX1S are not applicable to this function.
548
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
Cautions
Outline
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label. 2
Instruction List
2) Instruction driving timing (FX1S, FX1N, FX1NC PLCs)
This is an instruction allowed to program as many times as desired, but you are advised to design the
instruction driving timing according to the following cautions.
a) Do not drive simultaneously the positioning instruction using the same output relay (Y000 or Y001).
If driven simultaneously, it is handled as double coil, and normal function is disabled.
b) After turning OFF the direction input of the instruction, drive again after the following condition is 3
established.
Instruction
Configuration of
Condition: Re-driving is allowed after one operation cycle or more from the OFF moment of "pulse
output mode monitor (Y000: [M8147], Y001: [M8148]" of the positioning instruction driven
previous time.
This is because one or more OFF operation is required for re-driving of the positioning instruction.
c) We recommend the step-ladder instruction (STL) as a method of programming correctly the 4
positioning instruction according to the cautions mentioned above.
Instructions
Explanation of
How to Read
3) When output pulse frequency is changed to K0 during pulse output (FX1S, FX1N, FX1NC PLCs), the PLC
stops the pulse output.
When sending output again, once turn OFF the flag during pulse output (Y000: [M8147], Y001: [M8148]),
and after lapse of one operation cycle, set again (change) the output pulse frequency to other value than
K0. 5
a) Within one operation cycle, if the value is changed to other value than K0, the output maintains the
Basic Instruction
stop function. In this case, write K0 again for more than one operation cycle, or once turn OFF the
command input.
4) Applicable devices are limited.
S1: <FX3U, FX3UC, FX3G PLCs>
Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3 6
of high speed output special adapter*2.
Instructions
Step Ladder
*1. Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2. High speed output special adapter can be connected only in FX3U PLC.
*3. When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points 7
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
Instructions
Applied
• The output of high speed output special adapter is a differential line driver.
<FX1S, FX1N, FX1NC PLCs>
Specify Y000 or Y001.
As the output of the PLC, please use the transistor output.
S2: <FX3U, FX3UC, FX3G PLCs> 8
When high speed output special adapter is used at the pulse output destination in the FX3U PLC,
Function
and Pulse Catch
Interrupt Function
as the rotating direction signal, use the output shown in the table below.
Connection position of high speed Rotating direction
Pulse output
output special adapter signal
=Y000 =Y004
First unit
=Y001 =Y005 A
and addresses
between devices
Relationships
=Y002 =Y006
Second unit
=Y003 =Y007
When built-in transistor output is used at the pulse output destination in the FX3U, FX3UC, FX3G
PLCs, as the rotating direction signal, use the transistor output.
549
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
S3: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S4: FX3U, FX3UC, FX3G PLCs only are applicable.
S5: FX3U, FX3UC PLCs only are applicable.
5) The output pulse frequency is specified by .
The setting range is as follows.
a) In the case of 16-bit operation
• FX3U, FX3UC, FX3G PLCs
-32,768 to -1, +1 to 32,767 (Hz)
• FX1S, FX1N PLCs
-32,768 to -1, +1 to 32,767 (Hz)
• FX1NC PLC
-10,000 to -1, +1 to 10,000 (Hz)
b) In the case of 32-bit operation
• FX3U, FX3UC, FX3G PLCs
Pulse output destination Setting range
FX3U PLC High speed output special adapter -200,000 to -1, +1 to 200,000 (HZ)
FX3U, FX3UC, FX3G PLCs Basic unit (transistor output) -100,000 to -1, +1 to 100,000 (HZ)
• FX1S, FX1N PLCs
-100,000 to -1, +1 to 100,000 (Hz)
• FX1NC PLC
-10,000 to -1, +1 to 10,000 (Hz)
6) Output number of rotating direction signal
Operation changes as follows depending on polarity of output pulse frequency.
[+ (Positive)] → : ON
[- (Negative)] → : OFF
550
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
7.14.7 DRVI
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction performs one-speed positioning by relative drive. The moving distance from the present
position is specified together with plus or minus sign, and this is also called increment (relative) driving
method.
→ As for explanation of the instruction, see the positioning control manual.
→ As for cautions of use of high speed output special adapter, see the positioning control manual.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DRVI
DRVI 16 bits Continuous
EN
s1
ENO
d1
DRVI(EN,s1,s2,d1,d2); 4
Instructions
Explanation of
How to Read
s2 d2
DDRVI
EN ENO
DDRVI 32 bits Continuous DDRVI(EN,s1,s2,d1,d2);
s1 d1
s2 d2 5
Basic Instruction
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit 6
Instructions
Step Ladder
Input Number of output pulses (relative address) ANY16 ANY32
variable
Output pulse frequency ANY16 ANY32
ENO Execution state Bit
Output Device for issuing pulse (Y) Bit
variable
Device of rotating direction signal Bit 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
Function
and Pulse Catch
Interrupt Function
z z z z z z z S4 S5 zz z z z
z z z z z z z S4 S5 zz z z z
S1 z
S2 z z S3 z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
551
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
Function and operation explanation
Command
input DRVI
EN ENO
Number of output pulses (relative address) s1 d1 Device for issuing pulse (Y)
Output pulse frequency s2 d2 Device of rotating direction signal
Command
input DDRVI
EN ENO
Label 1 *1 s1 d1 Device for issuing pulse (Y)
Label 2 *2 s2 d2 Device of rotating direction signal
*1. Number of output pulses (relative address) is defined.
*2. Output frequency pulse is defined.
Cautions about writing during RUN
1) Avoid writing during RUN while DRVI or DDRVI is being executed (during pulse output).
(FX3U, FX3UC, FX3G PLCs)
If, during pulse output, writing during RUN is attempted in circuit block including this instruction, it must be
noted that the pulse output slows down and stops.
2) While DRVI or DDRVI is being executed, the following writing during RUN is prohibited.
(FX1S, FX1N, FX1NC PLCs.)
Program change of circuit block including this instruction.
Program change of circuit block immediately before or immediately after the circuit block including this
instruction.
Addition or deletion of circuit block immediately before or immediately after the circuit block including this
instruction.
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
2) Instruction driving timing (FX1S, FX1N, FX1NC PLCs)
This is an instruction allowed to program as many times as desired, but you are advised to design the
instruction driving timing according to the following cautions.
a) Do not drive simultaneously the positioning instruction using the same output relay (Y000 or Y001).
If driven simultaneously, it is handled as double coil, and normal function is disabled.
b) After turning OFF the direction input of the instruction, drive again after the following condition is
established.
Condition: Re-driving is allowed after one operation cycle or more from the OFF moment of "pulse
output mode monitor (Y000: [M8147], Y001: [M8148]" of the positioning instruction driven
previous time.
This is because one or more OFF operation is required for re-driving of the positioning instruction.
c) We recommend the step-ladder instruction (STL) as a method of programming correctly the
positioning instruction according to the cautions mentioned above.
552
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
3) Applicable devices are limited.
Outline
S1: <FX3U, FX3UC, FX3G PLCs>
Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3
of high speed output special adapter*2.
*1. Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2. High speed output special adapter can be connected only in FX3U PLC. 2
*3. When using Y002, Y003 in high speed output special adapter, a second high speed output
Instruction List
special adapter is needed.
Points
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
<FX1S, FX1N, FX1NC PLCs> 3
Specify Y000 or Y001.
Instruction
Configuration of
As the output of the PLC, please use the transistor output.
S2: <FX3U, FX3UC, FX3G PLCs>
When high speed output special adapter is used at the pulse output destination in the FX3U PLC,
as the rotating direction signal, use the output shown in the table below.
Connection position of high speed
output special adapter
Pulse output
Rotating direction
signal
4
Instructions
Explanation of
How to Read
=Y000 =Y004
First unit
=Y001 =Y005
=Y002 =Y006
Second unit
=Y003 =Y007
When built-in transistor output is used at the pulse output destination in the FX3U, FX3UC, FX3G 5
PLCs, as the rotating direction signal, use the transistor output.
Basic Instruction
S3: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S4: FX3U, FX3UC, FX3G PLCs only are applicable.
S5: FX3U, FX3UC PLCs only are applicable.
4) Number of output pulses is specified by .
The setting range is as follows. 6
a) In the case of 16-bit operation
Instructions
Step Ladder
-32,768 to +32,767 (excluding 0)
b) In the case of 32-bit operation
-999,999 to +999,999 (excluding 0)
5) The output pulse frequency is specified by .
The setting range is as follows. 7
Instructions
Applied
a) In the case of 16-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
10 to 32,767 (Hz)
• In the case of FX1S, FX1N PLCs
10 to 32,767 (Hz)
• In the case of FX1NC PLC
8
Function
and Pulse Catch
Interrupt Function
10 to 10,000 (Hz)
b) In the case of 32-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
Pulse output destination Setting range
FX3U PLC
FX3U, FX3UC, FX3G PLCs
High speed output special adapter
Basic unit (transistor output)
10 to 200,000 (HZ)
10 to 100,000 (HZ)
A
and addresses
between devices
Relationships
• FX1S, FX1N PLCs
10 to 100,000 (Hz)
• FX1NC PLC
10 to 10,000 (Hz)
6) Output number of rotating direction signal
Operation changes as follows depending on polarity of output pulse frequency.
[+ (Positive)] → : ON
[- (Negative)] → : OFF
553
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
7.14.8 DRVA
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction performs one-speed positioning by absolute drive. The moving distance from the origin (0
point) is specified, and this is also called absolute driving method.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DRVA
EN ENO
DRVA 16 bits Continuous DRVA(EN,s1,s2,d1,d2);
s1 d1
s2 d2
DDRVA
EN ENO
DDRVA 32 bits Continuous DDRVA(EN,s1,s2,d1,d2);
s1 d1
s2 d2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Number of output pulses (absolute address) ANY16 ANY32
variable
Output pulse frequency ANY16 ANY32
ENO Execution state Bit
Output Device for issuing pulse (Y) Bit
variable
Device of rotating direction signal Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S4 S5 zz z z z
z z z z z z z S4 S5 zz z z z
S1 z
S2 z z S3 z
S: Refer to "Cautions".
554
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
1
Function and operation explanation
Outline
Command
input DRVA
EN ENO
Number of output pulses (absolute address) s1 d1 Device for issuing pulse (Y)
Output pulse frequency s2 d2 Device of rotating direction signal
Command
2
DDRVA
Instruction List
input
EN ENO
Label 1 *1 s1 Device for issuing pulse (Y)
Label 2 *2 s2 d2 Device of rotating direction signal
*1. Number of output pulses (absolute address) is defined.
3
*2. Output frequency pulse is defined.
Cautions about writing during RUN
Instruction
Configuration of
1) Avoid writing during RUN while DRVA or DDRVA is being executed (during pulse output).
(FX3U, FX3UC, FX3G PLCs)
If, during pulse output, writing during RUN is attempted in circuit block including this instruction, it must be
noted that the pulse output slows down and stops.
2) While DRVA or DDRVA is being executed, the following writing during RUN is prohibited.
4
Instructions
Explanation of
How to Read
(FX1S, FX1N, FX1NC PLCs.)
Program change of circuit block including this instruction.
Program change of circuit block immediately before or immediately after the circuit block including this
instruction.
Addition or deletion of circuit block immediately before or immediately after the circuit block including this
instruction. 5
Basic Instruction
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly. 6
Instructions
Step Ladder
When specifying the device, use the global label.
2) Instruction driving timing (FX1S, FX1N, FX1NC PLCs)
This is an instruction allowed to program as many times as desired, but you are advised to design the
instruction driving timing according to the following cautions.
a) Do not drive simultaneously the positioning instruction using the same output relay (Y000 or Y001).
If driven simultaneously, it is handled as double coil, and normal function is disabled. 7
Instructions
Applied
b) After turning OFF the direction input of the instruction, drive again after the following condition is
established.
Condition: Re-driving is allowed after one operation cycle or more from the OFF moment of "pulse
output mode monitor (Y000: [M8147], Y001: [M8148]" of the positioning instruction driven
previous time.
This is because one or more OFF operation is required for re-driving of the positioning instruction. 8
c) We recommend the step-ladder instruction (STL) as a method of programming correctly the
Function
and Pulse Catch
Interrupt Function
positioning instruction according to the cautions mentioned above.
If, during pulse output, writing during RUN is attempted in circuit block including this instruction, it must
be noted that the pulse output slows down and stops.
3) Applicable devices are limited.
S1: <FX3U, FX3UC, FX3G PLCs> A
Please specify Y000, Y001, Y002*1 of transistor output of basic unit, or Y000, Y001, Y002*3, Y003*3
and addresses
between devices
Relationships
of high speed output special adapter*2.
*1. Y002 cannot be used in the 14-point type or 24-point type of FX3G PLC.
*2. High speed output special adapter can be connected only in FX3U PLC.
*3. When using Y002, Y003 in high speed output special adapter, a second high speed output
special adapter is needed.
Points
• When using FX3U PLC of relay output type, high speed output special adapter is needed.
• The output of high speed output special adapter is a differential line driver.
555
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.14 Positioning Control
<FX1S, FX1N, FX1NC PLCs>
Specify Y000 or Y001.
As the output of the PLC, please use the transistor output.
S2: <FX3U, FX3UC, FX3G PLCs>
When high speed output special adapter is used at the pulse output destination in the FX3U PLC,
as the rotating direction signal, use the output shown in the table below.
Connection position of high speed Rotating direction
Pulse output
output special adapter signal
=Y000 =Y004
First unit
=Y001 =Y005
=Y002 =Y006
Second unit
=Y003 =Y007
When built-in transistor output is used at the pulse output destination in the FX3U, FX3UC, FX3G
PLCs, as the rotating direction signal, use the transistor output.
S3: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S4: FX3U, FX3UC, FX3G PLCs only are applicable.
S5: FX3U, FX3UC PLCs only are applicable.
4) Number of output pulses is specified by .
The setting range is as follows.
a) In the case of 16-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
-32,768 to +32,767
• FX1S, FX1N, FX1NC PLCs
-32,768 to +32,767
b) In the case of 32-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
-999,999 to +999,999
• FX1S, FX1N, FX1NC PLCs
-999,999 to +999,999
5) The output pulse frequency is specified by .
The setting range is as follows.
a) In the case of 16-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
10 to 32,767 (Hz)
• In the case of FX1S, FX1N PLCs
10 to 32,767 (Hz)
• In the case of FX1NC PLC
10 to 10,000 (Hz)
b) In the case of 32-bit operation
• In the case of FX3U, FX3UC, FX3G PLCs
Pulse output destination Setting range
FX3U PLC High speed output special adapter 10 to 200,000 (HZ)
FX3U, FX3UC, FX3G PLCs Basic unit (transistor output) 10 to 100,000 (HZ)
• FX1S, FX1N PLCs
10 to 100,000 (Hz)
• FX1NC PLC
10 to 10,000 (Hz)
6) Output number of rotating direction signal
Operation is as follows by judging the difference between the output pulse frequency (target position) and
present position.
[+ (Positive)] → : ON
[- (Negative)] → : OFF
556
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15 Real Time Clock Control
Outline
7.15.1 TCMP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
The comparison time and the time data are compared, and the bit device is turned ON or OFF depending on
the magnitude of difference.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
TCMP
EN ENO 4
s1 d
Instructions
Explanation of
How to Read
TCMP 16 bits Continuous TCMP(EN,s1,s2,s3,s,d);
s2
s3
s
EN
TCMPP
ENO 5
Basic Instruction
s1 d
TCMPP 16 bits Pulse TCMPP(EN,s1,s2,s3,s,d);
s2
s3
s
2. Set data 6
Instructions
Step Ladder
Variable Description Data type
EN Execution condition Bit
Comparison time "hour" (Setting range: 0 to 23) ANY16
Input
Comparison time "minute" (Setting range: 0 to 59) ANY16
variable
Comparison time "second" (Setting range: 0 to 59) ANY16 7
Time data (hour, minute, second) "hour" (3 points occupied) ANY16
Instructions
Applied
ENO Execution state Bit
Output
variable Device to be turned ON or OFF depending on the comparison result.
Bit
(3 points occupied)
3. Applicable devices 8
Bit Devices Word Devices Others
Function
and Pulse Catch
Interrupt Function
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z z z z z z z S2 S3 zz z z z
z z z z z z z S2 S3 zz z z z A
and addresses
between devices
Relationships
z z z z z z z S2 S3 zz z z z
z z z S2 S3 z
zz z S1 z
S: Refer to "Cautions".
557
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation (TCMP)
The time of comparison time (hour, minute, second) , , is compared with the time data (hour,
minute, second) of the device specified by , and the device specified by is turned ON or OFF
depending on the magnitude of difference.
Command input TCMP
EN ENO
Comparison time "hour" s1 d Device to be turned ON or OFF
Comparison time "minute" s2 depending on the comparison result.
Comparison time "second" s3
Time data (hour, minute, s
second) "hour"
d s1 (hour) s (hour)
s2 (minute) > s +1 (minute) and then turned ON
s3 (second) s +2 (second)
d +1 s1 (hour) s (hour)
s2 (minute) = s +1 (minute) and then turned ON
s3 (second) s +2 (second)
d +2 s1 (hour) s (hour)
s2 (minute) < s +1 (minute)
and then turned ON
s3 (second) s +2 (second)
↑
If TCMP is not executed when command contact is changed from ON to OFF, d , d +1, d +2
are holding the state before the command contact is turned OFF.
Cautions
1) Number of devices occupied
Three devices are occupied each in and .
Be careful not to overlap with the devices used in machine control.
2) When using the time (hour, minute, second) of the clock data of the real time clock built in the PLC, first
read out the value of the special data register by using TRD, TRDP, and specify the word device in each
operand.
3) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S2: FX3U, FX3UC, FX3G PLCs only are applicable.
S3: FX3U, FX3UC PLCs only are applicable.
558
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Program example
Outline
[Structured ladder] [ST]
X000 TCMP M0:=TCMP(X000,K10,K30,K50,D0);
10 hours, K10
EN
s1
ENO
d M0
M1:=TCMP(X000,K10,K30,K50,D0);
M2:=TCMP(X000,K10,K30,K50,D0);
2
Instruction List
30 minutes, K30 s2
50 seconds K50 s3
D0 s
D0 (hour)
M0 10 hours,
30 minutes, > D1 (minute) and then
turned ON
3
Instruction
Configuration of
50 seconds D2 (second)
s1 :Comparison time "hour" is specified.
D0 (hour)
M1 10 hours, s2 :Comparison time "minute" is specified.
= D1 (minute) and then
30 minutes, turned ON s3 :Comparison time "second" is specified.
50 seconds D2 (second)
s :Time data "hour" is specified. 4
D0 (hour)
Instructions
Explanation of
How to Read
M2 10 hours, and then s +1 :Time data "minute" is specified.
30 minutes,
< D1 (minute)
turned ON s +2 :Time data "second" is specified.
50 seconds D2 (second)
↑ d , d +1, d +2
If TCMP is not executed when X000=OFF,
M0 to M2 are holding the state before X000
:Three bit devices are turned ON or OFF
depending on the comparison result. 5
Basic Instruction
is turned OFF.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
559
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
7.15.2 TZCP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The comparison time of higher and lower points and the time data are compared, and the bit device is turned
ON or OFF depending on the magnitude of difference.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
TZCP
EN ENO
TZCP 16 bits Continuous s1 d TZCP(EN,s1,s2,s,d);
s2
s
TZCPP
EN ENO
TZCPP 16 bits Pulse s1 d TZCPP(EN,s1,s2,s,d);
s2
s
2. Set data
Variable Description Data type
EN Execution condition Bit
Comparison lower limit time (hour, minute, second) "hour" (3 points
ANY16
Input occupied)
variable Comparison higher limit time (hour, minute, second) "hour" (3 points
ANY16
occupied)
Time data (hour, minute, second) "hour" (3 points occupied) ANY16
ENO Execution state Bit
Output
variable Device to be turned ON or OFF depending on the comparison result. (3
Bit
points occupied)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z S2 S3 z
z z z S2 S3 z
z z z S2 S3 z
zz z S1 z
S: Refer to "Cautions".
560
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Function and operation explanation
Outline
1. 16-bit operation (TZCP, TZCPP)
The comparison time (hour, minute, second) of higher and lower points and the time data (hour, minute,
second) of the device specified by are compared, and the device specified by is turned ON or OFF
depending on the magnitude of difference. 2
Instruction List
Magnitude comparison function
of specified time at two points
and time data
Command input TZCP
EN ENO
Comparison lower limit time (hour, minute, second) "hour" s1 d Device to be turned ON or OFF
depending on the comparison result. 3
Comparison upper limit time (hour, minute, second) "hour" s2
Instruction
Configuration of
Time data (hour, minute, second) "hour" s
d s1 (hour) s (hour)
s1 +1 (minute) > s +1 (minute) and then turned ON
s1 +2 (second) s +2 (second) 4
Instructions
Explanation of
How to Read
d +1 s1 (hour) s (hour) s2 (hour)
s1 +1 (minute) ≤ s +1 (minute) ≤ s2 +1 (minute) and then turned ON
s1 +2 (second) s +2 (second) s2 +2 (second)
d +2 s
s
(hour)
+1 (minute) >
s2 (hour)
s2 +1 (minute) and then turned ON
5
Basic Instruction
s +2 (second) s2 +2 (second)
↑
If TZCP is not executed when command contact is changed from ON to OFF, d , d +1, d +2
are holding the state before the command contact is turned OFF.
Cautions 6
Instructions
Step Ladder
1) Number of devices occupied
Three devices are occupied each in , , and .
Be careful not to overlap with the devices used in machine control.
2) When using the time (hour, minute, second) of the clock data of the real time clock built in the PLC, first
read out the value of the special data register by using TRD, TRDP, and specify the word device in each 7
operand.
Instructions
Applied
3) Applicable devices are limited.
S1: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S2: FX3U, FX3UC, FX3G PLCs only are applicable.
S3: FX3U, FX3UC PLCs only are applicable.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
561
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Program example
[Structured ladder] [ST]
M3:=TZCP(X000,D20,D30,D0);
X000 TZCP M4:=TZCP(X000,D20,D30,D0);
EN ENO M5:=TZCP(X000,D20,D30,D0);
D20 s1 d M3
D30 s2
D0 s
D20 (hour) D0 (hour)
M3
D21 (minute) > D1 (minute) and then turned ON
D22 (second) D2 (second)
M4 D20 (hour) D0 (hour) D30 (hour)
D21 (minute) ≤ D1 (minute) ≤ D31 (minute) and then turned ON
D22 (second) D2 (second) D32 (second)
M5 D0 (hour) D30 (hour)
D1 (minute) > D31 (minute) and then turned ON
D2 (second) D32 (second)
↑
If TZCP instruction is not executed when X000 is changed from ON to OFF,
M3 to M5 are holding the state before X000 is turned OFF.
s1 , s1 +1, s1 +2 :Comparison time lower limit is specified by "hour," "minute," "second."
s2 , s2 +1, s2 +2 :Comparison time upper limit is specified by "hour," "minute," "second."
s , s +1, s +2 :Time data is specified by "hour," "minute," "second."
d , d +1, d +2 :Three bit devices are turned ON or OFF depending on the comparison result.
The range of "hour" is 0 to 23.
The range of "minute" is 0 to 59.
The range of "second" is 0 to 59.
562
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.3 TADD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
Two time data are added and stored in the word device.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
TADD
EN ENO
TADD 16 bits Continuous TADD(EN,s1,s2,d);
s1 d
s2
EN
TADDP
ENO
4
TADDP 16 bits Pulse TADDP(EN,s1,s2,d);
Instructions
Explanation of
How to Read
s1 d
s2
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
Device for storing "hour" of addition time data (hour, minute, second) (3 points occupied) ANY16
variable
Device for storing "hour" of addition time data (hour, minute, second) (3 points occupied) ANY16
ENO Execution state Bit
Output
Device for storing the added result of two time data (hour, minute, second) (3 points
variable
occupied)
ANY16
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 7
z z z S1 z
Instructions
Applied
S2
z z z S1 S2 z
z z z S1 S2 z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
563
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation (TADD)
Time data (hour, minute, second) of the device specified by , and time data (hour, minute, second) of the
device specified by are added, and the result is stored in the device specified by .
Command
input TADD *1. Device for storing "hour" of addition time data (hour, minute, second)
EN ENO
*1 s1 d *2 *2. Device for storing the added result of two time data (hour, minute, second)
*1 s2
( s1 , s1 +1, s1 +2)+( s2 , s2 +1, s2 +2)
( d , d +1, +2)
↑
s1 (hour) s2 (hour) d (hour) The range of "hour" is 0 to 23.
+
↑
s1 +1 (minute) s2 +1 (minute) d +1 (minute) The range of "minute" is 0 to 59.
s1 +2 (second) s2 +2 (second) d +2 (second) The range of "second" is 0 to 59.
1) If the operation result exceeds 24 hours, the carry flag is turned ON, and the time by subtracting 24 hours
from the simple sum is stored as the operation result.
2) If the operation result is 0 (0 hour, 0 minute, 0 second), the zero flag is turned ON.
Cautions
1) Number of devices occupied
Three devices are occupied each in , and .
Be careful not to overlap with the devices used in machine control.
2) When using the time (hour, minute, second) of the clock data of the real time clock built in the PLC, first
read out the value of the special data register by using TRD, TRDP, and specify the word device in each
operand.
3) Applicable devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
Program example
[Structured ladder] [ST]
X000 TADD TADD(X000,D10,D20,D30);
EN ENO
D10 s1 d D30 (D10,D11,D12)+(D20,D21,D22)
D20 s2 (D30,D31,D32)
↑
s1 10 (hour) s2 3 (hour) d 13 (hour)
+
↑
s1 +1 30 (minute) s2 +1 10 (minute) d +1 40 (minute)
s1 +2 10 (second) s2 +2 5 (second) d +2 15 (second)
10 hours, 30 minutes, 10 seconds 3 hours, 10 minutes, 5 seconds 13 hours, 40 minutes, 15 seconds
If the operation result exceeds 24 hours
s1 s2 d
18 (hour) 10 (hour) 4 (hour) 18+10=28( ≥ 24)
10 (minute) + 20 (minute) → 30 (minute)
30 (second) 5 (second) 35 (second)
18 hours, 10 minutes, 30 seconds 10 hours, 20 minutes, 5 seconds 4 hours, 30 minutes, 35 seconds
564
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.4 TSUB
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
Two time data are subtracted and stored in the word device.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
TSUB
Instruction
Configuration of
EN ENO
TSUB 16 bits Continuous TSUB(EN,s1,s2,d);
s1 d
s2
EN
TSUBP
ENO
4
TSUBP 16 bits Pulse TSUBP(EN,s1,s2,d);
Instructions
Explanation of
How to Read
s1 d
s2
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Input
"Hour" of subtraction time data (hour, minute, second) (3 points occupied) ANY16
variable
"Hour" of subtraction time data (hour, minute, second) (3 points occupied) ANY16
ENO Execution state Bit
Output
The subtracting result of two time data (hour, minute, second) is stored (3
variable
points occupied)
ANY16
6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 7
z z z S1 S2 z
Instructions
Applied
z z z S1 S2 z
z z z S1 S2 z
S: Refer to "Cautions".
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
565
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation (TSUB, TSUBP)
From the time data (hour, minute, second) of the device specified by , the time data (hour, minute,
second) of the device specified by is subtracted, and the result is stored in the device specified by .
Command
input TSUB *1. Device for storing "hour" of subtraction time data
EN ENO (hour, minute, second)
*1 s1 d *2 *2. Device for storing the subtracted result of two time
data (hour, minute, second)
*1 s2
( s1 , s1 +1, s1 +2) - ( s2 , s2 +1, s2 +2)
→( d , d +1, d +2)
s1 (hour) s2 (hour) d (hour) The range of "hour" is 0 to 23.
s1 +1 (minute) - s2 +1 (minute) → d +1 (minute) The range of "minute" is 0 to 59.
s1 +2 (second) s2 +2 (second) d +2 (second) The range of "second" is 0 to 59.
If the operation result is less than 0 hour, the borrow flag is turned ON, and the time by adding 24 hours to the
simple difference is stored as the operation result. If the operation result is 0 (0 hour, 0 minute, 0 second), the
zero flag is turned ON.
Cautions
1) Number of devices occupied
Three devices are occupied each in , and .
Be careful not to overlap with the devices used in machine control.
2) When using the time (hour, minute, second) of the clock data of the real time clock built in the PLC, first
read out the value of the special data register by using TRD, TRDP, and specify the word device in each
operand.
3) Applicable devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
Program example
[Structured ladder] [ST]
X000 TSUB TSUB(X000,D10,D20,D30);
EN ENO
(D10,D11,D12) - (D20,D21,D22)
D10 s1 d D30
→ (D30,D31,D32)
D20 s2
D 10 10 (hour) D 20 3 (hour) D 30 7 (hour)
D 11 30 (minute) - D 21 10 (minute) → D 31 20 (minute)
D 12 10 (second) D 22 5 (second) D 32 5 (second)
10 hours, 30 minutes, 10 seconds 3 hours, 10 minutes, 5 seconds 7 hours, 20 minutes, 5 seconds
If the operation result is less than 0 hour
s1 s2 d
5 (hour) 18 (hour) 11 (hour) 5-18=-13( < 0)
20 (minute) - 10 (minute) → 10 (minute)
40 (second) 5 (second) 35 (second)
5 hours, 20 minutes, 40 seconds 18 hours, 10 minutes, 5 seconds 11 hours, 10 minutes, 35 seconds
566
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.5 HTOS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts the "hour, minute, second" unit (time) data into second unit data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
HTOS
Instruction
Configuration of
HTOS 16 bits Continuous EN ENO HTOS(EN,s,d);
s d
HTOSP
HTOSP 16 bits Pulse EN ENO HTOSP(EN,s,d);
s d 4
Instructions
Explanation of
How to Read
DHTOS
DHTOS 32 bits Continuous EN ENO DHTOS(EN,s,d);
s d
DHTOSP 32 bits Pulse EN
DHTOSP
ENO DHTOSP(EN,s,d);
5
Basic Instruction
s d
2. Set data
Data type
Variable Description 16-bit
operation
32-bit
operation
6
Instructions
Step Ladder
EN Execution condition Bit
Input
variable Head device for storing the time data (hour, minute, second) before
ANY16
conversion
ENO Execution state Bit
Output
variable Device for storing the time data (hour, minute, second) after
conversion
ANY16 ANY32 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
Function
and Pulse Catch
Interrupt Function
z z z z z z z z z z
z z z z z z z z z
A
and addresses
between devices
Relationships
567
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation (HTOS/HTOSP)
The time data (hour, minute, second) of the device specified by is converted into the second unit, and
the result is stored in the device specified by .
Command
input HTOS
EN ENO
Head device for storing the time data (hour, s d Device for storing the time data (hour,
minute, second) before conversion minute, second) after conversion
d
s hour (0 to 9)
s +1 minute (0 to 59) second
s +2 second (0 to 59)
For example, when 4 hours, 29 minutes, 31 seconds is specified, the operation is as follows.
d
s 4
s +1 29 16171
s +2 31
2. 32-bit operation (DHTOS/DHTOSP)
The time data (hour, minute, second) of the device specified by is converted into the second unit, and
the result is stored in the device specified by
Command
input DHTOS
EN ENO
Head device for storing the time data (hour, s d Label
minute, second) before conversion The device for storing the time data
(seconds) after conversion is defined.
d +1 d
s hour (0 to 32767)
s +1 minute (0 to 59) second
s +2 second (0 to 59)
For example, when 35 hours, 10 minutes, 58 seconds is specified, the operation is as follows.
d +1 d
s 35
s +1 10 126658
s +2 58
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the
simple project.
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
568
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Error
Outline
In the following case, it is an operation error, and the error flag (M8067) is turned ON, and the error code is
stored in D8067.
1) When the data of the device specified by is out of the range. (Error code: K6706)
Program example
2
Instruction List
This is a program for converting the time data being read out from the real-time clock built in the PLC, when
the X020 is ON, into the second unit, and storing in D100, D101.
[Structured ladder] [ST]
X020
EN
TRD
ENO
D10:=TRD(X020);
VAR_SECOND:=DHTOS(X020,D13);
3
Instruction
Configuration of
d D10
DHTOS
EN ENO
D13 s d VAR_SECOND
VAR_SECOND is a global label,
4
Instructions
Explanation of
How to Read
and D100 is defined.
Operation
1) Reading operation of clock data by TRD
5
Basic Instruction
Real-time D10 2004 Year
clock
D11 1 Month
D12 31 Day
6
D13 20 hour Clock data
D14 21 minute Time data
Instructions
Step Ladder
D15 23 second
D16 6 Day of week
2) Conversion operation to seconds by DHTOS
7
D13 20
Instructions
Applied
D101,D100
D14 21 73283
D15 23
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
569
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
7.15.6 STOH
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts the time data in second unit into time data in "hour, minute, second" unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
STOH
STOH 16 bits Continuous EN ENO STOH(EN,s,d);
s d
STOHP
STOHP 16 bits Pulse EN ENO STOHP(EN,s,d);
s d
DSTOH
DSTOH 32 bits Continuous EN ENO DSTOH(EN,s,d);
s d
DSTOHP
DSTOHP 32 bits Pulse EN ENO DSTOHP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
Input EN Execution condition Bit
variable Device for storing the time data in second unit before conversion ANY16 ANY32
ENO Execution state Bit
Output
variable Device for storing the time data in "hour, minute, second" unit after
ANY16
conversion
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit designation Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z z z z z z
570
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Function and operation explanation
Outline
1. 16-bit operation
The second unit data of the device specified by is converted into "hour, minute, second" unit, and the
result is stored in the device specified by .
Command
STOH
2
input
Instruction List
EN ENO
Device for storing the time data in s d Device for storing the time data in "hour, minute, second"
second unit before conversion unit after conversion
s
d hour (0 to 9)
3
second (0 to 32767) d +1 minute (0 to 59)
Instruction
Configuration of
d +2 second (0 to 59)
For example, when 29011 seconds is specified, the operation is as follows.
s d 8 4
Instructions
Explanation of
How to Read
29011 d +1 3
d +2 31
2. 32-bit operation
The second unit data of the device specified by is converted into "hour, minute, second" unit, and the 5
Basic Instruction
result is stored in the device specified by .
Command
input DSTOH
EN ENO
Label s d Device for storing the time data in "hour, minute, second"
(The device for storing
the time data in second
unit after conversion 6
Instructions
Step Ladder
unit before conversion
is defined.)
s +1 s
d hour (0 to 32767)
second (0 to 117964799) d +1 minute (0 to 59)
7
+2 second (0 to 59)
Instructions
Applied
d
For example, when 45325 seconds is specified, the operation is as follows.
s +1 s
d 12
45325 d +1 35
8
Function
and Pulse Catch
Interrupt Function
d +2 25
Cautions
1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the A
simple project.
and addresses
between devices
Relationships
When handling 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label.
Error
In the following case, it is an operation error, and the error flag (M8067) is turned ON, and the error code is
stored in D8067.
1) When the data of the device specified by is out of the range. (Error code: K6706)
571
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Program example
This is a program for converting the second unit data stored in D0, D1 when the X020 is turned ON, into the
"hour, minute, second" unit, and storing the result in D100, D101, D102.
[Structured ladder] [ST]
X020 DSTOH D100:=DSTOH(X020,VAR_SECOND)
EN ENO
VAR_SECOND s d D100
VAR_SECOND is a global label,
and D100 is defined.
Operation
1) Conversion into the "hour, minute, second" unit by STOHP instruction (when 40000 seconds is specified
by D1, D0)
D100 11
D1,D0 40000 D101 6
D102 40
572
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.7 TRD
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
The clock data is read out in the real-time clock built in the PLC.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
TRD
Instruction
Configuration of
TRD 16 bits Continuous EN ENO TRD(EN,d);
d
TRDP
TRDP 16 bits Pulse EN ENO
d
TRDP(EN,d);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
ENO Execution state Bit
5
Basic Instruction
Output
variable The reading destination of clock data and the head device are specified (7
ANY16
points occupied).
3. Applicable devices
Operand
Bit Devices Word Devices
System Special Cons Real
Others
Character
6
System user Digit designation Index Pointer
Instructions
Step Ladder
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z S1 S2 z
S: Refer to "Cautions".
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
573
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation (TRD)
The clock data (D8013 to D8019) of the real-time clock built in the PLC is read out into the device specified by
in the following format.
[Structured ladder] [ST] This instruction reads out the
D0:=TRD(X000); real-time clock data of the PLC
TRD
X000 into seven data registers.
EN ENO
d D0
Device Item Clock data Device Item
D8018 Year (solar calendar)
0 to 99 (Lower 2 digits of
year) → D0 Year (solar calendar)
D8017 Month 1 to 12 → D1 Month
→
Special data register
D8016 Day 1 to 31 D2 Day
D8015 hour 0 to 23 → D3 hour
D8014 minute 0 to 59 → D4 minute
D8013 second 0 to 59 → D5 second
D8019 Day of week 0 (Sunday) to 6 (Saturday) → D6 Day of week
Cautions
1. Number of devices occupied
Seven devices specified by are occupied.
Be careful not to overlap with the devices used in machine control.
2. Applicable devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
574
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.8 TWR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
The clock data is written into the real-time clock built in the PLC.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
TWR
Instruction
Configuration of
TWR 16 bits Continuous EN ENO TWR(EN,s);
s
TWRP
TWRP 16 bits Pulse EN
s
ENO TWRP(EN,s);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable The writing source of clock data and the head device are specified (7
points occupied).
ANY16 5
Basic Instruction
Output
ENO Execution state Bit
variable
3. Applicable devices
Operand
Bit Devices Word Devices
Special Cons Real
Others
Character
6
System user Digit designation System user Index Pointer
Instructions
Step Ladder
type unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z S1 S2 z
S: Refer to "Cautions".
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
575
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
The setting clock data stored in the device specified by is written into the clock data (D8013 to D8019) of
the real-time clock built in the PLC.
X000 TWRP
EN ENO
D10 s
1) D8018 (year data) can be also changed over to four-digit mode. (See Program example.)
Device Item Clock data Device Item
D 10 Year (solar calendar)
0 to 99 (Lower 2 digits
of year) → D8018 Year (solar calendar)
D 11 Month 1 to 12 → D8017 Month
D 12 Day 1 to 31 → D8016 Day
Special data register
Time setting data
D 13 hour 0 to 23 → D8015 hour
D 14 minute 0 to 59 → D8014 minute
D 15 second 0 to 59 → D8013 second
D 16 Day of week
0 (Sunday) to 6
(Saturday) → D8019 Day of week
2) When TWR or TWRP is executed, the clock data of the real-time clock is changed immediately.
Therefore, in the device to be specified by , you are advised to transfer the clock data of several
minutes ahead, and execute the instruction when reaching the exact time.
3) When setting the clock data (time setting) by this instruction, you are not required to control the special
auxiliary relay M8015 (time stopping and time setting).
4) The day of week of FX1S, FX1N, FX1NC PLCs is set automatically depending on the content of the date
regardless of the written numeric value.
5) If a numeric value of non-existing date is entered, the clock data is not changed. Enter correct clock data,
and write again.
Cautions
1. Number of devices occupied
The device specified by occupies the subsequent seven devices.
Be careful not to overlap with the devices used in machine control.
2. Applicable devices are limited.
S1: FX3U, FX3UC, FX3G PLCs only are applicable.
S2: FX3U, FX3UC PLCs only are applicable.
576
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Program example
Outline
1. Setting example of clock data (time)
To set the real-time clock. In the case of 15 hours, 20 minutes, 30 seconds, Tuesday, April 25, 2001.
[Structured ladder] [ST]
2
M0:=LDP(TRUE,X000);
Instruction List
LDP D0:=MOV(M0,K1);
EN ENO M0 D1:=MOV(M0,K4);
X000 s d
D2:=MOV(M0,K25);
D3:=MOV(M0,K15);
M0 MOV
3
Year (lower 2 digits) D4:=MOV(M0,K20);
EN ENO
D5:=MOV(M0,K30);
K1 s d D0
Instruction
Configuration of
D6:=MOV(M0,K2);
MOV TWR(M0,D0);
EN ENO Month M8017:=X001;
K4 s d D1
EN
MOV
ENO Day 4
Instructions
Explanation of
How to Read
K25 s d D2
MOV
EN ENO hour
K15 s d D3
MOV 5
EN ENO
Basic Instruction
minute
K20 s d D4
MOV
EN ENO second
s d
6
K30 D5
MOV
Instructions
Step Ladder
EN ENO Day of week
K2 s d D6
TWR Updating of current value of
EN ENO built-in real-time clock
D0 s 7
Instructions
Applied
X001
M8017 Correction of ± 30 seconds
8
1) When setting the time, first set the time of several minutes ahead, and turn ON the X000 when reaching
Function
and Pulse Catch
Interrupt Function
the exact time, then the set time is written into the real-time clock, and the clock data is updated.
2) Every time the X001 is turned ON, ±30 seconds can be corrected.
A
and addresses
between devices
Relationships
577
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
3) When handling the year in four digits, please add the following program.
D8018 operates in four-digit year mode from the second scan after RUN of PLC.
M8002 MOV
EN ENO
Initial pulse K2000 s d D8018
a) Usually, the PLC operates in two-digit year mode. After RUN of PLC, by executing the above
instruction, and transferring K2000 (fixed value) to D8018 (year) for one operation cycle only, the
operation is changed to four-digit mode.
b) This program must be executed every time the PLC is set to RUN. By transferring K2000, only the
year display is changed to four-digit mode, and the present time is not changed.
c) In the case of four-digit mode of the year, 80 to 99 correspond to 1980 to 1999, and 00 to 79
correspond to 2000 to 2079.
Example: 80=1980, 99=1999, 00=2000, 79=2079
4) When connecting with the data access unit of FX-10DU, FX-20DU, FX-25DU types, please set the year in
two-digit mode. If set in four-digit mode, the year is not displayed correctly in the present versions of
these DU types.
When the PLC is in four-digit mode, if the clock is set from FX-10DU, 20DU, 25DU, it must be noted that
the mode is changed to two-digit mode.
578
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
7.15.9 HOUR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction adds and measures the ON time duration of input contact in one-hour unit.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
Instruction
Configuration of
HOUR
EN ENO
HOUR 16 bits Continuous HOUR(EN,s,d1,d2);
s d1
d2
EN
DHOUR
ENO
4
DHOUR 32 bits Continuous DHOUR(EN,s,d1,d2);
Instructions
Explanation of
How to Read
s d1
d2
2. Set data
Data type 5
Variable Description 16-bit 32-bit
Basic Instruction
operation operation
Input EN Execution condition Bit
variable ON time duration of d2 (set in one-hour unit) ANY16 ANY32
ENO Execution state Bit
Output
variable
Present value of one-hour unit (data register for power failure hold is ARRAY [1..2]
specified) OF ANY16
ARRAY [1..3]
OF ANY16
6
Instructions
Step Ladder
Device of alarm output destination Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand
type
System user Digit designation
System
user
Special
unit
Index
Cons Real
tant Number
Character
String
Pointer 7
Instructions
Applied
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S2 S3 z z z z z
z S2 z
zz z S1 z
8
S: Refer to "Cautions".
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
579
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
Function and operation explanation
1. 16-bit operation
When the cumulative total of ON time duration of
Command
input HOUR command input exceeds the time of the device
EN ENO specified by , the device specified by is
ON time duration of device d1 Label 2 *1 turned ON. In +1, the present value of less
specified by d2 d2 Device of alarm than one hour is stored in one-second unit.
output destination
*1. In label 2, the device for storing the present
value of one-hour unit is defined.
: The time until is turned ON is specified in one-hour unit.
: Present value of one-hour unit
+1 : Present value of less than one hour (one-second unit)
: Device of alarm output destination
To be turned ON when the present value exceeds the specified time of .
1) To use the present value data continuously after the PLC power source is turned OFF, please specify the
data register for power failure hold in the device specified by .
When the data register for general purpose is used, the present value data is cleared when the PLC
power source is turned OFF, or when changed from STOP to RUN.
2) Measurement continues even after the alarm output (device specified by ) is turned ON.
3) Measurement stops when the present value of the device specified by reaches the maximum value
of 16-bit figure. When desired to measure continuously, please clear the present values of to
+1.
2. 32-bit operation
Command
input DHOUR
EN ENO
Label 1 *1 s d1 Label 3 *2
d2 Device of alarm
output destination
*1. In label 1, the ON time of the device
specified by d2 is defined.
*2. In label 3, the device for storing the present
value of one-hour unit is defined.
[ +1, ] : Time setting until is turned ON
Specify by +1 (upper digit), (lower digit).
[ +1, ] : Present value of one-hour unit
Store in +1 (upper digit), (lower digit).
+2 : Present value of less than one hour (one-second unit)
: Specification of alarm output
To be turned ON when the present value , +1 exceeds the time specified
by .
1) To use the present value data continuously after the PLC power source is turned OFF, please specify the
data register for power failure hold in the device specified by .
When the data register for general purpose is used, the present value data is cleared when the PLC
power source is turned OFF, or when changed from STOP to RUN.
2) Measurement continues even after the alarm output (device specified by ) is turned ON.
3) Measurement stops when the present value of the device specified by reaches the maximum value
of 32-bit figure. When desired to measure continuously, please clear the present values of to
+2.
580
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.15 Real Time Clock Control
1
Cautions
Outline
1) When handling array data or 32-bit data in structured program, you cannot specify 16-bit device directly
unlike the simple project.
When handling array data or 32-bit data, please use the label.
However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
When specifying the device, use the global label. 2
Instruction List
2) FX2N, FX2NC PLCs are supporting the instruction at V3.00 or later.
3) Number of devices occupied
The device specified by occupies two devices (16-bit operation) or three devices (32-bit operation).
4) Be careful not to overlap with the devices used in machine control.
S1: FX3U, FX3UC PLCs only are applicable, index (V, Z) decoration is disabled.
S2: FX3U, FX3UC, FX3G PLCs only are applicable.
3
Instruction
Configuration of
S3: FX3U, FX3UC PLCs only are applicable.
Program example
When the cumulative total of ON time duration of X000 exceeds 300 hours, Y005 is turned ON.
In D201, the present time of less than one hour is stored in one-second unit. 4
Instructions
Explanation of
How to Read
[Structured ladder] [ST]
HOUR VAR_TIME:=HOUR(X000,K300);
EN ENO Y005:=HOUR(X000,K300);
K300 s d1 VAR_TIME
d2 Y005
5
Basic Instruction
VAR_TIME is a global label,
and D200 is defined.
: Time setting for turning ON
Specified in one-hour unit.
: Present value of one-hour unit
+1 : Present value of less than one hour (one-second unit) 6
: Specification of alarm output
Instructions
Step Ladder
To be turned ON when the present value of the device specified by exceeds the
specified time of the device specified by . (In this example, to be turned ON when
reaching 300 hours + 1 second.)
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
581
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
7.16 External Device
7.16.1 GRY
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts a binary value into a gray code, and transfers it.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
GRY
GRY 16 bits Continuous EN ENO GRY(EN,s,d);
s d
GRYP
GRYP 16 bits Pulse EN ENO GRYP(EN,s,d);
s d
DGRY
DGRY 32 bits Continuous EN ENO DGRY(EN,s,d);
s d
DGRYP
DGRYP 32 bits Pulse EN ENO DGRYP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable Conversion source data or word device storing conversion source
ANY16 ANY32
data
Output ENO Execution state Bit
variable Word device storing data after conversion ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z z z z z
z z z z z z S1 S2 z z z
S: Refer to "Cautions"
582
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
1
Function and operation explanation
Outline
1. 16-bit operation (GRY, GRYP)
[Structured ladder] [ST]
2
Command GRY(EN,s,d);
input GRY
EN ENO
Instruction List
Conversion source data s d Word device storing
or word device storing data after conversion
conversion source data
This instruction converts and transfers data from the
source (binary) to the destination (gray code).
3
When the data specified by s is K1234 and
Instruction
Configuration of
the device specified by d is K3Y10
b15 b0
BIN 1234 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0
Instructions
Explanation of
How to Read
Y23 Y20 Y17 Y10
GRY 1234 0 1 1 0 1 0 1 1 1 0 1 1
1) The device specified by can store a value from 0 to 32,767.
2. 32-bit operation (DGRY, DGRYP) 5
Basic Instruction
[Structured ladder] [ST]
Command DGRY(EN,s,d);
input DGRY
EN ENO
Label 1*1 s d Label 2*2
*1. Label 1 is defined as the conversion source data or 6
the device that stores the conversion source data.
Instructions
Step Ladder
*2. Label 2 is defined as the device that stores the data
after conversion.
1) A binary value can be converted into a gray code of up to 32 bits.
2) The device specified by can store a value from 0 to 2,147,483,647.
7
Instructions
Applied
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project.
Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
8
Function
and Pulse Catch
Interrupt Function
2) The data conversion speed depends on the scan time of the PLC.
3) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only.
A
and addresses
between devices
Relationships
583
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
7.16.2 GBIN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts a gray code into a binary value, and transfers it.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
GBIN
GBIN 16 bits Continuous EN ENO GBIN(EN,s,d);
s d
GBINP
GBINP 16 bits Pulse EN ENO GBINP(EN,s,d);
s d
DGBIN
DGBIN 32 bits Continuous EN ENO DGBIN(EN,s,d);
s d
DGBINP
DGBINP 32 bits Pulse EN ENO DGBINP(EN,s,d);
s d
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable Conversion source data or word device storing conversion source
ANY16 ANY32
data
Output ENO Execution state Bit
variable Word device storing data after conversion ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 z z z z z
z z z z z z S1 S2 z z z
S: Refer to "Cautions"
584
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
1
Function and operation explanation
Outline
1. 16-bit operation (GBIN, GBINP)
[Structured ladder] [ST]
Command
input GBIN GBIN(EN,s,d); 2
Instruction List
EN ENO
Conversion source data s d Word device storing
or word device storing data after conversion
conversion source data
This instruction converts and transfers data from
the source (gray code) to the destination (binary). 3
Instruction
Configuration of
When the device specified by s is K3X000 and the device
specified by d is D10
X13 X10 X7 X0
GRY 1234 0 1 1 0 1 0 1 1 1 0 1 1
b15
4
b0
Instructions
Explanation of
How to Read
D10 BIN 1234 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0
1) This instruction can be used for detecting an absolute position by a gray code type encoder.
2) The device specified by can store a value from 0 to 32,767.
2. 32-bit operation (DGBIN, DGBINP) 5
Basic Instruction
[Structured ladder] [ST]
Command DGBIN(EN,s,d);
input DGBIN
EN ENO
Label 1*1 s d Label 2*2
6
Instructions
Step Ladder
*1. Label 1 is defined as the conversion source data or
the device that stores the conversion source data.
*2. Label 2 is defined as the device that stores the data
after conversion.
1) A gray code can be converted into a binary value of up to 32 bits.
7
2) The device specified by can store a value from 0 to 2,147,483,647.
Instructions
Applied
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project.
Use a label to handle array data or 32-bit data. 8
A 32-bit counter can be specified directly as it is a 32-bit long device.
Function
and Pulse Catch
Interrupt Function
Use a global label to specify a device.
2) When an input relay (X) is specified as , the response delay will be "Scan time of PLC + Input filter
constant."
The input filter value can be changed in X000 to X017 using REFF, REFFP or D8020 (filter adjustment)
so that the filter constant delay is eliminated. A
and addresses
between devices
Relationships
*1. The FX3G and FX2N-16M PLCs use X000 to X007.
3) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only.
585
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
7.16.3 RD3A
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads an analog input value from the analog block FX0N-3A or FX2N-2AD.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RD3A
EN ENO
RD3A 16 bits Continuous RD3A(EN,m1,m2,d);
m1 d
m2
RD3AP
EN ENO
RD3AP 16 bits Pulse RD3AP(EN,m1,m2,d);
m1 d
m2
2. Set data
Variable Description Data type
EN Execution condition Bit
Special block number
Input • FX1N, FX1NC, FX2N, FX2NC, FX3U and FX3UC series PLCs: K0 to K7 ANY16
variable • FX3UC-32MT-LT (-2) series PLC: K1 to K7
Analog input channel ANY16
Output ENO Execution state Bit
variable Word device storing the read data ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 z z z z z
z z z z z z z S1 z z z z z
z z z z z z S1 z z z
S: Refer to "Cautions"
586
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
1
Function and operation explanation
Outline
1. 16-bit operation (RD3A)
[Structured ladder]
Command
input RD3A 2
EN ENO
Instruction List
Special block number m1 d Word device storing
Analog input channel m2 the read data
<For FX3U and FX3UC PLCs>
This instruction reads an analog input value from the analog block FX0N-3A or FX2N-2AD.
: Special block number 3
FX3U and FX3UC (D, DSS) series PLCs :K0 to K7
Instruction
Configuration of
FX3UC-32MT-LT(-2) :K1 to K7 (K0 indicates the built-in CC-Link/LT master.)
: Analog input channel number
FX0N-3A : K1(ch1), K2(ch2)
FX2N-2A : K21(ch1), K22(ch2)
: Read data 4
A value read from the analog block is stored.
Instructions
Explanation of
How to Read
FX0N-3A : 0 to 255 (8 bits)
FX2N-2AD : 0 to 4095 (12 bits)
<For FX1N and FX1NC PLCs>
This instruction reads an analog input value from the analog block FX0N-3A.
: Special block number
5
Basic Instruction
K0 to K7
: Analog input channel number
K1 or K2
: Read data
A value read from the analog block is stored.
FX0N-3A : 0 to 255 (8 bits)
6
Instructions
Step Ladder
<For FX2N and FX2NC PLCs>
This instruction reads an analog input value from the analog block FX0N-3A or FX2N-2AD.
: Special block number
K0 to K7 7
: Analog input channel number
Instructions
Applied
FX0N-3A : K1(ch1), K2(ch2)
FX2N-2AD : K21(ch1), K22(ch2)
: Read data
A value read from the analog block is stored.
FX0N-3A : 0 to 255 (8 bits) 8
FX2N-2AD : 0 to 4095(12 bits)
Function
and Pulse Catch
Interrupt Function
Cautions
1) The FX2N and FX2NC PLCs of V3.00 or later support RD3A instruction.
2) Some restrictions to applicable devices
S1: Applicable to the FX3U and FX3UC PLCs only. A
and addresses
between devices
Relationships
587
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
7.16.4 WR3A
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes a digital value to the analog block FX0N-3A and FX2N-2DA.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WR3A
EN ENO
WR3A 16 bits Continuous m1 WR3A(EN,m1,m2,s);
m2
s
WR3AP
EN ENO
WR3AP 16 bits Pulse m1 WR3AP(EN,m1,m2,s);
m2
s
2. Set data
Variable Description Data type
EN Execution condition Bit
Special block number
• FX1N, FX1NC, FX2N, FX2NC, FX3U and FX3UC series PLCs: K0 to K7 ANY16
Input
• FX3UC-32MT-LT (-2) series PLC: K1 to K7
variable
Analog output channel ANY16
Data to be written or word device storing data to be written. ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 z z z z z
z z z z z z z S1 z z z z z
z z z z z z S1 z z z
S: Refer to "Cautions"
588
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.16 External Device
1
Function and operation explanation
Outline
1. 16-bit operation (WR3A, WR3AP)
[Structured ladder] [ST]
2
Command
input WR3A WR3A(EN,m1,m2,s);
EN ENO
Instruction List
Special block number m1
Analog output channel m2
Data to be written or word device s
storing data to be written.
<For FX3U and FX3UC PLCs>
3
Instruction
Configuration of
This instruction writes a digital value to the analog block FX0N-3A or FX2N-2DA.
: Special block number
FX3U and FX3UC (D, DSS) series PLCs: :K0 to K7
FX3UC-32MT-LT(-2) :K1 to K7 (K0 indicates the built-in CC-Link/LT master.)
: Analog output channel number
FX0N-3A : K1(ch1) 4
FX2N-2DA : K21(ch1), K22(ch2)
Instructions
Explanation of
How to Read
: Data to be written
This specifies the value to be written to the analog block.
FX0N-3A : 0 to 255 (8 bits)
FX2N-2DA : 0 to 4095 (12 bits)
5
<For FX1N and FX1NC PLCs>
Basic Instruction
This instruction writes a digital value to the analog block FX0N-3A.
: Special block number
K0 to K7
: Analog output channel number
Valid for K1 only 6
: Data to be written
Instructions
Step Ladder
This specifies the value to be written to the analog block.
FX0N-3A : 0 to 255 (8 bits)
<For FX2N and FX2NC PLCs>
This instruction writes a digital value to the analog block FX0N-3A or FX2N-2DA.
7
Instructions
Applied
: Special block number
K0 to K7
: Analog output channel number
FX0N-3A : K1(ch1)
FX2N-2AD : K21(ch1), K22(ch2)
: Data to be written 8
Function
and Pulse Catch
Interrupt Function
This specifies the value to be written to the analog block.
FX0N-3A : 0 to 255 (8 bits)
FX2N-2DA : 0 to 4095(12 bits)
Cautions
1) The FX2N and FX2NC PLCs of V3.00 or later support RD3A instruction.
A
and addresses
between devices
Relationships
2) Some restrictions to applicable devices.
S1: Applicable to the FX3U and FX3UC PLCs only.
589
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
7.17 Extension Function
7.17.1 EXTR_IN
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes the operation control instructions and parameters of the memory for extension function.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
EXTR_IN
EN ENO
s
EXTR_IN 16 bits Continuous EXTR_IN(EN,s,sd1,sd2,sd3);
sd1
sd2
sd3
EXTRP_IN
EN ENO
EXTRP_IN 16 bits Pulse s EXTRP_IN(EN,s,sd1,sd2,sd3);
sd1
sd2
sd3
2. Set data
Variable Description Data type
EN Execution condition Bit
Function number
• K11: Inverter operation control instruction ANY16
• K13: Writing inverter parameter
Input Inverter station number ANY
variable • When issuing inverter operation control instruction: inverter instruction
code (hexadecimal)
ANY
• When writing inverter parameter:
Inverter parameter number (decimal)
Value written in inverter ANY
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
zzz z z z z z z z z z z z z z
zzz z z z z z z z z z z z z z
zzz z z z z z z z z z z z z z
590
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
1
Function and operation explanation1 (Inverter operation control)
Outline
→ For the details of the instruction, refer to Communication Control Manual.
This instruction is for using the optional memory for extension functions.
When K11 is set to the device specified by , the control values necessary for inverter operation are
written in the PLC.
2
1. 16-bit operation (EXTR_IN, EXTRP_IN)
Instruction List
As for the inverter*1 of the station number specified by , the control values (contents of the device
specified by ) are written to the "instruction code" (contents of the device specified by )*2.
Command
EXTR_IN
3
input
EN ENO
K11 s
Instruction
Configuration of
Inverter station number sd1
Inverter instruction code (hexadecimal) sd2
Value written in inverter sd3
*1. General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made
by Mitsubishi Electric Corporation
4
Instructions
Explanation of
How to Read
*2. Refer to the "Instruction code List" described later.
Also refer to the pages describing in detail the computer links from the inverter manual.
2. Inverter instruction codes
The table below shows the inverter instruction codes and their functions of the device specified by .
For the instruction codes, refer to the pages describing in detail the computer links from the inverter manual.
5
Basic Instruction
Instruction codes of Applicable inverters
inverter specified by Contents to be written
A500 E500 S500
(hexadecimal)
HFB Operation mode 3 3 3
HF3
HFA
Special monitor selection No.
Operation command
3
3 3 3
6
Instructions
Step Ladder
HEE Writing set frequency (EEPROM) 3 3 3
HED Writing set frequency (RAM) 3 3 3
HFD Inverter reset 3 3 3
HF4 Batch-clearing error contents 3 3 3
HFC Clearing all parameters 3 3 3
7
HFC User clear 3
Instructions
Applied
3. Related devices
Special
Special data
auxiliary Function Function
register
relays
M8104
ON when installing extended ROM
D8104 Extended ROM type code
8
cassette
Function
and Pulse Catch
Interrupt Function
D8105 Extended ROM version
Function to be defined for each EXTR
M8154 D8154 Time waiting for EXTR instruction response
instruction
M8155
Communications port being used by EXTR
instruction
D8155
Step number of instruction occupying communications
port
A
and addresses
between devices
Relationships
M8156 Communication error by EXTR instruction D8156 Communication error by EXTR instruction
Communication error by EXTR instruction Communication error by EXTR instruction (Latch)*1
M8157 D8157
(Latch)*1 K1 if no error
*1. Cleared when changing from STOP to RUN.
591
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
Function and operation explanation2 (Writing inverter parameters)
→ For the details of the instruction, refer to Communication Control Manual.
This instruction is for using the optional memory for extension functions.
When K13 is set to device specified by , the inverter parameter is written.
1. 16-bit operation (EXTR-IN, EXTRP-IN)
The value (contents of the device specified by ) is written to the parameter (contents of the device
specified by ) of the inverter of the station number specified by .
Command
input EXTR_IN
EN ENO
K13 s
Inverter station number sd1
Inverter parameter number (decimal) sd2
Value written in inverter sd3
*1. General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made
by Mitsubishi Electric Corporation
2. Related devices
The same as the inverter operation control described above.
Caution
1) The FX2N and FX2NC PLCs of V3.00 or later support the EXTR_IN instruction.
592
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
1
7.17.2 EXTR_OUT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction is for the short mail transmission of the memory for extension function, inverter operation
monitoring instruction, and parameter readout.
1. Format and operation, execution form
Expression in each language
Instruction
name
Operation
Execution
form Structured ladder ST 3
Instruction
Configuration of
EXTR_OUT
EN ENO
EXTR_OUT 16 bits Continuous s sd3 EXTR_OUT(EN,s,sd1,sd2,sd3);
sd1
sd2
4
Instructions
Explanation of
How to Read
EXTRP_OUT
EN ENO
EXTRP_OUT 16 bits Pulse s sd3 EXTRP_OUT(EN,s,sd1,sd2,sd3);
sd1
sd2
5
2. Set data
Basic Instruction
Variable Description Data type
EN Execution condition Bit
Function number
• K0: Short mail transmission
• K10: Inverter operation monitoring instruction
• K12: Inverter parameter readout
ANY16
6
Instructions
Step Ladder
• When transmitting short mail:
Mail center, phone number of transmission destination and waiting time
Input • When issuing inverter operation monitoring instruction and reading ANY
variable parameter:
Inverter station number
• When transmitting short mail:
Transmission message format and message text
7
Instructions
Applied
• When issuing inverter operation monitoring instruction: inverter
ANY
instruction code (hexadecimal)
• When reading inverter parameter:
Inverter parameter number (decimal)
ENO Execution state Bit
Output
variable
•
•
When transmitting short mail: operation status
When issuing inverter operation monitoring instruction and reading
ANY
8
parameter:
Function
and Pulse Catch
Interrupt Function
Destination device storing readout value
3. Applicable devices
Bit Devices Word Devices Others
Operand
type
System user Digit specification
System
user
Special
unit
Index
Cons Real
tant Number
Character
String
Pointer A
and addresses
between devices
Relationships
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H E " " P
z z
zzz z z z z z z z z z z z z z
zzz z z z z z z z z z z z z z
zzz z z z z z z z z z z z z z
593
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
Function and operation explanation1 (Transmitting short mail)
→ For the details of the instruction, refer to Communication Control Manual.
This instruction is for using the optional memory for extension function.
When K0 is set to the device specified by , the PLC transmits the short mail.
The short mail is transmitted by the PLC. The NTT DoCoMo and other firms mobile phones capable of
receiving the short mail are notified.
The PLC connects to the NTT DoCoMo short mail center through the modem.
1. 16-bit operation (EXTR_OUT, EXTRP_OUT)
Message (contents of the device specified by ) is transmitted to the mail center (mail center specified by
).
Command
input EXTR_OUT
EN ENO
K0 s sd3 Operation status
Mail center, phone number of transmission destination, waiting time sd1
Transmission message format and message text sd2
2. Contents of message
The message should be as follows.
• Number of characters : Up to 50 half width characters (25 full width characters)
• Type of characters : Numbers, Kanji, Katakana, Hiragana, symbols, etc.
• Available characters : Use the character codes specified by the short mail service
• Receiving message : Received automatically.
3. Related devices
Special
Special data
auxiliary Function Function
register
relays
ON when installing extended ROM
M8104 D8104 Extended ROM type code
cassette
D8105 Extended ROM version
Function to be defined for each EXTR
M8154 D8154 Time waiting for EXTR instruction response
instruction
Communications port being used by EXTR Step number of instruction occupying communications
M8155 D8155
instruction port
M8156 Communication error by EXTR instruction D8156 Communication error by EXTR instruction
Communication error by EXTR instruction Communication error by EXTR instruction (Latch)*1
M8157 D8157
(Latch)*1 K1 if no error
*1. Cleared when changing from STOP to RUN.
594
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
1
Function and operation explanation2 (Monitoring inverter operation)
Outline
→ For the details of the instruction, refer to Communication Control Manual.
This instruction is for using the optional memory for extension functions.
When K10 is set to the device specified by , the inverter operation is monitored.
1. 16-bit operation (EXTR_OUT, EXTRP_OUT) 2
As for the inverter *1 of the station number specified by , the operation condition of the inverter
Instruction List
*2
corresponding to the "instruction code" (contents of the device specified by ) is read to the device
specified by .
Command
EXTR_OUT
3
input
EN ENO
K10 s sd3
Instruction
Configuration of
Destination device storing readout value.
Inverter station number sd1
Inverter instruction code sd2
*1. General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made
by Mitsubishi Electric Corporation
*2. Refer to the instruction code list described later.
4
Instructions
Explanation of
How to Read
Also refer to the pages describing in detail the computer links from the inverter manual.
2. Inverter instruction code
The table below shows the inverter instruction codes and their functions of the device specified by .
For the instruction codes, refer to the pages describing in detail the computer links from the inverter manual.
Applicable inverters
5
Basic Instruction
Inverter instruction code Contents to be read out
A500 E500 S500
(hexadecimal)
H7B Operation mode 3 3 3
H6F Output frequency [rotational speed] 3 3 3
H70 Output current 3 3 3
H71 Output voltage 3 3 6
Instructions
Step Ladder
H72 Special monitor 3
H73 Special monitor selection number 3
H74 Error contents 3 3 3
H75 Error contents 3 3 3
H76 Error contents
7
3 3
H77 Error contents 3 3
Instructions
Applied
H7A Inverter status monitor 3 3 3
H6E Set frequency (E2PROM) readout 3 3 3
H6D Set frequency (RAM) readout 3 3 3
H7F Link parameter extension setting Not commanded by for this instruction.
H6C Second parameter switchover
Use EXTR K12 instruction to set "second parameter
specification code" for automatic processing. 8
Function
and Pulse Catch
Interrupt Function
3. Related devices
The same as the short mail transmission described above.
A
and addresses
between devices
Relationships
595
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.17 Extension Function
Function and operation explanation3 (Reading inverter parameters)
→ For the details of the instruction, refer to Communication Control Manual.
This instruction is for using the optional memory for extension functions.
When K12 is set to the device specified by , the inverter parameter is read out to the PLC.
1. 16-bit operation (EXTR_OUT, EXTRP_OUT)
The value of the parameter specified by is read out from the inverter*1 of the station number specified by
to the device specified by .
Command
input EXTR_OUT
EN ENO
K13 s sd3 Destination device storing readout value.
Inverter station number sd1
Inverter parameter number sd2
*1. General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made
by Mitsubishi Electric Corporation
2. Related devices
The same as the short mail transmission described above.
Caution
The FX2N and FX2NC PLCs of V3.00 or later support the EXTR_IN instruction.
596
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
1
7.18 Others
Outline
7.18.1 COMRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction reads the comment data for registered devices written to the PLC by programming software
such as GX Works2.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
COMRD
COMRD 16 bits Continuous EN
s
ENO
d
COMRD(EN,s,d); 4
Instructions
Explanation of
How to Read
COMRDP
COMRDP 16 bits Pulse EN ENO COMRDP(EN,s,d);
d
2. Set data
5
Basic Instruction
Variable Description Data type
Input EN Execution condition Bit
variable Device for which comment to be read is registered ANY_SIMPLE
ENO Execution state Bit
Output
variable Head device storing read comment String 6
Instructions
Step Ladder
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 7
Instructions
Applied
zzz z z z z z z
z z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
597
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
Function and operation explanation
1. 16-bit operation (COMRD/COMRDP)
1) The comment registered for the device specified by is read, and stored in ASCII code in the device
specified by .
Command
input COMRDP *1. This defines the head of the device
EN ENO that stores the comment read out.
Device for which comment s d Label *1
to be read is registered
b15 b8 b7 b0
d +0 ASCII code of 2nd character ASCII code of 1st character
+1 ASCII code of 4th character ASCII code of 3rd character
Comment of device specified in s . +2 ASCII code of 6th character ASCII code of 5th character
16
+3 ASCII code of 8th character ASCII code of 7th character
characters
can be
ASCII code of 14th character ASCII code of 13th character stored.
+7 ASCII code of 16th character ASCII code of 15th character
+8 0000H
When the comment is made up of an even number of characters:
When M8091 is OFF, "0000H" is stored to the device following the last character.
When M8091 is ON, the device following the last character does not change.
For example, when the comment of the device specified by is "Line No.1 Start", it is stored in the
device specified by as shown below.
b15 b8 b7 b0
d +0 69H(i) 4CH(L)
+1 65H(e) 6EH(n)
+2 6FH(o) 4EH(N)
+3 31H(1) 2EH(. )
Comment of s +4 74H(t) 53H(S)
LineNo.1Start +5 72H(r) 61H(a)
+6 20H(space) 74H(t)
+7 20H(space) 20H(space)
+8 0000H
When the comment is made up of an odd number of characters:
When M8091 is OFF, "00H" is written to the high order byte of the device that stores the last character.
When M8091 is ON, the high order byte of the device that stores the last character does not change.
2) The last data of the device specified by is as follows depending on the ON/OFF status of M8091.
ON/OFF status Contents of processing
• When the comment is made up of an odd number of characters, "00H" is written to the high order one byte
(8 bits) of the device storing the last character of the comment.
M8091=OFF
• When the comment is made up of an even number of characters, "00H" is written to the device that follows
the device storing the last character of the comment.
• When the comment is made up of an odd number of characters, the high order one byte (8 bits) of the
device storing the last character of the comment does not change.
M8091=ON
• When the comment is made up of an even number of characters, the device that follows the device storing
the last character of the comment does not change.
Related devices
Device Name Description
Output character number
M8091 Refer to the above explanation.
selector signal
598
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
1
Cautions
Outline
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly
as in the case of a simple project.
Use a label to handle character string data.
Use a global label to specify a label.
2) Specify a device number in the device specified by for which a comment is registered in the PLC.
2
Instruction List
If a comment is not registered for the device specified by , "20H" (space) is stored in the device
specified by for the number of characters in the comment (16 half-width characters).
3) The FX3UC PLC of V2.20 or later supports this instruction.
Error 3
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
Instruction
Configuration of
stored in D8067.
1) When a comment is not registered for the device specified by (error code: K6706)
2) When the range of points used from the device specified by for the comment exceeds the
corresponding device range (error code: K6706)
The comment, however, is written up to that point.
4
Instructions
Explanation of
How to Read
Program examples
In the program shown below, the comment "Target Line A" registered to D100 is stored in ASCII code in D0
and later when X010 is set to ON. (When M8091 is OFF)
[Structured ladder] [ST] 5
Basic Instruction
X010 RST RST(X010,M8091);
EN ENO VAR_COMENT:=COMRDP(X010,D100);
d M8091
COMRDP
D100
EN
s
ENO
d VAR_COMENT *1
6
Instructions
Step Ladder
*1. VAR_COMENT is a global label and is defined as D0.
b15 b8 b7 b0
D0 61H(a) 54H(T)
D1 67H(g) 72H(r) 7
Comment of D100 D2 74H(t) 65H(e)
Instructions
Applied
Target Line A D3 4CH(L) 20H(space)
D4 6EH(n) 69H(i)
D5 20H(space) 65H(e)
D6 20H(space) 41H(A)
8
D7 20H(space) 20H(space)
D8 0000H
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
599
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
7.18.2 RND
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction generates random numbers.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RND
RND 16 bits Continuous EN ENO RND(EN,d);
d
RNDP
RNDP 16 bits Pulse EN ENO RNDP(EN,d);
d
2. Set data
Variable Description Data type
Input
EN Execution condition Bit
variable
Output ENO Execution state Bit
variable Head device storing a random number ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z
Function and operation explanation
1. 16-bit operation (RND/RNDP)
This instruction generates a pseudo-random number within the range from 0 to 32767, and stores it as a
random number to the device specified by .
In the pseudo-random number sequence, the source value of a random number is calculated at every time,
and this instruction calculates a pseudo-random number using the source value.
Command
input RND
EN ENO
d Head device storing
a random number
Pseudo-random number calculation equation:
(D8311, D8310) = (D8311, D8310)*1 × 103515245+12345...1)
d = "[D8311, D8310]>>16)& Logical product > 00007FFFh"
*1. To (D8311, D8310), write a non-negative value (0 to 2,147,483,647) only once when the PLC mode
switches from STOP to RUN.
[K1 is written to (D8311, D8310) as the initial value when the power is restored.]
600
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
1
Program examples
Outline
In the program example shown below, a random number is stored to D100 every time X010 turns ON.
When the PLC mode switches from STOP to RUN, the time data converted into seconds and added by the
value "(Year + Month) × Day" is written to (D8311 and D8310).
[Structured ladder] [ST]
2
Instruction List
TRD TRD(M8002,D0);
M8002
EN ENO The clock data is read. DHTOS(M8002,D3,VAR_SECOND);
d D0 ADD(M8002,D0,D1,D10);
MUL(M8002,D10,D2,VAR_MUL);
EN
DHTOS
ENO
Data in hour, minute and DADD(M8002,VAR_DATA1,VAR_DATA2,VAR_DATA3);
second → Data in second
3
D100:=RNDP(X010);
Instruction
Configuration of
D3 s d VAR_SECOND*1
ADD
EN ENO
D0 s1 d D10
D1 s2 4
Instructions
Explanation of
How to Read
MUL The data in second is added by
EN ENO the value "(Year + Month) × Day",
D10 s1 d VAR_MUL*2 and written to D8311 and D8310.
D2 s2
DADD 5
Basic Instruction
EN ENO
VAR_DATA1*3 s1 d VAR_DATA3*5
VAR_DATA2*4 s2
*1. VAR_SECOND is a global label and is defined as D14.
X010 RNDP
EN ENO
d D100
*2. VAR_MUL is a global label and is defined as D12.
*3. VAR_DATA1 is a global label and is defined as D14.
6
Instructions
Step Ladder
*4. VAR_DATA2 is a global label and is defined as D12.
*5. VAR_DATA3 is a global label and is defined as D8310.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
601
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.18 Others
7.18.3 DUTY
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction generates the timing signal whose one cycle corresponds to the specified number of
operation cycles.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DUTY
EN ENO
DUTY 16 bits Continuous DUTY(EN,n1,n2,d);
n1 d
n2
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Number of scans (operation cycles) to remain ON ANY16
variable
Number of scans (operation cycles) to remain OFF ANY16
Output ENO Execution state Bit
variable Timing clock output destination Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z
z z z z z z
S z
S: Refer to "Cautions"
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Function and operation explanation
Outline
1. 16-bit operation (DUTY)
1) The timing clock output of the device specified by is set to ON and OFF with the ON duration for "n1"
scans and OFF duration for "n2" scans.
Command
2
Instruction List
input DUTY
EN ENO
Number of scans (operation cycles) to remain ON n1 d Timing clock output destination
Number of scans (operation cycles) to remain OFF n2
Timing clock output OFF ON 3
destination d
Instruction
Configuration of
"n1" scans "n2" scans
0
Scan number count
"n1 + n2" scans
2) Specify either one among M8330 to M8334 as the timing clock output destination device specified by
. 4
Instructions
Explanation of
How to Read
3) The counted number of scans is stored in either one among D8330 to D8334 in accordance with the
timing clock output destination device specified by .
The counted number of scans stored in either one among D8330 to D8334 is reset when the counted
value reaches "n1 + n2" or when the command input (instruction) is set to ON.
Timing clock output destination
M8330
Scan counting device
D8330
5
Basic Instruction
M8331 D8331
M8332 D8332
M8333 D8333
M8334 D8334
4) When the command input is set to ON, the operation is started. The timing clock output destination device 6
specified by is set to ON or OFF by END instruction.
Instructions
Step Ladder
Even if the command input is set to OFF, the operation is not stopped. In the STOP mode, the operation
is suspended. When the power of the PLC is turned OFF, the operation is stopped.
5) When "n1" and "n2" are set to "0", the device specified by is set to the following status:
n1, n2 status
n1 = 0,n2 ≥ 0
ON/OFF status of (d)
d = fixed to OFF
7
Instructions
Applied
n1 > 0,n2 = 0 d = fixed to ON
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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Related devices
Device Name Description
M8330 Timing clock output 1
M8331 Timing clock output 2
M8332 Timing clock output 3 Timing clock output in DUTY instruction
M8333 Timing clock output 4
M8334 Timing clock output 5
Counted number of scans for
D8330 Counted number of scans for timing clock output 1 in DUTY instruction
timing clock output 1
Counted number of scans for
D8331 Counted number of scans for timing clock output 2 in DUTY instruction
timing clock output 2
Counted number of scans for
D8332 Counted number of scans for timing clock output 3 in DUTY instruction
timing clock output 3
Counted number of scans for
D8333 Counted number of scans for timing clock output 4 in DUTY instruction
timing clock output 4
Counted number of scans for
D8334 Counted number of scans for timing clock output 5 in DUTY instruction
timing clock output 5
Cautions
1) DUTY instruction can be used up to 5 times (points).
It is not permitted, however, to use the same timing clock output destination device (device specified by
) for two or more DUTY instructions.
2) The FX3UC PLC of V2.20 or later supports this instruction.
3) Some restrictions to applicable devices
S: Specify M8330 to M8334.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "n1" and/or "n2" is less than "0" (error code: K6706)
2) When any device other than M8330 to M8334 is set to the device specified by . (error code: K6705)
Program examples
In the program shown below, when X000 is set to ON, M8330 is set to ON for 1 scan and OFF for 3 scans.
[Structured ladder] [ST]
DUTY M8330:=DUTY(X000,K1,K3);
X000
EN ENO
K1 n1 d M8330
K3 n2
X000 OFF ON
M8330 OFF ON
1 scan 3 scans
3
2
D8330 1 1
current value 0 0
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1
7.18.4 CRC
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This CRC instruction calculates the CRC (cyclic redundancy check) value which is an error check method
used in communication.
In addition to CRC value, there are other error check methods such as parity check and sum check. For
obtaining the horizontal parity value and sum check value, CCD instruction is available. CRC instruction uses
"X16 + X15 + X2 + 1" as a polynomial for generating the CRC value (CRC-16).
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
CRC
CRC 16 bits Continuous
EN
s
ENO
d
CRC(EN,s,n,d); 4
Instructions
Explanation of
How to Read
n
CRCP
EN ENO
CRCP 16 bits Pulse CRCP(EN,s,n,d);
s d
n 5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable
Head device storing data for which the CRC value is generated ANY16
6
Number of 8-bit (byte) data for which the CRC value is generated or the
Instructions
Step Ladder
ANY16
device storing the number of data
Output ENO Execution state Bit
variable Device storing the generated CRC value ANY16
3. Applicable devices
7
Bit Devices Word Devices Others
Instructions
Applied
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S S S S z z z z z z
S S S z z z z z z 8
Function
and Pulse Catch
Interrupt Function
z z z z
S: Refer to "Cautions"
A
and addresses
between devices
Relationships
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Function and operation explanation
1. 16-bit operation
CRC value is generated for "n" 8-bit data (unit: byte) starting from a device specified in , and stored to the
device specified by .
The 8-bit conversion mode and 16-bit conversion mode are available in this instruction, and the mode can be
switched by turning ON or OFF M8161. For the operation in each mode, refer to the later descriptions.
X16 + X15 + X2 + 1" is used as a polynomial for generating the CRC value (CRC-16).
Command
input CRC
EN ENO
*1 s d *3
*2 n
*1. Head device storing data for which
the CRC value is generated
*2. Number of 8-bit (byte) data for which
the CRC value is generated or the
device storing the number of data
*3. Device storing the generated CRC value
1) 16-bit conversion mode [M8161 = OFF]
In this mode, the operation is executed for high-order 8 bits (byte) and low-order 8 bits (byte) of a device
specified in .
The operation result is stored to one 16-bit device specified in .
M8000
M8161 16-bit conversion mode
Command input
CRC
EN ENO
*1 s d *3
*2 n
*1. Head device storing data for which
the CRC value is generated
*2. Number of 8-bit (byte) data for which the CRC value is
generated or the device storing the number of data
*3. Device storing the generated CRC value
Example: = D100
= D0
n =6
Contents of target data
Device
8 bits 16 bits
Low-order byte Low-order bits of D100 01H
0301H
High-order byte High-order bits of D100 03H
Low-order byte Low-order bits of D101 03H
+1 0203H
Device storing data for High-order byte High-order bits of D101 02H
which the CRC value is Low-order byte Low-order bits of D102 00H
generated +2 1400H
High-order byte High-order bits of D102 14H
-
...
...
Low-order byte
+n/2-1 -
High-order byte
Device storing the Low-order byte Low-order bits of D0 E4H
41E4H
generated CRC value High-order byte High-order bits of D0 41H
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2) 8-bit conversion mode [M8161 = ON]
Outline
In this mode, the operation is executed only for low-order 8 bits (low-order byte) of device specified by
.
With regard to the operation result, low-order 8 bits (byte) are stored to a device specified by , and
high-order 8 bits (byte) are stored to a device specified by +1.
M8000
2
Instruction List
M8161 8-bit conversion mode
Command input CRC
EN ENO
*1 s d *3
*2 n 3
Instruction
Configuration of
*1. Head device storing data for which the CRC value
is generated
*2. Number of 8-bit (byte) data for which the CRC value is
generated or the device storing the number of data
*3. Device storing the generated CRC value 4
Instructions
Explanation of
How to Read
Example: = D100
= D0
n = 6
Device Contents of target data
Low-order byte Low-order bits of D100 01H 5
Low-order byte Low-order bits of D101 03H
Basic Instruction
+1
+2 Low-order byte Low-order bits of D102 03H
Device storing data Low-order byte Low-order bits of D103 02H
+3
for which the CRC
value is generated +4 Low-order byte Low-order bits of D104 00H
+5 Low-order byte Low-order bits of D105 14H 6
-
Instructions
Step Ladder
...
+n-1 Low-order byte -
Device storing the Low-order byte Low-order bits of D0 E4H
generated CRC
value +1 Low-order byte Low-order bits of D1 41H
2. Related devices 7
Instructions
Applied
Related devices Description
ON CRC instruction operates in the 8-bit mode.
M8161*1
OFF CRC instruction operates in the 16-bit mode.
*1. Cleared when the PLC mode is changed from RUN to STOP.
8
Cautions
Function
and Pulse Catch
Interrupt Function
1) In this instruction, "X16 + X15 + X2 + 1" is used as a polynomial for generating the CRC value (CRC-16).
There are many other standard polynomials for generating the CRC value. Note that the CRC value
completely differs if an adopted polynomial is different.
Reference: Major polynomials for generating the CRC value A
and addresses
between devices
Relationships
Name Generating polynomial
CRC-12 X12 + X11 + X3 + X2 +X+1
CRC-16 X16 + X15 + X2 + 1
CRC-32 X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 + X2 + X + 1
CRC-CCITT X16 + X12 + X5 + 1
2) Some restrictions to applicable devices
S: Be sure to specify four digits for the bit devices (K4 ).
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Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When any digits other than 4 digits are specified as the devices specified as or in digit
specification of bit device (error code: K6706)
2) When n is outside the allowable range (1 to 256) (error code: K6706)
3) When a device specified by +n-1 or +1 is outside the allowable range (error code: K6706)
Program examples
In the program example shown below, the CRC value of the ASCII code "0123456" stored in D100 to D106 is
generated and stored to D0 when M0 turns ON.
1. In the case of 16-bit mode
[Structured ladder] [ST]
M8000 M8161:=NOT M8000;
M8161 16-bit
conversion mode LDP(TRUE,M0);
LDP CRC D0:=CRC(TRUE,D100,K7);
EN ENO EN ENO
M0 s d D100 s d D0
K7 n
Contents of data
Target data
Low-order byte 30H
D100 3130H
High-order byte 31H
Low-order byte 32H
D101 3332H
Device storing data for which the High-order byte 33H
CRC value is generated Low-order byte 34H
D102 3534H
High-order byte 35H
Low-order byte 36H
D103 3736H
- -
Device storing the generated Low-order byte CFH
D0 2ACFH
CRC value High-order byte 2AH
2. In the case of 8-bit mode
[Structured ladder] [ST]
M8000 M8161:=M8000;
8-bit
M8161
conversion mode LDP(TRUE,M0);
D0:=CRC(TRUE,D100,K7);
LDP CRC
EN ENO EN ENO
M0 s d D100 s d D0
K7 n
Contents of target data
D100 Low-order byte 30H
D101 Low-order byte 31H
D102 Low-order byte 32H
Device storing data for which the
D103 Low-order byte 33H
CRC value is generated
D104 Low-order byte 34H
D105 Low-order byte 35H
D106 Low-order byte 36H
Device storing the generated CRC D0 Low-order byte CFH
value D1 Low-order byte 2AH
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7.18.5 DHCMOV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transfers the current value of a specified high speed counter or ring counter.
The function of this instruction varies depending on the PLC version.
1. Format and operation, execution form
Expression in each language
Instruction
name
Operation
Execution
form Structured ladder ST 3
Instruction
Configuration of
DHCMOV
EN ENO
DHCMOV 32 bits Continuous DHCMOV(EN,s,n,d);
s d
n
2. Set data
4
Instructions
Explanation of
How to Read
Variable Description Data type
EN Execution condition Bit
Input Device of high speed counter or ring counter handled as transfer source ANY32
variable
Specification to clear the current value of high speed counter or ring counter
(transfer source) after transfer [clear (k1), no processing (K0)]
ANY32
5
ENO Execution state Bit
Basic Instruction
Output
variable Device handled as transfer destination ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System user Digit specification
System Special
Index
Cons Real Character
Pointer
6
user unit tant Number String
Instructions
Step Ladder
type
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
S S
z z
z z 7
Instructions
Applied
S: Refer to "Cautions"
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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Function and operation explanation
1. 32-bit operation (DHCMOV)
Command
input DHCMOV *1. This defines the device of the high speed counter
EN ENO or ring counter of the transfer destination.
Label 1 *1 s d Label *2 *2. This defines the transfer destination device.
Specification to clear the current n
value of high speed counter or ring
counter (transfer source) after transfer
1) The current value of a high speed counter or ring counter specified by is transferred to the device
specified by .
Device [ +1, ] after instruction is executed
High speed counter C235 to C255 Current value of high speed counter →[ +1, ]
D8099→
D8099
Ring counter*1 "0" is stored in +1.
D8398 Current value of [D8399, D8398] → [ +1, ]
2) After transfer, the current value of the high speed counter or ring counter is processed as shown in the
table below depending on the set value of "n".
"n" set value Operation
K0(H0) Does not clear the current value (no processing).
K1(H1) Clears the current value to "0".
*1. Ring counters (D8099 and D8398) cannot be specified in FX3UC PLCs earlier than Ver. 2.20 (not
inclusive).
2. High speed counter current value update timing and the effect of DHCMOV instruction
1) High speed counter current value update timing
When a pulse is input to an input terminal for a high speed counter (C235 to C255), the high speed
counter executes up-counting or down-counting.
If the current value of a high speed counter is handled in an instruction such as the normal MOV
instruction, the current value is updated at the timing shown in the table below. As a result, it is affected
by the program scan time.
Current value update timing
Hardware counter When OUT instruction for the counter is executed
Software counter Every time a pulse is input
By using DHCMOV instruction, the current value can be updated and transferred when it is executed.
2) Effect of DHCMOV instruction
a) By using both input interrupt and DHCMOV instruction, the current value of a high speed counter can
be received at the rising edge or falling edge of an external input (at reception of input interrupt).
→ Refer to the Program example 2.
b) When DHCMOV instruction is used just before a comparison instruction (CMP, ZCP or comparison
contact instruction), the latest value of a high speed counter is used in comparison. Unlike the
comparison instruction for high speed counters (DHSCS, DHSCR or DHSZ), the following points must
be kept in mind when using the DHCMOV instruction.
- When the current value of a hardware counter is compared using CMP, ZCP or comparison contact
instruction (not using a designated high speed counter comparison instruction), a hardware counter
does not change into a software counter.
→ FX Structured Programming Manual (Device & Common)
- When the number of high speed software counter comparison instructions is reduced, the total
frequency limitation is decreased.
→ FX Structured Programming Manual (Device & Common)
- When it is necessary to execute comparison and change an output contact (Y) as soon as the
current value of a high speed counter changes, use a designated high seed counter comparison
instruction (DHSCS, DHSCR or DHSZ)
- DHCMOV instruction can be used as many times as necessary.
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Cautions
Outline
When programming DHCMOV instruction in an input interrupt program, the following points should be
observed.
For assignment of pointers for input interrupt and inputs, refer to the table shown in 5) below.
1) Program EI and FEND instructions in the main program.
They are necessary to execute an input interrupt program. 2
→ For EI and FEND, refer to Sections 7.1.6 and 7.1.7.
Instruction List
2) When programming DHCMOV instruction in the first line in an input interrupt program, be sure to use the
pattern program shown below. Be sure to use the command contact M8394.
[Interrupt program]
(Event : I )
3
M8394 DHCMOV
Instruction
Configuration of
Pattern program for using the DHCMOV
EN ENO
instruction in an interrupt program.
Label 1 s d Label 2
Specification to clear the current n
value of high speed counter or ring
counter (transfer source) after transfer
4
Instructions
Explanation of
How to Read
Program to be processed as input interrupt
3) If two or more DHCMOV instructions are used in one input interrupt program, only the first instruction (just
after the interrupt pointer) is executed when the interrupt is generated.
5
Basic Instruction
The rest of the interrupt, including additional instructions, is executed according to normal interrupt
processing.
Do not use M8394 as the command contact for the DHCMOV instructions following the first.
[Interrupt program]
(Event: I301)
M8394 DHCMOV
6
Instructions
Step Ladder
When the input X003 turns from OFF to ON
EN ENO
(that is, when input interrupt is accepted)
Label 1 s d Label 2
s → [ d +1, d ]
Specification to clear the current n
value of high speed counter or ring
counter (transfer source) after transfer
M8000
EN
DHCMOV
ENO When this instruction is executed 7
in interrupt program
Instructions
Applied
Label 1 s d Label 2
s '→ [ d '+1, d ']
Specification to clear the current n
value of high speed counter or ring
counter (transfer source) after transfer
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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4) It is not permitted to use DHCMOV instruction for the same counter in two or more input interrupt
programs.
[Interrupt program]
(Event: I000)
M8394 DHCMOV
EN ENO
C236 s d VAR_01 *1 *1. VAR_01 is a global label and is defined as D0.
K0 n
IRET *2. VAR_01 is a global label and is defined as D2.
EN ENO
Same counter
[Interrupt program]
(Event: I200)
M8394 DHCMOV
EN ENO
C236 s d VAR_02 *2
K0 n
IRET
EN ENO
5) While input interrupts are disabled by the interrupt disable flags (shown in the table below), DHCMOV
instructions are not executed when they are placed inside a corresponding interrupt.
Interrupt disable flag Corresponding interrupt pointer Input number corresponding to interrupt pointer
M8050*1 I000,I001 X000
M8051*1 I100,I101 X001
M8052*1 I200,I201 X002
M8053*1 I300,I301 X003
M8054*1 I400,I401 X004
M8055*1 I500,I501 X005
*1. When the PLC mode is changed from RUN to STOP, if an input interrupt is generated while input
interrupts are disabled by something other than the interrupt disable flags M8050 to M8055 (after
execution of DI instruction and before execution of EI instruction), DHCMOV instruction is
immediately executed, but execution of the interrupt program is held. The interrupt program will be
executed after EI instruction is executed and interrupt are enabled.
6) Some restrictions to the applicable devices
S: Only the high speed counters (C235 to C255) and ring counters (D8099, D8398)*1 can be specified.
*1. The FX3UC PLCs of before Ver. 2.20 (not inclusive) cannot specify the ring counter (D8099,
D8398).
Function change depending on the version
The function of this instruction changes depending on the version as shown in the table below.
Applicable version
Item Outline of function
FX3U FX3UC
Ring counter (D8099 and D8398) can be specified in the device specified by
Ver. 2.20 or later Ver. 2.20 or later Target device
.
Error
An operation error occurs in the following case. The error flag M8067 turns ON, and the error code is stored
in D8067.
1) When a device specified in or is outside the allowable range (error code: K6705)
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1
Program examples
Outline
1. Program examples 1
In the program example below, the current value of the high speed counter C235 is compared in each
operation cycle, and then the output Y000 is set to ON if the current value is "K500" or more (when the current
value of C235 is not cleared.)
2
[Structured ladder] [ST]
Instruction List
M8000 DHCMOV DHCMOV(M8000,C235,K0,VAR_01);
EN ENO
s d VAR_01 *1 Y000:=ANDD>=(M8000,VAR_11,K500);
C235
K0 n
3
Instruction
Configuration of
ANDD>= Y000
EN ENO
VAR_01*1 s1
K500*2 s2
4
*1. VAR_01 is a global label and is defined as D0.
Instructions
Explanation of
How to Read
*2. K0: The current value of the high speed counter is not cleared
when DHCMOV instruction is executed.
K1: The current value of the high speed counter is cleared when
DHCMOV instruction is executed.
5
2. Program examples 2
Basic Instruction
In the program example below, the current value of C235 is transferred to D201 and D200, and the current
value of C235 is cleared when X001 turns from OFF to ON.
[Structured ladder] [ST]
EI EI(TRUE);
6
Instructions
Step Ladder
EN ENO
FEND FEND(TRUE);
EN ENO VAR_21:=DHCMOV(M8394,C235,K1);
IRET(TRUE);
7
Instructions
Applied
M8394 DHCMOV
I101 EN ENO
C235 s d VAR_21*1
n
8
K1
Function
and Pulse Catch
Interrupt Function
IRET
EN ENO
*1. VAR_21 is a global label and is defined as D200.
A
*2. K0: The current value of the high speed counter is not cleared when DHCMOV instruction is executed.
and addresses
between devices
Relationships
K1: The current value of the high speed counter is cleared when DHCMOV instruction is executed.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
7.19 Block Data Operation
7.19.1 BK+
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction adds binary block data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BK+
EN ENO
BK+ 16 bits Continuous s1 d BK+(EN,s1,s2,n,d);
s2
n
BK+P
EN ENO
BK+P 16 bits Pulse s1 d BK+P(EN,s1,s2,n,d);
s2
n
DBK+
EN ENO
DBK+ 32 bits Continuous s1 d DBK+(EN,s1,s2,n,d);
s2
n
DBK+P
EN ENO
DBKP+P 32 bits Pulse s1 d DBK+P(EN,s1,s2,n,d);
s2
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Head device storing addition data ANY16 ANY32
Input
variable Added constant or head device storing addition data ANY16 ANY32
Number of pieces of data Bit
Output ENO Execution state ANY16 ANY32
variable Head device storing operation result ANY16 ANY32
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(Basic & Applied Instruction) 7.19 Block Data Operation
1
3. Applicable devices
Outline
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z 2
Instruction List
z z z z z z z
z z z z z
z z z z
Function and operation explanation 3
Instruction
Configuration of
1. 16-bit operation (BK+/BK+P)
Command
input BK+
EN ENO
Head device storing addition data s1 d Head device storing
operation result
4
Added constant or head device storing addition data s2
Instructions
Explanation of
How to Read
Number of pieces of data n
1) "n" 16-bit binary data starting from the device specified by are added to "n" 16-bit binary data
starting from the device specified by , and the operation result is stored in "n" points starting from the
device specified by .
5
b15 b0 b15 b0 b15 b0
Basic Instruction
s1 +0 K1234 s2 +0 K4000 d +0 K5234
+1 K4567 +1 K1234 +1 K5801
+2 K-2000 "n"
points
+ +2 K-1234 "n"
points
+2 K-3234 "n"
points
+(n-2)
+(n-1)
K-1234
K4000
+(n-2)
+(n-1)
K5000
K4321
+(n-2)
+(n-1)
K3766
K8321 6
Instructions
Step Ladder
2) A (16-bit) constant from -32768 to 32767 can be directly specified in the device specified by .
b15 b0 b15 b0
s1 +0 K1234 d +0 K5555
+1 K4567 +1 K8888
7
+2 K-2000 "n"
+ s2 K4321
+2 K2321 "n"
Instructions
Applied
points points
+(n-2) K-1234 +(n-2) K3087
+(n-1) K4000 +(n-1) K8321
2. 32-bit operation (DBK+/DBK+P)
8
Command
Function
and Pulse Catch
Interrupt Function
input DBK+
EN ENO
Label 1 *1 s1 d Label 4 *4
Label 2 *2 s2
Label 3 *3 n
*1. This defines the head of the device that stores the addition data.
A
and addresses
between devices
Relationships
*2. This defines the added constant or the head of the device that stores the addition data.
*3. This defines the number of pieces of data.
*4. This defines the head of the device that stores the operation result.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1) "2n" 32-bit binary data starting from the device specified by are added to "2n" 32-bit binary data
starting from the device specified by , and the operation result is stored in "2n" points starting from
the device specified by .
b31 b0 b31 b0
[ s1 +1, s1 ] K1234 [ s2 +1, s2 ] K4000
[ s1 +3, s1 +2 ] K40000 [ s2 +3, s2 +2 ] K1234
[ s1 +5, s1 +4 ] K-2000 "2n"
points
+ [ s2 +5, s2 +4 ] K-1234 "2n"
points
[ s1 +2n-3, s1 +2n-4 ] K-1234 [ s2 +2n-3, s2 +2n-4 ] K5000
[ s1 +2n-1, s1 +2n-2 ] K4000 [ s2 +2n-1, s2 +2n-2 ] K4321
b31 b0
[ d +1, d ] K5234
[ d +3, d +2 ] K41234
[ d +5, d +4 ] K-3234 "2n"
points
[ d +2n-3, d +2n-4 ] K3766
[ d +2n-1, d +2n-2 ] K8321
2) A (32-bit) constant from -2,147,483,648 to 2,147,483,647 can be directly specified in the device specified
by .
b31 b0
[ s1 +1, s1 ] K1234
[ s1 +3, s1 +2 ] K40000
[ s1 +5, s1 +4 ] K-2000 "2n"
points + [ s2 +1, s2 ] K4312
[ s1 +2n-3, s1 +2n-4 ] K-1234
[ s1 +2n-1, s1 +2n-2 ] K4000
b31 b0
[ d +1, d ] K5555
[ d +3, d +2 ] K44321
[ d +5, d +4 ] K2321 "2n"
points
[ d +2n-3, d +2n-4 ] K3087
[ d +2n-1, d +2n-2 ] K8321
Related instruction
Instruction Description
BK- Subtracts binary block data.
Cautions
1) When underflow or overflow occurs in the operation result, the following processing is executed.
At this time, the carry flag does not turn ON.
a) In the case of 16-bit operation
K32767(H7FFF) + K2(H0002) → K-32767(H8001)
K-32768(H8000) + K-2(HFFFE) → K32766(H7FFE)
b) In the case of 32-bit operation
K2,147,483,647(H7FFFFFFF) + K2(H00000002) → K-2,147,483,647(H80000001)
K-2,147,483,648(H80000000) + K-2(HFFFFFFFE) → K2,147,483,646(H7FFFFFFE)
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project.
Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX3UC PLC of V. 2.20 or later supports this instruction.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Error
Outline
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "n" ("2n" in 32-bit operation) devices starting from the devices specified by , and/or
exceed the corresponding device range (error code: K6706).
2
2) When "n" ("2n" in 32-bit operation) devices starting from the device specified by overlap "n" ("2n" in
Instruction List
32-bit operation) devices starting from the device specified by (error code: K6706.)
3) When "n" ("2n" in 32-bit operation) devices starting from the device specified by overlap "n" ("2n" in
32-bit operation) devices starting from the device specified by (error code: K6706.)
Program examples 3
Instruction
Configuration of
In the program shown below, the specified number of pieces of data stored in D150 to D0 are added to the
specified number of pieces of data stored in D100 to D0 when X020 is set to ON, and the operation result is
stored in D200 and later
[ Structured ladder] [ST]
X020 BK+ BK+(X020,D100,D150,D0,D200);
4
Instructions
Explanation of
How to Read
EN ENO When D0 is "4"
D100 s1 d D200
D150 s2
D0 n
b15 b0 b15 b0 b15 b0
5
Basic Instruction
D100 6789 D150 1234 D200 8023
D101
D102
7821
5432
+ D151
D152
2032
-3252
D201
D202
9853
2180
D103 3520 D153 -1000 D203 2520
D0 4 6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
617
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
7.19.2 BK-
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction subtracts binary block data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BK-
EN ENO
BK- 16 bits Continuous s1 d BK-(EN,s1,s2,n,d);
s2
n
BK-P
EN ENO
BK-P 16 bits Pulse s1 d BK-P(EN,s1,s2,n,d);
s2
n
DBK-
EN ENO
DBK- 32 bits Continuous s1 d DBK-(EN,s1,s2,n,d);
s2
n
DBK-P
EN ENO
DBK-P 32 bits Pulse s1 d DBK-P(EN,s1,s2,n,d);
s2
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Head device storing subtraction data ANY16 ANY32
Input
variable Subtracted constant or head device storing subtraction data ANY16 ANY32
Number of pieces of data ANY16 ANY32
Output ENO Execution state Bit
variable Head device storing operation result ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
X Y Modifier K H E "
" P
z z z z z
z z z z z z z
z z z z z
z z z z
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation (BK-/BK-P)
Command
input BK-
EN ENO
2
Head device storing subtraction data s1 d Head device storing operation result
Instruction List
Subtracted constant or head device storing subtraction data s2
Number of pieces of data n
1) "n" 16-bit binary data starting from the device specified by are subtracted from "n" 16-bit binary data
starting from the device specified by
device specified by .
, and the operation result is stored in "n" points starting from the
3
Instruction
Configuration of
b15 b0 b15 b0 b15 b0
s1 +0 K8765 s2 +0 K1234 d +0 K7531
+1 K8888 +1 K5678 +1 K3210
+2 K9325 "n" +2 K9876 "n" +2 K-551 "n"
+(n-2) K5000
points
+(n-2) K4321
points
+(n-2) K679
points
4
Instructions
Explanation of
How to Read
+(n-1) K4352 +(n-1) K4000 +(n-1) K352
2) A (16-bit) constant from -32768 to 32767 can be directly specified in .
b15 b0 b15 b0
s1 +0 K8765 d +0 K-115 5
+1 K8888 +1 K8
Basic Instruction
+2 K9325 "n" +2 K445 "n"
s2 K8880
points points
+(n-2) K5000 +(n-2) K-3880
+(n-1) K4352 +(n-1) K-4528
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
619
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
2. 32-bit operation (DBK-/DBK-P)
Command
input DBK-
EN ENO
Label 1 *1 s1 d Label 4 *4
Label 2 *2 s2
Label 3 *3 n
*1. This defines the head of the device that stores the subtraction data.
*2. This defines the subtracted constant or the head of the device that stores the subtraction data.
*3. This defines the number of pieces of data.
*4. This defines the head of the device that stores the operation result.
1) "2n" 32-bit binary data starting from the device specified by are subtracted from "2n" 32-bit binary
data starting from the device specified by , and the operation result is stored in "2n" points starting
from the device specified by .
b31 b0 b31 b0
[ s1 +1, s1 ]K8765 [ s2 +1, s2 ] K1234
[ s1 +3, s1 +2 ]K8888 [ s2 +3, s2 +2 ] K5678
[ s1 +5, s1 +4 ]K9325 "2n" [ s2 +5, s2 +4 ] K9876 "2n"
points
— points
[ s1 +2n-3, s1 +2n-4 ] K50000 [ s2 +2n-3, s2 +2n-4 ] K4321
[ s1 +2n-1, s1 +2n-2 ] K4352 [ s2 +2n-1, s2 +2n-2 ] K4000
b31 b0
[ d +1, ]
K7531
d
[ d +3, d +2 ]
K3210
[ d +5, d +4 ]
K-551 "2n"
points
[ d +2n-3, d +2n-4 ] K45679
[ d +2n-1, d +2n-2 ] K352
2) A (32-bit) constant from -2,147,483,648 to 2,147,483,647 can be directly specified in the device specified
by .
b31 b0
[ s1 +1, s1 ]K8765
[ s1 +3, s1 +2 ]K8888
[ s1 +5, s1 +4 ]K9325 "2n"
points — [ s2 +1, s2 ] K8880
[ s1 +2n-3, s1 +2n-4 ] K50000
[ s1 +2n-1, s1 +2n-2 ] K4352
b31 b0
[ d +1, d ] K-115
[ d +3, d +2 ] K8
[ d +5, d +4 ] K445 "2n"
points
[ d +2n-3, d +2n-4 ] K41120
[ d +2n-1, d +2n-2 ] K-4528
Related instruction
Instruction Description
BK+ Adds binary block data.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Cautions
Outline
1) When underflow or overflow occurs in the operation result, the following processing is executed. At this
time, the carry flag does not turn ON.
a) In the case of 16-bit operation
K-32768(H8000)
K32767(H7FFF)
-
-
K2(H0002)
K-2(HFFFE)
→
→
K32766(H7FFE)
K-32767(H8001)
2
Instruction List
b) In the case of 32-bit operation
K-2,147,483,648(H80000000) - K2(H00000002) → K2,147,483,646(H7FFFFFFE)
K2,147,483,647(H7FFFFFFF) - K-2(HFFFFFFFE) → K-2,147,483,647(H80000001)
2) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the 3
case of a simple project. Use a label to handle 32-bit data.
Instruction
Configuration of
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
3) The FX3UC PLC of V. 2.20 or later supports this instruction.
Error 4
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
Instructions
Explanation of
How to Read
stored in D8067.
1) When "n" ("2n" in 32-bit operation) devices starting from the devices specified by , and/or
exceed the corresponding device range (error code: K6706).
2) When "n" ("2n" in 32-bit operation) devices starting from the device specified by overlap "n" ("2n" in 5
32-bit operation) devices starting from the device specified by (error code: K6706.)
Basic Instruction
3) When "n" ("2n" in 32-bit operation) devices starting from the device specified by overlap "n" ("2n" in
32-bit operation) devices starting from the device specified by (error code: K6706.)
Program examples
In the program shown below, the constant "8765" is subtracted from the data stored in D100 to D102 when
6
Instructions
Step Ladder
X010 is set to ON, and the operation result is stored in D200 and later.
[Structured ladder] [ST]
X020 BK- BK-(X020,D100,K8765,K3,D200);
7
EN ENO
D100 s1 d D200
Instructions
Applied
K8765 s2
K3 n
b15 b0 b15 b0
D100 K12345 b15 b0 D200 K3580
D101 K8701 K8765 D201 K-64 8
Function
and Pulse Catch
Interrupt Function
D102 K3502 D202 K-5263
A
and addresses
between devices
Relationships
621
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
7.19.3 BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>=
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
These instructions compare block data in the comparison condition set in each instruction.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BKCMP=
EN ENO
BKCMP= 16 bits Continuous s1 d BKCMP=(EN,s1,s2,n,d);
s2
n
BKCMP>
EN ENO
BKCMP> 16 bits Continuous s1 d BKCMP>(EN,s1,s2,n,d);
s2
n
BKCMP<
EN ENO
BKCMP< 16 bits Continuous s1 d BKCMP<(EN,s1,s2,n,d);
s2
n
BKCMP<>
EN ENO
BKCMP<> 16 bits Continuous s1 d BKCMP<>(EN,s1,s2,n,d);
s2
n
BKCMP<=
EN ENO
BKCMP<= 16 bits Continuous s1 d BKCMP<=(EN,s1,s2,n,d);
s2
n
BKCMP>=
EN ENO
BKCMP>= 16 bits Continuous s1 d BKCMP>=(EN,s1,s2,n,d);
s2
n
BKCMP=P
EN ENO
BKCMP=P 16 bits Pulse s1 d BKCMP=P(EN,s1,s2,n,d);
s2
n
BKCMP>P
EN ENO
BKCMP>P 16 bits Pulse s1 d BKCMP>P(EN,s1,s2,n,d);
s2
n
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Expression in each language
Outline
Instruction Execution
Operation
name form Structured ladder ST
BKCMP<P
EN ENO
BKCMP<P 16 bits Pulse BKCMP<P(EN,s1,s2,n,d);
s1
s2
d
2
Instruction List
n
BKCMP<>P
EN ENO
BKCMP<>P 16 bits Pulse s1 d BKCMP<>P(EN,s1,s2,n,d);
s2
n
3
Instruction
Configuration of
BKCMP<=P
EN ENO
BKCMP<=P 16 bits Pulse s1 d BKCMP<=P(EN,s1,s2,n,d);
s2
n 4
Instructions
Explanation of
How to Read
BKCMP>=P
EN ENO
BKCMP>=P 16 bits Pulse s1 d BKCMP>=P(EN,s1,s2,n,d);
s2
n
5
Basic Instruction
DBKCMP=
EN ENO
DBKCMP= 32 bits Continuous s1 d DBKCMP=(EN,s1,s2,n,d);
s2
n
6
DBKCMP>
Instructions
Step Ladder
EN ENO
DBKCMP> 32 bits Continuous s1 d DBKCMP>(EN,s1,s2,n,d);
s2
n
DBKCMP< 7
Instructions
Applied
EN ENO
DBKCMP< 32 bits Continuous s1 d DBKCMP<(EN,s1,s2,n,d);
s2
n
EN
DBKCMP<>
ENO
8
Function
and Pulse Catch
Interrupt Function
DBKCMP<> 32 bits Continuous s1 d DBKCMP<>(EN,s1,s2,n,d);
s2
n
DBKCMP<=
EN ENO A
DBKCMP<= 32 bits Continuous s1 d DBKCMP<=(EN,s1,s2,n,d);
and addresses
between devices
Relationships
s2
n
DBKCMP>=
EN ENO
DBKCMP>= 32 bits Continuous s1 d DBKCMP>=(EN,s1,s2,n,d);
s2
n
623
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DBKCMP=P
EN ENO
DBKCMP=P 32 bits Pulse s1 d DBKCMP=P(EN,s1,s2,n,d);
s2
n
DBKCMP>P
EN ENO
DBKCMP>P 32 bits Pulse s1 d DBKCMP>P(EN,s1,s2,n,d);
s2
n
DBKCMP<P
EN ENO
DBKCMP<P 32 bits Pulse s1 d DBKCMP<P(EN,s1,s2,n,d);
s2
n
DBKCMP<>P
EN ENO
DBKCMP<>P 32 bits Pulse s1 d DBKCMP<>P(EN,s1,s2,n,d);
s2
n
DBKCMP<=P
EN ENO
DBKCMP<=P 32 bits Pulse s1 d DBKCMP<=P(EN,s1,s2,n,d);
s2
n
DBKCMP>=P
EN ENO
DBKCMP>=P 32 bits Pulse s1 d DBKCMP>=P(EN,s1,s2,n,d);
s2
n
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Comparison value or device storing comparison value ANY16 ANY32
variable Head device storing comparison source data ANY16 ANY32
Number of pieces of comparison data ANY16 ANY32
Output ENO Execution state Bit
variable Head device storing comparison result Bit
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
X Y Modifier K H E "
" P
z z z z z z z
z z z z z
zz z S z
z z z z
S: Refer to "Cautions"
624
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Function and operation explanation
Outline
1. 16-bit operation
(BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>=, BKCMP=P, BKCMP>P, BKCMP<P,
BKCMP<>P, BKCMP<=P, BKCMP>=P)
1) "n" 16-bit binary data starting from the device specified by are compared with "n" 16-bit binary data 2
starting from the device specified by , and the comparison result is stored in "n" points starting from
Instruction List
the device specified by .
Command
input BKCMP= *1
EN ENO
Comparison value or device storing comparison value
Head device storing comparison source data
s1
s2
d Device storing comparison result
3
Instruction
Configuration of
Number of pieces of comparison data n
*1. BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>=, BKCMP=P, BKCMP>P,
BKCMP<P, BKCMP<>P, BKCMP<=P, and BKCMP>=P are put in.
Comparison result
s1 +0 K1234 s2 +0 K5321 d +0 OFF(0) 4
Instructions
Explanation of
How to Read
+1 K5678 +1 K3399 +1 ON(1)
*2
+2 K5000 "n" +2 K5678 "n" +2 OFF(0) "n"
points > points points
+n-2 K7777 *2. An example of +n-2 K6543 +n-2 ON(1)
+n-1 K4321 BKCMP>. +n-1 K1200 +n-1 ON(1)
5
2) A constant can be directly specified in the device specified by .
Basic Instruction
Comparison result
s2 +0 K32000 d +0 ON(1)
+1 K4321 +1 OFF(0)
*3
+2 K32000 "n" +2 ON(1) "n"
=
6
s1 K32000 points points
*3. An operation example of BKCMP= +n-2 K1234 +n-2 OFF(0)
Instructions
Step Ladder
instruction is shown here. +n-1 K5678 +n-1 OFF(0)
3) The table below shows the comparison result in each instruction.
Instruction Comparison result ON (1) condition Comparison result OFF (0) condition
BKCMP= = ≠
7
BKCMP> > ≤
Instructions
Applied
BKCMP< < ≥
BKCMP<> ≠ =
BKCMP<= ≤ >
BKCMP>= ≥ < 8
Function
and Pulse Catch
Interrupt Function
4) When the comparison result is ON (1) in all of "n" points starting from the device specified by ,
M8090 (block comparison signal) turns ON.
A
and addresses
between devices
Relationships
625
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
2. 32-bit operation
(DBKCMP=, DBKCMP>, DBKCMP<, DBKCMP<>, DBKCMP<=, DBKCMP>=, DBKCMP=P, DBKCMP>P,
DBKCMP<P, DBKCMP<>P, DBKCMP<=P, DBKCMP>=P)
1) "2n" 32-bit binary data starting from the device specified by are compared with "2n" 32-bit binary
data starting from the device specified by , and the comparison result is stored in "2n" points starting
from the device specified by .
Command
input DBKCMP= *1
EN ENO
Label 1 *2 s1 d Head device storing comparison result
Label 2 *3 s2
Label 3 *4 n
*1. DBKCMP=, DBKCMP>, DBKCMP<, DBKCMP<>, DBKCMP<=, DBKCMP>=, DBKCMP=P,
DBKCMP>P, DBKCMP<P, DBKCMP<>P, DBKCMP<=P, and DBKCMP>=P are put in.
*2. This defines the comparison value or the device storing the comparison value.
*3. This defines the head of the device that stores the comparison source data.
*4. This defines the number of pieces of comparison data
[ s1 +1, s1 ] K1234 [ s2 +1, s2 ] K5321
[ s1 +3, s1 +2 ] K5678 [ s2 +3, s2 +2 ] K3399
*5
[ s1 +5, s1 +4 ] K5000 "n" [ s2 +5, s2 +4 ] K5678 "n"
points >
points
[ s1 +2n-3, s1 +2n-4 ] K40000 [ s2 +2n-3, s2 +2n-4 ] K6543
[ s1 +2n-1, s1 +2n-2 ] K4321 [ s2 +2n-1, s2 +2n-2 ] K1200
Comparison result
*5 An example of DBKCMP>.
d +0 OFF(0)
+1 ON(1)
+2 OFF(0) "n"
points
+n-2 ON(1)
+n-1 ON(1)
2) A constant can be directly specified in the device specified by .
[ s2 +1, s2 ] K32000
[ s2 +3, s2 +2] K4321
*1
[ s2 +5, s2 +4] K32000 "n"
[ s1 +1, s1 ] K32000 = points
*1 An operation example of DBKCMP= [ s2 +2n-3, s2 +2n-4] K1234
instruction is shown here. [ s2 +2n-1, s2 +2n-2] K5678
Comparison result
d +0 ON(1)
+1 OFF(0)
+2 ON(1) "n"
points
+n-2 OFF(0)
OFF(0)
3) The table below shows the comparison result for each instruction.
Instruction Comparison result ON (1) condition Comparison result OFF (0) condition
DBKCMP= [ +1, ]=[ +1, ] [ +1, ]≠[ +1, ]
DBKCMP> [ +1, ]>[ +1, ] [ +1, ]≤[ +1, ]
DBKCMP< [ +1, ]<[ +1, ] [ +1, ]≥[ +1, ]
DBKCMP<> +1, ]≠[ +1, ] [ +1, ]=[ +1, ]
DBKCMP<= [ +1, ]≤[ +1, ] [ +1, ]>[ +1, ]
DBKCMP>= [ +1, ]≥[ +1, ] [ +1, ]<[ +1, ]
4) When the comparison result is ON (1) in all of "n" points starting from the device specified by , the
M8090 (block comparison signal) turns ON.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
1
Related device
Outline
Device Name Description
Turns ON when all comparison results are "ON (1)" in a block data instruction.
M8090 Block comparison signal
DBKCMP=, DBKCMP>, DBKCMP<, DBKCMP<>, DBKCMP<=, DBKCMP>=
Cautions 2
Instruction List
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) The FX3UC PLC of V. 2.20 or later supports this instruction. 3
3) When using 32-bit counters (high speed counters)
Instruction
Configuration of
For comparing 32-bit counters (C200 to C255), be sure to use an instruction for 32-bit operation (such as
DBKCMP= and DBKCMP>).
If an instruction for 16-bit operation (such as BKCMP= and BKCMP>) is used, an operation error is
caused (error code: K6705)
4) Some restrictions to applicable devices 4
S: D
.b cannot be indexed (v, z).
Instructions
Explanation of
How to Read
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "n" ("2n" in 32-bit operation) devices starting from the devices specified by , and/or )
5
Basic Instruction
exceed the corresponding device range (error code: K6706).
2) When data registers starting from the device specified by specified as "D
.b" overlap "n" ("2n" in
32-bit operation) points starting from the device specified by (error code: K6706).
3) When data registers starting from the device specified by specified as "D
.b" overlap "n" ("2n" in
32-bit operation) points starting from the device specified by (error code: K6706).
6
Instructions
Step Ladder
4) When a 32-bit counter (C200 to C255) is specified in the devices specified by and/or in 16-bit
operation (error code: K6705).
For comparing 32-bit counters, be sure to use an instruction for 32-bit operation (such as DBKCMP=,
DBKCMP> and DBKCMP<).
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
627
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.19 Block Data Operation
Program examples
1) In the program shown below, four 16-bit binary data starting from D100 are compared with four 16-bit
binary data starting from D200 by BKCMP= instruction when X020 is set to ON, and the comparison
result is stored in four points starting from M10.
When the comparison result is "ON (1)" in all of the four points starting from M10, Y000 is set to ON.
[Structured ladder] [ST]
BKCMP=(X020,D100,D200,K4,M10);
X020 BKCMP=
EN ENO Y000:=M8090;
D100 s1 d M10
D200 s2
K4 n
M8090
Y000
Block comparison signal
Comparison result
D100 K1000 D200 K1000 M10 ON
D101 K2000 D201 K2000 M11 ON
D102 K3000
= D202 K5000 M12 OFF
D103 K4000 D203 K4000 M13 ON
Y000 OFF
(When all of M10 to M13 are ON, Y000 is set to ON.)
2) In the program shown below, the constant K1000 is compared with four data starting from D10 when
X010 is set to ON, and the comparison result is stored in b4 to b7 of D0.
[Structured ladder] [ST]
BKCMP<>(X010,K1000,D10,K4,D0.4);
Y000:=M8090;
X010 BKCMP<>
EN ENO
K1000 s1 d D0.4
D10 s2
K4 n
b15 b7 b4 b0
D0 before
operation 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0
D10 K2000
D11 K1000
K1000 <>
D12 K1000
b15 b7 b4 b0
D13 K2222 D0 after
0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 0
operation
628
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
7.20 Character String Control
Outline
7.20.1 STR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction converts binary data into character strings (ASCII codes).
On the other hand, the ESTR instruction converts floating point data into character strings.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
STR
STR 16 bits Continuous
EN ENO
STR(EN,s1,s2,d); 4
s1 d
Instructions
Explanation of
How to Read
s2
STRP
EN ENO
STRP 16 bits Pulse STRP(EN,s1,s2,d);
s1
s2
d
5
Basic Instruction
DSTR
EN ENO
DSTR 32 bits Continuous DSTR(EN,s1,s2,d);
s1 d
s2
6
DSTRP
Instructions
Step Ladder
EN ENO
DSTRP 32 bits Pulse DSTRP(EN,s1,s2,d);
s1 d
s2
2. Set data 7
Data type
Instructions
Applied
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Head device storing the number of digits of a numeric value to be
ANY16 ANY16
variable converted
Device storing binary data to be converted ANY16 ANY32
8
Function
and Pulse Catch
Interrupt Function
Output ENO Execution state Bit
variable Head device storing converted character string String String
3. Applicable devices
Bit Devices Word Devices Others A
System Special Cons Real Character
and addresses
between devices
Relationships
Operand System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D .b KnX KnY KnM KnS T C D R U \G X Y Modifier K H E " " P
z z z z z
z z z z z z z z z z z z z
z z z z z
629
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Function and operation explanation
1. 16-bit operation (STR/STRP)
1) All digits (specified by ) of 16-bit binary data of the device specified by are converted into
character string while the decimal point is added to the position specified by the device storing the
number of digits of the decimal part ( + 1), and stored in the device specified by and later.
Command
input STR
EN ENO
Label 1*1 s1 d Label 2 *2
Device storing binary s2
data to be converted
*1. This defines the head of the device that stores
the number of digits of the value to be converted.
*2. This defines the head of the device that stores
the data converted into character strings. b15 b8 b7 b0
ASCII code in "(Value ASCII code
s1 +0 Number of d +0 specifying number
of all digits - 1)"th digit indicating sign
+1 all digits
ASCII code in "(Value ASCII code in "(Value
Number of digits +1 specifying number specifying number For number of
of decimal part of all digits - 3)"th digit of all digits - 2)"th digit all digits
ASCII code in "(Value ASCII code in "(Value For value stored
+2 specifying number specifying number in s1
Sign of all digits - 5)"th digit of all digits - 4)"th digit
ASCII code in "(Value ASCII code in "(Value
+3 specifying number specifying number
of all digits - 7)"th digit of all digits - 6)"th digit
s2 16-bit
binary data +4 0000H
0000H is automatically stored
s1 +0 5 at the end of a character string.
+1 1 b15 b8 b7 b0
+0 31H(1) 2DH(-)
For number
- 1 2 3 +1 2EH(.) 32H(2) of all digits
16-bit s1 =5
+2 00H 33H(3)
binary data
s2 -123 00H is automatically stored
at the end of a character string.
2) Set the number of all digits in the range from 2 to 8.
3) Set the number of digits of the decimal part + 1 in the range from 0 to 5.
Be sure to satisfy "(number of digits of decimal part) ≤ (number of all digits - 3)".
4) 16-bit binary data to be converted stored in should be within the range from -32768 to 32767.
630
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
5) Converted character string data is stored in and later as shown below.
Outline
a) As the sign, "space" (20H) is stored when the 16-bit binary data stored in is positive, and "-"
(2DH) is stored when the 16-bit binary data stored in is negative.
b) When the number of digits of the
Number of all digits 6
decimal part + 1 is set to any Number of digits
value other than "0", the decimal of decimal part 2 2
1 2 3 4
Instruction List
point "." (2EH) is automatically added
in "number of digits of decimal part + 16-bit binary data 1234 Number of digits
1"th digit. of decimal part
When the number of digits of the It is automatically
decimal part + 1 is set to "0", added.
the decimal point is not added. 3
c) When the number of digits of the
Instruction
Configuration of
Number of all digits 6
decimal part + 1 is larger than Number of digits
3
the number of digits of 16-bit binary of decimal part 0 0 1 2
data stored in , "0" (30H) is
automatically added, and the data is 16-bit binary data 12 It is automatically
shifted to the right end during added. 4
conversion.
Instructions
Explanation of
How to Read
d) When the number of all digits stored
in e x c l u d i n g t h e s i g n a n d Number of all digits 8
decimal point is larger than the Number of digits 1
of decimal part - 1 2 3
number of digits of 16-bit binary data
stored in , "space" (20H) is 16-bit binary data -123 "20H" (space) is
5
stored in each digit between the sign
Basic Instruction
stored in each digit
and the numeric value.
When the number of all digits stored
in excluding the sign and
decimal point is smaller than the
number of digits of 16-bit binary data 6
stored in , an error is caused.
Instructions
Step Ladder
e) "00H" indicating the end of a character string is automatically stored at the end of a converted
character string.
When the number of all digits is even, "0000H" is stored in the device after the last character.
When the number of all digits is odd, "00H" is stored in the high-order byte (8 bits) of the device storing
the last character.
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
631
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
2. 32-bit operation (DSTR/DSTRP)
1) All digits (specified by ) of 32-bit binary data stored in the device specified by are converted into
ASCII codes while the decimal point is added to the position specified by the device storing the number of
digits of the decimal part ( + 1), and stored in the device specified by and later.
Command
input DSTR
EN ENO
Label 1 *1 s1 d Label 4 *3
Label 3 *2 s2
*1. This defines the head of the device that stores the
number of digits of the value to be converted.
*2. This defines the device that stores the binary data
to be converted.
*3. This defines the head of the device that stores
the data converted into character strings.
b15 b8 b7 b0
Number of ASCII code in "(Value ASCII code
s1 +0 all digits d +0 specifying number of
all digits - 1)"th digit indicating sign
Number of digits
+1 ASCII code in "(Value ASCII code in "(Value
of decimal part +1 specifying number of specifying number of
all digits - 3)"th digit all digits - 2)"th digit
ASCII code in "(Value ASCII code in "(Value For number
+2 specifying number of specifying number of of all
all digits - 5)"th digit all digits - 4)"th digit digits
ASCII code in "(Value ASCII code in "(Value For value
+3 specifying number of specifying number of
Sign all digits - 7)"th digit all digits - 6)"th digit stored
ASCII code in "(Value ASCII code in "(Value in s1
s2 +1 s2 +4 specifying number of specifying number of
all digits - 9)"th digit all digits - 8)"th digit
b31 b16 b15 b0 ASCII code in "(Value
s2 High order 16 bits Low order 16 bits +5 00H specifying number of
all digits - 10)"th digit
32-bit binary data 00H is automatically stored at the
s1 +0 8 end of a character string.
+1 3 b15 b8 b7 b0
d +0 36H(6) 2DH(-)
+1 34H(4) 35H(5) For number
- 6 5 4 3 2 1 of all digits
+2 33H(3) 2EH(.)
s1
s2 +1 s2 +3 31H(1) 32H(2) =8
32-bit
binary data -654321 +4 0000H
0000H is automatically
stored at the end of a
character string.
2) Set the number of all digits in the range from 2 to 13.
3) Set the number of digits of the decimal part + 1 in the range from 0 to 10.
Be sure to satisfy "(Number of digits of decimal part) ≤ (Number of all digits - 3)".
4) 32-bit binary data to be converted stored in should be within the range from -2,147,483,648 to
+2,147,483,647.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
5) Converted character string data is stored in and later as shown below.
Outline
a) For the sign, "space" (20H) is stored when the 32-bit binary data stored in is positive, and "-"
(2DH) is stored when the 32-bit binary data stored in is negative.
b) When the number of digits of the Number of
2
decimal part + 1 is set to any all digits 10
value other than "0", the decimal point Number of digits 3
of decimal part 1 2 3 4 5 6 7 8
Instruction List
"." (2EH) is automatically added in
"number of digits of decimal part + 1"th 32-bit
12345678 Number of
binary data
digit. digits of
decimal part
When the number of digits of the
It is automatically added.
decimal part + 1 is set to "0", the
decimal point is not added. 3
c) When the number of digits of the Number of
Instruction
Configuration of
decimal part + 1 is larger than all digits 13
the number of digits of 32-bit binary Number of digits 10
of decimal part 0 0 0 0 0 0 5 4 3 2 1
data stored in , "0" (30H) is
automatically added, and the data is 32-bit
4
binary data. 54321
shifted to the right end during It is automatically added.
conversion.
Instructions
Explanation of
How to Read
d) When the number of all digits stored in
excluding the sign and decimal Number of 13
all digits
point is larger than the number of Number of digits
2
digits of 32-bit binary data stored in of decimal part - 5 4 3 2 1 0
, "space" (20H) is stored in each 32-bit "20H" (space) is stored 5
digit between the sign and the numeric binary data -543210
Basic Instruction
in each digit
value.
When the number of all digits stored in
excluding the sign and decimal
point is smaller than the number of
digits of binary data stored in , an 6
error is caused.
Instructions
Step Ladder
e) "00H" indicating the end of a character string is automatically stored at the end of a converted
character string.
When the number of all digits is even, "0000H" is stored in the device after the last character.
When the number of all digits is odd, "00H" is stored in the high-order byte (8 bits) of the device storing
the last character.
7
Instructions
Applied
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device. 8
2) The FX3UC PLC of V. 2.20 or later supports this instruction.
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
633
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Related instruction
Instruction Description
DESTR Converts binary floating point data into a character string (ASCII codes) with a specified number of digits.
DEVAL Converts a character string (ASCII codes) into binary floating point data.
VAL Converts a character string (ASCII codes) into binary data.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the number of all digits stored in is outside the following range (error code: K6706).
Setting range
16-bit operation 2 to 8
32-bit operation 2 to 13
2) When the number of digits of the decimal part stored in + 1 is outside the following range (error
code: K6706).
Setting range
16-bit operation 0 to 5
32-bit operation 0 to 10
3) When the relationship between the number of all digits stored in and the number of digits of the
decimal part stored in + 1 does not satisfy the following (error code: K6706).
(Number of all digits - 3) ≥ number of digits of decimal part
4) When the number of all digits stored in including the digit for sign and the digit for decimal point is
smaller than the number of digits of the binary data stored in (error code: K6706).
5) When the devices and later storing a character string exceed the corresponding device range (error
code: K6707).
634
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Program examples
Outline
In the program below, the 16-bit binary data stored in D10 is converted into a character string in accordance
with the digit specification by D0 and D1 when X000 is set to ON, and then stored in D20 to D23.
[Structured ladder] [ST]
X000 MOVP MOVP(X000,K12672,D10);
2
Instruction List
EN ENO Data to be converted MOVP(X000,K6,D0);
s d is set.
K12672 D10 MOVP(X000,K0,D1);
VAR_02:=STRP(X000,VAR_01,D10);
MOVP
EN ENO The number of all
K6 s d D0 digits is set. 3
Instruction
Configuration of
MOVP
The number of digits
EN ENO
of the decimal part is set.
K0 s d D1
STRP
4
Instructions
Explanation of
How to Read
EN ENO
VAR_01 *1 s1 d VAR_02 *2
D10 s2
*1. VAR_01 is a global label and is defined as D0.
*2. VAR_02 is a global label and is defined as D20.
5
Basic Instruction
b15 b8 b7 b0
16-bit binary data D10 12672 " 12672" D20 31H(1) 20H(Space)
D21 36H(6) 34H(2) 6
Number of all digits D0 6 32H(2) 37H(7)
Instructions
Step Ladder
D22
Number of digits of decimal part D1 0 D23 0000H
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
635
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.2 VAL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction converts a character string (ASCII codes) into binary data.
On the other hand, EVAL instruction converts a character string (ASCII codes) into floating point data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
VAL
EN ENO
VAL 16 bits Continuous VAL(EN,s,d1,d2);
s d1
d2
VALP
EN ENO
VALP 16 bits Pulse VALP(EN,s,d1,d2);
s d1
d2
DVAL
EN ENO
DVAL 32 bits Continuous DVAL(EN,s,d1,d2);
s d1
d2
DVALP
EN ENO
DVALP 32 bits Pulse DVALP(EN,s,d1,d2);
s d1
d2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input
variable Head device storing a character string to be converted into binary
String String
data.
ENO Execution state Bit
Output Head device storing the number of digits of the binary data acquired
ANY16 ANY16
variable by conversion.
Head device storing the binary data acquired by conversion. ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
X Y Modifier K H E "
" P
z z z z z
z z z z z
z z z z z z z z z z
636
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation (VAL/VALP)
1) A character string stored in the device specified by and later is converted into 16-bit binary data.
The number of all digits of the binary data acquired by conversion is stored in the device specified by
, the number of digits of the decimal part is stored in the device specified by + 1, and the 2
Instruction List
converted binary data is stored in the device specified by .
In conversion from a character string into binary data, the data from the device specified by to a
device number storing "00H" is handled as a character string in byte units.
Command
VAL
input
EN ENO 3
Label 1*1 s d1 Label 2*2
Instruction
Configuration of
d2 Head device storing the binary data acquired by conversion.
*1. This defines the head of the device that stores the character string to be converted into binary data.
*2. This defines the head of the device that stores the number of digits of the binary data converted.
d1 +0
Number of
all digits
4
Instructions
Explanation of
How to Read
b15 b8 b7 b0 Number of digits
+1
s +0 ASCII code of 1st character ASCII code indicating sign of decimal part
+1 ASCII code of 3rd character ASCII code of 2nd character
Integer value in
+2 ASCII code of 5th character ASCII code of 4th character - d2 which decimal
point is ignored.
+3 ASCII code of 7th character ASCII code of 6th character
5
Sign
1st character
2nd character
7th character
+4 00H 16-bit binary data
Basic Instruction
It indicates the end of character string.
For example, when a character string "-123.45" is specified in the device specified by and later, the
conversion result is stored in the devices specified by and as shown below. 6
Instructions
Step Ladder
b15 b8 b7 b0 d1 +0 7
s +0 31H(1) 2DH(-) +1 2
+1 33H(3) 32H(2)
+2 34H(4) 2EH( ) - 1 2 3 4 5 d2 -12345
+3 00H 35H(5) 7
Instructions
Applied
It indicates the end of character string.
2) Character string to be converted
a) Number of characters of character string and the numeric range when the decimal point is ignored.
Description
Number of all characters (digits) 2 to 8 8
Function
and Pulse Catch
Interrupt Function
Number of characters (digits) of decimal part 0 to 5 and smaller than "number of all digits - 3"
-32768 to 32767
Numeric range when decimal point is ignored
Example) "123.45" → "12345"
b) Character types used in characters to be converted
Character type A
Positive numeric value "Space (20H)"
and addresses
between devices
Relationships
Sign
Negative numeric value "-(2DH)"
Decimal point ".(2EH)"
Number "0(30H)" to 9(39H)"
637
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
3) The device specified by stores the number of all digits. The number of all digits indicates the number
of all characters (including the number, sign and decimal point).
4) The device specified by + 1 stores the number of digits of the decimal part. The number of digits of
the decimal part indicates the number of all characters after the decimal point "." (2EH).
5) The device specified by stores 16-bit binary data converted from a character string with the decimal
point ignored.
In the character string located in the device specified by and later, "space" (20H) and "0" (30H)
characters between the sign and the first number other than "0" are ignored in the conversion to 16-bit
binary data.
Number of Number of
all digits 8 all digits 7
Number of digits Number of digits
- 1 2 3 4 5 of decimal part 2 0 0 0 1 2 4
of decimal part
16-bit 16-bit
binary data -12345 12
Ignored Sign Ignored binary data
2. 32-bit operation (DVAL/DVALP)
1) A character string stored in the device specified by and later is converted into 32-bit binary data.
The number of all digits of the binary data acquired by conversion is stored in the device specified by
, the number of digits of the decimal part is stored in the device specified by + 1, and the binary
data is stored in the device specified by .
In conversion from a character string into binary data, the data from the device specified by to a
device number storing "00H" is handled as a character string in byte units.
Command
input DVAL
EN ENO
Label 3 *1 s d1 Label 2 *2
d2 Label 4 *3
*1. This defines the head of the device that stores the character string to be converted into binary data.
*2. This defines the head of the device that stores the number of digits of the binary data converted.
*3. This defines the head of the device that stores the binary data converted.
d1 +0 Number of
all digits
b15 b8 b7 b0
+1 Number of digits
ASCII code of ASCII code of decimal part
s +0 indicating sign
1st character
d2 +1 d2
ASCII code of ASCII code of
+1 2nd character -
3rd character Integer value in which
ASCII code of ASCII code of decimal point is ignored.
+2 4th character
Sign
1st character
2nd character
12th character
5th character
ASCII code of ASCII code of
+3 7th character 6th character 32-bit binary data
ASCII code of ASCII code of
+4 8th character
9th character
ASCII code of ASCII code of
+5 10th character
11th character
ASCII code of
+6 00H 12th character
It indicates the end of character string.
For example, when a character string "-12345.678" is specified in the device specified by and later,
the conversion result is stored in the devices specified by and as shown below.
b15 b8 b7 b0
31H(1) 2DH(-) d1 +0 10
s +0
+1 3
+1 33H(3) 32H(2)
+2 35H(5) 34H(4)
- 1 2 3 4 5 6 7 8 -12345678
+3 36H(6) 2EH(.)
d2 +1 d2
+4 38H(8) 37H(7)
+5 00H
638
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
2) Character string to be converted
Outline
a) Number of characters of character string and the numeric range when the decimal point is ignored.
Description
Number of all characters (digits) 2 to 13
Number of characters (digits) of decimal part 0 to 10 and smaller than "number of all digits - 3"
Numeric range when decimal point is -2,147,483,648 to 2,147,483,647 2
ignored Example) "12345.678" to "12345678"
Instruction List
b) Character types used in characters to be converted
Character type
Positive numeric value "Space (20H)"
Sign
Negative numeric value "-(2DH)" 3
Decimal point ".(2EH)"
Instruction
Configuration of
Number "0(30H)" to "9(39H)"
3) The device specified by stores the number of all digits. The number of all digits indicates the number
of all characters (including the number, sign and decimal point).
4) The device specified by + 1 stores the number of digits of the decimal part. The number of digits of 4
the decimal part indicates the number of all characters after the decimal point "." (2EH).
Instructions
Explanation of
How to Read
5) The device specified by stores 32-bit binary data converted from a character string with the decimal
point ignored.
For the character string located in the device specified by and later, the "space" (20H) and "0" (30H)
characters between the sign and the first number other than "0" are ignored in the conversion to 32-bit
binary data. 5
Basic Instruction
Number of all digits 12
Number of digits 2
- 6 5 4 3 2 1 of decimal part
32-bit binary data -654321
Ignored
Number of all digits 11
6
Instructions
Step Ladder
Number of digits 8
0 0 0 0 5 4 3 2 1 of decimal part
32-bit binary data 54321
Ignored
Sign
Instructions
Applied
Related instruction
Instruction Description
DESTR Converts binary floating point data into a character string (ASCII codes) with a specified number of digits.
DEVAL Converts a character string (ASCII codes) into binary floating point data.
STR Converts binary data into a character string (ASCII codes). 8
Function
and Pulse Catch
Interrupt Function
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device. A
and addresses
between devices
Relationships
2) The FX3UC PLC of V. 2.20 or later supports this instruction.
3) Sign data "space (20H)" or "- (2DH)" must be stored in the first byte (lower order 8 bits of the head device
set in the device specified by ).
Only the ASCII code data "0 (30H)" to "9 (39H)", "space (20H)" and "decimal point (2EH)" can be stored
from the second byte to the "00H" at the end of the character string of the device specified by .
If "- (2DH)" is stored in the second byte or later, an operation error occurs (error code: K6706).
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the number of characters of the character string to be converted (device specified by and
later) is outside the following ranges.
(Error code: K6706)
Setting range
16-bit operation 2 to 8
32-bit operation 2 to 13
2) When the number of characters after the decimal point of the character string to be converted (device
specified by and later) is outside the following ranges.
(Error code: K6706)
Setting range
16-bit operation 0 to 5
32-bit operation 0 to 10
3) When the relationship between the number of all characters in the character string to be converted
(device specified by and later) and the number of characters after the decimal point does not satisfy
the following (error code: K6706).
(Number of all characters - 3) ≥ Number of characters after the decimal point
4) When the sign is set to any ASCII code other than "space" (20H) and "-" (2DH).
(Error code: K6706)
5) When a digit of a number is set to any ASCII code other than "0" (30H) to "9" (39H) or a decimal point "."
(2EH).
(Error code: K6706)
6) When the decimal point "." (2EH) is set two or more times in the character string to be converted (device
specified by and later).
(Error code: K6706)
7) When the binary data acquired by conversion is outside the following ranges. (Error code: K6706)
Setting range
16-bit operation -32768 to 32767
32-bit operation -2,147,483,648 to 2,147,483,647
8) When "00H" is not present in the location from the device specified by to the final device number.
(Error code: K6706)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Program examples
Outline
1) In the program below, the character string data stored in D20 to D22 is regarded as an integer value,
converted into a binary value, and stored in D0 when X000 is set to ON.
[ Structured ladder] [ST]
X000 VALP VAR_02:=VALP(X000,VAR_01); 2
EN ENO D0:=VALP(X000,VAR_01);
Instruction List
VAR_01*1 s d1 VAR_02*2
d2 D0
*1. VAR_01 is a global label and is defined as D20.
*2. VAR_02 is a global label and is defined as D10.
3
Instruction
Configuration of
b15 b8 b7 b0
D20 31H(1) 2DH(-) D0 -1654
D21 2EH(.) 36H(6)
D22 34H(4) 35H(5) D10 6 Number of all digits
D23 00H D11 2 Number of digits of decimal part
"00H" is stored here. 4
Instructions
Explanation of
How to Read
2) In the program below, the character string data stored in D20 to D24 is regarded as an integer value,
converted into a binary value, and stored in D0 when X000 is set to ON.
[Structured ladder] [ST]
X000
EN
DVALP
ENO
VAR_02:=DVALP(X000,VAR_03);
VAR_04:=DVALP(X000,VAR_03);
5
Basic Instruction
*1
VAR_03 s d1 VAR_02*2
d2 VAR_04*3
*1. VAR_03 is a global label and is defined as D20.
*2. VAR_02 is a global label and is defined as D10.
*3. VAR_04 is a global label and is defined as D0.
6
Instructions
Step Ladder
b15 b8 b7 b0 D1 D0
D20 37H(7) 20H(Space) D0 79100611
D21 31H(1) 39H(9)
D22 30H(0) 30H(0) D10 10 Number of all digits
D23 36H(6) 2EH(.) D11 3 Number of digits of decimal part 7
D24 31H(1) 31H(1)
Instructions
Applied
D25 00H
"00H" is stored here.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
641
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.3 $+
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction links a character string to another character string.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
$+
EN ENO
$+ 16 bits Continuous $+(EN,s1,s2,d1);
s1 d1
s2
$+P
EN ENO
$+P 16 bits Pulse $+P(EN,s1,s2,d1);
s1 d1
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device storing the link source data (character string) or directly
Input String
specified character string
variable
Head device storing the link data (character string) or directly
String
specified character string
Output ENO Execution state Bit
variable Head device storing the linked data (character string) String
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
X Y Modifier K H E "
" P
z z z z z z z z z z z
z z z z z z z z z z z
z z z z z z z z z
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation ($+/$+P)
The character string data stored in the device specified by and later is linked to the end of the character
string data stored in the device specified by and later, and the linked data is stored to devices starting
from the device specified by . 2
A character string specified by and indicates the data from the specified device to the first "00H" in
Instruction List
units of byte.
Command
input $+
EN ENO
Label 1*1
Label 2*2
s1
s2
d1 Label 3 *3
3
Instruction
Configuration of
*1. This defines the head of the device that stores the link source data
(character string) or defines the directly specified character string.
*2 This defines the head of the device that stores the link data
(character string) or defines the directly specified character string.
*3. This defines the head of the device that stores the linked data (character string).
b15---b8 b7---- b0 b15---b8 b7---- b0 b15---b8 b7---- b0 4
Instructions
Explanation of
How to Read
s1 +0 46H(F) 48H(H) s2 +0 35H(5) 31H(1) d +0 46H(F) 48H(H) s1
+1 2DH(-) 41H(A) + +1 39H(9) 33H(3) +1 2DH(-) 41H(A) s1 +1
+2 00H +2 00H 41H(A) +2 35H(5) 31H(1) s2
+3 39H(9) 33H(3) s2 +1
"00H" is
+4 00H 41H(A) s2 +2 5
Basic Instruction
automatically stored.
1) In linking, "00H" indicating the end of a character string specified in is ignored, and a character
string specified in is linked to the last character specified in .
When a character string is linked, "00H" is automatically added at the end.
a) When the number of characters after linking is odd, "00H" is stored in the high-order byte of the device
storing the last character.
6
Instructions
Step Ladder
b) When the number of characters after linking is even, "0000H" is stored in the device after the last
character.
Cautions
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly 7
as in the case of a simple project. Use a label to handle character string data.
Instructions
Applied
Use a global label to specify a device.
2) When directly specifying a character string, up to 32 characters can be specified (input).
However, this limitation in the number of characters is not applied when a word device is specified in
or .
3) When the number of characters in both devices specified by and start from "00H" (that is,
8
Function
and Pulse Catch
Interrupt Function
when the number of characters is "0"), "0000H" is stored in the device specified by .
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
A
1) When the number of devices after a device number specified by is smaller than the number of
and addresses
between devices
Relationships
devices required to store all linked character strings (that is, when "00H" cannot be stored after all
character strings and the last character).
(Error code: K6706)
2) When the same device is specified in , and as a device for storing a character string.
(Error code: K6706)
3) When "00H" is not set within the corresponding device range after the device specified by or .
(Error code: K6706)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Program examples
In the program example shown below, a character string stored in D10 to D12 (abcde) is linked to the
character string "ABCD", and the result is stored to D100 and later when X000 turns ON.
[Structured ladder] [ST]
X000 $+ VAR_03:=$+(X000,VAR_01,VAR_02);
EN ENO
VAR_01 *1 s1 d1 VAR_03 *3
VAR_02 *2 s2
*1. VAR_01 is a global label and is defined as D10.
*2. VAR_02 is a global label and is defined as "ABCD".
*3. VAR_03 is a global label and is defined as D100.
b15---b8 b7---- b0 b15---b8 b7---- b0
D10 62H(b) 61H(a) D100 62H(b) 61H(a)
D11 64H(d 63H(c) + "ABCD" D101 64H(d) 63H(c)
D12 00H 65H(e) D102 41H(A) 65H(e)
D103 43H(C) 42H(B)
D104 00H 44H(D)
"00H" is automatically stored.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
7.20.4 LEN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction detects the number of characters (bytes) of a specified character string.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
LEN
Instruction
Configuration of
LEN 16 bits Continuous EN ENO LEN(EN,s,d);
s d
LENP
LENP 16 bits Pulse EN
s
ENO
d
LENP(EN,s,d);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Head device storing a character string whose number of characters is
to be detected
String 5
Basic Instruction
Output ENO Execution state Bit
variable Device storing the detected character string length (number of bytes) ANY16
3. Applicable devices
Bit Devices Word Devices Others 6
Operand System Special Cons Real Character
Instructions
Step Ladder
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z z z z z z
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
645
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Function and operation explanation
1. 16-bit operation (LEN/LENP)
The length of a character string stored in the device specified by and later is detected, and stored to the
device specified by . Data starting from the device specified by until the first device storing "00H" is
handled as a character string in units of byte.
Command
input LEN
EN ENO
Head device storing a character s d Device storing the detected character
string whose number of characters string length (number of bytes)
is to be detected
b15---b8 b7---- b0
2nd 1st
s +0 character character
4th 3rd
+1 character character b15 ------------------ b0
6th 5th d Character string length
+2 character character
"n"th
+n 00H character
It indicates the end of character string.
For example, when "ABCDEFGHI" is stored in the device specified by and later as shown below, K9 is
stored in the device specified by .
b15---b8 b7---- b0
s +0 42H(B) 41H(A)
+1 44H(D) 43H(C) "ABCDEFGHI" b15 -------------- b0
d 9
+2 46H(F) 45H(E)
+3 48H(H) 47H(G)
+4 00H 49H(I)
Caution
1) This instruction can handle character codes other than ASCII codes, but the character string length is
handled in byte units (8 bits). Accordingly, in the case of character codes in which two bytes express one
character such as shift JIS codes, the length of one character is detected as "2".
Errors
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" is not set within the corresponding device range after a device specified by .
(Error code: K6706)
2) When the detected number of characters is "32768" or more. (Error code: K6706)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Program examples
Outline
In the program example shown below, the length of a character string stored in D0 and later is output in 4-digit
BCD to Y040 to Y057 when X000 turns ON.
[Structured ladder] [ST]
X000 LEN
LEN(X000,D0,D10); 2
Instruction List
EN ENO BCD(X000,K4Y40);
D0 s d D10
BCD
EN ENO The length of the character string 3
D10 s d K4Y40 is output to the display unit.
Instruction
Configuration of
b15---b8 b7---- b0
D0 49H(I) 4DH(M) BCD 4
D1 53H(S) 54H(T) D10 conversion
Instructions
Explanation of
How to Read
Y057 to Y040
D2 42H(B) 55H(U) 10 0 0 1 0
D3 53H(S) 49H(I) "MITSUBISHI" BCD BCD value
D4 49H(I) 48H(H) (Characters "ABC ..."
after "00H" are ignored.)
D5 41H(A)
D6 43H(C) 42H(B)
00H
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
647
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.5 RIGHT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction extracts a specified number of characters from the right end of a specified character string.
→ For handling of character strings, refer to "FX Structured Programming Manual (Device &
Common)."
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RIGHT
EN ENO
RIGHT 16 bits Continuous RIGHT(EN,s,n,d);
s d
n
RIGHTP
EN ENO
RIGHTP 16 bits Pulse RIGHTP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Head device storing a character string String
variable
Number of characters to be extracted ANY16
Output ENO Execution state Bit
variable Head device storing extracted character string String
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z z z z z z
z z z z
648
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation (RIGHT/RIGHTP)
"n" characters are extracted from the right end (that is, from the end) of the character string data stored in the
device specified by and later, and stored to the device specified by and later.
If the number of characters specified by "n" is "0", the NULL code (0000H) is stored to the device specified by 2
.
Instruction List
When characters are extracted from a character string, "00H" is automatically added at the end of the
extracted characters.
1) When the number of extracted characters is odd, "00H" is stored in the high-order byte of a device storing
the last character.
2) When the number of extracted characters is even, "0000H" is stored in the device after the last character. 3
Instruction
Configuration of
Command
input RIGHT
EN ENO
Label 1*1 s d Label 2*2
Number of characters n
to be extracted
4
*1. This defines the head of the device that stores the number of characters.
Instructions
Explanation of
How to Read
*2. This defines the head of the device that stores the extracted character string.
b15 b8 b7 b0 b15 b8 b7 b0
ASCII code for ASCII code for ASCII code for "(last character ASCII code for "(last character
s +0 d +0
2nd character
ASCII code for
1st character
ASCII code for
- n + 2)"th character - n + 1)"th character
ASCII code for "(last character ASCII code for "(last character
5
+1 +1
Basic Instruction
4th character 3rd character - n + 4)"th character - n + 3)"th character
ASCII code for "(last character ASCII code for "(last character ASCII code for "(last character ASCII code for "(last character
- n + 2)"th character - n + 1)"th character - 1)"th character - 2)"th character
ASCII code for "(last character ASCII code for "(last character ASCII code for
- n + 4)"th character - n + 3)"th character
00H last character
6
Instructions
Step Ladder
ASCII code for "(last character ASCII code for "(last character
- 1)"th characte - 2)"th character
ASCII code for
00H last character
In the case of "n = 5"
7
Instructions
Applied
b15 b8 b7 b0 b15 b8 b7 b0
s +0 42H(B) 41H(A) d +0 32H(2) 31H(1)
+1 44H(D) 43H(C) +1 34H(4) 33H(3)
+2 46H(F) 45H(E) +2 00H 35H(5)
+3 32H(2) 31H(1) "12345" 8
Function
and Pulse Catch
Interrupt Function
+4 34H(4) 33H(3) ASCII code for 5th character
+5 00H 35H(5)
"ABCDEF12345"
ASCII code for 1st character
a) A character string stored in the device specified by and later indicates data stored in devices
from the specified device until "00H" is first detected in byte units. A
and addresses
between devices
Relationships
649
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Cautions
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly
as in the case of a simple project. Use a label to handle character string data.
Use a global label to specify a device.
2) When handling character codes other than ASCII codes, note the following contents:
a) The number of characters is handled in byte units (8 bits). Accordingly, in the case of character codes
in which two bytes express one character such as shift JIS codes, the length of one character is
detected as "2".
b) When extracting characters from a character string including character codes in which two bytes
express one character such as shift JIS codes, consider the number of characters to be extracted in
units of character codes for one character.
Note that the expected character code is not given if only one byte is extracted out of a 2-byte
character code.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" is not set within the corresponding device range after a device specified by .
(Error code: K6706)
2) When "n" exceeds the number of characters specified by . (Error code: K6706)
3) When the number of devices after a device number specified by is smaller than the number of
devices required to store extracted "n" characters (that is, when "00H" cannot be stored after all character
strings and the last character).
(Error code: K6706)
4) When "n" is a negative value. (Error code: K6706)
Program examples
In the program example shown below, 4 characters are extracted from the right end of the character string
data stored in R0 and later, and stored to D0 and later when X000 turns ON.
[Structured ladder] [ST]
X000 RIGHTP VAR_02:=RIGHTP(X000,K4);
EN ENO
VAR_01*1 s d VAR_02*2
K4 n
*1. VAR_01 is a global label and is defined as R0.
*2. VAR_02 is a global label and is defined as D0.
b15 b8 b7 b0 b15 8b 7b b0
R0 41H(A) 42H(B) D0 45H(E) 30H(0)
R1 31H(1) 32H(2) D1 41H(A) 46H(F)
R2 45H(E) 30H(0) D2 0000H
R3 41H(A) 46H(F) "0EFA"
R4 00H ASCII code for 4th character
"BA210EFA"
ASCII code for 1st character
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
7.20.6 LEFT
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction extracts a specified number of characters from the left end of a specified character string.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
LEFT
Instruction
Configuration of
EN ENO
LEFT 16 bits Continuous LEFT(EN,s,n,d);
s d
n
EN
LEFTP
ENO
4
LEFTP 16 bits Pulse LEFTP(EN,s,n,d);
Instructions
Explanation of
How to Read
s d
n
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input Head device storing a character string String
variable
Number of characters to be extracted ANY16
Output ENO Execution state Bit
variable Head device storing extracted character string String
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
X Y "
"
7
M K H E P
z z z z z z z z z z
Instructions
Applied
z z z z z z z z z
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
651
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Function and operation explanation
1. 16-bit operation (LEFT/LEFTP)
"n" characters are extracted from the left end (that is, from the head) of the character string data stored in the
device specified by and later and stored to the device specified by and later.
If the number of characters specified by "n" is "0", the NULL code (0000H) is stored to the device specified by
.
When characters are extracted from a character string, "00H" is automatically added at the end of the
extracted characters.
1) When the number of extracted characters is odd, "00H" is stored in the high-order byte of a device storing
the last character.
2) When the number of extracted characters is even, "0000H" is stored in the device after the last character.
Command
input LEFT
EN ENO
Label 1*1 s d Label 2*2
Number of characters n
to be extracted
*1. This defines the head of the device that stores the number of characters.
*2. This defines the head of the device that stores the extracted character string.
b15 b8 b7 b0 b15 b8 b7 b0
ASCII code for ASCII code for ASCII code for ASCII code for
s +0 2nd character 1st character d +0 2nd character 1st character
ASCII code for ASCII code for ASCII code for ASCII code for
+1 4th character 3rd character +1 4th character 3rd character
ASCII code for ASCII code for ASCII code for ASCII code for
"n-1"th character "n-2"th character "n-1"th character "n-2"th character
ASCII code for ASCII code for ASCII code for
00H
"n+1"th character "n"th character "n"th character
ASCII code for
00H
last character
In the case of "n = 7" ASCII code for 1st character
b15 b8 b7 b0 b15 b8 b7 b0
s +0 42H(B) 41H(A) d +0 42H(B) 41H(A)
+1 44H(D) 43H(C) +1 44H(D) 43H(C)
+2 46H(F) 45H(E) +2 46H(F) 45H(E)
+3 32H(2) 31H(1) +3 00H 31H(1)
+4 34H(4) 33H(3) "ABCDEF1"
ASCII code for 7th character
+5 00H 35H(5)
"ABCDEF12345"
a) A character string stored in the device specified by and later indicates data stored in devices
from the specified device until "00H" is first detected in byte units.
652
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Cautions
Outline
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly
as in the case of a simple project. Use a label to handle character string data.
Use a global label to specify a device.
2) When handling character codes other than ASCII codes, note the following contents:
a) The number of characters is handled in byte units (8 bits). Accordingly, in the case of character codes
2
Instruction List
in which two bytes express one character such as shift JIS codes, the length of one character is
detected as "2".
b) When extracting characters from a character string including character codes in which two bytes
express one character such as shift JIS codes, consider the number of characters to be extracted in
units of character codes for one character.
Note that the expected character code is not given if only one byte is extracted out of a 2-byte 3
character code.
Instruction
Configuration of
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" is not set within the corresponding device range after a device specified by .
4
Instructions
Explanation of
How to Read
(Error code: K6706)
2) When "n" exceeds the number of characters specified by . (Error code: K6706)
3) When the number of devices after a device number specified by is smaller than the number of
devices required to store extracted "n" characters (that is, when "00H" cannot be stored after all character
strings and the last character). (Error code: K6706) 5
Basic Instruction
4) When "n" is a negative value. (Error code: K6706)
Program examples
In the program example shown below, the number of characters which is equivalent to the number stored in
D0 is extracted from the left end of the character string data stored in D100 and later, and stored to R10 and
later when X010 turns ON.
6
Instructions
Step Ladder
[Structured ladder] [ST]
X010 LEFT VAR_02:=LEFT(X010,VAR_01,D0);
EN ENO
VAR_01*1
D0
s
n
d VAR_02*2
7
Instructions
Applied
*1. VAR_01 is a global label and is defined as D100.
*2. VAR_02 is a global label and is defined as R10.
ASCII code for 1st character 8
Function
and Pulse Catch
Interrupt Function
b15 b8 b7 b0 b15 b8 b7 b0
D100 51H(Q) 53H(S) R10 51H(Q) 53H(S)
D101 4EH(N) 4FH(O) R11 4EH(N) 4FH(O)
D102 44H(D) 48H(H) R12 44H(D) 48H(H)
D103 42H(B) 41H(A) R13 0000H
"SQONHD"
A
D104 00H
and addresses
between devices
Relationships
"SQONHDAB" D0 6
ASCII code for 6th character
653
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.7 MIDR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction extracts a specified number of characters from arbitrary positions of a specified character
string.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
MIDR
EN ENO
MIDR 16 bits Continuous MIDR(EN,s1,s2,d);
s1 d
s2
MIDRP
EN ENO
MIDRP 16 bits Pulse MIDRP(EN,s1,s2,d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device storing a character string String
Input
Head device specifying the head position and number of characters to
variable
be extracted
ARRAY [1..2] OF ANY16
• s2 : Head character position
• s2+1 : Number of characters
Output ENO Execution state Bit
variable Head device storing extracted character string String
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z z z z z z
z z z z z z z z z z
654
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation (MIDR/MIDRP)
" + 1" characters are extracted leftward from the position specified by of the character string data
stored in the device specified by and later, and stored to the device specified by and later.
When characters are extracted from a character string, "00H" is automatically added at the end of the 2
extracted characters.
Instruction List
1) When the number of extracted characters of the device specified by " +1" is odd, "00H" is stored in
the high-order byte of a device storing the last character.
2) When the number of extracted characters of the device specified by " + 1" is even, "0000H" is stored
in the device after the last character.
3
Command
Instruction
Configuration of
input MIDR
EN ENO
Label 1*1 s1 d Label 3 *3
Label 2*2 s2
*1. This defines the head of the device that stores the character string. 4
*2. This defines the head of the device that specifies the head character
Instructions
Explanation of
How to Read
position and the number of characters to be extracted.
*3. This defines the head of the device that stores the extracted character string.
Target character string (extraction source)
Extracted character string
1st character
s1 +0
b15
42H(B)
b8 b7
41H(A)
b0
d +0
b15
46H(F)
b8 b7
45H(E)
b0
5
Basic Instruction
+1 44H(D) 43H(C) +1 48H(H) 47H(G)
+2 46H(F) 45H(E) +2 00H 49H(I)
+3 48H(H) 47H(G) "EFGHI"
5th character s2
+4 4AH(J) 49H(I)
+5 00H 4BH(K)
5 characters starting from 5th character
6
Instructions
Step Ladder
"ABCDEFGHIJK" s2 +1
s2 +0 5
+1 5
a) A character string specified by indicates data stored in devices from the specified device until
"00H" is first detected in units of byte. 7
b) When the number of characters to be extracted specified by " + 1" is "0", the extraction
Instructions
Applied
processing is not executed.
c) When the number of characters to be extracted specified by " + 1" is "-1", the entire character
string specified by is stored to the device specified by and later.
b15 b8 b7 b0 b15 b8 b7 b0 8
s1 +0 42H(B) 41H(A) d +0 46H(F) 45H(E)
Function
and Pulse Catch
Interrupt Function
+1 44H(D) 43H(C) +1 48H(H) 47H(G)
+2 46H(F) 45H(E) +2 4AH(J) 49H(I)
+3 48H(H) 47H(G) +3 00H 4BH(K)
A
+4 4AH(J) 49H(I) "EFGHIJK"
5th character position s2
+5 00H 4BH(K)
and addresses
between devices
Relationships
"ABCDEFGHIJK"
s2 +0 5
+1 -1
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Cautions
1) When handling array data or character string data in a structured program, a 16-bit device cannot be
specified directly as in the case of a simple project.
Use a label to handle array data or character string data.
Use a global label to specify a device.
2) When handling character codes other than ASCII codes, note the following contents:
a) The number of characters is handled in byte units (8 bits). Accordingly, in the case of character codes
in which two bytes express one character such as shift JIS codes, the length of one character is
detected as "2".
b) When extracting characters from a character string including character codes in which two bytes
express one character such as shift JIS codes, consider the number of characters to be extracted in
units of character codes for one character.
Note that the expected character code is not given if only one byte is extracted out of a 2-byte
character code.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" is not set within the corresponding device range after a device specified by .
(Error code: K6706)
2) When the value specified by exceeds the number of characters specified by .
(Error code: K6706)
3) When the number of characters specified by " +1" from the position specified by the device specified
by exceeds the device range specified by . (Error code: K6706)
4) When the number of devices after a device number specified by is smaller than the number of
devices required to store extracted characters as many as the number specified by " +1" (that is,
when "00H" cannot be stored after all character strings and the last character) (Error code: K6706)
5) When the contents of the device specified by is a negative value. (Error code: K6706)
6) When the contents of the device specified by " + 1" is "-2" or less. (Error code: K6706)
7) When the contents of the device specified by " + 1" is a number larger than the number of characters
specified by .
(Error code: K6706)
656
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Program examples
Outline
In the program example shown below, four characters are extracted from the third character from the left end
of the character string data stored in D10 and later, and then stored to D0 and later when X000 turns ON.
[Structured ladder] [ST]
X000 MIDR VAR_03:=MIDR(X000,VAR_01,VAR_02); 2
Instruction List
EN ENO
VAR_01*1 s1 d VAR_03 *3
VAR_02*2 s2
*1. VAR_01 is a global label and is defined as D10.
*2. VAR_02 is a global label and is defined as R0. 3
Instruction
Configuration of
*3. VAR_03 is a global label and is defined as D0.
3rd character
b15 b8 b7 b0 b15 b8 b7 b0
D10 41H(A) 42H(B) D0 31H(1) 32H(2)
D11 31H(1) 32H(2) D1 46H(E) 33H(3) 4
Instructions
Explanation of
How to Read
D12 46H(E) 33H(3) D2 0000H
D13 00H 45H(D) "213E"
Four characters "BA213ED"
from 3rd character
Extracted characters
R0 3
R1 4 5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
657
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.8 MIDW
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction replaces the characters in arbitrary positions inside designated character string with a
specified character string.
→ For handling of character strings, refer to "FX Structured Programming Manual (Device &
Common)."
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
MIDW
EN ENO
MIDW 16 bits Continuous MIDW(EN,s1,s2,d);
s1 d
s2
MIDWP
EN ENO
MIDWP 16 bits Pulse MIDWP(EN,s1,s2,d);
s1 d
s2
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device storing a character string used in overwriting String
Input Head device specifying the head position and number of characters to
variable be overwritten
ARRAY [1..2] OF ANY16
• s2 :Head character position to be overwritten
• s2+1 :Number of characters to be overwritten
Output ENO Execution state Bit
variable Head device storing a character string overwritte String
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z
z z z z z z z z z
z z z z z z z z z z
658
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation (MIDW/MIDWP)
Character data specified by " + 1" are extracted from the left end (that is, the head) of the character string
data stored in the device specified by and later, and stored to the position specified by and later of
the character string data stored in the device specified by and later. 2
Instruction List
Command
input MIDW
EN ENO
Label 1 *1 s1 d Label 3 *3
Label 2*2 s2
*1. This defines the head of the device that stores the character string used in overwriting.
*2. This defines the head of the device that defines the head position and the number of the characters to be overwritten
3
Instruction
Configuration of
*3. This defines the head of the device that stores the character string overwritten.
Before execution
b15 b8 b7 b0 b15 b8 b7 b0
1st
s1 +0 31H(1) 30H(0) 1st d +0 42H(B) 41H(A) character
character
+1
+2
33H(3)
35H(5)
32H(2)
34H(4)
+1
+2
44H(D)
46H(F)
43H(C)
45H(E)
3rd
character 4
Instructions
Explanation of
How to Read
+3 37H(7) 36H(6) +3 48H(H) 47H(G)
+4 00H 38H(8) +4 00H 49H(I)
"012345678" "ABCDEFGHI"
6th character
After execution
5
Position from the left end in the character string
s2 +0 3 stored in d and later b15 b8 b7 b0
+1 6 Number of characters from the left end in the d +0 42H(B) 41H(A)
Basic Instruction
character string stored in s1 and later
+1 31H(1) 30H(0) 3rd
character
+2 33H(3) 32H(2)
+3 35H(5) 34H(4)
+4 00H 49H(I)
"AB012345I" 6
Instructions
Step Ladder
Six characters starting from 3rd character
(overwritten character string)
1) The character string specified by or indicates data stored in devices from the specified device
until "00H" is first detected in byte units.
2) When the number of characters to be overwritten specified by " + 1" is "0", the overwriting processing
is not executed. 7
Instructions
Applied
3) When the number of characters to be overwritten specified by " + 1" exceeds the last character of the
character string stored in the device specified by and later, data is stored up to the last character.
Before execution
b15 b8 b7 b0 b15 b8 b7 b0
8
s1 +0 31H(1) 30H(0) 1st d +0 42H(B) 41H(A)
+1 33H(3) 32H(2) character +1 44H(D) 43H(C)
Function
and Pulse Catch
Interrupt Function
+2 35H(5) 34H(4) +2 46H(F) 45H(E) 5th
character
+3 37H(7) 36H(6) +3 48H(H) 47H(G)
+4 00H 38H(8) +4 00H 49H(I)
"012345678" "ABCDEFGHI"
8th character
Position from the left end in the After execution A
s2 +0 5 character string stored in d and later b15 b8 b7 b0
and addresses
between devices
Relationships
+1 8 Number of characters from the left end in d +0 42H(B) 41H(A)
the character string stored in s1 and later
+1 44H(D) 43H(C)
+2 31H(1) 30H(0) 5th
character
+3 33H(3) 32H(2)
+4 00H 34H(4)
"ABCD01234"
Characters from the 5th character to the last character are overwritten.
Excessive characters, "35H (5)" to "37H (7)", are not stored.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
4) When " + 1" (the number of characters to be overwritten) is "-1", the entire character string stored in
and later is stored to the device specified by and later.
2nd character Before execution
b15 b8 b7 b0 b15 b8 b7 b0
s1 +0 31H(1) 30H(0) 1st d +0 42H(B) 41H(A) 1st
character character
+1 33H(3) 32H(2) +1 44H(D) 43H(C)
+2 35H(5) 34H(4) +2 46H(F) 45H(E)
+3 00H +3 48H(H) 47H(G)
"012345" +4 4AH(J) 49H(I)
Last character
Position from the left end in the character +5 00H 4BH(K)
s2 +0 2 string stored in d and later "ABCDEFGHIJK"
+1 -1 Number of characters from the left end in
the character string stored in s1 and later 2nd character After execution
b15 b8 b7 b0
d +0 30H(0) 41H(A)
+1 32H(2) 31H(1)
+2 34H(4) 33H(3)
+3 48H(H) 35H(5)
+4 4AH(J) 49H(I)
+5 00H 4BH(K)
"A012345HIJK"
Six characters from the 2nd character are overwritten.
Cautions
1) When handling array data or character string data in a structured program, a 16-bit device cannot be
specified directly as in the case of a simple project.
Use a label to handle array data or character string data.
Use a global label to specify a device.
2) When handling character codes other than ASCII codes, note the following contents:
a) The number of characters is handled in byte units (8 bits). Accordingly, in the case of character codes
in which two bytes express one character such as shift JIS codes, the length of one character is
detected as "2".
b) When extracting characters from a character string including character codes in which two bytes
express one character such as shift JIS codes, consider the number of characters to be extracted in
units of character codes for one character.
Note that the expected character code is not given if only one byte is extracted out of a 2-byte
character code.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" is not set within the corresponding device range after a device specified by or .
(Error code: K6706)
2) When the value of the device specified by exceeds the number of characters specified by .
(Error code: K6706)
3) When the value of the device specified by " + 1" exceeds the number of characters specified by
.
(Error code: K6706)
4) When the value of the device specified by is a negative value (Error code: K6706)
5) When the value of the device specified by " + 1" is "-2" or less
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Program examples
Outline
In the program example shown below, four characters are extracted from the character string data stored in
D0 and later, and stored to the third character (from the left end) and later for the character string data stored
in D100 and later when X010 turns ON.
[Structured ladder] [ST]
VAR_03:=MIDW(X010,VAR_01,VAR_02);
2
Instruction List
X010 MIDW
EN ENO
VAR_01*1 s1 d VAR_03*3
VAR_02*2 s2
*1. VAR_01 is a global label and is defined as D0. 3
Instruction
Configuration of
*2. VAR_02 is a global label and is defined as R0.
*3. VAR_03 is a global label and is defined as D100.
4th character Before execution
b15 b8 b7 b0 b15 b8 b7 b0
1st 4
D0 31H(1) 32H(2) 1st D100 53H(S) 55H(U) character
Instructions
Explanation of
How to Read
D1 45H(E) 46H(F) character D101 59H(Y) 43H(C) 3rd
character
D2 33H(3) 30H(0) D102 31H(1) 5AH(Z)
D3 00H D103 42H(B) 30H(0)
5
"21FE03" D104 0000H
R0 3 "USCYZ10B"
Basic Instruction
R1 4
After execution
b15 b8 b7 b0
D100 53H(S) 55H(U)
D101 31H(1) 32H(2) 3rd 6
character
Instructions
Step Ladder
D102 45H(E) 46H(F)
D103 42H(B) 30H(0)
D104 0000H
"US21FE0B"
The 1st to 4th characters are stored (overwritten). 7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
661
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
7.20.9 INSTR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction searches a specified character string within another character string.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
INSTR
EN ENO
INSTR 16 bits Continuous s1 d INSTR(EN,s1,s2,n,d);
s2
n
INSTRP
EN ENO
INSTRP 16 bits Pulse s1 d INSTRP(EN,s1,s2,n,d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device storing a character string to search for String
Input
variable Head device storing a character string to be searched String
Search start position ANY16
Output ENO Execution state Bit
variable Head device storing search result ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z
z z z z z
z z z z z
z z z z
662
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Function and operation explanation
Outline
1. 16-bit operation (INSTR/INSTRP)
1) The character string stored in the device specified by and later is searched for within the character
string of the device specified by and later. The search begins at the "n"th character from the left end
(head character) of the device specified by and the search result is stored in the device specified by 2
Instruction List
.
The search result provides the first matching character (located from the left end (head character)) in the
device specified by .
Command
INSTR
3
input
EN ENO
*1
Label 1 s1 d Head device storing search result
Instruction
Configuration of
*2
Label 2 s2
Search start position n
*1. This defines the head of the device that stores the character string to search for.
*2. This defines the head of the device that stores the character string to be searched.
Character string to be searched Character string to search for 4
Instructions
Explanation of
How to Read
b15 b8 b7 b0 b15 b8 b7 b0
s2 +0 42H(B) 41H(A) s1 +0 46H(F) 45H(E)
Search is started from
+1 44H(D) 43H(C) the 3rd character. (n=3) +1 48H(H) 47H(G)
+2 46H(F) 45H(E) 5th character from +2 00H
+3 48H(H) 47H(G) the head character
"EFGH"
+4
+5
4AH(J)
00H
49H(I)
4BH(K)
5
Basic Instruction
"ABCDEFGHIJK" 5 Stores the position where
d
the first detected character
is located from the head
character in the character
string data stored in s2 .
2) When the searched character string is not detected, "0" is stored in the device specified by . 6
Instructions
Step Ladder
3) When the search start position "n" is a negative number or "0", search processing is not executed.
4) A character string can be directly specified in the character string to search for specified by .
Character string to be searched Character string to search for
b15 b8 b7 b0 "AB"
s2 +0
+1
32H(2) 31H(1) Search is started from 7
34H(4) 33H(3) the 3rd character. (n=3)
Instructions
Applied
+2 42H(B) 41H(A) 5th character from D100
he head character 5
+3 36H(6) 35H(5)
+4 42H(B) 41H(A)
+5 00H
"1234AB56AB"
8
Function
and Pulse Catch
Interrupt Function
Cautions
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly
as in the case of a simple project. Use a label to handle character string data.
Use a global label to specify a device.
2) The FX3UC PLC of V 2.20 or later supports this instruction. A
and addresses
between devices
Relationships
663
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the search start position "n" exceeds the number of characters stored in
(Error code: K6706)
2) When "00H (NULL)" is not located within the corresponding device range starting from the device
specified by .
(Error code: K6706)
3) When "00H (NULL)" is not located within the corresponding device range starting from the device
specified by .
(Error code: K6706)
Program examples
1) In the program example below, the character string "C123" (D0 and later) is searched from the fifth
character from the left end (head character) of the character string "CI2312CIM" (R0 and later) when
X000 is set to ON. The search result is stored in D100.
[Structured ladder] [ST]
X000 INSTR D100:=INSTR(X000,VAR_01,VAR_02,K5);
EN ENO
VAR_01*1 s1 d D100
VAR_02*2 s2
K5 n
*1. VAR_01 is a global label and is defined as D0.
*2. VAR_03 is a global label and is defined as D100.
Character string to be searched Character string to search for
b15 b8 b7 b0 These characters are not b15 b8 b7 b0
R0 49H(I) 43H(C) searched because the D0 49H(I) 43H(C)
R1 33H(3) 32H(2) search start position is "5". D1 33H(3) 32H(2)
R2 32H(2) 31H(1) Searched from D2 00H
the 5th character.
R3 49H(I) 43H(C) "CI23"
R4 00H 4DH(M)
"CI2312CIM"
D100 0
Because the searched character
string is not detected, "0" is stored.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
7.20.10 $MOV
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction transfers character string data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
$MOV
Instruction
Configuration of
$MOV 16 bits Continuous EN ENO $MOV(EN,s,d);
s d
$MOVP
$MOVP 16 bits Pulse EN
s
ENO
d
$MOVP(EN,s,d);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
Input
variable Directly specified character string (up to 32 characters) or head
device storing character string which is handled as the transfer source
String 5
Basic Instruction
Output ENO Execution state Bit
variable Head device storing transferred character string String
3. Applicable devices
Bit Devices Word Devices Others 6
Operand System Special Cons Real Character
Instructions
Step Ladder
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z
z z z z z z z z z
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
665
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
Function and operation explanation
1. 16-bit operation ($MOV/$MOVP)
The character string data stored in the device specified by and later is transferred to the device specified
by and later.
From the device number specified by to a device after that which stores "00H" in its high-order or low-
order byte are transferred at one time.
Command
input $MOV
EN ENO
Label 1*1 s d Label 2 *2
*1. This defines the directly specified character string or head device
that stores the character string which is handled as transfer source.
*2. This defines the head of the device that stores the transferred character string.
b15 b8 b7 b0 b15 b8 b7 b0
s +0 2nd character 1st character d +0 2nd character 1st character
+1 4th character 3rd character +1 4th character 3rd character
+2 6th character 5th character +2 6th character 5th character
00H "n"th character 00H "n"th character
"00H" indicates the end of character string.
Even if the device range storing the character string data to be transferred overlaps the device range storing
the transferred character string data, transfer is executed.
For example, when a character string stored in D10 to D13 is transferred to D11 to D14, the transfer is
executed as shown below.
Command
input $MOV
EN ENO
VAR_01 *1 s d VAR_02*2
*1. VAR_01 is a global label and is defined as D10.
*2. VAR_02 is a global label and is defined as D11.
b15 b8 b7 b0 b15 b8 b7 b0
D10 32H(2) 31H(1) D10 32H(2) 31H(1) ... It is same as the
character string
D11 34H(4) 33H(3) D11 32H(2) 31H(1) before transfer.
D12 36H(6) 35H(5) D12 34H(4) 33H(3)
D13 00H D13 36H(6) 35H(5)
D14 D14 00H 00H
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.20 Character String Control
1
Cautions
Outline
1) When handling character string data in a structured program, a 16-bit device cannot be specified directly
as in the case of a simple project. Use a label to handle character string data.
Use a global label to specify a device.
2) When "00H" is stored in the low-order byte of the device specified by "
the high-order byte and low-order byte of the device specified by " + n".
+ n", "00H" is stored to both
2
Instruction List
Command
input $MOV
EN ENO
Label 1 *1 s d Label 2 *2
*1. This defines the directly specified character string or head device 3
Instruction
Configuration of
that stores the character string which is handled as transfer source.
*2. This defines the head of the device that stores the transferred character string.
b15 b8 b7 b0 b15 b8 b7 b0
s +0 42H(B) 41H(A) d +0 42H(B) 41H(A)
+1 44H(D) 43H(C) +1 44H(D) 43H(C)
4
Instructions
Explanation of
How to Read
+2 45H(E) 00H +2 00H 00H
The high-order byte "00H" is automatically stored
is not transferred. in the high-order byte.
5
Error
Basic Instruction
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When "00H" does not exist in the range specified from device specified by to the last device
(Error code: K6706)
2) When the specified character string cannot be stored in devices from the device specified by to the
6
Instructions
Step Ladder
last device. (Error code: K6706)
Program examples
In the program example shown below, character string data stored in D10 to D12 is transferred to D20
through D22 when X000 is set to ON. 7
Instructions
Applied
[Structured ladder] [ST]
X000 $MOV VAR_02:=$MOV(X000,VAR_01);
EN ENO
VAR_01*1 s d VAR_02*2
*1. VAR_01 is a global label and is defined as D10. 8
Function
and Pulse Catch
Interrupt Function
*2. VAR_02 is a global label and is defined as D20.
b15 b8 b7 b0 b15 b8 b7 b0
D10 4DH(M) 2AH(* ) D20 4DH(M) 2AH(* )
D11 45H(E) 45H(E) D21 45H(E) 45H(E) A
and addresses
between devices
Relationships
D12 00H D22 00H 00H
667
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
7.21 Data Operation 3
7.21.1 FDEL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction deletes an arbitrary piece of data from a data table.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladde ST
FDEL
EN ENO
FDEL 16 bits Continuous FDEL(EN,s,n,d);
s d
n
FDELP
EN ENO
FDELP 16 bits Pulse FDELP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Device storing deleted data ANY16
variable
Position of deleted data in table ANY16
Output ENO Execution state Bit
variable Head device in data table ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z z z
z z z z
668
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Function and operation explanation
Outline
1. 16-bit operation (FDEL/FDELP)
"n"th data is deleted from a data table (stored in the device specified by and later), and the deleted data
is stored in the device specified by . "n + 1"th data and later in the data table are shifted forward one by
one, and the number of stored data is subtracted by "1". 2
Instruction List
Command
input FDEL
EN ENO
Device storing deleted data s d Head device in data table
Position of deleted data in table n
Instruction
Configuration of
Number of Data table Data table Number of
-1
stored data d +0 5 d +0 4 stored data
+1 5432 +1 5432
Data table (having When "n" is "2"
+2 3333 +2 4444
Data table range
Device range used
in data table
the number of
stored pieces of
+3
+4
4444
1234
+3
+4
1234
5678
4
data starting
Instructions
Explanation of
How to Read
from " d + 1") +5 5678 +5 0 "0" is stored.
0
Deleted data
s 3333
5
Basic Instruction
Cautions
1) The device range used in a data table should be controlled by the user.
The data table has the number of pieces of data, which is stored in , starting from the next device
( + 1) after the device storing the number of pieces of data .
→ Refer to the program example below.
6
Instructions
Step Ladder
2) The FX3UC PLC of V 2.20 or later supports this instruction.
Related instruction
Instruction Description
FINS Inserts data into an arbitrary position in a data table 7
Instructions
Applied
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the table position "n" from the device specified by
one"
exceeds the "amount of data stored plus 8
Function
and Pulse Catch
Interrupt Function
(Error code: K6706)
2) When the value "n" exceeds the range of the number of pieces of data specified by .
(Error code: K6706)
3) When the FDEL instruction is executed under the condition "n ≤ 0" (Error code: K6706)
4) When the amount of data stored specified by is "0". (Error code: K6706) A
and addresses
between devices
Relationships
5) When the data table range exceeds the corresponding device range (Error code: K6706)
669
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
Program examples
In the program example shown below, the second data is deleted from the data table stored in D100 to D105,
and the deleted data is stored in D0 when X010 is set to ON.
When the amount of data stored is "0", however, the FDEL instruction is not executed.
(The device range used in the data table is D100 to D107.)
[Structured ladder]
X010 AND< AND<= FDELP
EN ENO EN ENO EN ENO
K0 s1 K7 s1 D0 s d D100
D100 s2 D100 s2 K2 n
[ST]
IF((IF(AND<(X010,K0,D100)THEN AND<=(TRUE,K7,D100)))
THEN FDELP(TRUE,D0,K2,D100);
X010:ON
Data table Data table
Number of -1 Number of
D100 5 D100 4
stored data stored data
D101 -123 D101 -123
D102 4444 D102 3210
Data table Data table range
Device range used D103 3210 D103 1234
range
in data table D104 1234 D104 5432
D105 5432 D105 0
D106 0 D106 0
D107 0 D107 0
D0 4444 Deleted data
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
7.21.2 FINS
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction inserts data into an arbitrary position in a data table.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
FINS
Instruction
Configuration of
EN ENO
FINS 16 bits Continuous FINS(EN,s,n,d);
s d
n
EN
FINSP
ENO
4
FINSP 16 bits Pulse FINSP(EN,s,n,d);
Instructions
Explanation of
How to Read
s d
n
2. Set data
Variable
EN Execution condition
Description
Bit
Data type
5
Basic Instruction
Input
Device storing inserted data ANY16
variable
Data insertion position in table ANY16
Output ENO Execution state Bit
variable Head device in data table ANY16
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z
7
Instructions
Applied
z z z z z
z z z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
671
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
Function and operation explanation
1. 16-bit operation (FINS/FINSP)
1) 16-bit data of the device specified by is inserted in "n"th position in a data table (stored in the device
specified by and later).
"n"th data and later in the data table are shifted backward one by one, and the number of stored data is
added by "1".
Command
input FINSP
EN ENO
Device storing inserted data s d Head device in data table
Data insertion position in table n
Number of Data table Data table
+1
stored data d +0 3 d +0 4
+1 5432 +1 5432
Data table range +2 1234 +2 4444
Data table range
+3 -123 +3 1234
Device range used
in data table +4 0 +4 -123
+5 0 +5 0
0 0
When "n" is "2"
s 4444
Cautions
1) The device range used in a data table should be controlled by the user.
The data table has the number of pieces of data, which is stored in , starting from the device after
the device that indicates the number of stored data .
→ Refer to the program example below.
2) The FX3UC PLC of V 2.20 or later supports this instruction.
Related instruction
Instruction Description
FDEL Deletes an arbitrary data from a data table.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the table position "n" from the device specified by exceeds the "amount of data stored plus
one"
(Error code: K6706)
2) When the value "n" exceeds the device range of the data table specified by
(Error code: K6706)
3) When the FDEL instruction is executed under the condition "n ≤ 0" (Error code: K6706)
4) When the data table range exceeds the corresponding device range (Error code: K6706)
672
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Program examples
Outline
In the program example shown below, data stored in D100 is inserted into the third position of the data table
stored in D0 to D4 when X010 is set to ON.
When the amount of data stored exceeds "7", however, the FINS instruction is not executed.
(The device range used in the data table is D0 to D7.)
[Structured ladder]
2
Instruction List
X010 AND<= AND< FINSP
EN ENO EN ENO EN ENO
K0 s1 D0 s1 D100 s d D0
D0 s2 K7 s2 K3 n
3
Instruction
Configuration of
[ST]
IF(( IF(AND<=(X010,K0,D0)THEN AND<(TRUE,D0,K7)))THEN FINSP(TRUE,D100,K3,D0);
Instructions
Explanation of
How to Read
X010:ON
Number of Data table Data table
+1
stored data D0 4 D0 5 Number of stored data
D1 1234 D1 1234 5
Data table D2 4444 D2 4444
Basic Instruction
range Data table range
D3 -123 D3 -3210
Device range
used in data table D4 5000 D4 -123
D5 0 D5 5000
D6 0 D6 0
6
D7 0 D7 0
When "n" is "3"
Instructions
Step Ladder
D100 -3210
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
673
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
7.21.3 POP
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads the last data written by the shift write (SFWR) instruction for the first-in first-out and first-
in last-out control
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
POP
EN ENO
POP 16 bits Continuous POP(EN,s,n,d);
s d
n
POPP
EN ENO
POPP 16 bits Pulse POPP(EN,s,n,d);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Head device storing first-in data (including pointer data) ANY16
variable
Number of pieces of data stored
ANY16
(Add "1" because pointer data is also included.)
Output ENO Execution state Bit
variable Device storing last-out data ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z
z z z z z z z z zz z
z z
674
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Function and operation explanation
Outline
1. 16-bit operation (POP/POPP)
Command
input POP
Head device storing the first-in data
EN
s
ENO
d Device storing last-out data
2
Instruction List
Number of pieces of data stored n
Data for FILO control
Description
Pointer data (amount of data stored) 3
Instruction
Configuration of
+1
+2
+3
Data area
...
(First-in data written by shift write (SFWR) instruction)
+n-3 4
Instructions
Explanation of
How to Read
+n-2
+n-1
1) Every time the instruction is executed for the word devices specified by " to + n-1", a device
" + Pointer data" is read to the device specified by . (The last data entry written by the shift
write (SFWR) instruction for first-in first-out control is read to the device specified by .) Specify "n" in 5
the range from "2" to "512".
Basic Instruction
2) Subtract "1" from the value of the pointer data of the device specified by .
Data area
Pointer
s +n-1 s +n-2 s +6 s +5 s +4 s +3 s +2 s +1 s 6
Instructions
Step Ladder
In the case of K4
No changes in the data area
Pointer
s +n-1 s +n-2 s +6 s +5 s +4 s +3 s +2 s +1 s d
K4 → K3
7
Instructions
Applied
Related device
→ for the zero flag use method, refer to Section 1.3.4.
Device Name Description
M8020 Zero flag Turns ON when the instruction is executed while the pointer is "0". 8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
675
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
Related instruction
Instruction Description
SFWR Shift write [for FIFO/FILO control]
SFRD Shift read [for FIFO control]
Cautions
1) When this instruction is programmed in the continuous operation type, the instruction is executed in every
operation cycle. As a result, an expected operation may not be achieved.
Usually, program this instruction in the "pulse operation type", or let this instruction be executed by a
"pulsed command contact.
2) When the current value of the pointer specified by is "0", the zero flag M8020 turns ON and the
instruction is not executed.
Check in advance using a comparison instruction whether the current value of the device specified by
satisfies "1 ≤ current value ≤ (n-1)", and then execute this instruction.
3) When the current value of the pointer specified by is "1", "0" is written to the pointer and the zero
flag M8020 turns ON.
Error
1) An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
a) When the pointer is larger than "n-1". (Error code: K6706)
b) When the pointer is smaller than "0". (Error code: K6706)
676
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Program examples
Outline
In the program example shown below, among value stored in D20 input first to D101 to D106, the last value
input is stored to D10, and "1" is subtracted from the number of stored data (pointer D100) every time X000
turns ON.
[Structured ladder]
2
LDP SFWR
Instruction List
EN ENO EN ENO
first-in command
X010 s D20 s d D100
K7 n
Instruction
Configuration of
LDP POP
EN ENO EN ENO
Last-in read command
X000 s D100 s d D10
K7 n
Instructions
Explanation of
How to Read
[ST]
IF(LDP(TRUE,X010))THEN SFWR(TRUE,D20,K7,D100);
IF(LDP(TRUE,X000))THEN POP(TRUE,D100,K7,D10);
When the first-in data is as shown in the table below 5
Basic Instruction
Pointer D100 K3
D101 H1234
D102 H5678
D103 HABCD
Data
D104
D105
H0000
H0000
6
Instructions
Step Ladder
D106 H0000
D20
D100: D100: D100:
first-in command K2→K3 K1→K2 K0→K1 7
Instructions
Applied
D106 D105 D104 D103 D102 D101 D100
H0000 H0000 H0000 HABCD H5678 H1234 K3
Last-in read command 8
Function
and Pulse Catch
Interrupt Function
X000:OFF→ON
D106 D105 D104 D103 D102 D101 D100 D10
H0000 H0000 H0000 HABCD H5678 H1234 K3→K2 HABCD
Do not change.
A
and addresses
between devices
Relationships
677
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
7.21.4 SFR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction shifts 16 bits stored in a word device rightward by "n" bits.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SFR
SFR 16 bits Continuous EN ENO SFR(EN,n,d);
n d
SFRP
SFRP 16 bits Pulse EN ENO SFRP(EN,n,d);
n d
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Number of times of shift (0 ≤ n ≤ 15) ANY16
Output ENO Execution state Bit
variable Device storing data to be shifted. ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z zz z
z z z z z z z z z zz z z
678
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Function and operation explanation
Outline
1. 16-bit operation (SFR/SFRP)
Command
input SFR
Number of times
EN
n
ENO
d Device storing data to be shifted.
2
Instruction List
of shift
1) 16 bits stored in a word device specified by are shifted rightward by "n" bits.
Specify a value in the range from "0" to "15" as "n".
If "16" or larger value is specified as "n", 16 bits are shifted rightward by the remainder of "(n) divided by
(16)".
For example, when "n" is set to "18", 16 bits are shifted rightward by 2 bits as "2" remains when "18" is
3
Instruction
Configuration of
divided by "16".
2) The ON (1) or OFF (0) status of the "n"th bit (bit "n-1") in the word device specified by is transferred
to the carry flag M8022.
3) "0" is set to "n" bits from the most significant bit.
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 4
Instructions
Explanation of
How to Read
d 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0
In the case of "n = 6" Carry flag
d
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 0 0 0 1 1 1 0 1 1 1 0 1 1
M8022
1
5
Basic Instruction
Becomes "0".
When a bit device is specified by digit specification
(4 × K ) bits are shifted according to the data bit specification.)
6
Instructions
Step Ladder
LDP SFRP
EN ENO EN ENO
Command s K4 n d K3M0
input
M11 M8 M7 M4 M3 M0 7
Instructions
Applied
1 0 1 0 1 0 1 0 1 0 1 0
Carry flag
M11 M8 M7 M4 M3 M0 M8022
8
0 0 0 0 1 0 1 0 1 0 1 0 1
Function
and Pulse Catch
Interrupt Function
Becomes "0".
Related device
→ For the carry flag use method, refer to Section 1.3.4. A
and addresses
between devices
Relationships
Device Name Description
M8022 Carry flag Shifts the ON/OFF status of bit "n-1"
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When a negative value is set to "n" (Error code: 6706)
679
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
Program examples
In the program example shown below, the contents of Y010 to Y023 are shifted rightward by the number of
bits specified by D0 when X020 turns ON.
[Structured ladder] [ST]
X020 SFRP SFR(X020,D0,Y3Y010);
EN ENO
D0 n d K3Y010
Y23 Y20 Y17 Y14 Y13 Y10
1 0 1 0 1 0 1 0 1 0 1 0
D0 4
Carry flag
Y23 Y20 Y17 Y14 Y13 Y10 M8022
0 0 0 0 1 0 1 0 1 0 1 0 1
Becomes "0".
680
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
7.21.5 SFL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction shifts 16 bits stored in a word device leftward by "n" bits.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
SFL
Instruction
Configuration of
SFL 16 bits Continuous EN ENO SFL(EN,n,d);
n d
SFLP
SFLP 16 bits Pulse EN
n
ENO
d
SFLP(EN,n,d);
4
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
Input EN Execution condition Bit
variable Number of times of shift ANY16 5
EN Execution state Bit
Basic Instruction
Output
variable Device storing data to be shifted. ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System user Digit specification
System Special
Index
Cons Real Character
Pointer
6
user unit tant Number String
Instructions
Step Ladder
type
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z zz z
z z z z z z z z z zz z z
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
681
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
Function and operation explanation
1. 16-bit operation (SFL/SFLP)
Command
input SFL
EN ENO
Number of times n d Device storing data to be shifted.
of shift
1) 16 bits stored in a word device specified by are shifted leftward by "n" bits.
Specify a value in the range from "0" to "15" as "n".
If "16" or larger value is specified as "n", 16 bits are shifted leftward by the remainder of "(n) divided by
(16)".
For example, when "n" is set to "18", 16 bits are shifted leftward by 2 bits as "2" remains when "18" is
divided by "16".
2) The ON (1) or OFF (0) status of the "n + 1"th bit (bit "n") in the word device specified by is
transferred to the carry flag M8022.
3) "0" is set to "n" bits from the least significant bit.
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
d 1 1 1 1 0 0 1 1 0 0 0 0 1 1 1 1
Carry flag In the case of "n = 8"
M8022 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 d 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0
Becomes "0"
When a bit device is specified by digit specification
(4 × K ) bits are shifted according to the data bit specification.)
LDP SFL
EN ENO EN ENO
Command s K3 n d K2M10
input
M17 M14M13 M10
0 0 1 1 0 0 1 1
Carry flag
M8022 M17 M14M13 M12 M10
1 1 0 0 1 1 0 0 0
Becomes "0".
Related device
→ For the carry flag use method, refer to Section 1.3.4.
Device Name Description
M8022 Carry flag Shifts the ON/OFF status of bit "n"
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When a negative value is set to "n" (Error code: 6706)
682
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.21 Data Operation 3
1
Program examples
Outline
In the program example shown below, the contents of Y010 to Y017 are shifted leftward by the number of bits
specified by D0 when X020 turns ON.
[Structured ladder] [ST]
X020 SFLP SFLP(X020,D0,K2Y10); 2
EN ENO
Instruction List
D0 n d K2Y10
Y17
0 0 1
Y14 Y13
1 0 0 1
Y10
1
3
Instruction
Configuration of
3 D0
Carry flag
M8022 Y17 Y14 Y13 Y12 Y10
1 1 0 0 1 1 0 0 0 4
Instructions
Explanation of
How to Read
Becomes "0".
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
683
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
7.22 Data Comparison
7.22.1 LD=, LD>, LD<, LD<>, LD<=, LD>=
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
These instructions compare numeric values, and set a contact to ON when the condition agrees so that an
operation started.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
LD=
EN ENO
LD= 16 bits Continuous LD=(EN,s1,s2);
s1
s2
LD>
EN ENO
LD> 16 bits Continuous LD>(EN,s1,s2);
s1
s2
LD<
EN ENO
LD< 16 bits Continuous LD<(EN,s1,s2);
s1
s2
LD<>
EN ENO
LD<> 16 bits Continuous LD<>(EN,s1,s2);
s1
s2
LD<=
EN ENO
LD<= 16 bits Continuous LD<=(EN,s1,s2);
s1
s2
LD>=
EN ENO
LD>= 16 bits Continuous LD>=(EN,s1,s2);
s1
s2
LDD=
EN ENO
LDD= 32 bits Continuous LDD=(EN,s1,s2);
s1
s2
LDD>
EN ENO
LDD> 32 bits Continuous LDD>(EN,s1,s2);
s1
s2
LDD<
EN ENO
LDD< 32 bits Continuous LDD<(EN,s1,s2);
s1
s2
684
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
1
Expression in each language
Outline
Instruction Execution
Operation
name form Structured ladder ST
LDD<>
EN ENO
LDD<> 32 bits Continuous LDD<>(EN,s1,s2);
s1
s2 2
Instruction List
LDD<=
EN ENO
LDD<= 32 bits Continuous LDD<=(EN,s1,s2);
s1
s2
3
LDD>=
Instruction
Configuration of
EN ENO
LDD>= 32 bits Continuous LDD>=(EN,s1,s2);
s1
s2
2. Set data 4
Data type
Instructions
Explanation of
How to Read
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Device storing comparison data ANY16 ANY32
variable
Device storing comparison data ANY16 ANY32 5
Basic Instruction
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System user Digit specification
System
user
Special
unit
Index
Cons Real
tant Number
Character
String
Pointer 6
type
Instructions
Step Ladder
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z z z
z z z z z z z S1 S2 zz z z z
S: Refer to "Cautions" 7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
685
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
Function and operation explanation
These data comparison instructions are connected to bus lines.
The contents of the devices specified by are compared with the contents of the device specified by
in the binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the
comparison result.
16-bit instruction 32-bit instruction ON condition OFF condition
LD= LDD= = ≠
LD> LDD> > ≤
LD< LDD< < ≥
LD<> LDD<> ≠ =
LD<= LDD<= ≤ >
LD>= LDD>= ≥ <
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it
is a 32-bit long device. Use a global label to specify a device.
2) Negative values
When the most significant bit is "1" in the data stored in the device specified by or , it is
regarded as a negative value in comparison.
a) In the 16-bit operation: bit 15
b) In the 32-bit operation: bit 31
3) When using 32-bit counters (including 32-bit high speed counters)
Be sure to execute the 32-bit operation (such as LDD=, LDD> and LDD<) when comparing 32-bit
counters.
If a 32-bit counter is specified in the 16-bit operation (such as LD=, LD> and LD<), a program error or
operation error will occur.
4) Some restrictions to applicable devices
S1: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S2: Applicable only to the FX3U and FX3UC PLCs.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
1
Program examples
Outline
[Structured ladder] [ST]
When the current value of the counter C10 is "200", Y010 is driven.
LD= 2
EN ENO Y10 Y10:=LD=(TRUE,K200,C10);
Instruction List
K200 s1
C10 s2
When the contents of D200 are "-29" or more and X001 is
ON, Y011 is set.
X001 LD> 3
Instruction
Configuration of
EN ENO Y11 Y11:=LD>(X001,D200,K-30);
D200 s1
K-30 s2
When the contents of the counter C200 are less than "K678,493"
or when M3 turns ON, M50 is driven.
LDD> 4
Instructions
Explanation of
How to Read
EN ENO M50 M50:=LDD>(TRUE,VAR_01,VAR_02) OR M3;
VAR_01*1 s1
VAR_02*2 s2
M3
*1. VAR_01 is a global label and is defined as K678493. 5
Basic Instruction
*2. VAR_02 is a global label and is defined as C200.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
687
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
7.22.2 AND=, AND>, AND<, AND<>, AND<=, AND>=
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
These instructions compare numeric values, and set a contact to ON when the condition agrees.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
AND=
EN ENO
AND= 16 bits Continuous AND=(EN,s1,s2);
s1
s2
AND>
EN ENO
AND> 16 bits Continuous AND>(EN,s1,s2);
s1
s2
AND<
EN ENO
AND< 16 bits Continuous AND<(EN,s1,s2);
s1
s2
AND<>
EN ENO
AND<> 16 bits Continuous AND<>(EN,s1,s2);
s1
s2
AND<=
EN ENO
AND<= 16 bits Continuous AND<=(EN,s1,s2);
s1
s2
AND>=
EN ENO
AND>= 16 bits Continuous AND>=(EN,s1,s2);
s1
s2
ANDD=
EN ENO
ANDD= 32 bits Continuous ANDD=(EN,s1,s2);
s1
s2
ANDD>
EN ENO
ANDD> 32 bits Continuous ANDD>(EN,s1,s2);
s1
s2
ANDD<
EN ENO
ANDD< 32 bits Continuous ANDD<(EN,s1,s2);
s1
s2
688
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
1
Expression in each language
Outline
Instruction Execution
Operation
name form Structured ladder ST
ANDD<>
EN ENO
ANDD<> 32 bits Continuous ANDD<>(EN,s1,s2);
s1
s2 2
Instruction List
ANDD<=
EN ENO
ANDD<= 32 bits Continuous ANDD<=(EN,s1,s2);
s1
s2
3
ANDD>=
Instruction
Configuration of
EN ENO
ANDD>= 32 bits Continuous ANDD>=(EN,s1,s2);
s1
s2
2. Set data 4
Data type
Instructions
Explanation of
How to Read
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Device storing comparison data ANY16 ANY32
variable
Device storing comparison data ANY16 ANY32 5
Basic Instruction
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System user Digit specification
System
user
Special
unit
Index
Cons Real
tant Number
Character
String
Pointer 6
type
Instructions
Step Ladder
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z S1 S2 zz z
z z z z z z z S1 S2 zz z
S: Refer to "Cautions" 7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
689
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
Function and operation explanation
These data comparison instructions are connected to other contacts in series.
The contents of the device specified by are compared with the contents of the device specified by
in binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the
comparison result.
16-bit instruction 32-bit instruction ON condition OFF condition
AND= ANDD= = ≠
AND> ANDD> > ≤
AND< ANDD< < ≥
AND<> ANDD<> ≠ =
AND<= ANDD<= ≤ >
AND>= ANDD>= ≥ <
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it
is a 32-bit long device. Use a global label to specify a device.
2) Negative values
When the most significant bit is "1" in the data stored in the device specified by or , it is
regarded as a negative value in comparison.
a) In the 16-bit operation: bit 15
b) In the 32-bit operation: bit 31
3) When using 32-bit counters (including 32-bit high speed counters)
Be sure to execute the 32-bit operation (such as ANDD=, ANDD> and ANDD<) when comparing 32-bit
counters.
If a 32-bit counter is specified in the 16-bit operation (such as AND=, AND> and AND<), a program error
or operation error will occur.
4) Some restrictions to applicable devices
S1: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S2: Applicable only to the FX3U and FX3UC PLCs.
690
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
1
Program examples
Outline
[Structured ladder] [ST]
When X000 is ON and the current value of the counter C10 is
"200" Y010 is driven.
X000 AND=
2
Instruction List
EN ENO Y10 Y10:=AND=(X000,K200,C10);
K200 s1
C10 s2
When X001 is OFF and the contents of the data register
D0 are not "-10", Y011 is set.
3
Instruction
Configuration of
X001 AND<>
EN ENO M40 AND<>(NOT X001,K-10,D0,M40);
K-10 s1 Y11:=SET(M40);
D0 s2
M40 SET 4
EN ENO
Instructions
Explanation of
How to Read
d Y11
When X002 is ON, and the contents of the data registers D11 and
D10 are less than "K678,493", or when M3 turns ON, M50 is driven.
5
Basic Instruction
X002 ANDD>
EN ENO Y11 Y11:=ANDD>(X002,VAR_01,VAR_02) OR M3;
VAR_01 *1 s1
VAR_02 *2 s2
M3
6
Instructions
Step Ladder
*1. VAR_01 is a global label and is defined as K678493.
*2. VAR_02 is a global label and is defined as D10.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
691
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
7.22.3 OR=, OR>, OR<, OR<>, OR<=, OR>=
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
These instructions compare numeric values, and set a contact to ON when the condition agrees.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
OR=
EN ENO
OR= 16 bits Continuous OR=(EN,s1,s2);
s1
s2
OR>
EN ENO
OR> 16 bits Continuous OR>(EN,s1,s2);
s1
s2
OR<
EN ENO
OR< 16 bits Continuous OR<(EN,s1,s2);
s1
s2
OR<>
EN ENO
OR<> 16 bits Continuous OR<>(EN,s1,s2);
s1
s2
OR<=
EN ENO
OR<= 16 bits Continuous OR<=(EN,s1,s2);
s1
s2
OR>=
EN ENO
OR>= 16 bits Continuous OR>=(EN,s1,s2);
s1
s2
ORD=
EN ENO
ORD= 32 bits Continuous ORD=(EN,s1,s2);
s1
s2
692
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
1
Expression in each language
Outline
Instruction Execution
Operation
name form Structured ladder ST
ORD>
EN ENO
ORD> 32 bits Continuous
s1
ORD>(EN,s1,s2);
2
s2
Instruction List
ORD<
EN ENO
ORD< 32 bits Continuous
s1
ORD<(EN,s1,s2);
3
s2
Instruction
Configuration of
OR<>
EN ENO
OR<> 32 bits Continuous
s1
OR<>(EN,s1,s2);
4
s2
Instructions
Explanation of
How to Read
ORD<=
EN ENO
ORD<= 32 bits Continuous ORD<=(EN,s1,s2);
s1
s2
5
Basic Instruction
LD=
EN ENO
ORD>= 32 bits Continuous ORD>=(EN,s1,s2);
s1
s2
6
Instructions
Step Ladder
2. Set data
Data type
Variable Description 16-bit
operation
32-bit
operation 7
Instructions
Applied
EN Execution condition Bit
Input Device storing comparison data ANY16 ANY32
variable
Device storing comparison data ANY16 ANY32
Output
ENO Execution state Bit
variable
8
Function
and Pulse Catch
Interrupt Function
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
A
z z z z z z z S1 S2 zz z z z
and addresses
between devices
Relationships
z z z z z z z S1 S2 zz z z z
S: Refer to "Cautions"
693
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.22 Data Comparison
Function and operation explanation
These data comparison instructions are connected to other contacts in parallel.
The contents of the device specified by is compared with the contents of the device specified by in
binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the
comparison result.
16-bit instruction 32-bit instruction ON condition OFF condition
OR= ORD= = ≠
OR> ORD> > ≤
OR< ORD< < ≥
OR<> OR<> ≠ =
OR<= ORD<= ≤ >
OR>= ORD>= ≥ <
Cautions
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it
is a 32-bit long device. Use a global label to specify a device.
2) Negative values
When the most significant bit is "1" in the data stored in the device specified by or , it is
regarded as a negative value in comparison.
a) In the 16-bit operation: bit 15
b) In the 32-bit operation: bit 31
3) When using 32-bit counters (including 32-bit high speed counters)
Be sure to execute the 32-bit operation (such as ORD=, ORD> and ORD<) when comparing 32-bit
counters.
If a 32-bit counter is specified in the 16-bit operation (such as OR=, OR> and OR<), a program error or
operation error will occur.
4) Some restrictions to applicable devices
S1: Applicable only to the FX3U, FX3UC and FX3G PLCs.
S2: Applicable only to the FX3U and FX3UC PLCs.
Program examples
[Structured ladder] [ST]
When X001 turns ON or when the current value of
the counter C10 is "200", Y000 is driven.
X001
Y000 Y000:=X001 OR OR=(TRUE,K200,C10);
OR=
EN ENO
K200 s1
C10 s2
When X002 and M30 turn ON or when the contents of
the data registers D101 and D100 are more than
"K100,000", M60 is driven.
X002 M30
M60 M60:=(X002 AND M30)OR ORD=(TRUE,VAR-01,VAR-02);
ORD=
EN ENO
VAR_01*1 s1
VAR_02*2 s2
*1. VAR_01 is a global label and is defined as D100.
*2. VAR_02 is a global label and is defined as K100000.
694
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
1
7.23 Data Table Operation
Outline
7.23.1 LIMIT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction provides the upper limit value and lower limit value for an input numeric value, and control the
output value using these limit values.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
LIMIT
LIMIT 16 bits Continuous
EN ENO
LIMIT(EN,s1,s2,s3,d);
4
s1 d
Instructions
Explanation of
How to Read
s2
s3
LIMITP
LIMITP 16 bits Pulse
EN
s1
ENO
d LIMITP(EN,s1,s2,s3,d); 5
Basic Instruction
s2
s3
DLIMIT
EN ENO
DLIMIT 32 bits Continuous s1
s2
d DLIMIT(EN,s1,s2,s3,d); 6
Instructions
Step Ladder
s3
DLIMITP
EN ENO
DLIMITP 32 bits Pulse DLIMITP(EN,s1,s2,s3,d);
7
s1 d
s2
Instructions
Applied
s3
2. Set data
Data type
Variable Description 16-bit
operation
32-bit
operation 8
Function
and Pulse Catch
Interrupt Function
EN Execution condition Bit
Lower limit value (minimum output value) ANY16 ANY32
Input
variable Upper limit value (maximum output value) ANY16 ANY32
Input value controlled by the upper and lower limit values ANY16 ANY32
Output
ENO Execution state Bit A
Head device storing the output value controlled by the upper and
and addresses
between devices
Relationships
variable ANY16 ANY32
lower limit values
695
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
z z z z z z z z z z z z
z z z z z z z z z z
z z z z z z z z z
Function and operation explanation
1. 16-bit operation (LIMIT/LIMITP)
Depending on how the input value (16-bit binary value) of the device specified by compares to the upper
and lower limit range between the devices specified by and , the output value stored in the device
specified by is controlled.
The output value is controlled as shown below.
Command
input LIMIT
EN ENO
Lower limit value s1 d Head device storing the output value controlled
Upper limit value s2 by the upper and lower limit values
Input value controlled by the s3
upper and lower limit values
lower limit input lower limit output
1) In the case of " s1 value > s3 value " ................................ s1 value → d value
upper limit input upper limit output
2) In the case of " s2 value < s3 value " ................................ s2 value → d value
lower limit input upper limit input output
3) In the case of " s1 value ≤ s3 value ≤ s2 value " ... s3 value → d value
Output value Output value ( d )
s2 Specified value
Input
value Input
value ( s3 )
s1 Specified
value
4) When controlling the output value using only the upper limit value, set "-32768" to the lower
limit value of the device specified by s1 .
5) When controlling the output value using only the lower limit value, set "32767" to the upper
limit value of the device specified by s2 .
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
1
2. 32-bit operation (DLIMIT/DLIMITP)
Outline
Depending on how the input value (32-bit binary value) of the device specified by compares to the range
between the upper and lower limits specified by and , the output value to be stored in the device
specified by is controlled.
Command
input DLIMIT 2
Instruction List
EN ENO
Label 1*1 s1 d Label 4*4
Label 2*2 s2
Label 3*3 s3
3
*1. This defines the lower limit value.
*2. This defines the upper limit value.
Instruction
Configuration of
*3. This defines the control input value depending on the upper and
lower limit control.
*4. This defines the head of the device that stores the output value depending
on the result from the upper and lower limit control.
Instructions
Explanation of
How to Read
s1 s3 s1 d
1) In the case of " lower limit value > input value "..................................... lower limit value → output value
s2 s3 s2 d
2) In the case of " upper limit value < input value "..................................... upper limit value → output value
s1 s3 s2 s3 d
5
Basic Instruction
3) In the case of " lower limit value ≤ input value ≤ upper limit value "...... input value → output value
Output value Output value ( d )
s2 6
Specified value
Instructions
Step Ladder
Input
value Input value
( s3 )
s1
Specified value
7
4) When controlling the output value using only the upper limit value,
Instructions
Applied
set "-2,147,483,648" to the lower limit value specified in s1 .
5) When controlling the output value using only the lower limit value,
set "2,147,483,647" to the upper limit value specified in s2 .
Caution 8
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
Function
and Pulse Catch
Interrupt Function
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
Error A
An operation error is caused when the instruction is executed in the setting status shown below. The error flag
and addresses
between devices
Relationships
M8067 turns ON, and the error code (K6706) is stored in D8067.
"(Contents of the device specified by ) > (contents of the device specified by )
697
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
Program example
1. Program example 1
In the program example shown below, the BCD data set in X020 to X037 is controlled by the limit values
"500" to "5000", and the controlled value is output to D1 when X000 turns ON.
[Structured ladder] [ST]
X000 BIN BIN(X000,K4X020,D0);
EN ENO D10:=DLIMIT(X000,K500,K5000,D0);
K4X020 s d D0
DLIMIT
EN ENO
K500 s1 d D10
K5000 s2
D0 s3
Operation
1) In the case of "D0 < 500", "500" is output to D1. Output(D1)
2) In the case of "500 ≤ D0 ≤ 5000", the value of D0 is output
to D1. 5000
3) In the case of "5000 < D0", "5000" is output to D1. 500
Input(D0)
500 5000
698
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
1
2. Program example 2
Outline
In the program example shown below, the BCD data set in X020 to X057 is controlled by the limit values
"10000" and "1,000,000", and the controlled value is output to D11 and D10 when X000 turns ON.
[Structured ladder] [ST]
X000 DBIN DBIN(X000,VAR_01,VAR_02): 2
Instruction List
EN ENO VAR_14:=DLIMIT(X000,VAR_11,VAR_12,VAR_13);
VAR_01*1 s d VAR_02*2
DLIMIT
VAR_11*3
EN
s1
ENO
d
3
VAR_14 *6
Instruction
Configuration of
VAR_12*4 s2
VAR_13*5 s3
*1. VAR_01 is a global label and is defined as K8X020.
*2. VAR_02 is a global label and is defined as D0. 4
Instructions
Explanation of
How to Read
*3. VAR_11 is a global label and is defined as K10000.
*4. VAR_12 is a global label and is defined as K1000000.
*5. VAR_13 is a global label and is defined as D0.
*6. VAR_14 is a global label and is defined as D10.
5
Basic Instruction
Operation 1
1) In the case of "(D1, D0) < 10000", "10000" is set to (D11, Output (D11,D10)
D10).
2) In the case of "10000 ≤ (D1, D0) ≤ 1,000,000", the value of 1000000
(D1, D0) is output to (D11, D10). 10000 6
3) In the case of "1,000,000 < (D1, D0)", "1,000,000" is output
Instructions
Step Ladder
Input (D1,D0)
to (D11, D10) 10000 1000000
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
699
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
7.23.2 BAND
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction provides the upper limit value and lower limit value of the dead band for an input numeric
value, and controls the output value using these limit values.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
BAND
EN ENO
BAND 16 bits Continuous s1 d BAND(EN,s1,s2,s3,d);
s2
s3
BANDP
EN ENO
BANDP 16 bits Pulse s1 d BANDP(EN,s1,s2,s3,d);
s2
s3
DBAND
EN ENO
DBAND 32 bits Continuous s1 d DBAND(EN,s1,s2,s3,d);
s2
s3
DBANDP
EN ENO
DBANDP 32 bits Pulse s1 d DBANDP(EN,s1,s2,s3,d);
s2
s3
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Lower limit value of the dead band (no-output band) ANY16 ANY32
Input
variable Upper limit value of the dead band (no-output band) ANY16 ANY32
Input value controlled by the dead band ANY16 ANY32
Output ENO Execution state Bit
variable Device storing the output value controlled by the dead band. ANY16 ANY32
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1
3. Applicable devices
Outline
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z 2
Instruction List
z z z z z z z z z z z z
z z z z z z z z z z
z z z z z z z z z
Function and operation explanation 3
Instruction
Configuration of
1. 16-bit operation (BAND/BANDP)
Depending on how the input value (16-bit binary value) of the device specified by compares to the upper
and lower limit dead band range between the devices specified by and , the output value to be
stored in the device specified by is controlled.
The output value is controlled as shown below. 4
Instructions
Explanation of
How to Read
Command
input BAND
EN ENO
Lower limit value of dead band s1 d Device storing the output value controlled by the dead band.
Upper limit value of dead band s2
Input value controlled by the dead band s3 5
Basic Instruction
lower limit input input lower limit output
1) In the case of " s1 value > s3 value " ................................ s3 value - s1 value → d value
upper limit input input upper limit output
2) In the case of " s2 value < s3 value " ................................ s3 value - s2 value → d value
3) In the case of " s1 lower limit
value ≤ s3
input
value ≤ s2
upper limit
value" ......................................................... 0 → d
output
value
6
Instructions
Step Ladder
Output value Output value( d )
Lower limit value
of dead band Output
( s1 )
7
Input Input value( s3 )
Instructions
Applied
value
Upper limit value of dead band( s2 )
Output
Output
value=0
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
2. 32-bit operation (DBAND/DBANDP)
Depending on how the input value (32-bit binary value) specified by compares to the upper and lower
limit dead band range between the devices specified by and , the output value to be stored in the
device specified by is controlled.
The output value is controlled as shown below.
Command
input DBAND
EN ENO
Label 1 *1 s1 d Label 4 *4
Label 2 *2 s2
Label 3 *3 s3
*1. This defines the lower limit value of the dead band.
*2. This defines the upper limit value of the dead band.
*3. This defines the input value controlled by the dead band.
*4. This defines the device storing the output value controlled by the dead band.
s1 s3 s3 s1 d
1) In the case of " lower limit value > input value "............................. input value - lower limit value → output value
s2 s3 s3 s2 d
2) In the case of " upper limit value < input value "............................. input value - upper limit value → output value
s1 s3 s2 d
3) In the case of " lower limit value ≤ input value ≤ upper limit value ".....................................................0 → output value
Output value
Output value( d )
Lower limit value
of dead band Output
Input ( s1 )
value
Input value
( s3 )
Output Upper limit value of dead band
Output
( s2 )
value=0
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1
Cautions
Outline
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) When the output value overflows, it is handled as follows: 2
Instruction List
a) In the 16-bit operation
The output value is a 16-bit binary value with sign. Accordingly, if the operation result is outside the
range from -32768 to 32767, it is handled as follows:
Lower limit value of dead band s1 =10 Output value =-32,768-10
Input value s3 =-32,768
=8000H-AH
=7FF6H 3
Instruction
Configuration of
=32,758
b) In the 32-bit operation
The output value is a 32-bit binary value with sign. Accordingly, if the operation result is outside the
range from -2,147,483,648 to 2,147,483,647, it is handled as follows:
Lower limit value of dead band s1 =1000 Output value=-2,147,483,648-1000 4
=8000000H-000003E8H
Instructions
Explanation of
How to Read
Input value s3 =-2,147,483,648 =7FFFFC18H
=2,147,482,648
Error
An operation error is caused when the instruction is executed in the setting status shown below. The error flag
5
Basic Instruction
M8067 turns ON, and the error code (K6706) is stored in D8067.
(Contents of the device specified by ) > (contents of the device specified by )
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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Program example
1. Program example 1
In the program example shown below, the BCD data set in X020 to X037 is controlled by the dead band from
"-1000" to "1000", and a controlled value is output to D1 when X000 turns ON.
[Structured ladder] [ST]
X000 BIN BIN(X000,K4X020,D0);
EN ENO D1:=BAND(X000,K-1000,K1000,D0);
K4X020 s d D0
BAND
EN ENO
K-1000 s1 d D1
K1000 s2
D0 s3
Operation
1) In the case of "D0 < (-1000)", "D0 - (-1000)" is set to D1. Output
2) In the case of "(-1000 ≤ D0 ≤ 1000", "0" is output to D1.
3) In the case of "1000 < D0", "D0 - 1000" is output to D1.
Input
Output
-1000 0
Input
1000
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1
2. Program example 2
Outline
In the program example shown below, the BCD data set in X020 to X057 is controlled by the dead band from
"-10000" to "10000", and a controlled value is output to D11 and D10 when X000 turns ON.
[Command input] [ST]
X000 DBIN DBIN(X000,VAR_01,VAR_02); 2
Instruction List
EN ENO VAR_14:=DBAND(X000,VAR_11,VAR_12,VAR_13);
VAR_01 *1 s d VAR_02*2
DBAND
EN ENO 3
VAR_11*3 s1 d VAR_14*6
Instruction
Configuration of
VAR_12*4 s2
VAR_13*5 s3
*1. VAR_01 is a global label and is defined as K8X020.
*2. VAR_02 is a global label and is defined as D0.
*3. VAR_11 is a global label and is defined as K-10000.
4
Instructions
Explanation of
How to Read
*4. VAR_12 is a global label and is defined as K10000.
*5. VAR_13 is a global label and is defined as D0.
*6. VAR_14 is a global label and is defined as D10.
Basic Instruction
Operation
1) In the case of "(D1, D0) < (-10000)", "(D1, D0) - (-10000)" is set Output
to (D11, D10).
2) In the case of "(-10000 ≤ (D1, D0) ≤ 10000", "0" is output to
(D11, D10). 6
3) In the case of "10000 < (D1, D0)", "(D1, D0) - 10000" is output
Instructions
Step Ladder
Input
to (D11, D10).
Instructions
Applied
Output
8
-10000 0
Input
+10000
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
705
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(Basic & Applied Instruction) 7.23 Data Table Operation
7.23.3 ZONE
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
Depending on whether the input value is positive or negative, the output value is controlled by the bias value
specified.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
ZONE
EN ENO
ZONE 16 bits Continuous s1 d ZONE(EN,s1,s2,s3,d);
s2
s3
ZONEP
EN ENO
ZONEP 16 bits Pulse s1 d ZONEP(EN,s1,s2,s3,d);
s2
s3
DZONE
EN ENO
DZONE 32 bits Continuous s1 d DZONE(EN,s1,s2,s3,d);
s2
s3
DZONEP
EN ENO
DZONEP 32 bits Pulse s1 d DZONEP(EN,s1,s2,s3,d);
s2
s3
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Negative bias value to be added to the input value ANY16 ANY32
Input
variable Positive bias value to be added to the input value ANY16 ANY32
Input value controlled by the zone ANY16 ANY32
Output ENO Execution state Bit
variable Head device storing the output value controlled by the zone ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
z z z z z z z z z z z z
z z z z z z z z z z
z z z z z z z z z
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1
Function and operation explanation
Outline
1. 16-bit operation (ZONE/ZONEP)
The bias value specified by or is added to the input value specified by , and output to the
device specified by .
The bias value is added as shown below. 2
Instruction List
Command
input ZONE
EN ENO
Negative bias value to be added to the input value s1 d Head device storing the output value controlled by the zone
Positive bias value to be added to the input value s2
Value controlled by zone s3
3
Instruction
Configuration of
input input negative output
1) In the case of " s3 value < 0 " ..... s3 value + s1 bias value → d value
input output
2) In the case of " s3 value = 0 " .......................................................... 0 → d value
input input positive output
3) In the case of " s3 > 0 " ..... s3 + → d
4
value value s1 bias value value
Instructions
Explanation of
How to Read
Output value Output value ( d )
Positive bias value
( s2 )
Input 0
5
value Input value ( s3 )
Basic Instruction
Negative bias value ( s1 )
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
707
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(Basic & Applied Instruction) 7.23 Data Table Operation
2. 32-bit operation (DZONE/DZONEP)
The bias value specified by or is added to the input value of the device specified by , and
output to the device specified by .
The bias value is added as shown below:
X000 DZONE
EN ENO
Label 1 *1 s1 d Label 4*4
Label 2 *2 s2
Label 3*3 s3
*1. This defines the negative bias value to be added to the input value.
*2. This defines the positive bias value to be added to the input value.
*3. This defines the input value controlled by the zone.
*4. This defines the head device that stores the output value controlled by the zone.
s3 s3 s1 d
1) In the case of " input value < 0 "................... input value + negative bias value → output value
s3 d
2) In the case of " input value = 0 "......................................................................... 0 → output value
s3 s3 s2 d
3) In the case of " input value > 0 "................... input value + positive bias value → output value
Output value
Output value ( d )
Positive bias value
( s2 )
Input
value 0
Input value ( s3 )
Negative bias value ( s1 )
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(Basic & Applied Instruction) 7.23 Data Table Operation
1
Cautions
Outline
1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2) When the output value overflows, it is handled as follows: 2
Instruction List
a) In the 16-bit operation
The output value is a 16-bit binary value with sign. Accordingly, if the operation result is outside the
range from -32768 to 32767, it is handled as follows:
Negative bias value s1 =-100 Output value =-32,768+(-100)
Input value s3 =-32,768
=8000H+FF9CH
=7F9CH
3
Instruction
Configuration of
=32,668
b) In the 32-bit operation
The output value is a 32-bit binary value with sign. Accordingly, if the operation result is outside the
range from -2,147,483,648 to 2,147,483,647, it is handled as follows:
Negative bias value s1 =-1000 Output value =-2,147,483,648+(-1000) 4
Instructions
Explanation of
How to Read
=80000000H+FFFFFC18H
Input value s3 =-2,147,483,648
=7FFFFC18
=2,147,482,648
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
Program example
1. Program example 1
In the program example shown below, the BCD data set in X020 to X037 is controlled by the zone from
"-1000" to "1000", and the controlled value is output to D1 when X000 turns ON.
[Structured ladder] [ST]
X000 BIN BIN(X000,K4X020,D0);
EN ENO D1:=ZONEP(X000,K-1000,K1000,D0);
K4X020 s d D0
ZONEP
EN ENO
K-1000 s1 d D1
K1000 s2
D0 s3
Operation
1) In the case of "D0 < 0", "D0 + (-1000)" is output to D1. Output
2) In the case of "D = 0", "0" is output to D1.
3) In the case of "0 < D0", "D0 + 1000" is output to D1.
1000
-1000 0
Input
1000
-1000
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1
2. Program example 2
Outline
In the program example below, the BCD data set in X020 to X057 is controlled by the zone from "-10000" to
"10000", and the controlled value is output to D11 and D10 when X000 turns ON.
[Structured ladder] [ST]
X000 DBIN DBIN(X000,VAR_01,VAR_02); 2
EN ENO
Instruction List
VAR_14:=DZONEP(X000,VAR_11,VAR_12,VAR_13);
VAR_01*1 s d VAR_02*2
DZONEP
EN ENO 3
VAR_11*3 s1 d VAR_14*6
Instruction
Configuration of
VAR_12*4 s2
VAR_13*5 s3
*1. VAR_01 is a global label and is defined as K8X020.
*2. VAR_02 is a global label and is defined as D0.
4
Instructions
Explanation of
How to Read
*3. VAR_11 is a global label and is defined as K-10000.
*4. VAR_12 is a global label and is defined as K10000.
*5. VAR_13 is a global label and is defined as D0.
5
Operation
Basic Instruction
1) In the case of "(D1, D0) < 0", "(D1, D0) + (-10000)" is output to Output
(D11, D10).
2) In the case of "(D1, D0) = 0", "0" is output to (D11, D10).
3) In the case of "0 < (D1, D0)", "(D1, D0) + 10000" is output to
(D11, D10)
10000
-10000 0
6
Instructions
Step Ladder
Input
10000
-10000
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
711
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(Basic & Applied Instruction) 7.23 Data Table Operation
7.23.4 SCL
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes scaling of the input value using a specified data table, and outputs the result.
SCL2 is also available with a different data table configuration for scaling.
→ For SCL2 instruction, refer to Section 7.23.7.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SCL
EN ENO
SCL 16 bits Continuous SCL(EN,s1,s2,d);
s1 d
s2
SCLP
EN ENO
SCLP 16 bits Pulse SCLP(EN,s1,s2,d);
s1 d
s2
DSCL
EN ENO
DSCL 32 bits Continuous DSCL(EN,s1,s2,d);
s1 d
s2
DSCLP
EN ENO
DSCLP 32 bits Pulse DSCLP(EN,s1,s2,d);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Input value used in scaling or device storing the input value ANY16 ANY32
variable
Head device storing the conversion table used in scaling ANY16 ANY32
Output ENO Execution state Bit
variable Device storing the output value controlled by scaling ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
z z z
z z z z z z z z z
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1
Function and operation explanation
Outline
1. 16-bit operation (SCL/SCLP)
The input value of the device specified by is processed by scaling for the specified conversion
characteristics, and stored to a device number specified by . Conversion for scaling is executed based
on the data table stored in a device specified in and later. 2
If the output data is not an integer, however, the number in the first decimal place is rounded.
Instruction List
→ For the method to set the conversion table for scaling, refer to the next page.
Command Conversion setting data table for scaling
input SCL
EN ENO Device assignment in
Set item
*1 s1 d *3
Number of coordinate points
setting data table
3
Instruction
Configuration of
("5" in the case shown in the left figure)
*2 s2
X coordinate +1
*1. Input value used in scaling or device storing the input value Point 1
Y coordinate +2
*2. Head device storing the conversion table used in scaling
X coordinate +3
*3. Device storing the output value controlled by scaling Point 2
Y coordinate +4 4
Instructions
Explanation of
How to Read
Y X coordinate +5
Output Point 2 Point 3
Y coordinate +6
value Point 5
( d ) X coordinate +7
Point 3 Point 4
Y coordinate +8
Point 1
Point 4 X coordinate +9 5
Point 5
Basic Instruction
Y coordinate +10
X
Input value( s1 )
Operation Operation
error Operation is enabled. error
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
2. 32-bit operation (DSCL/DSCLP)
The input value specified by is processed by scaling for the specified conversion table, and stored to a
device number specified in . Conversion for scaling is executed based on the data table stored in a
device specified in and later.
If the output data is not an integer, however, the number in the first decimal place is rounded.
Command Conversion setting data table for scaling
input DSCL
EN ENO Device assignment in
Set item
*1 s1 d *3 setting data table
Label 1 Label 3
Label 2 *2 s2 Number of coordinate points
("5" in the case shown in the left figure) [ +1, ]
*1. This defines the input value used in scaling or X coordinate [ +3, +2]
device storing the input value. Point 1
Y coordinate [ +5, +4]
*2. This defines the head device storing the conversion
table used in scaling. X coordinate [ +7, +6]
*3. This defines the device storing the output value Point 2
controlled by scaling. Y coordinate [ +9, +8]
X coordinate [ +11, +10]
Point 3
Y Y coordinate [ +13, +12]
Output Point 2
X coordinate [ +15, +14]
value Point 5 Point 4
( d ) Y coordinate [ +17, +16]
Point 3
X coordinate [ +19, +18]
Point 5
Point 4 Y coordinate [ +21, +20]
Point 1
X
Input value( s1 )
Operation Operation
error Operation is enabled. error
3. Setting the conversion table for scaling
The conversion table for scaling is set based on the data table stored in a device specified in and later.
The data table has the following configuration:
→ For a setting example, refer to the next page.
Device assignment in setting data table
Set item
16-bit operation 32-bit operation
Number of coordinate points [ +1, ]
X coordinate +1 [ +3, +2]
Point 1
Y coordinate +2 [ +5, +4]
X coordinate +3 [ +7, +6]
Point 2
Y coordinate +4 [ +9, +8]
...
...
...
...
X coordinate +2n-1 [ +4n-1, +4n-2]
Point n (last)
Y coordinate +2n [ +4n+1, +4n]
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1
4. Setting example of the conversion table for scaling
Outline
A setting example for the 16-bit operation is shown below.
For the 32-bit operation, set each item using a 32-bit binary value.
In the case of the conversion characteristics for scaling shown in the figure below, set the following data table.
Y
Point 3 Point 6 (200,250) 2
Instruction List
(50,100) Point 7
Point 5 (250,90) Point 8 (350,90)
(200,70)
Point 2
(20,30)
Point 9
Point 4 (200,25) (350,30) Point 10 (400,7)
Point 1 (5,7)
X 3
Instruction
Configuration of
Setting the conversion setting data table for scaling
Setting device and setting contents
Set item Setting Remarks
When R0 is specified in contents
4
Number of coordinate points R0 K10
Instructions
Explanation of
How to Read
X coordinate +1 R1 K5
Point 1
Y coordinate +2 R2 K7
X coordinate +3 R3 K20
Point 2
Y coordinate +4 R4 K30
5
X coordinate +5 R5 K50
Basic Instruction
Point 3
Y coordinate +6 R6 K100
X coordinate +7 R7 K200
Point 4
Y coordinate +8 R8 K25 When coordinates are specified using three points in this
way, the output value can be set to an intermediate value.
Point 5
X coordinate +9 R9 K200 In this example, the output value (intermediate value) is 6
Y coordinate R10 K70 specified by the Y coordinate of the point 5.
Instructions
Step Ladder
+10
If the x coordinate is the same at three points or more, the
X coordinate +11 R11 K200 value at the second point is also output.
Point 6
Y coordinate +12 R12 K250
X coordinate +13 R13 K250
Point 7
Y coordinate +14 R14 K90 7
Instructions
Applied
X coordinate +15 R15 K350
Point 8 When coordinates are specified using two points in this
Y coordinate +16 R16 K90 way, the output value is the Y coordinate at the next point.
X coordinate R17 K350 In this example, the output value is specified by the Y
+17
Point 9 coordinate of the point 9.
Y coordinate +18 R18 K30
X coordinate +19 R19 K400 8
Point 10
Function
and Pulse Catch
Interrupt Function
Y coordinate +20 R20 K7
A
and addresses
between devices
Relationships
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Cautions
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the Xn data is not set in the ascending order in the data table (error code: K6706)
The data table is searched from the low-order side of device numbers in the data table in the operation.
Accordingly, even if only some Xn data is set in the ascending order in the data table, the instruction is
executed without operation error up to the area of the data table in which the Xn data is set in the
ascending order.
2) When the device specified by is outside the data table range (error code: K6706)
3) When the value exceeds the 32-bit data range in the middle of operation (error code: K6706)
In this case, check whether the distance between points is not "65535" or more.
If the distance is "65535" or more, reduce the distance between points.
Program example
In the program example shown below, the value input to D0 is processed by scaling based on the conversion
table for scaling set in R0 and later, and output to D10.
Program
[Structured ladder] [ST]
M8000 SCL
SCL (M8000, D0, R0, D10)
EN ENO
D0 s1 d D10
R0 s2
Operation
Y Point 3 Conversion setting data table for scaling
(30,100)
Setting
Set item Device
contents
Number of coordinate points R0 K6
Point 4 X coordinate R1 K0
Point 2 (40,45) Point 1
Output value Y coordinate R2 K0
(10,50)
(D10)=35 Point 5 X coordinate R3 K10
(50,30) Point 2
Y coordinate R4 K50
Point 1
(0,0) X coordinate R5 K30
Point 3
X Y coordinate R6 K100
Input value(D0)=7 Point 6
(60,0) X coordinate R7 K40
Point 4
Y coordinate R8 K45
X coordinate R9 K50
Point 5
Y coordinate R10 K30
X coordinate R11 K60
Point 6
Y coordinate R12 K0
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1
7.23.5 DABIN
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts numeric data expressed in decimal ASCII codes (30H to 39H) into binary data.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
DABIN
Instruction
Configuration of
DABIN 16 bits Continuous EN ENO DABIN(EN,s,d);
s d
DABINP
DABINP 16 bits Pulse EN
s
ENO
d
DABINP(EN,s,d);
4
Instructions
Explanation of
How to Read
DDABIN
DDABIN 32 bits Continuous EN ENO DDABIN(EN,s,d);
s d
DDABINP 5
DDABINP 32 bits Pulse EN ENO DDABINP(EN,s,d);
Basic Instruction
s d
2. Set data
Data type
Variable Description 16-bit 32-bit 6
operation operation
Instructions
Step Ladder
EN Execution condition Bit
Input
variable Head device storing data (ASCII codes) to be converted into binary
String String
data
Output ENO Execution state Bit
variable Device storing conversion result ANY16 ANY32 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
Function
and Pulse Catch
Interrupt Function
z z z z z
z z z z z z z z zz z
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
Function and operation explanation
1. 16-bit operation (DABIN/DABINP)
1) Data expressed in decimal ASCII codes (30H to 39H) and stored in the device specified by is
converted into 16-bit binary data, and stored in the device specified by .
Command
input DABIN
EN ENO
Label 1*1 s d Device storing conversion result
*1. This defines the head device that stores data (ASCII codes) to be converted into binary data.
b15 b8 b7 b0
s +0 ASCII code for 10000's digit Sign data b15 b0
+1 ASCII code for 100's digit ASCII code for 1000's digit d
+2 ASCII code for 1's digit ASCII code for 10's digit
16-bit binary data(BIN)
For example, when the device specified by stores ASCII codes expressing "-25108", 16-bit binary
data is stored in the device specified by as follows:
b15 b8 b7 b0
s +0 32H(2) 2DH(-) b15 b0
+1 31H(1) 35H(5) d -25108
+2 38H(8) 30H(0)
2) The numeric range of data stored in the device specified by is from "-32768" to "32767".
3) As "sign data", "20H (space)" is set when the data to be converted is positive, and "2DH (-)" is set when
the data to be converted is negative.
4) An ASCII code for each digit is within the range from 30H to 39H.
5) When an ASCII code for each digit is "20H (space)" or "00H (NULL)", it is handled as "30H".
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1
2. 32-bit operation (DDABIN/DDABINP)
Outline
1) Data expressed in decimal ASCII codes (30H to 39H) and stored in the device specified by is
converted into 32-bit binary data, and stored in the device specified by .
Command
input
EN
DDABIN_P
ENO 2
Instruction List
Label 2 *1 s d Label 3 *2
*1. This defines the head device that stores data (ASCII codes) to be converted into binary data.
*2. This defines the device storing conversion result.
b15 b8 b7 b0
s +0 ASCII code for 1,000,000,000's digit Sign data
d +1 d
3
+1 ASCII code for 10,000,000's digit ASCII code for 100,000,000's digit
Instruction
Configuration of
b31 b16 b15 b0
+2 ASCII code for 100,000's digit ASCII code for 1,000,000's digit
High-order 16 bits Low-order 16 bits
+3 ASCII code for 1000's digit ASCII code for 10000's digit
+4 ASCII code for 10's digit ASCII code for 100's digit
32-bit data
+5 (Ignored) ASCII code for 1's digit
For example, when the device specified by stores ASCII codes expressing "-1,234,543,210", 32-bit
4
Instructions
Explanation of
How to Read
binary data is stored in the device specified by as follows:
b15 b8 b7 b0
s +0 31H(1) 2DH(-)
+1 33H(3) 32H(2)
5
d +1 d
+2 35H(5) 34H(4)
-1234543210
+3 33H(3) 34H(4)
Basic Instruction
+4 31H(1) 32H(2)
+5 (Ignored) 30H(0)
2) The numeric range of data stored in the device specified by is from "-2,147,483,648" to
"2,147,483,647".
The high-order byte of + 5 is ignored.
6
Instructions
Step Ladder
3) As "sign data", "20H (space)" is set when the data to be converted is positive, and "2DH (-)" is set when
the data to be converted is negative.
4) An ASCII code for each digit is within the range from 30H to 39H.
5) When an ASCII code for each digit is "20H (space)" or "00H (NULL)", it is handled as "30H".
7
Related instructions
Instructions
Applied
Instruction Description
ASCI Converts hexadecimal codes into ASCII codes.
HEX Converts ASCII codes into hexadecimal codes.
STR
VAL
Converts binary data into a character string (ASCII codes).
Converts a character string (ASCII codes) into binary data.
8
Function
and Pulse Catch
Interrupt Function
BINDA Converts binary data into decimal ASCII codes (30H to 39H).
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data. A
A 32-bit counter can be specified directly as it is a 32-bit long device.
and addresses
between devices
Relationships
Use a global label to specify a device
2) The FX3UC PLC of V 2.20 or later supports the DABIN instruction.
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Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the sign data is any value other than "20H (space)" or "2DH (-)".
(Error code: K6706)
2) When an ASCII code for each digit stored in to + 2 (5) is any value other than "30H" to "39H",
"20H (space)", or "00H (NULL)".
(Error code: K6706)
3) When the numeric range of to + 2 (5) is outside the following range. (Error code: K6706)
Setting range
16-bit operation -32768 to 32767
32-bit operation -2,147,483,648 to 2,147,483,647
4) When the device specified by exceeds the device range. (Error code: K6706)
Program example
In the program example below, the sign and decimal ASCII codes in five digits stored in D20 to D22 are
converted into a binary value and stored in D0 when X000 turns ON.
[Structured ladder] [ST]
X000 DABINP DABINP(X000, VAR_01, D0);
EN ENO
VAR_01*1 s d D0
*1. VAR_01 is a global label and is defined as D20.
b15 b8 b7 b0
D20 20H(space) 2DH(-) D0
D21 32H(2) 20H(space) -276
D22 36H(6) 37H(7) (It is regarded Binary value
"- 276" as "-00276".)
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1
7.23.6 BINDA
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction converts binary data into decimal ASCII codes (30H to 39H).
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
3
BINDA
Instruction
Configuration of
BINDA 16 bits Continuous EN ENO BINDA(EN,s,d);
s d
BINDAP
BINDAP 16 bits Pulse EN
s
ENO
d
BINDAP(EN,s,d);
4
Instructions
Explanation of
How to Read
DBINDA
DBINDA 32 bits Continuous EN ENO DBINDA(EN,s,d);
s d
DBINDAP 5
DBINDAP 32 bits Pulse EN ENO DBINDAP(EN,s,d);
Basic Instruction
s d
2. Set data
Data type
Variable Description 16-bit 32-bit 6
operation operation
Instructions
Step Ladder
Input EN Execution condition Bit
variable Device storing binary data to be converted into ASCII codes ANY16 ANY32
Output ENO Execution state Bit
variable Head device storing conversion result String String
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand Special Cons Real Character
System user Digit specification Special unit Index Pointer
type unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
z z z z z z z z z zz z z z
Function
and Pulse Catch
Interrupt Function
z z z z z
A
and addresses
between devices
Relationships
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
Function and operation explanation
1. 16-bit operation (BINDA/BINDAP)
1) Each digit of 16-bit binary data stored in the device specified by is converted into an ASCII code
(30H to 39H), and stored in the device specified by and later.
Command
input BINDAP
EN ENO
Device storing binary data to be s d Label 2*1
converted into ASCII codes
*1. This defines the head device that stores the conversion result.
b15 b8 b7 b0
d +0 ASCII code for 10000's digit Sign data
b15 b0
+1 ASCII code for 100's digit ASCII code for 1000's digit
s
+2 ASCII code for 1's digit ASCII code for 10's digit
+3 0000H or source data M8091=OFF:0000H
16-bit binary data
M8091=ON:Does not
change.
For example, when the device specified by stores "-12345", the conversion result is stored in the
device specified by and later as follows:
b15 b8 b7 b0
d +0 31H(1) 2DH(-)
b15 b0
+1 33H(3) 32H(2)
s -12345
+2 35H(5) 34H(4)
+3 0000H or source data M8091=OFF:0000H
M8091=ON:Does not change.
2) The numeric range of 16-bit binary data stored in the device specified by is from "-32768" to
"32767".
3) The conversion result stored in the device specified by is as follows:
a) As "sign data", "20H (space)" is set when the 16-bit binary data stored in the device specified by
is positive, and "2DH (-)" is set when 16-bit binary data stored in the device specified by is
negative.
b) "20H (space)" is stored for "0" on the left side of the effective digits (zero suppression).
00325
Effective digits
20H
c) + 3 is set as follows depending on the ON/OFF status of M8091.
ON/OFF status Contents of processing
M8091=OFF +3 is set to "0000H (NULL)".
M8091=ON +3 does not change
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(Basic & Applied Instruction) 7.23 Data Table Operation
1
2. 32-bit operation (DBINDA/DBINDAP)
Outline
1) Each digit of 32-bit binary data stored in the device specified by is converted into an ASCII code
(30H to 39H), and stored in the device specified by and later.
Command
input
EN
DBINDAP
ENO 2
Instruction List
Label 1 *1 s d Label 3 *2
*1. This defines the device that stores binary data to be converted into ASCII codes.
*2. This defines the head device that stores the conversion result.
b15 b8 b7 b0
d +0 ASCII code for 1,000,000,000's digit Sign data 3
+1 ASCII code for 10,000,000's digit ASCII code for 100,000,000's digit
Instruction
Configuration of
s +1 s
+2 ASCII code for 100,000's digit ASCII code for 1,000,000's digit
High-order 16 bits Low-order 16 bits
+3 ASCII code for 1000's digit ASCII code for 10000's digit
+4 ASCII code for 10's digit ASCII code for 100's digit
32-bit data (BIN)
+5 00H or 20H ASCII code for 1's digit
M8091=OFF:00H
M8091=ON:20H
4
Instructions
Explanation of
How to Read
For example, when the device specified by stores "-12,345,678", the conversion result is stored in
the device specified by and later as follows:
b15 b8 b7 b0
d +0 20H (space) 2DH(-)
s +1 s +1 31H(1) 20H (space) 5
+2 33H(3) 32H(2)
Basic Instruction
-12345678
+3 35H(5) 34H(4)
+4 37H(7) 36H(6)
+5 00H or 20H 38H(8)
M8091=OFF:00H
M8091=ON:20H
6
Instructions
Step Ladder
2) The numeric range of 32-bit binary data stored in the device specified bay is from "-2,147,483,648"
to "2,147,483,647".
3) The conversion result stored in the device specified by is as follows:
a) As "sign data", "20H (space)" is set when the 32-bit binary data stored in the device specified by
is positive, and "2DH (-)" is set when 32-bit binary data stored in the device specified by is 7
negative.
Instructions
Applied
b) "20H (space)" is stored for "0" on the left side of the effective digits (zero suppression).
0012034560
Effective digits
20H 8
c) The high-order byte of + 5 is set as follows depending on the ON/OFF status of M8091.
Function
and Pulse Catch
Interrupt Function
ON/OFF status Contents of processing
M8091=OFF The high-order byte of + 5 is set to "00H (NULL)".
M8091=ON The high-order byte of + 5 is set to "20H (space)".
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
Related devices
Device Name Description
• For 16-bit operation
- When M8091 is OFF, + 3 is set to "0000H (NULL)".
Output character quantity - When M8091 is ON, + 3 does not change.
M8091
selector signal • For 32-bit operation
- When M8091 is OFF, the high-order byte of + 5 is set to "00H (NULL)".
- When M8091 is ON, the high-order byte of + 5 is set to "20H (space)".
Related instructions
Instruction Description
ASCI Converts hexadecimal codes into ASCII codes.
HEX Converts ASCII codes into hexadecimal codes.
DESTR Converts binary floating point data into a character string data (ASCII code) with the specified number of digits.
DEVAL Converts character string data (ASCII code) into binary floating point data.
DABIN Converts numeric value data expressed in decimal ASCII codes (30H to 39H) into binary data.
Cautions
1) When handling array data or 32-bit data in a structured program, a 16-bit device cannot be specified
directly as in the case of a simple project. Use a label to handle array data or 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device
2) The FX3UC PLC of V 2.20 or later supports the DABIN instruction.
3) Occupied device points
The table below shows the occupied device points of the device specified by for 16-bit operation
(BINDA/BINDAP) when M8091 is ON or OFF and 32-bit operation (DBINDA/DBINDAP).
Occupied points of
M8091=ON 3
16-bit operation
M8091=OFF 4
32-bit operation 6
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the occupied device points of the ASCII code character string in the device specified by
exceed the corresponding device range. (Error code: K6706)
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(Basic & Applied Instruction) 7.23 Data Table Operation
1
Program example
Outline
In the program example below, 16-bit binary data stored in D1000 is converted into decimal ASCII codes
when X000 is set to ON, and the ASCII codes converted by PR (FNC77) instruction are output one by one in
the time division method to Y040 to Y051.
By setting to OFF the output character selector signal M8091 and setting to ON PR mode flag M8027, ASCII
codes up to "00H" are output. 2
→ For PR mode flag and PR instruction, refer to Section 7.8.8.
Instruction List
[Structured ladder] [ST]
X000 RST RST(X000,M8091);
EN ENO
d M8091
SET(X000,M8027);
BINDA(X000,D1000,VAR_02);
3
Instruction
Configuration of
Y040:=PR(X000,D0);
SET
EN ENO
d M8027
BINDA 4
Instructions
Explanation of
How to Read
EN ENO
D1000 s d VAR_02*1
PR
EN ENO
D0 s d Y040 5
Basic Instruction
*1. VAR_02 is a global label and is defined as D0.
b15 b8 b7 b0
D0 20H(space) 20H(space) PR (FNC77)
D1000 instruction
5126
D1
D2
31H(1)
36H(6)
35H(5)
32H(2)
Y040 to Y051 6
Instructions
Step Ladder
16-bit "__5126" is output.
D3 0000H
binary data
(BIN) M8091=OFF
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
725
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
7.23.7 SCL2
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction executes scaling of the input value using a specified data table, and outputs the result.
SCL instruction is also available with a different data table configuration for scaling.
→ For SCL instruction, refer to Section 7.23.4.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SCL2
EN ENO
SCL2 16 bits Continuous SCL2(EN,s1,s2,d);
s1 d
s2
SCL2P
EN ENO
SCL2P 16 bits Pulse SCL2P(EN,s1,s2,d);
s1 d
s2
DSCL2
EN ENO
DSCL2 32 bits Continuous DSCL2(EN,s1,s2,d);
s1 d
s2
DSCL2P
EN ENO
DSCL2P 32 bits Pulse DSCL2P(EN,s1,s2,d);
s1 d
s2
2. Set data
Data type
Variable Description 16-bit 32-bit
operation operation
EN Execution condition Bit
Input Input value used in scaling or device storing the input value ANY16 ANY32
variable
Head device storing the conversion table used in scaling ANY16 ANY32
Output ENO Execution state Bit
variable Device storing the output value controlled by scaling ANY16 ANY32
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z z z z z z z
z z z
z z z z z z z z z
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.23 Data Table Operation
1
Function and operation explanation
Outline
1. 16-bit operation (SCL2/SCL2P)
The input value specified in is processed by scaling for the specified conversion characteristics, and
stored to a device number specified in . Conversion for scaling is executed based on the data table
stored in a device specified in and later. 2
If the output data is not an integer, however, the number in the first decimal place is rounded.
Instruction List
→ For the method to set the conversion table for scaling, refer to the next page.
Command Conversion setting data table for scaling
input SCL2
EN ENO Device assignment in
Set item
*1 s1 d *3
Number of coordinate points
setting data table
3
*2 s2
Instruction
Configuration of
("5" in the case shown in the left figure)
Point 1 +1
*1. Input value used in scaling or
device storing the input value Point 2 +2
*2. Head device storing the conversion X coordinate Point 3 +3
4
table used in scaling
Point 4 +4
*3. Device storing the output value
Point 5
Instructions
Explanation of
How to Read
controlled by scaling +5
Point 1 +6
Y
Output Point 2 Point 2 +7
value Point 5 Y coordinate Point 3 +8
( d )
Point 3 Point 4 +9 5
Point 5 +10
Basic Instruction
Point 4
Point 1
X
Input value( s1 )
Operation Operation
error Operation is enabled. error
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
2. 32-bit operation (DSCL2/DSCL2P)
The input value specified by is processed by scaling for the specified conversion table, and stored to a
device number specified in . Conversion for scaling is executed based on the data table stored in a
device specified in and later.
If the output data is not an integer, however, the number in the first decimal place is rounded.
Command Conversion setting data table for scaling
input DSCL2
EN ENO Conversion setting
Set item
*3 data table for scaling
Label 1 *1 s1 d Label 3
Label 2*2 s2 Number of coordinate points
("5" in the case shown in the left figure) [ +1, ]
*1. This defines the input value used in scaling Point 1 [ +3, +2]
or device storing the input value.
Point 2 [ +5, +4]
*2. This defines the head device storing
the conversion table used in scaling. X coordinate Point 3 [ +7, +6]
*3. This defines the device storing Point 4 [ +9, +8]
the output value controlled by scaling.
Point 5 [ +11, +10]
Y Point 1 [ +13, +12]
Output Point 2
Point 2 [ +15, +14]
value
Point 5
( d ) Y coordinate Point 3 [ +17, +16]
Point 3
Point 4 [ +19, +18]
Point 4 Point 5 [ +21, +20]
Point 1
X
Input value ( s1 )
Operation Operation
error Operation is enabled. error
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1
3. Setting the conversion table for scaling
Outline
The conversion table for scaling is set based on the data table stored in a device specified in and later.
The data table has the following configuration:
→ For a setting example, refer to the next page.
Device assignment in setting data table
Set item
16-bit operation 32-bit operation 2
Instruction List
Number of coordinate points [ +1, ]
Point 1 +1 [ +3, +2]
Point 2 +2 [ +5, +4]
X coordinate
...
...
...
Point n (last) +n [ +2n+1, +2n] 3
Instruction
Configuration of
Point 1 +n+1 [ +2n+3, +2n+2]
Point 2 +n+2 [ +2n+5, +2n+4]
Y coordinate
...
...
...
Point n (last) +2n [ +4n+1, +4n]
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
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(Basic & Applied Instruction) 7.23 Data Table Operation
Setting example of the conversion table for scaling
A setting example for the 16-bit operation is shown below.
For the 32-bit operation, set each item using a 32-bit binary value.
In the case of the conversion characteristics for scaling shown in the figure below, set the following data table.
Y
Point 3 Point 6(200,250)
(50,100) Point 7
Point 5 (250,90) Point 8(350,90)
(200,70)
Point 2
(20,30) Point 9
(350,30)
Point 1 (5,7) Point 4(200,25) Point 10(400,7)
X
Setting the conversion setting data table for scaling
Setting device and setting contents
Set item Setting Remarks
When R0 is specified in contents
Number of coordinate points R0 K10
Point 1 +1 R1 K5
Point 2 +2 R2 K20
Point 3 +3 R3 K50
Point 4 +4 R4 K200
Point 5 +5 R5 K200 Refer to *1.
X coordinate
Point 6 +6 R6 K200
Point 7 +7 R7 K250
Point 8 +8 R8 K350
Refer to *2.
Point 9 +9 R9 K350
Point 10 +10 R10 K400
Point 1 +11 R11 K7
Point 2 +12 R12 K30
Point 3 +13 R13 K100
Point 4 +14 R14 K25
Point 5 +15 R15 K70 Refer to *1.
Y coordinate
Point 6 +16 R16 K250
Point 7 +17 R17 K90
Point 8 +18 R18 K90
Refer to *2.
Point 9 +19 R19 K30
Point 10 +20 R20 K7
*1. When coordinates are specified using three points as shown in the points 4, 5 and 6, the output value
can be set to an intermediate value.
In this example, the output value (intermediate value) is specified by the Y coordinate of the point 5.
If the X coordinate is same at three points or more, the value at the second point is output also.
*2. When coordinates are specified using two points as shown in the points 8 and 9, the output value is
the Y coordinate at the next point.
In this example, the output value is specified by the Y coordinate of the point 9.
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(Basic & Applied Instruction) 7.23 Data Table Operation
1
Cautions
Outline
When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case
of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
2
Error
Instruction List
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the Xn data is not set in the ascending order in the data table (error code: K6706)
The data table is searched from the low-order side of device numbers in the data table in the operation.
Accordingly, even if only some Xn data is set in the ascending order in the data table, the instruction is 3
executed without operation error up to the area of the data table in which the Xn data is set in the
Instruction
Configuration of
ascending order.
2) When the device specified by is outside the data table range (error code: K6706)
3) When the value exceeds the 32-bit data range in the middle of operation (error code: K6706)
In this case, check whether the distance between points is not "65535" or more.
If the distance is "65535" or more, reduce the distance between points.
4
Instructions
Explanation of
How to Read
Program example
In the program example shown below, the value input to D0 is processed by scaling based on the conversion
table for scaling set in R0 and later, and output to D10.
Program 5
Basic Instruction
[Structured ladder] [ST]
M8000 SCL2 D10:=SCL2(M8000,D0,R0);
EN ENO
6
D0 s1 d D10
R0 s2
Instructions
Step Ladder
Operation
Y Conversion setting data table for scaling
7
Point 3
(30,100) Setting
Set item Device
contents
Instructions
Applied
Number of coordinate points R0 K6
Point 4 Point 1 R1 K0
Point 2 (40,45) Point 2 R2 K10
Output value (10,50)
Point 5 Point 3 R3 K30
(D10)=35
(50,30) X coordinate
Point 4 R4 K40 8
Point 1
Function
and Pulse Catch
Interrupt Function
Point 5 R5 K50
(0,0)
X Point 6 R6 K60
Input value(D0)=7 Point 6 Point 1 R7 K0
(60,0)
Point 2 R8 K50
Point 3 R9 K100
Y coordinate
Point 4 R10 K45
A
and addresses
between devices
Relationships
Point 5 R11 K30
Point 6 R12 K0
731
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
7.24 External Device Communication (Inverter Communication)
7.24.1 IVCK
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads the operation status of an inverter to a PLC using the computer link operation function
of the inverter. Applicable inverters vary depending on the version.
This instruction corresponds to the EXTR (K10) instruction in the FX2N and FX2NC series.
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IVCK
EN ENO
IVCK 16 bits Continuous s1 d IVCK(EN,s1,s2,n,d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Inverter station number ANY16
variable Inverter instruction code ANY16
Channel to be used (K1:ch1,K2:ch2*1) ANY16
Output ENO Execution state Bit
variable Device storing the read value ANY16
*1. "ch2" is not available for use for the FX3G PLCs of 14- and 24-point types.
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 z z z
z S1 S2 z z z
z z z z S1 S2 z
z z
S: Refer to "Cautions".
732
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
Function and operation explanation
Outline
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. 16-bit operation (IVCK)
The operation status corresponding to the instruction code*2 specified in the device specified by of an
inverter *1 connected to communication port n whose station number is specified in the device specified by 2
is read and transferred to the device specified by .
Instruction List
Command
input IVCK
EN ENO
Inverter station number s1 d Device storing the read value
Inverter instruction code
Channel to be used
s2
n
3
Instruction
Configuration of
*1. Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series
general purpose inverters
*2. Refer to the instruction code list.
Refer to the pages in the inverter manual on which the computer link function is explained in detail.
2. Instruction codes of inverters
4
Instructions
Explanation of
How to Read
The table below shows the inverter instruction codes specified in along with their functions.
For instruction codes, refer to the pages in the inverter manual where the computer link function is explained
in detail.
Instruction code Corresponding inverter
Read contents
specified in F700 A700 E700 D700 V500 F500 A500 E500 S500 5
H7B Operation mode 3 3 3 3 3 3 3 3 3
Basic Instruction
H6F Output frequency (number of rotations) 3 3 3 3 3 3 3 3 3
H70 Output current 3 3 3 3 3 3 3 3 3
H71 Output voltage 3 3 3 3 3 3 3 3 -
H72 Special monitor 3 3 3 3 3 3 3 - -
H73
H74
Special monitor selection number
Abnormal contents
3
3
3
3
3
3
3
3
3
3
3
3
3
3
-
3 3
-
6
Instructions
Step Ladder
H75 Abnormal contents 3 3 3 3 3 3 3 3 3
H76 Abnormal contents 3 3 3 3 3 3 3 3 -
H77 Abnormal contents 3 3 3 3 3 3 3 3 -
H79 Inverter status monitor (extension) 3 3 3 3 - - - - -
H7A Inverter status monitor
7
3 3 3 3 3 3 3 3 3
H6E Set frequency (read from E2PROM) 3 3 3 3 3 3 3 3 3
Instructions
Applied
H6D Set frequency (read from RAM) 3 3 3 3 3 3 3 3 3
3. Related devices
→ For the instruction execution complete flag use method, refer to Section 1.3.4.
Number
ch1 ch2
Description
Number
ch1 ch2
Description 8
Function
and Pulse Catch
Interrupt Function
M8029 Instruction execution complete D8063 D8438 Error code of serial communication error
M8063 M8438 Serial communication error D8150 D8155 Response wait time in inverter communication
M8151 M8156 Inverter communicating*1 D8151 D8156 Step number in inverter communication*2
M8152 M8157 Inverter communication error*1 D8152 D8157 Error code of inverter communication error*1
M8153 M8158 Inverter communication error latch*1 D8153 D8158
Latch of inverter communication error occurrence
step*2
A
and addresses
between devices
Relationships
M8154 M8159 IVBWR instruction error*1 D8154 D8159 IVBWR instruction error parameter number*2
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. Initial value: -1
733
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
Cautions
→ For other cautions, refer to the Data Communication Edition manual.
1) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK,
IVDR, IVRD, IVWR and IVBWR) for the same port.
3) Two or more inverter communication instructions (IVCK, IVDR, IVRD, IVWR and IVBWR) can be driven
for the same port at the same time.
4) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only.
PLC applicable version
The table below shows PLC versions applicable to each inverter.
PLC FREQROL-V500/F500/A500/E500/S500 FREQROL-F700/A700 FREQROL-E700/D700
FX3G Ver.1.10 or later
FX3U Ver.2.20 or later Ver.2.32 or later
FX3UC Ver.1.00 or later Ver.2.20 or later Ver.2.32 or later
734
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
7.24.2 IVDR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction writes a inverter operation required control value to the PLC using the computer link operation
function of the inverter.
This instruction corresponds to the EXTR (K11) instruction in the FX2N and FX2NC series PLCs.
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. Format and operation, execution form 3
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IVDR
EN ENO
IVDR 16 bits Continuous
s1
s2
IVDR(EN,s1,s2,s3,n); 4
Instructions
Explanation of
How to Read
s3
n
2. Set data
Variable Description Data type 5
EN Execution condition Bit
Basic Instruction
Inverter station number ANY16
Input Inverter instruction code ANY16
variable
Set value to be written to the inverter parameter or device storing the data
ANY16
to be set.
Channel to be used (K1:ch1,K2:ch2*1) ANY16 6
Instructions
Step Ladder
Output
ENO Execution state Bit
variable
*1. "ch2" is not available for use for the FX3G PLCs of 14- and 24-point types.
3. Applicable devices
Bit Devices Word Devices Others
7
Instructions
Applied
Operand Special Cons Real Character
System user Digit specification System user Index Pointer
type unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 z z z
z S1 S2 z z z 8
z z z z z S1 S2 z z z
Function
and Pulse Catch
Interrupt Function
z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
735
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
Function and operation explanation
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. 16-bit operation (IVDR)
The control value specified in the device specified by is written to the instruction code*2 in the device
specified by of an inverter*1 connected to a communication port n whose station number is specified in
the device specified by .
Command
input IVDR
EN ENO
Inverter station number s1
Inverter instruction code s2
Set value to be written to the inverter parameter s3
or device storing the data to be set.
Channel to be used n
*1. Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series
general purpose inverters
*2. Refer to the instruction code list.
Refer to the pages in the inverter manual on which the computer link function is explained in detail.
2. Instruction codes of inverters
The table below shows the inverter instruction codes specified in along with their functions.
For instruction codes, refer to the pages in the inverter manual where the computer link function is explained
in detail.
Hexadecimal instruction Corresponding inverter
code of inverter Written contents
F700 A700 E700 D700 V500 F500 A500 E500 S500
specified in
HFB Operation mode 3 3 3 3 3 3 3 3 3
HF3 Special monitor selection number 3 3 3 3 3 3 3 - -
HF9 Operation command (extension) 3 3 3 3 - - - - -
HFA Operation command 3 3 3 3 3 3 3 3 3
HEE Set frequency (written to EEPROM) 3 3 3 3 3 3 3 3 3
HED Set frequency (written to RAM) 3 3 3 3 3 3 3 3 3
HFD Inverter reset 3 3 3 3 3 3 3 3 3
HF4 Abnormal contents all clear 3 3 3 3 - 3 3 3 3
HFC Parameter all clear 3 3 3 3 3 3 3 3 3
HFC User clear - - - - - 3 3 - -
3. Related devices
→ For the instruction execution complete flag use method, refer to Section 1.3.4.
Number Number
Description Description
ch1 ch2 ch1 ch2
M8029 Instruction execution complete D8063 D8438 Error code of serial communication error
M8063 M8438 Serial communication error D8150 D8155 Response wait time in inverter communication
M8151 M8156 Inverter communicating*1 D8151 D8156 Step number in inverter communication*2
M8152 M8157 Inverter communication error*1 D8152 D8157 Error code of inverter communication error*1
Latch of inverter communication error occurrence
M8153 M8158 Inverter communication error latch*1 D8153 D8158
step*2
M8154 M8159 IVBWR instruction error*1 D8154 D8159 IVBWR instruction error parameter number*2
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. Initial value: -1
736
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
Cautions
Outline
→ For other cautions, refer to the Data Communication Edition manual.
1) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK,
IVDR, IVRD, IVWR and IVBWR) for the same port.
2
3) Two or more inverter communication instructions (IVCK, IVDR, IVRD, IVWR and IVBWR) can be driven
Instruction List
for the same port at the same time.
4) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only.
3
PLC applicable version
Instruction
Configuration of
The table below shows PLC versions applicable to each inverter.
PLC FREQROL-V500/F500/A500/E500/S500 FREQROL-F700/A700 FREQROL-E700/D700
FX3G Ver.1.10 or later
4
FX3U Ver.2.20 or later Ver.2.32 or later
FX3UC Ver.1.00 or later Ver.2.20 or later Ver.2.32 or later
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
737
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
7.24.3 IVRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction reads an inverter parameter to the PLC using the computer link operation function of the
inverter.
This instruction corresponds to the EXTR (K12) instruction in the FX2N and FX2NC series PLCs.
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IVRD
EN ENO
IVRD 16 bits Continuous s1 d IVRD(EN,s1,s2,n,d);
s2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Inverter station number ANY16
variable Inverter parameter number ANY16
Channel to be used (K1:ch1,K2:ch2*1) ANY16
Output ENO Execution state Bit
variable Device storing the read value ANY16
*1. "ch2" is not available for use for the FX3G PLCs of 14- and 24-point types.
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z S1 S2 z z z
z S1 S2 z z z
z S1 S2 z
z z
S: Refer to "Cautions".
738
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
Function and operation explanation
Outline
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. 16-bit operation (IVRD)
The value of the parameter in the device specified by is read from an inverter *1 connected to a
communication port n whose station number is in the device specified by , and output to the device 2
specified by .
Instruction List
Command
input IVRD
EN ENO
Inverter station number s1 d Device storing the read value
Inverter parameter number
Channel to be used
s2
n
3
Instruction
Configuration of
*1. Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series
general purpose inverters
2. Related devices
→ For the instruction execution complete flag use method, refer to Section 1.3.4. 4
Number Number
Instructions
Explanation of
How to Read
Description Description
ch1 ch2 ch1 ch2
M8029 Instruction execution complete D8063 D8438 Error code of serial communication error
M8063 M8438 Serial communication error D8150 D8155 Response wait time in inverter communication
M8151 M8156 Inverter communicating*1 D8151 D8156 Step number in inverter communication*2
M8152 M8157 Inverter communication error*1 D8152 D8157 Error code of inverter communication error*1
5
Basic Instruction
Latch of inverter communication error occurrence
M8153 M8158 Inverter communication error latch*1 D8153 D8158
step*2
M8154 M8159 IVBWR instruction error*1 D8154 D8159 IVBWR instruction error parameter number*2
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. Initial value: -1 6
Instructions
Step Ladder
Cautions
→ For other cautions, refer to the Data Communication Edition manual.
1) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK, 7
IVDR, IVRD, IVWR and IVBWR) for the same port.
Instructions
Applied
3) Two or more inverter communication instructions (IVCK, IVDR, IVRD, IVWR and IVBWR) can be driven
for the same port at the same time.
4) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only. 8
Function
and Pulse Catch
Interrupt Function
PLC applicable version
The table below shows PLC versions applicable to each inverter.
PLC FREQROL-V500/F500/A500/E500/S500 FREQROL-F700/A700 FREQROL-E700/D700
FX3G
FX3U
Ver.1.10 or later
Ver.2.20 or later Ver.2.32 or later
A
and addresses
between devices
Relationships
FX3UC Ver.1.00 or later Ver.2.20 or later Ver.2.32 or later
739
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
7.24.4 IVWR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes a parameter of an inverter using the computer link operation function of the inverter.
This instruction corresponds to the EXTR (K13) instruction in the FX2N and FX2NC series PLCs.
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IVWR
EN ENO
s1
IVWR 16 bits Continuous IVWR(EN,s1,s2,s3,n);
s2
s3
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Inverter station number ANY16
Input Inverter parameter number ANY16
variable
Set value to be written to the inverter parameter or device storing the data
ANY16
to be set
Channel to be used (K1:ch1,K2:ch2*1) ANY16
Output
ENO Execution state Bit
variable
*1. "ch2" is not available for use for the FX3G PLCs of 14- and 24-point types.
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R. U
\G
V Z Modifier K H E "
" P
z S1 S2 z z z
z S1 S2 z z z
z S1 S2 z z z
z z
S: Refer to "Cautions".
740
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
Function and operation explanation
Outline
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. 16-bit operation (IVWR)
A value specified in the device specified by is written to a parameter in the device specified by in
an inverter*1 connected to a communication port n whose station number is in the device specified by . 2
Instruction List
Command
input IVWR
EN ENO
Inverter station number s1
Inverter parameter number s2
Set value to be written to the inverter parameter
or device storing the data to be set
s3
3
Instruction
Configuration of
Channel to be used n
*1. Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series
general purpose inverters
2. Related devices
→ For the instruction execution complete flag use method, refer to Section 1.3.4.
4
Instructions
Explanation of
How to Read
Number Number
Description Description
ch1 ch2 ch1 ch2
M8029 Instruction execution complete D8063 D8438 Error code of serial communication error
M8063 M8438 Serial communication error D8150 D8155 Response wait time in inverter communication
M8151 M8156 Inverter communicating*1 D8151 D8156 Step number in inverter communication*2 5
M8152 M8157 Inverter communication error*1 D8152 D8157 Error code of inverter communication error*1
Basic Instruction
Latch of inverter communication error occurrence
M8153 M8158 Inverter communication error latch*1 D8153 D8158
step*2
M8154 M8159 IVBWR instruction error*1 D8154 D8159 IVBWR instruction error parameter number*2
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. Initial value: -1
6
Instructions
Step Ladder
Cautions
→ For other cautions, refer to the Data Communication Edition manual.
1) The instruction is provided in the FX3G PLC Ver. 1.10 or later.
2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK, 7
Instructions
Applied
IVDR, IVRD, IVWR and IVBWR) for the same port.
3) Two or more inverter communication instructions (IVCK, IVDR, IVRD, IVWR and IVBWR) can be driven
for the same port at the same time.
4) Some restrictions to applicable devices
S1: Applicable to the FX3U, FX3UC and FX3G PLCs only.
S2: Applicable to the FX3U and FX3UC PLCs only.
8
Function
and Pulse Catch
Interrupt Function
PLC applicable version
The table below shows PLC versions applicable to each inverter.
PLC FREQROL-V500/F500/A500/E500/S500 FREQROL-F700/A700 FREQROL-E700/D700
FX3G Ver.1.10 or later A
FX3U Ver.2.20 or later Ver.2.32 or later
and addresses
between devices
Relationships
FX3UC Ver.1.00 or later Ver.2.20 or later Ver.2.32 or later
741
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
7.24.5 IVBWR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes parameters of an inverter at one time using the computer link operation function of the
inverter.
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
IVBWR
EN ENO
s1
IVBWR 16 bits Continuous IVBWR(EN,s1,s2,s3,n);
s2
s3
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Inverter station number ANY16
Input variable Number of parameters in an inverter to be written at one time. ANY16
Head device of a parameter table to be written to an inverter ANY16
Channel to be used (K1:ch1,K2:ch2) ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z z
z z z z z z
z z z z
z z
742
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
1
Function and operation explanation
Outline
→ For detailed explanation of the instruction, refer to the Data Communication Edition manual.
1. 16-bit operation (IVBWR)
A data table (parameter numbers and set values) specified in and is written to an inverter *1
connected to a communication port n whose station number is in the device specified by all at once. 2
Instruction List
Command
input IVBWR
EN ENO
Inverter station number s1
Number of parameters in an inverter to be written at one time. s2
Head address of a parameter table to be written to an inverter
Channel to be used
s3
n
3
Instruction
Configuration of
*1. Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series
general purpose inverters
*2. The table below shows the data table format.
: Number of parameters to be written
: Head device number of data table 4
Instructions
Explanation of
How to Read
Device Parameter numbers to be written and set values
Parameter number
1st parameter
+1 Set value
+2 Parameter number
+3
2nd parameter
Set value 5
Basic Instruction
...
...
...
+2 -4 Parameter number
- 1"th parameter
+2 -3 Set value
Parameter number
+2
+2
-2
-1
th parameter
Set value
6
Instructions
Step Ladder
2. Related devices
→ For the instruction execution complete flag use method, refer to Section 1.3.4.
Number Number
Description Description
ch1
M8029
ch2
Instruction execution complete
ch1 ch2
D8063 D8438 Error code of serial communication error
7
Instructions
Applied
M8063 M8438 Serial communication error D8150 D8155 Response wait time in inverter communication
M8151 M8156 Inverter communicating*1 D8151 D8156 Step number in inverter communication*2
M8152 M8157 Inverter communication error*1 D8152 D8157 Error code of inverter communication error*1
Latch of inverter communication error occurrence
M8153 M8158 Inverter communication error latch*1 D8153 D8158
step*2
M8154 M8159 IVBWR instruction error*1 D8154 D8159 IVBWR instruction error parameter number*2
8
Function
and Pulse Catch
Interrupt Function
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. Initial value: -1
Cautions
→ For other cautions, refer to the Data Communication Edition manual. A
and addresses
between devices
Relationships
1) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK,
IVDR, IVRD, IVWR and IVBWR) for the same port.
2) Two or more inverter communication instructions (IVCK, IVDR, IVRD, IVWR and IVBWR) can be driven
for the same port at the same time.
743
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.24 External Device Communication (Inverter
Applicable models depending on the PLC version
Available inverter models are added depending on the version, as shown in the table below.
Applicable version
Item Outline of function
FX3U FX3UC
Addition of
Ver.2.32 or later Ver.2.32 or later Mitsubishi FREQROL-E700 Series general-purpose inverters are supported.
applicable models
Addition of Mitsubishi FREQROL-F700/A700 Series general-purpose inverters are
Ver.2.20 or later Ver.2.20 or later
applicable models supported.
744
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
1
7.25 Data Transfer 3
Outline
7.25.1 RBFM
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction reads data from continuous buffer memories (BFM) in a special function block and unit over
several operation cycles by the time division method. This instruction is convenient for reading received data,
etc. stored in buffer memories in a special function block and unit for communication by the time division
3
Instruction
Configuration of
method. FROM instruction is also available to read the buffer memory (BFM) data.
→ For FROM instruction, refer to Section 7.8.9.
1. Format and operation, execution form
Instruction Execution Expression in each language
name
Operation
form Structured ladder ST 4
Instructions
Explanation of
How to Read
RBFM
EN ENO
m1 d
RBFM 16 bits Continuous BFM(EN,m1,m2,n1,n2,d);
m2
n1
n2 5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
Unit number [0 to 7] ANY16 6
Input Head buffer memory (BFM) number ANY16
Instructions
Step Ladder
variable
Number of all buffer memories (BFM) to be read [1 to 32767] ANY16
Number of points transferred in one operation cycle [1 to 32767] ANY16
Output ENO Execution state Bit
variable Head device storing data to be read from buffer memory (BFM) ANY16 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
z z z z
Function
and Pulse Catch
Interrupt Function
z z z z
S1 z z
z z z z
z z z z A
and addresses
between devices
Relationships
S: Refer to "Cautions".
745
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
Function and operation explanation
1. 16-bit operation (RBFM)
"n1" buffer memory (BFM) units at location No. "m2" in special function block/unit No. "m1" are transferred
(read) to the device specified by in the PLC. While transferring, "n1" is divided by "n2" so n1/n2 buffer
memories (rounded up when there is a remainder) are transferred per scan time.
Command input RBFM Unit No. "m1" PLC
EN ENO Read*1
BFM#(m2) d
Unit number m1 d Head device storing
Head BFM number m2 data to be read from
Number of all n1 buffer memory (BFM) BFM#(m2+n1-1) d +n1-1
buffer memories
(BFM) to be read
Number of points n2 *1. "n2" buffer memories are read
transferred in one in each operation cycle.
operation cycle Reading is executed in "n1/n2" times.
M8029 ("n1/n2" is rounded up if it is not an integer.)
M Instruction execution complete
M8328
M Instruction non-execution
M8329
M Instruction execution abnormally complete
1) When the instruction is finished normally, the instruction execution complete flag M8029 turns ON. When
the instruction is finished abnormally, the instruction execution abnormally complete flag M8329 turns
ON.
2) When RBFM or WBFM instruction in another step is executed for the same unit number, the instruction
non-execution flag M8328 is set to ON, and execution of such an instruction is paused.
When execution of the other target instruction is complete, the paused instruction resumes.
Related devices
Device Name Description
M8029 Instruction execution complete Turns ON when an instruction is finished normally.
Turns ON when RBFM or WBFM instruction in another step is executed for the same unit
M8328 Instruction non-execution
number.
Instruction execution abnor-
M8329 Turns ON when an instruction is finished abnormally.
mally complete
Related instructions
Instruction Description
FROM Read from a special function block
TO Write to a special function block
WBFM Divided BFM write
Cautions
1) The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
2) Some restrictions to applicable devices
S1: Except special data register D
Error
An operation error is caused in the following case. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the unit number "m1" does not exist. (Error code: K6708)
746
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
1
Common items between RBFM instruction and WBFM instruction
Outline
Specification of unit number of special function block and unit and buffer memory
→ For the connection method of special extension units and blocks, number of connectable units and
blocks, and handling of I/O numbers, refer to the manual of the PLC used and special function block
and unit.
1. Unit number "m1" of a special extension unit and block
2
Instruction List
Use the unit number to specify to which equipment the RBFM and/or WBFM instruction works.
Setting range: K0 to K7
Unit
No.0 Unit Unit Unit
Built-in CC-Link/LT
I/O
No.1
Special
No.2
Special I/O
No.3
Special
3
FX3UC-32MT-LT(-2)
Instruction
Configuration of
extension extension extension extension extension
Main unit
block block block block block
A unit number is automatically assigned to each special extension unit and block connected to the PLC.
The unit number is assigned in the way "No. 0 → No. 1 → No. 2 ..." starting from the equipment nearest to the
main unit.
Since the FX3UC-32MT-LT(-2) PLC has a built-in CC-Link/LT master, the unit number is given "No. 1 → No. 2
4
Instructions
Explanation of
How to Read
→ No. 3 ..." from the equipment nearest to the main unit.
2. Buffer memory (BFM) number "m2"
Up to 32767 16-bit RAM memories are built in a special extension unit and block, and they are called buffer
memories (BFM).
The buffer memory number is from "0" to "32766", and the contents are determined according to each special 5
function unit and block.
Basic Instruction
Setting range: K0 to K32766
→ For the contents of buffer memories, refer to the manual of the special function block and unit
used.
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
747
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
Cautions
1) A watchdog timer error may occur when many numbers of points are transferred in one operation cycle.
In such a case, take either of the following countermeasures.
a) Change the watchdog timer time
By overwriting the contents of D8000 (watchdog timer time), the watchdog timer detection time is
changed (initial value: K200).
When the program shown below is input, the sequence program will be monitored with the new
watchdog timer time.
M8002 MOV
EN ENO Watchdog timer time: 300ms
Initial pulse K300 s d D8000
WDT Watchdog timer refresh
EN ENO When WDT (FNC07) instruction is not
programmed, the value of D8000
becomes valid during END processing.
b) Change the number of transferred points "n2" in each operation cycle.
Change the number of transferred points "n2" in each operation cycle to a smaller value.
2) Do not stop the driving of the instruction while it is being executed. If driving is stopped, the buffer
memory (BFM) reading/writing processing is suspended, but the data acquired in the middle of reading/
writing processing is stored in the device specified by and later and buffer memories (BFM).
LDP SET
EN ENO EN ENO
Command s d M
input
M RBFM
EN ENO
Unit number m1 d Head device storing data to be
Head BFM number m2 read from buffer memory (BFM)
Number of all buffer memories n1
(BFM) to be read
Number of points transferred n2
in one operation cycle
M8029 RST
EN ENO
Instruction execution complete d M
3) When indexing is executed, the contents of index registers at the beginning of execution are used.
Even if the contents of index registers are changed after the instruction is executed, such changes do not
affect the process of the instruction.
4) The contents of "n1" devices starting from the device specified by change while RBFM instruction is
executed. After execution of the instruction is completed, execute another instruction for "n1" devices
starting from the device specified by .
5) Do not update (change) the contents of "n1" devices starting from the device specified by while
WBFM instruction is executed. If the contents are updated, the intended data may not be written to the
buffer memories (BFM).
6) Do not update (change) the contents of "n1" buffer memories (BFM) starting from the buffer memory NO.
"m2" while RBFM instruction is executed. If the contents are updated, the intended data may not be read.
7) The FX3UC PLCs of V 2.20 or later support the RBFM instruction.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
1
Program example
Outline
In the program example shown below, data is read from and written to the buffer memories (BFM) in the unit
No. 2 as follows:
1) When X000 is set to ON, data stored in D100 to D179 (80 points) are written to the buffer memories
(BFM) #1001 to #1080 in the special function block and unit whose unit number is No. 2 by 16 points in
each operation cycle. 2
Instruction List
[Structured ladder] [ST]
LDP SET IF(LDP(TRUE,X000) THEN SET(TRUE,M0));
EN ENO EN ENO WBFM(M0,K2,K1001,D100,K80,K16);
3
X000 s d M0 RST(M8029,M0);
BFM write start The BFM write start
Y000:=M8328;
Instruction
Configuration of
flag is set to ON.
WBFM M0:=RST(M8329);
M0
EN ENO
BFM write K2 m1
start K1001 m2
D100 s 4
K80 n1
Instructions
Explanation of
How to Read
K16 n2
D100 to D179 (80 points) are written to the buffer memories
#1001 to #1080 in the unit No. 2 (in 5 operation cycles).
RST
M8029
EN ENO 5
Instruction d
Basic Instruction
M0
execution complete
The BFM write start flag is set to OFF.
M8328
Y000
Instruction
6
non-execution Execution of the WBFM
instruction is waited.
M8329 RST
Instructions
Step Ladder
EN ENO
Instruction execution d
abnormally complete M0
The BFM write start flag is set to OFF.
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
749
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
2) When X001 is set to ON, the buffer memories (BFM) #2001 to #2080 (80 points) in the special function
block and unit whose unit number is No. 2 are written to D200 to D279 by 16 points in each operation
cycle.
[Structured ladder] [ST]
LDP SET IF(LDP(TRUE,X000) THEN SET(TRUE,M5));
EN ENO EN ENO RBFM(M5,K2,K2001,K80,K16,D200);
X001 s d M5 RST(M8029,M5);
BFM read start The BFM read start
flag is set to ON. Y001:=M8328;
RBFM M5:=RST(M8329);
M5
EN ENO
BFM read K2 m1 d D200
start K2001 m2
K80 n1
K16 n2
The buffer memories #2001 to #2080 (80 points) in the unit
No. 2 are read to D200 to D279 (in 5 operation cycles).
M8029 RST
EN ENO
Instruction execution d
complete M5
The BFM read start flag is set to OFF.
M8328
Y001
Instruction
non-execution Execution of the RBFM
instruction is waited.
M8329 RST
EN ENO
Instruction execution d
abnormally complete
M5
The BFM read start flag is set to OFF.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
1
7.25.2 WBFM
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction writes data to continuous buffer memories (BFM) in a special function block and unit over
several operation cycles by the time division method. This instruction is convenient for writing send data, etc.
to buffer memories in a special function block and unit for communication by the time division method.
TO instruction is also available for writing data to the buffer memory (BFM).
→ For TO instruction, refer to Section 7.8.10.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
WBFM
EN
m1
ENO
4
Instructions
Explanation of
How to Read
WBFM 16 bits Continuous m2 WBFM(EN,m1,m2,s,n1,n2);
s
n1
n2
2. Set data 5
Basic Instruction
Variable Description Data type
EN Execution condition Bit
Unit number ANY16
Head buffer memory (BFM) number ANY16
Input
variable Head device storing data to be written to buffer memory (BFM) ANY16 6
Instructions
Step Ladder
Number of all buffer memories (BFM) to be written ANY16
Number of points transferred in one operation cycle ANY16
Output
ENO Execution state ANY16
variable
3. Applicable devices 7
Instructions
Applied
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z
8
z z z z
Function
and Pulse Catch
Interrupt Function
S1 z z
z z z z
z z z z
S: Refer to "Cautions". A
and addresses
between devices
Relationships
751
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.25 Data Transfer 3
Function and operation explanation
1. 16-bit operation (WBFM)
"n1" word units from the device specified by in the PLC are transferred (written) to buffer memory (BFM)
location No. "m2" in special function unit and block No. "m1". While transferring, "n1" is divided by "n2" so n1/
n2 words (rounded up when there is a remainder) are transferred per scan time.
→ For the unit number, buffer memory (BFM) number, cautions and program example, refer to
Section 7.25.1.
Command input WBFM
PLC Unit No. "m1"
EN ENO
Write *1
Unit number m1 s BFM#(m2)
Head BFM number m2
Number of all buffer memories s
(BFM) to be read s +n1-1 BFM#(m2+n1-1)
Number of all buffer memories n1
(BFM) to be written *1. "n2" points are written in each operation cycle.
Number of points transferred n2
Writing is executed in "n1/n2" times.
in one operation cycle
("n1/n2" is rounded up if it is not an integer.)
M8029
M Instruction execution complete
M8328
M Instruction non-execution
M8329
M Instruction execution abnormally complete
1) When the instruction is finished normally, the instruction execution complete flag M8029 turns ON. When
the instruction is finished abnormally, the instruction execution abnormally complete flag M8329 turns
ON.
2) When RBFM or WBFM instruction in another step is executed for the same unit number, the instruction
non-execution flag M8328 is set to ON, and execution of such an instruction is paused.
When execution of the other target instruction is complete, the paused instruction resumes.
Related devices
Device Name Description
M8029 Instruction execution complete Turns ON when an instruction is finished normally.
Turns ON when RBFM or WBFM instruction in another step is executed for the same unit
M8328 Instruction non-execution
number.
Instruction execution abnor-
M8329 Turns ON when an instruction is finished abnormally.
mally complete
Related instructions
Instruction Error
FROM Read from a special function block
TO Write to a special function block
RBFM Divided BFM write
Cautions
1) The instruction is provided in the FX3UC PLC Ver. 2.20 or later.
2) Some restrictions to applicable devices
S1: Except special data register D
Error
An operation error is caused in the following case. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the unit number "m1" does not exist. (Error code: K6708)
752
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
1
7.26 High Speed Processing 2
Outline
7.26.1 DHSCT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction compares the current value of a high speed counter with a data table of comparison points,
and then sets or resets up to 16 output devices.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
DHSCT
EN ENO 4
s1 d
Instructions
Explanation of
How to Read
DHSCT 32 bits Continuous DHSCT(EN,s1,m,s2,n,d);
m
s2
n
2. Set data 5
Variable Description Data type
Basic Instruction
EN Execution condition Bit
Head device storing the data table ANY32
Input variable Number of comparison points in data table (1 ≤ m ≤ 128) ANY32
High speed counter (C235 to C255) ANY32
6
Number of devices to which the operation status is output ANY32
Instructions
Step Ladder
Output ENO Execution state Bit
variable Head device to which the operation status is output Bit
3. Applicable devices
Bit Devices Word Devices Others 7
Instructions
Applied
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z
S1 z
z z
8
Function
and Pulse Catch
Interrupt Function
zz z z
z z
S: Refer to "Cautions".
A
and addresses
between devices
Relationships
753
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
Function and operation explanation
1. 32-bit operation (DHSCT)
The current value of a high speed counter specified in is compared with the data table shown below
which has "m" points stored in the device specified by and later, and the operation output set value (ON
or OFF) specified in the data table is output to the devices specified by .
Command
input DHSCT
EN ENO
Head device storing the data table s1 d Head device to which
Number of comparison points in data table m the operation status is output
High speed counte (C235 to C255) s2
Number of devices to which n
the operation status is output
Data table used for comparison
Comparison Operation output set value
Comparison data Operation output destination
point number (SET [1] or RESET [0])
0 +1, +2
1 +4, +3 +5
2 +7, +6 +8
to +n-1
...
...
...
m-2 +3m-5, +3m-6 +3m-4
m-1 +3m-2, +3m-3 +3m-1
Operation output set value (SET [1] or RESET [0]) [Up to 16 points]
A 7 1 6
Operation output setting 1 0 1 0 0 1 1 1 0 0 0 1 0 1 1 0
Operation output setting = HA716 When the current value of the high speed counter
In the case of becomes equivalent to the comparison value,
" d = Y000, the operation output setting pattern is output.
n = K10"
:ON
Y Y Y Y Y Y Y Y Y Y :OFF
0 0 0 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0
1 0 7 6 5 4 3 2 1 0
d +n-1 d
1) When this instruction is executed, the uppermost data table of the data tables is set as the comparison
target.
2) When the current value of the high speed counter, specified in , becomes equivalent to the
comparison value in the data table, the corresponding operation output specified in the data table is
output to the device specified by .
If an output (Y) is specified in , the output processing is executed immediately without waiting for the
output refresh executed by the END instruction.
When specifying and output (Y), make sure that the least significant digit of the device number is "0".
Examples: Y000, Y010 and Y020
3) Immediately after step 2), "1" is added to the current table counter value D8138.
4) The next comparison point is set as the comparison target data.
5) Steps 2) and 3) are repeated until the current value of the table counter D8138 becomes "m".
When the current value becomes "m", the instruction execution complete flag M8138 turns ON, and the
execution returns to step 1). At this time, the table counter D8138 is reset to "0".
6) When the command contact is set to OFF, execution of the instruction is stopped and the table counter
D8138 is reset to "0".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
1
Operation example
Outline
X010 DHSCT
EN ENO
VAR_01*1 s1 d Y010
K5 m
CN235 s2 2
K3 n
Instruction List
M8000 DHSCR
EN ENO
VAR_02*2
CN235
s1
s2
d CC235
3
Instruction
Configuration of
*1. VAR_01 is a global label and is defined as D200.
*2. VAR_02 is a global label and is defined as K900.
Comparison Comparison data SET/RESET pattern
point
number Device
Comparison
value
Device
Operation
output set value
Table counter (D8138) 4
Instructions
Explanation of
How to Read
0 D201, D200 K321 D202 H0001 0↓
1 D204, D203 K432 D205 H0007 1↓
2 D207, D206 K543 D208 H0002 2↓
3 D210, D209 K764 D211 H0000 3↓
4 D213, D212 K800 D214 H0003 4↓ (repeated from "0") 5
Basic Instruction
Current value of C235
900 900
900 800
800
764
764 6
675
Instructions
Step Ladder
543 543
450 432 432
321
321
225
7
Instructions
Applied
0
Command contact Time
X010 OFF ON
Y010 OFF *1 ON
*1
Because DHSCT
instruction is not 8
Y011 OFF ON
Function
and Pulse Catch
Interrupt Function
executed, the
operation outputs
Y012 OFF *1 ON are not changed
by this instruction.
HSCT 4
Table 3 3
counter
D8138 0 1
2
0 1
2
0 A
and addresses
between devices
Relationships
HSCT
Instruction
execution OFF ON
complete flag
M8138
*1. If this instruction is not executed, no processing is executed for outputs.
In the operation example shown above, the command contact is "OFF".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
2. Related devices
Device Name Description
M8138 DHSCT Instruction execution complete flag Turns ON when the operation for the final table No. "m-1" is completed.
D8138 DHSCT Table counter Stores the comparison point number handled as the comparison target.
Cautions
1) This instruction can be executed only once in a program.
If this instruction is programmed two or more times, an operation error is caused by the second instruction
and later, and the instruction will not be executed.
2) This instruction constructs the data table at the END instruction after the first execution of the instruction.
Accordingly, the operation output works after the second scan and later.
3) With regard to DHSCT, DHSCS, DHSCR and DHSZ instructions, up to 32 instructions can be executed in
one operation cycle. An operation error is caused by the 33rd instruction and later, and the instruction will
not be executed.
4) If an output (Y) is specified in , the output processing is executed immediately without waiting for the
output refresh executed by END instruction.
When specifying an output (Y), make sure that the least significant digit of the device number is "0".
Examples: Y000, Y010 and Y020
5) When a high speed counter specified in is indexed with index, all high speed counters are handled
as software counters.
6) For this instruction, only one comparison point (one line) is handled as the comparison target at one time.
Processing will not move to the next comparison point until the current counter value becomes equivalent
to the comparison point currently selected as the comparison target.
If the current value of a high speed counter executes up counting using the comparison data table shown
in the operation example on the previous page, be sure to execute the instruction while the current value
of the high speed counter is smaller than the comparison value in comparison point No. 1.
7) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the
case of a simple project. Use a label to handle 32-bit data.
A 32-bit counter can be specified directly as it is a 32-bit long device.
Use a global label to specify a device.
8) When this instruction operates in the FX3U and FX3UC PLCs, the hardware counters (C235, C236, C237,
C238, C239, C240, C244(OP), C245(OP), C246, C248(OP), C251 and C253) switches automatically to
software counters, and the maximum frequency and total frequency are affected.
9) Some restrictions to applicable devices
S1: Only high speed counters C235 to C255 are available for use.
Error
An operation error occurs in the following cases. The error flag M8067 turns ON, and the error code is stored
in D8067.
1) When any devices other than high speed counters C235 to C255 are specified in .
(Error code: K6706)
2) When the "3m-1"th device from a device specified in exceeds the last number of the device.
(Error code: K6706)
3) When the "n"th device from a device specified in exceeds the last number of the device.
(Error code: K6706)
4) When this instruction is used two or more times in a program. (Error code: K6705)
5) With regard to DHSCT, DHSCS, DHSCR and DHSZ instructions, up to 32 instructions can be executed in
one operation cycle. An operation error is caused by the 33rd instruction and later, and the instruction will
not be executed. (Error code: K6705)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
1
Program example
Outline
In the program example shown below, the current value of C235 (counting X000) is compared with the
comparison data table set in R0 and later, and a specified pattern is output to Y010 to Y013.
[Structured ladder] [ST]
M8000
C235 is used as an up counter. M8235:=M8000; 2
Instruction List
M8235 OUT_C(M8000,CC235,K0);
M8000 OUT_C MOVP(M8000,H0008,K1Y10);
EN ENO DHSCR(VAR_01,C235,C235);
CC235 CCoil
Y010:=DHSCT(M8000,VAR_02,K5,C235,K4);
K0 CValue
3
Instruction
Configuration of
MOVP
EN ENO Initial output
H0008 s d K1Y10
DHSCR
4
EN ENO Ring length: 0 to 400
VAR_01*1 s1 d CC235
Instructions
Explanation of
How to Read
CN235 s2
DHSCT
EN ENO
VAR_02*2 s1 d Y010
K5
CN235
m
s2
5
Basic Instruction
K4 n
*1. VAR_01 is a global label and is defined as K400.
*2. VAR_02 is a global label and is defined as C235.
Operation example 6
Instructions
Step Ladder
Comparison Comparison data SET/RESET pattern
point Comparison Operation Table counter (D8138)
number Device Device
value output set value
0 R1, R0 K100 R2 H0007 0↓
1 R4, R3 K150 R5 H0004 1↓
2 R7, R6 K200 R8 H0003 2↓
7
Instructions
Applied
3 R10, R9 K250 R11 H0006 3↓
4 R13, R12 K300 R14 H0008 4 ↓ (repeated from "0")
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
757
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.26 High Speed Processing 2
Current value
of C235
400
300
250
200
150
100
0
Time
Y010 OFF ON
Y011 OFF ON
Y012 OFF ON
Y013 ON OFF
Table 4
3 3
counter 2 2
8136 0 1 0 1
758
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
7.27 Extension File Register Control
Outline
7.27.1 LOADR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
This instruction reads the current values of extension file registers (ER) stored in a memory cassette (flash
memory and EEPROM) or the file registers (ER) in the PLC's built-in EEPROM, and transfers them to
extension registers (R) stored in the PLC's built-in RAM.
3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
LOADR 4
EN ENO
Instructions
Explanation of
How to Read
LOADR 16 bits Continuous LOADR(EN,s,n);
s
n
LOADRP
LOADRP 16 bits Pulse
EN
s
ENO
LOADRP(EN,s,n); 5
Basic Instruction
n
2. Set data
Variable Description Data type
EN Execution condition
Device of extension register (transfer destination) to which data is to be
Bit
6
Instructions
Step Ladder
transferred.
Input ANY16
(The extension file register having the same number is handled as the
variable
transfer source.)
Number of points to be read (transferred)
ANY16
(FX3G: 1 ≤ n ≤ 24000, FX3U•FX3UC: 0 ≤ n ≤ 32767)
Output
variable
ENO Execution state Bit 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
user unit tant Number String
type
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
Function
and Pulse Catch
Interrupt Function
z z
z z z
A
and addresses
between devices
Relationships
759
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Function and operation explanation
1. 16-bit operation (LOADR/LOADRP)
Command
input LOADRP
EN ENO
Device of extension register to which data is to be transferred s
Number of points to be read (transferred) n
1) For the FX3U and FX3UC PLCs
The contents (current values) of extension file registers (ER) stored in a memory cassette (flash memory)
having the same numbers with the extension registers specified by to +n-1 are read, and
transferred to the extension registers (R) specified by to +n-1 stored in the PLC's built-in RAM.
Extension file registers (ER) Extension registers (R)
inside memory cassette inside built-in RAM
Read (transfer)
E s s
E s +1 s +1
E s +2 s +2
E s +3 s +3
E s +n-2 s +n-2
E s +n-1 s +n-1
- Reading and transfer are executed in units of device. Up to 32768 devices can be read and transferred.
- Different from SAVER, INITR and LOGR instructions, it is not necessary to execute this instruction in units of sector.
- If "n" is set to "0", it is handled as "32768" when the instruction is executed.
2) For the FX3G PLCs
a) When connecting to a memory cassette
The contents (current values) of extension file registers (ER) stored in a memory cassette (EEPROM)
having the same numbers with the extension registers (R) specified by to +n-1 are read,
and transferred to the extension registers specified by to +n-1 stored in the PLC's built-in
RAM.
Extension file registers (ER) Extension registers (R)
inside memory cassette inside built-in RAM
Read (transfer)
E s s
E s +1 s +1
E s +2 s +2
E s +3 s +3
E s +n-2 s +n-2
E s +n-1 s +n-1
- Reading and transfer are executed in units of device. Up to 24000 devices can be read and transferred.
760
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
b) When not connecting to a memory cassette
Outline
The contents (current values) of extension file registers (ER) stored in PLC's built-in EEPROM having
the same numbers with the extension registers specified by to +n-1 are read, and
transferred to the extension registers (R) specified by to +n-1 stored in the PLC's built-in
RAM.
Extension file registers (ER) Extension registers (R) 2
Instruction List
inside PLC's built-in EEPROM inside built-in RAM
Read (transfer)
E s s
E s +1 s +1
E s +2 s +2
E s +3 s +3
3
Instruction
Configuration of
E s +n-2 s +n-2
E s +n-1 s +n-1
- Reading and transfer are executed in units of device. Up to 24000 devices can be read and transferred. 4
Instructions
Explanation of
How to Read
Cautions
1. About the allowable number of times of writing operations in memory
Note the following when accessing the extension file registers:
• For the FX3U and FX3UC PLCs 5
The memory cassette (flash memory) allows up to 10,000 times of writing operations.
Basic Instruction
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is
executed. Do not exceed the allowable number of times of writing operations.
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC. To avoid this, be sure to use pulse operation type instructions.
The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
6
Instructions
Step Ladder
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER
instruction, the number of times of writing operations in the memory counts up every time the NITR or
INITER instruction is executed.
• For the FX3G PLCs
The memory cassette (EEPROM) and PLC's built-in memory (EEPROM) allow up to 10,000 times and
20,000 times of writing operations, respectively.
7
Instructions
Applied
The number of times of writing operations counts up each time the RWER instruction is executed. Do not
exceed the allowable number of times of writing operations.
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC. To avoid this, be sure to use pulse operation type instructions.
The number of times of writing operations does not count up when the LOADR instruction is executed.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
761
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the last device number to be transferred exceeds "32767" (error code: K6706).
At this time, devices up to the last one (R32767) are read and transferred.
2) When a memory cassette is not connected. (Error code: K6771)*1
*1. This does not cause an error with the FX3G PLCs because the PLCs read the contents of the
extension file registers stored in the PLC's built-in EEPROM when a memory cassette is not
connected.
Program example
In the program example shown below, the contents (current values) of 4000 extension file registers ER1 to
ER4000 inside the memory cassette are read, and transferred to 4000 extension registers R1 to R4000 inside
the built-in RAM.
[Structured ladder] [ST]
LDP LOADR IF(LDP(TRUE,M0)THEN LOADR(TRUE,R1,K4000));
EN ENO EN ENO
M0 s R1 s
K4000 n
Extension file registers (ER) Extension registers (R)
inside memory cassette inside built-in RAM
Current Current
Device number value Device number value
Read (transfer)
ER1 K100 R1 K100
ER2 K50 R2 K50
ER3 H0003 R3 H0003
ER4 H0101 R4 H0101
ER3999 K55 R3999 K55
ER4000 K59 R4000 K59
762
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
7.27.2 SAVER
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction writes the current values of extension registers (R) stored in the PLC's built-in RAM to
extension file registers (ER) stored in a memory cassette (flash memory) in units of sector (2048 points).
RWER instruction provided in FX3UC PLCs Ver. 1.30 or later and FX3U PLCs writes (transfers) only arbitrary
number of points. It is not necessary to execute INITR or INITER instruction every time when RWER
instruction is used.
3
1. Format and operation, execution form
Instruction
Configuration of
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
SAVER
SAVER 16 bits Continuous
EN
s
ENO
d
SAVER(EN,s,n,d); 4
Instructions
Explanation of
How to Read
n
2. Set data
Variable Description Data type
EN Execution condition Bit 5
Input Device of extension register to which data is to be written (Only the head
Basic Instruction
ANY16
variable device of a sector of extension registers can be specified.)
Number of points written (transferred) in one operation cycle. ANY16
Output ENO Execution state Bit
variable Device storing the number of already written points ANY16
6
3. Applicable devices
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z 7
Instructions
Applied
z z
z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
763
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Function and operation explanation
1. 16-bit operation (SAVER)
The contents (current values) of 2,048 extension registers (R) starting from the device specified by are
written (transferred) to extension file registers (ER) inside a memory cassette (flash memory) having the
same device numbers in "2048/n" operation cycles ("2048/n +1" cycles if there is the remainder).
When the instruction is being executed, the number of already written points is stored in .
Command input SAVER
EN ENO
Device of extension register to s d Device storing the number
which data is to be transferred of already written points
Number of points written n
in one operation cycle
Operation execution complete flag
M8029
M SAVER instruction operation complete flag
Extension registers (R) Extension file registers (ER)
inside built-in RAM inside memory cassette
Write (transfer)*1
s E s
s +1 E s +1
s +2 E s +2
s +2047 E s +2047
*1. "n" points are written (transferred) in each operation cycle.
(Number of points specified by n )
1) Extension file registers are written in units of sector (2048 points).
The table below shows the head device number in each sector.
Sector Sector
Head device number Written device range Head device number Written device range
number number
Sector 0 R0 ER0 to ER2047 Sector 8 R16384 ER16384 to ER18431
Sector 1 R2048 ER2048 to ER4095 Sector 9 R18432 ER18432 to ER20479
Sector 2 R4096 ER4096 to ER6143 Sector 10 R20480 ER20480 to ER22527
Sector 3 R6144 ER6144 to ER8191 Sector 11 R22528 ER22528 to ER24575
Sector 4 R8192 ER8192 to ER10239 Sector 12 R24576 ER24576 to ER26623
Sector 5 R10240 ER10240 to ER12287 Sector 13 R26624 ER26624 to ER28671
Sector 6 R12288 ER12288 to ER14335 Sector 14 R28672 ER28672 to ER30719
Sector 7 R14336 ER14336 to ER16383 Sector 15 R30720 ER30720 to ER32767
2) If "n" is set to "0", it is handled as "2048" when the instruction is executed.
3) When writing (transfer) of 2048 points is finished, execution of the instruction is completed and the
instruction execution complete flag M8029 turns ON.
4) The number of already written points is stored in the device specified by .
2. Related devices
Device number Name Description
When execution of the target instruction is completed, the instruction execution complete
flag M8028 turns ON.
Instruction execution
M8029 In a program, however, there may be two or more instructions which can use the flag
complete
M8029. To avoid confusion, be sure to use the NO (normally open) contact of this flag
immediately under SAVER instruction so that this flag works only for SAVER instruction
764
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Cautions
Outline
1. Cautions on writing data to a memory cassette
Memory cassettes adopt flash memory. Note the following contents when writing data to extension file
registers in a memory cassettes with the SAVER instruction.
1) It takes about 340 ms to write all points (2048 points). If "n" is set to K0 or K2048, the operation cycle for 2
executing this instruction becomes about 340 ms longer than normal.
Instruction List
If the operation cycle is severely affected, write data in two or more operation cycles.
When writing data in two or more operation cycles, set "n" in the range from K1 to K1024.
2) Do not abort execution of this instruction in the middle of operation. If execution is aborted, unexpected
data may be written to extension file registers.
If execution of this instruction is aborted by turning OFF the power, execute the instruction again using 3
step [2] described on the next page after turning ON the power again.
Instruction
Configuration of
Write command SET
EN ENO
d M
M
EN
INITERP
ENO
4
Instructions
Explanation of
How to Read
The same extension register device number as s
the extension file register device to be initialized
The number of sectors for the extension register n
to be initialized and the extension file register
EN
SAVER
ENO
5
Basic Instruction
Device of extension register to which data s d Device storing the number
is to be transferred of already written points
Number of points written in one operation cycle n
Operation execution complete flag
M8029
EN
RST
ENO
6
Instructions
Step Ladder
d M
3) Execute INITER or INITR instruction to target extension file registers (ER) before executing SAVER
instruction. If SAVER instruction is driven before INITER or INITR instruction is executed, an operation
error (error code: K6770) may be caused.
To avoid such an operation error, make a program for executing SAVER instruction in the following
7
Instructions
Applied
sequence
When the FX3U and FX3UC PLCs are Ver. 1.30 or later
[1] When storing data of 2048 extension registers (R) in one sector to extension file register (ER).
a) Execute INITER instruction to extension file registers (ER) specified as targets in SAVER instruction.
b) Execute SAVER instruction. 8
[2] When storing the contents of an arbitrary number of extension registers (R) to extension file
Function
and Pulse Catch
Interrupt Function
registers (ER)
Use RWER instruction.
→ For RWER instruction, refer to Section 7.27.5.
When the FX3UC PLCs are former than Ver. 1.30.
[1] When storing data of 2048 extension registers (R) in one sector to extension file registers (ER)
A
and addresses
between devices
Relationships
If the extension registers (R) have data to be stored in extension file registers (ER), use the procedure [2].
a) Execute INITR instruction to extension registers (R) and extension file registers (ER) specified as
targets in SAVER instruction.
b) Store data to extension registers (R) specified as targets.
c) Execute SAVER instruction.
765
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
[2] When storing data of 2048 extension registers (R) in one sector to extension file registers (ER)
a) Temporarily withdraw the data of extension registers (R) specified as targets in SAVER instruction to
data registers or unused 2048 extension registers (R) by using BMOV instruction.
b) Execute INITR instruction to extension registers (R) and extension file registers (ER) specified as
targets in SAVER instruction.
c) Return the data of 2048 points temporarily withdrawn in step a) to extension registers (R) specified as
targets by using BMOV instruction.
d) Execute SAVER instruction.
2. About the allowable number of times of writing operations in memory
Note the following when accessing the extension file registers:
• The memory cassette (flash memory) allows up to 10,000 times of writing operations.
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is
executed. Do not let the number of times of writing operations exceed the allowable number of times of
writing operations.
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC. To avoid this, be sure to use pulse operation type instructions.
• The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER
instruction, the number of times of writing operations in the memory counts up every time the NITR or
INITER instruction is executed.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When any device number other than the head device number of a sector of extension file registers is set
to .
(Error code: K6706)
2) When a memory cassette is not connected. (Error code: K6771)
3) When the protect switch of the memory cassette is set to ON. (Error code: K6770)
4) When the collation result after data writing is "mismatch" due to omission of initialization or for another
reason. (Error code: K6770)
766
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Program example
Outline
1) In the case of FX3UC PLCs Ver. 1.30 or later and FX3U PLCs Ver. 2.20 or later
In the program example shown below, the changed contents of extension registers R10 to R19 (sector 0)
used for setting data are reflected on the extension file registers (ER) when X000 is set to ON. (128 points
are written in one operation cycle.)
Program
2
Instruction List
[Structured ladder] [ST]
X000 SET SET(X000,M0);
EN ENO INTERP(M0,R0,K1);
d M0 WDT(M0); 3
SAVER(M0,R0,K128,D0);
Instruction
Configuration of
M0 INITERP RST(M8029,M0);
EN ENO
1)
R0 s
K1 n
4
Instructions
Explanation of
How to Read
WDT
EN ENO
SAVER
EN ENO
R0 s d D0 2) 5
Basic Instruction
K128 n
Operation execution complete flag
M8029 RST
EN ENO
d M0 6
Instructions
Step Ladder
Operation example
Setting data Setting backup data Setting backup data
Extension registers (R) Extension file registers (ER) Extension file registers (ER)
Current
Device number value Device number
Current
value Device number
Current
value
7
Instructions
Applied
R0 K100 ER0 K100 ER0 HFFFF
R1 K105 ER1 K105 ER1 HFFFF
8
Setting data (A)
R10 K200 ER10 K300 ER10 HFFFF
Changed data
R11 K215 ER11 K330 ER11 HFFFF
Function
and Pulse Catch
Interrupt Function
1) 2)
R12 K400 ER12 K350 ER12 HFFFF
INITER SAVER
instruction instruction
R19 K350 ER19 K400 ER19 HFFFF
A
and addresses
between devices
Relationships
R99 K1000 ER99 K1000 ER99 HFFFF
R100 HFFFF ER100 HFFFF ER100 HFFFF
Unused
R2047 HFFFF ER2047 HFFFF ER2047 HFFFF
To the next page
767
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Setting data Setting backup data
Extension registers (R) Extension file registers (ER) Number
already
of
Current Current written
Device number value Device number value points (D0)
R0 K100 ER0 K100
R1 K105 ER1 K105
R10 K200 ER10 K200
Changed data
Setting data
R11 K215 1st ER11 K215
operation
2) R12 K400 cycle ER12 K400
SAVER
R19 K350 ER19 K350
instruction
R99 K1000 ER99 K1000
R100 HFFFF ER100 HFFFF
K128
R127 HFFFF 2nd ER127 HFFFF
R128 HFFFF operation ER128 HFFFF
cycle
R255 HFFFF ER255 HFFFF K256
3rd to 15th
Unused
R256 HFFFF operation ER256 HFFFF
cycle
R1919 HFFFF ER1919 HFFFF K1920
16th
R1920 HFFFF operation ER1920 HFFFF
cycle
R2047 HFFFF ER2047 HFFFF K2048
768
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
2) In the case of FX3UC PLCs former than Ver. 1.30
Outline
In the program example shown below, the changed contents of the extension registers R10 to R19
(sector 0) used for setting data are reflected on extension file registers (ER) when X000 is set to ON. (128
points are written in one operation cycle.)
Program
[Structured ladder]
2
Instruction List
X000 SET
EN ENO
d M0
3
M0 BMOVP
Instruction
Configuration of
EN ENO
s d
1)
R0 R30720
K100 n
EN
INITRP
ENO 2)
4
Instructions
Explanation of
How to Read
R0 s
K1 n
WDT
5
EN ENO
Basic Instruction
BMOVP
EN ENO 3)
R30720 s d R0
K100 n
SAVER 6
Instructions
Step Ladder
EN ENO
4)
R0 s d D0
K128 n
Operation execution complete flag
M8029 RST 7
EN ENO
Instructions
Applied
d M0
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
769
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Operation example
Setting data Setting backup data Temporarily withdrawn data *1
Extension registers (R) Extension file registers (ER) Unused extension registers
Current Current Current
Device number value Device number value Device number value
R0 K100 ER0 K100 R30720 K100
R1 K105 ER1 K105 R30721 K105
R10 K200 ER10 K300 R30730 K200
Setting data (A)
Changed data
R11 K215 ER11 K330 1) R30731 K215 2)
R12 K400 ER12 K350 R30732 K400
BMOV INITR
instruction instruction
R19 K350 ER19 K400 R30739 K350
R99 K1000 ER99 K1000 R30819 K1000
R100 HFFFF ER100 HFFFF *1. Use unused devices as
Unused
an area to which data is
temporarily withdrawn.
R2047 HFFFF ER2047 HFFFF To the next page
770
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Outline
Setting data Setting backup data Setting data
Extension registers (R) Extension file registers (ER) Unused extension registers
Device number Current Device number Current Device number Current
value value value
R0 HFFFF ER0 HFFFF R0 K100 2
Instruction List
R1 HFFFF ER1 HFFFF R1 K105
Setting data (A)
R10 HFFFF ER10 HFFFF R10 K200
R11 HFFFF ER11 HFFFF R11 K215
2)
R12 HFFFF ER12 HFFFF
3)
R12 K400
4)
3
Instruction
Configuration of
INITR BMOV SAVER
instruction instruction instruction
R19 HFFFF ER19 HFFFF R19 K350
R99 HFFFF ER99 HFFFF R99 K1000 4
Instructions
Explanation of
How to Read
R100 HFFFF ER100 HFFFF R100 HFFFF
R2047 HFFFF ER2047 HFFFF R2047 HFFFF
Basic Instruction
Setting data Setting backup data
Extension registers (R) Extension file registers (ER) Number
already
of
written
Device number Current
value Device number Current
value points (D0)
R0 K100 ER0 K100
6
R1 K105 ER1 K105
Instructions
Step Ladder
R10 K200 ER10 K200
Setting data
Changed data
R11 K215 1st ER11 K215
R12 K400 operation
cycle
ER12 K400 7
Instructions
Applied
R19 K350 ER19 K350
R99 K1000 ER99 K1000
R100 HFFFF ER100 HFFFF
8
Function
and Pulse Catch
Interrupt Function
K128
R127 HFFFF 2nd ER127 HFFFF
R128 HFFFF operation ER128 HFFFF
cycle
A
Unused
R255 HFFFF ER255 HFFFF K256
and addresses
between devices
Relationships
3rd to 15th
R256 HFFFF operation ER256 HFFFF
cycle
R1919 HFFFF 16th ER1919 HFFFF K1920
operation
R1920 HFFFF ER1920 HFFFF
cycle
R2047 HFFFF ER2047 HFFFF K2048
771
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
7.27.3 INITR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction initializes (to "HFFFF <K-1>") extension registers (R) in the RAM built in a PLC and extension
file registers in a memory cassette (flash memory) before data logging by LOGR instruction.
In FX3UC PLCs former than Ver. 1.30, use this instruction to initialize extension file registers (ER) before
writing data to them using SAVER instruction.
In FX3UC PLCs Ver. 1.30 or later and FX3U PLCs, INITER instruction is also provided to initialize (to "HFFFF"
<K-1>) only extension file registers (ER) in a memory cassette (flash memory) in units of sector.
→ For SAVER instruction, refer to Section 7.27.2.
→ For LOGR instruction, refer to Section 7.27.4.
→ For INITER instruction, refer to Section 4.27.6.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
INITR
EN ENO
INITR 16 bits Continuous INITR(EN,s,n);
s
n
INITRP
EN ENO
INITRP 16 bits Pulse INITRP(EN,s,n);
s
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Device of extension register and extension file register to be initialized
Input It is possible to specify only the head device in a sector of extension ANY16
variable registers.
Number of sectors of extension registers and extension file registers to be
ANY16
initialized.
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
z z
772
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Function and operation explanation
Outline
1. 16-bit operation (INITR/INITRP)
"n" sectors of extension registers in the PLC's built-in RAM starting from the one specified by and "n"
sectors of extension file registers in a memory cassette (flash memory) having the same device numbers are
initialized (initial value "HFFFF" <K-1> is written.). 2
Initialization is executed in units of sector.
Instruction List
Command
input INITR
EN ENO
Extension registers to be initialized s
3
and extension file register device
Number of sectors of extension registers and n
extension file registers to be initialized.
Instruction
Configuration of
The table below shows the head device number in each sector.
Head Head
Sector Sector
device Initialized device range device Initialized device range
number number
number number
Sector 0
Sector 1
R0
R2048
R0 to R2047, ER0 to ER2047
R2048 to R4095, ER2048 to ER4095
Sector 8
Sector 9
R16384
R18432
R16384 to R18431, ER16384 to ER18431
R18432 to R20479, ER18432 to ER20479
4
Instructions
Explanation of
How to Read
Sector 2 R4096 R4096 to R6143, ER4096 to ER6143 Sector 10 R20480 R20480 to R22527, ER20480 to ER22527
Sector 3 R6144 R6144 to R8191, ER6144 to ER8191 Sector 11 R22528 R22528 to R24575, ER22528 to ER24575
Sector 4 R8192 R8192 to R10239, ER8192 to ER10239 Sector 12 R24576 R24576 to R26623, ER24576 to ER26623
Sector 5 R10240 R10240 to R12287, ER10240 to ER12287 Sector 13 R26624 R26624 to R28671, ER26624 to ER28671
Sector 6
Sector 7
R12288
R14336
R12288 to R14335, ER12288 to ER14335
R14336 to R16383, ER14336 to ER16383
Sector 14
Sector 15
R28672
R30720
R28672 to R30719, ER28672 to ER30719
R30720 to R32767, ER30720 to ER32767
5
Basic Instruction
Operation (when a memory cassette is used)
1) Extension registers (R) [inside the built-in 2) Extension file registers (ER) [inside the
RAM memory] memory cassette]
Current value Current value 6
Device number Before After Device number Before After
Instructions
Step Ladder
execution execution execution execution
H0010 HFFFF H1234 HFFFF
+1 H0020 HFFFF +1 H5678 HFFFF
+2 H0011 HFFFF +2 H90AB HFFFF
7
...
...
...
...
...
...
Instructions
Applied
+(2048×n)-1 HABCD HFFFF +(2048×n)-1 HCDEF HFFFF
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
773
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Cautions
1. Initializing two or more sectors
When a memory cassette is attached, 18 ms is required to initialize one sector.
(When a memory cassette is not attached, only 1 ms is required to initialize one sector.)
When initializing two or more sectors, take either measures shown below.
1) Set a large value to the watchdog timer D8000 using the following program.
Initial pulse
M8002 MOV
EN ENO
K s d D8000
Guideline of the watchdog timer set value
A value acquired by the following procedure can be regarded as the guideline of the watchdog timer set
value.
If an acquired value is 200 ms or less, however, it is not necessary to change the watchdog timer set value.
a) Write a program to be executed from GX Developer to the PLC.
[Online] → [Write to PLC ...]
b) Set the current value of D8000 (unit: ms) to "1000" using the device test function in GX Developer.
[Online] → [Debug] → [Device test ...] → "Word device / buffer memory" in Device test dialog box
c) Set the PLC mode to RUN, and execute the program. (Execute this instruction also.)
d) Monitor the maximum scan time D8012 (unit: 0.1 ms) using the device batch monitoring function in GX
Developer.
e) Set the watchdog timer to the maximum scan time (D8012) or more.
D8012 stores the maximum scan time in increments of 0.1 ms.
Rough guide to the watchdog timer set value D8000 (unit: ms) is the "value stored in D8012 divided by
10" added by 50 to 100.
2) Setting WDT instruction just before and after INITR instruction as shown below.
LDP WDT
EN ENO EN ENO
Command s The watchdog timer is reset.
input
INITR
EN ENO
*1 s
*1. Device of registers to be initialized
*2 n
*2. Number of sectors of registers to
be initialized
WDT
EN ENO
The watchdog timer is reset.
If the processing time of the INITR instruction exceeds 200 ms, set the value of D8000 (unit: ms) to the
processing time or more.
2. About the allowable number of times of writing operations in memory
Note the following when accessing the extension file registers:
• The memory cassette (flash memory) allows up to 10,000 times of writing operations.
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is
executed. Do not let the number of times of writing operations exceed the allowable number of times of
writing operations.
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC. To avoid this, be sure to use pulse operation type instructions.
• The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER
instruction, the number of times of writing operations in the memory counts up every time the NITR or
INITER instruction is executed.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Error
Outline
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When any device number other than the head device number of a sector of extension file registers is set
to .
(Error code: K6706) 2
Instruction List
2) When a device number to be initialized exceeds "32767". In this case, devices up to R32767 (ER32767)
are initialized.
(Error code: K6706)
3) When the protect switch of the memory cassette is set to ON. (Error code: K6770)
3
Program example
Instruction
Configuration of
In the program example shown below, the extension registers R0 to R2047 in the sector 0 are initialized.
Note that the extension file registers ER0 to ER2047 are also initialized if a memory cassette is attached.
[Structured ladder] [ST]
IF(LDP(TRUE,X000) THEN WDT(TRUE);
4
LDP WDT
Instructions
Explanation of
How to Read
EN ENO EN ENO IF(LDP(TRUE,X000) THEN INITR(TRUE,R0,K1));
X000 s
IF(LDP(TRUE,X000) THEN WDT(TRUE);
INITR
EN ENO
R0 s
5
Basic Instruction
K1 n
WDT
EN ENO
Instructions
Step Ladder
1) Extension registers (R) [inside the built-in RAM memory]
Current value
Device number Before After
execution execution
RO H1234 HFFFF 7
Instructions
Applied
R1 H5678 HFFFF
R2 H90AB HFFFF
...
...
...
R2047 HCDEF HFFFF
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
775
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
7.27.4 LOGR
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction logs specified devices, and stores the logged data to extension registers (R) and extension
file registers (ER) in a memory cassette.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Variable ST
LOGR
EN ENO
LOGR 16 bits Continuous s d1 LOGR(EN,s,m,n,d1,d2);
m d2
n
LOGRP
EN ENO
LOGRP 16 bits Pulse s d1 LOGRP(EN,s,m,n,d1,d2);
m d2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Head device to be logged ANY16
Input
variable Number of devices to be logged (1≤ m ≤ 8000) ANY16
Number of sectors of devices used in logging (1 ≤ n ≤ 16) ANY16
ENO Execution state Bit
Output Head device used in logging ANY16
variable
Number of pieces of logged data ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z
z z z
z
z z
z z
776
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Function and operation explanation
Outline
1. 16-bit operation (LOGR/LOGRP)
While the instruction is driven, "m" devices starting from the device specified by are logged until "n"
sectors of extension registers (R) starting from the device specified by and extension file registers (ER)
in a memory cassette are filled. 2
The number of pieces of logged data is stored to the device specified by .
Instruction List
If a memory cassette is not used, data is not written to extension file registers (ER).
Command
input LOGRP
EN ENO
Head device to be logged
Number of devices to be logged
s
m
d1
d2
Head device used in logging
Number of pieces of logged data
3
Instruction
Configuration of
Number of sectors of devices used in logging n
Logging data format
Number of
d1
Destination storing 1st logging data
stored data
d1 =m
4
Instructions
Explanation of
How to Read
s s +m-1
d1 +m-1
d1 +m
Destination storing 2nd logging data
d1 = 2m
s s +m-1
d1 +2m-1
d1 +2m Data writing
5
Basic Instruction
Destination storing 3rd logging data area
d1 = 3m
d1 +3m-1 1926 n
Logging data
storage area
2048 n
6
Instructions
Step Ladder
d1 +(1926 n)-1
Writing position control area
(Every time one word is used in the data
writing area, bits are set to OFF (0) from Data writing
7
Instructions
Applied
d1 +(2048 n)-1 ON (1) in turn from bit 0 of [ d1 + position control
(1926 n) - 1]. area
After bit 15 of [ d1 + (1926 n) - 1] is 122 n
set to OFF (0), bit 0 of the next device
[ d1 + (1926 n)] is set to OFF (0) in
the next logging.)
8
Function
and Pulse Catch
Interrupt Function
The table below shows the head device number in each sector.
Head Head
Sector Sector
device Written device range device Written device range
number number
number number
Sector 0
Sector 1
R0
R2048
R0 to R2047, ER0 to ER2047
R2048 to R4095, ER2048 to ER4095
Sector 8
Sector 9
R16384
R18432
R16384 to R18431, ER16384 to ER18431
R18432 to R20479, ER18432 to ER20479
A
and addresses
between devices
Relationships
Sector 2 R4096 R4096 to R6143, ER4096 to ER6143 Sector 10 R20480 R20480 to R22527, ER20480 to ER22527
Sector 3 R6144 R6144 to R8191, ER6144 to ER8191 Sector 11 R22528 R22528 to R24575, ER22528 to ER24575
Sector 4 R8192 R8192 to R10239, ER8192 to ER10239 Sector 12 R24576 R24576 to R26623, ER24576 to ER26623
Sector 5 R10240 R10240 to R12287, ER10240 to ER12287 Sector 13 R26624 R26624 to R28671, ER26624 to ER28671
Sector 6 R12288 R12288 to R14335, ER12288 to ER14335 Sector 14 R28672 R28672 to R30719, ER28672 to ER30719
Sector 7 R14336 R14336 to R16383, ER14336 to ER16383 Sector 15 R30720 R30720 to R32767, ER30720 to ER32767
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Cautions
1. About LOGR instruction
LOGR instruction executes logging in each operation in the continuous operation type.
When logging should be executed only once by one input, use the pulse operation type.
2. Cautions on using a memory cassette
Flash memory is adopted in a memory cassette. Be sure to initialize the data storage area in units of sector
before starting logging.
If this instruction is executed without initialization, an operation error (error code: K6770) may be caused.
Logging data storage area
initialization command input INITR
EN ENO
Device of registers to be initialized *1 s
Number of sectors of registers to be initialized *2 n
*1. Specify the same device as d1 in LOGR instruction.
*2. Specify the same number as (n) in LOGR instruction.
3. About the allowable number of times of writing operations in memory
• Note the following when accessing the extension file registers:
The memory cassette (flash memory) allows up to 10,000 times of writing operations.
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is
executed. Do not let the number of times of writing operations exceed the allowable number of times of
writing operations.
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC. To avoid this, be sure to use pulse operation type instructions.
• The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER
instruction, the number of times of writing operations in the memory counts up every time the NITR or
INITER instruction is executed.
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When any number other than the head device number of a sector of extension file registers is set to the
device specified by .
(Error code: K6706)
2) While data is written, the remaining area and the data quantity to be written are compared with each
other. If the remaining storage area is insufficient, only a limited amount of data is written. (Error code:
K6706)
3) When the protect switch of the memory cassette is set to ON. (Error code: K6770)
4) When the collation result after data writing is "mismatch" due to omission of initialization or for another
reason. (Error code: K6770)
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Program example
Outline
In the program example shown below, D1 and D2 are logged to the area from R2048 to R6143 every time
X001 turns ON.
[Structured ladder] [ST]
X001 LOGRP LOGR(X001,D1,K2,K2,R2048,D100); 2
EN ENO
Instruction List
D1 s d1 R2048
K2 m d2 D100
K2 n
Initial value
X001
OFF→ON
X001
OFF→ON
3
Instruction
Configuration of
1st time 2nd time
R2048 HFFFF H1234 H1234
R2049 HFFFF H5678 H5678
R2050 HFFFF HFFFF H9ABC
R2051 HFFFF HFFFF H1122
4
Data writing
Instructions
Explanation of
How to Read
R2052 HFFFF HFFFF HFFFF area
Because two words
are used, low-order two
bits are set to OFF (0).
Basic Instruction
R5899 HFFFF HFFFC HFFF0
R5900 HFFFF HFFFF HFFFF
R5901 HFFFF HFFFF HFFFF Because two words are
used, low-order two bits Writing position
are set to OFF (0). control area
6
Instructions
Step Ladder
R6143 HFFFF HFFFF HFFFF
D1 H1234 D1 H9ABC
D2 H5678 D2 H1122 7
Instructions
Applied
D100 H0000 H0002 H0004
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
779
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
7.27.5 RWER
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
This instruction writes the current values of an arbitrary number of extension registers (R) in the PLC's built-in
RAM to extension file registers (ER) in a memory cassette (flash memory or EEPROM) or to the extension file
registers (ER) in the PLC's built-in EEPROM.
Because RWER instruction is not supported in FX3UC PLCs former than Ver. 1.30, use SAVER instruction
instead.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
RWER
EN ENO
RWER 16 bits Continuous RWER(EN,s,n);
s
n
RWERP
EN ENO
RWERP 16 bits Pulse RWERP(EN,s,n);
s
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Device of extension register storing data ANY16
variable
Number of written (transferred) devices
ANY16
[FX3G: 1 ≤ n ≤ 24000, FX3U/FX3UC: 0 ≤ n ≤ 32767]
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z
z z z
780
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Function and operation explanation
Outline
1. 16-bit operation (RWER)
Command
input RWERP
Device of extension register storing data
EN
s
ENO
2
Instruction List
Number of written (transferred) devices n
1) For the FX3U and FX3UC PLCs
The contents (current values) of "n" extension registers (R) starting from are written (transferred) to
extension file registers having the same device numbers in a memory cassette (flash memory).
Extension registers (R) Extension file registers (ER)
3
Instruction
Configuration of
inside built-in RAM inside memory cassette
Write (transfer) *1
s E s
s +1 E s +1
s +2 E s +2
4
Instructions
Explanation of
How to Read
s + n -1 E s + n -1
*1. All points specified by the instruction are written (transferred).
- When "n" is set to "0", it is handled as "32768" when the instruction is executed.
2) For the FX3G PLCs 5
a) When connecting a memory cassette
Basic Instruction
The contents (current values) of the "n" points of extension registers (R) starting from are written
(transferred) to the extension file registers (ER) having the same numbers as the extension registers
(R) in the memory cassette (EEPROM).
Extension registers (R)
inside built-in RAM
Extension file registers (ER)
inside memory cassette 6
Write (transfer) *1
Instructions
Step Ladder
s E s
s +1 E s +1
s +2 E s +2
7
s + n -1 E s + n -1
Instructions
Applied
*1. All points specified by the instruction are written (transferred).
b) When not connecting a memory cassette
The contents (current values) of the "n" points of extension registers (R) starting from are written
(transferred) to the extension file registers (ER) having the same numbers as the extension registers
8
Function
and Pulse Catch
Interrupt Function
(R) in the PLC's built-in EEPROM.
Extension registers (R) Extension file registers (ER)
inside built-in RAM inside PLC's built-in EEPROM
s
Write (transfer)*1
E s A
and addresses
between devices
Relationships
s +1 E s +1
s +2 E s +2
s + n -1 E s + n -1
*1. All points specified by the instruction are written (transferred).
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Cautions
1. Cautions on writing data to the memory cassette (flash memory) for the FX3U and FX3UC
PLCs
Memory cassettes adopt flash memory. Note the following contents when writing data to extension file
registers in a memory cassette with the RWER instruction.
1) Though extension file registers to be written can be specified arbitrarily, writing is executed in units of
sector.
It takes about 47 ms to write one sector. If the extension file registers to be written are located in two
sectors, the instruction execution time will be about 94 ms.
Be sure to change the set value of the watchdog timer D8000 before executing this instruction.
Writing command input PLS
EN ENO
d M100
M100 MOV
EN ENO
D8000 s d D200
ADD
EN ENO
D8000 s1 d D8000 *1. Number of sectors to be written 47 ms
K47*1 s2
WDT
EN ENO
RWER
EN ENO The contents of R1000 to R1099 in the sector 0
R1000 s are written to ER1000 to ER1099.
K100 n
MOV
EN ENO
D200 s d D8000
WDT
EN ENO
The table below shows the device range in each sector.
Sector number Device range Sector number Device range
Sector 0 ER0 to ER2047 Sector 8 ER16384 to ER18431
Sector 1 ER2048 to ER4095 Sector 9 ER18432 to ER20479
Sector 2 ER4096 to ER6143 Sector 10 ER20480 to ER22527
Sector 3 ER6144 to ER8191 Sector 11 ER22528 to ER24575
Sector 4 ER8192 to ER10239 Sector 12 ER24576 to ER26623
Sector 5 ER10240 to ER12287 Sector 13 ER26624 to ER28671
Sector 6 ER12288 to ER14335 Sector 14 ER28672 to ER30719
Sector 7 ER14336 to ER16383 Sector 15 ER30720 to ER32767
2) Do not turn OFF the power while this instruction is being executed. If the power is turned OFF, execution
of this instruction may be aborted. If execution is aborted, the data may be lost.
Be sure to back up the data before executing this instruction.
→ For the backup method, refer to the next page.
3) The FX3UC PLCs of V1.30 or later support the RWER instruction.
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
2. Cautions on writing data to the memory cassette (EEPROM) for the FX3G PLCs
Outline
Memory cassettes adopt EEPROM. Note the following contents when writing data to extension file registers
in a memory cassette with the RWER instruction.
• Do not turn OFF the power while this instruction is being executed. If the power is turned OFF, execution of
this instruction may be aborted. If execution is aborted, the data may be lost.
Be sure to back up the data before executing this instruction. 2
Instruction List
3. About the allowable number of times of writing operations in memory
Note the following when accessing the extension file registers:
• For the FX3U and FX3UC PLCs
The memory cassette (flash memory) allows up to 10,000 times of writing operations.
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is 3
executed. Do not let the number of times of writing operations exceed the allowable number of times of
Instruction
Configuration of
writing operations. When a continuous operation type instruction is executed, writing operation to the
memory occurs for each operation cycle of the PLC. To avoid this, be sure to use pulse operation type
instructions.
The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER 4
instruction, the number of times of writing operations in the memory counts up every time the NITR or
Instructions
Explanation of
How to Read
INITER instruction is executed.
• For the FX3G PLCs
The memory cassette (EEPROM) and PLC's built-in memory (EEPROM) allow up to 10,000 times and
20,000 times of writing operations, respectively. The number of times of writing operations counts up each
time the RWER instruction is executed. Do not let the number of times of writing operations exceed the 5
allowable number of times of writing operations.
Basic Instruction
When a continuous operation type instruction is executed, writing operation to the memory occurs for each
operation cycle of the PLC.
To avoid this, be sure to use pulse operation type instructions.
The number of times of writing operations does not count up when the LOADR instruction is executed.
6
Error
Instructions
Step Ladder
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When the last device number to be transferred exceeds "32767" (Error code: K6706).
At this time, the data up to the last device number of "R32767"*1 is read (transferred).
7
2) When a memory cassette is not connected. (Error code: K6771)*2
Instructions
Applied
3) When the protect switch of the memory cassette is set to ON. (Error code: K6770)
*1. For the FX3G PLCs, the last device number is "23999".
*2. This does not cause an error with the FX3G PLCs because the PLCs read the contents of the
extension file registers stored in the PLC's built-in EEPROM even if a memory cassette is not
connected. 8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
783
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Program example
In the program example shown below, the changed contents of extension registers R10 to R19 (sector 0)
used for setting data are reflected on extension file registers (ER) when X000 turns ON.
Program
[Structured ladder] [ST]
PLS PLS(X000,M0);
X000
EN ENO MOV(M0,D8000,D200);
d M0 ADD(M0,D8000,K47,D8000);
M0 MOV WDT(M0);
EN ENO RWER(M0,R10,K10);
D8000 s d D200
MOV(M0,D200,D8000);
ADD WDT(M0);
EN ENO
D8000 s1 d D8000
K47 *1 s2
WDT
EN ENO
RWER
EN ENO
R10 s
K10 n
MOV
EN ENO
D200 s d D8000
WDT
EN ENO
Operation example
Setting data Setting backup data
Extension registers (R) Extension file registers (ER)
Current Current
Device number value Device number value
R0 K100 ER0 K100
R1 K105 ER1 K105
Setting data (A)
R10 K200 ER10 K200
Changed data
R11 K215 ER11 K215
R12 K400 ER12 K400
Write
(when X000
turns ON.)
R19 K350 ER19 K350
R99 K1000 ER99 K1000
R100 HFFFF ER100 HFFFF
Unused
R2047 HFFFF ER2047 HFFFF
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
7.27.6 INITER
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
This instruction initializes extension file registers (ER) to "HFFFF" (<K-1>) in a memory cassette (flash
memory) before executing the SAVER instruction.
Because the INITER instruction is not supported in FX3UC PLCs earlier than Ver. 1.30, use INITR instruction
instead.
→ For SAVER instruction, refer to Section 7.27.2.
→ For INITR instruction, refer to Section 7.27.3. 3
Instruction
Configuration of
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
EN
INITER
ENO
4
INITER 16 bits Continuous INITER(EN,s,n);
Instructions
Explanation of
How to Read
s
n
INITERP
EN ENO
INITERP 16 bits Pulse
s
INITERP(EN,s,n);
5
n
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition
Device number of extension register sector with the same device number
Bit
6
Instructions
Step Ladder
as the extension file register to be initialized.
Input ANY16
It is possible to specify only the head device in a sector of extension
variable
registers.
Number of sectors of extension registers and extension file registers to be
ANY16
initialized.
Output
variable
ENO Execution state Bit 7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P 8
Function
and Pulse Catch
Interrupt Function
z z
z z
A
and addresses
between devices
Relationships
785
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Function and operation explanation
1. 16-bit operation (INITER/INITERP)
"n" sectors of extension file registers (ER) in a memory cassette (flash memory) with the same device number
as the device specified by are initialized (initial value "HFFFF" (<K-1>) is writen.).
Initialization is executed in sectors.
Command
input INITER
EN ENO
Extension register sector with the same device number s
as the extension file register to be initialized.
Number of sectors of extension registers and n
extension file registers to be initialized.
The table below shows the head device number in each sector.
Head device Head device
Sector number Initialized device range Sector number Initialized device range
number number
Sector 0 R0 ER0 to ER2047 Sector 8 R16384 ER16384 to ER18431
Sector 1 R2048 ER2048 to ER4095 Sector 9 R18432 ER18432 to ER20479
Sector 2 R4096 ER4096 to ER6143 Sector 10 R20480 ER20480 to ER22527
Sector 3 R6144 ER6144 to ER8191 Sector 11 R22528 ER22528 to ER24575
Sector 4 R8192 ER8192 to ER10239 Sector 12 R24576 ER24576 to ER26623
Sector 5 R10240 ER10240 to ER12287 Sector 13 R26624 ER26624 to ER28671
Sector 6 R12288 ER12288 to ER14335 Sector 14 R28672 ER28672 to ER30719
Sector 7 R14336 ER14336 to ER16383 Sector 15 R30720 ER30720 to ER32767
Operation example
1) Extension file registers (ER) [inside the memory cassette]
Current value
Device number Before After
execution execution
H1234 HFFFF
+1 H5678 HFFFF
+2 H90AB HFFFF
...
...
...
+(2048×n)-1 HCDEF HFFFF
786
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
1
Cautions
Outline
1. About 25 ms is required to initialize one sector.
When initializing two or more sectors, take either measure shown below.
1) Set a large value to the watchdog timer D8000 using the following program.
Initial pulse 2
Instruction List
M8002 MOV
EN ENO
K s d D8000
Guideline of the watchdog timer set value
A value acquired by the following procedure can be regarded as the guideline of the watchdog timer set 3
value.
Instruction
Configuration of
If an acquired value is 200 ms or less, however, it is not necessary to change the watchdog timer set value.
a) Write a program to be executed from GX Developer to the PLC.
[Online] → [Write to PLC ...]
b) Set the current value of D8000 (unit: ms) to "1000" using the device test function in GX Developer.
[Online] → [Debug] → [Device test ...] → "Word device / buffer memory" in Device test dialog box 4
c) Set the PLC mode to RUN, and execute the program. (Execute this instruction also.)
Instructions
Explanation of
How to Read
d) Monitor the maximum scan time D8012 (unit: 0.1 ms) using the device batch monitoring function in GX
Developer.
e) Set the watchdog timer to the maximum scan time (D8012) or more.
D8012 stores the maximum scan time in increments of 0.1 ms.
Rough guide to the watchdog timer set value D8000 (unit: ms) is the "value stored in D8012 divided by
10" added by 50 to 100.
5
Basic Instruction
2) Setting WDT instruction just before and after INITER instruction as shown below:
LDP WDT
EN ENO EN ENO
Command s The watchdog timer is reset.
input
INITER
6
Instructions
Step Ladder
EN ENO
*1 s
*1. Device number of the extension registers
*2 n to be initialized
*2. Device number of the extension registers
to be initialized
WDT 7
EN ENO
Instructions
Applied
The watchdog timer is reset.
If the processing time of the INITR instruction exceeds 200 ms, set the value of D8000 (unit: ms) to the
processing time or more.
2. About the allowable number of times of writing operations in memory
8
Function
and Pulse Catch
Interrupt Function
Note the following when accessing the extension file registers:
• The memory cassette (flash memory) allows up to 10,000 times of writing operations.
The number of times of writing operations counts up each time the INITR, RWER or INITER instruction is
executed. Do not let the number of times of writing operations exceed the allowable number of times of
writing operations. When a continuous operation type instruction is executed, writing operation to the
memory occurs for each operation cycle of the PLC. To avoid this, be sure to use pulse operation type
A
and addresses
between devices
Relationships
instructions.
• The number of times of writing operations does not count up when the LOADR, SAVER or LOGR
instruction is executed. However, the SAVER and LOGR instructions require the target write sectors to be
initialized before executing the instructions. Note that, when initializing by using the INITR or INITER
instruction, the number of times of writing operations in the memory counts up every time the NITR or
INITER instruction is executed.
3. The FX3UC PLCs of V1.30 or later support the RWER instruction.
787
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.27 Extension File Register Control
Error
An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is
stored in D8067.
1) When any device number other than the head device number of a sector of extension file registers (ER) is
set to .
(Error code: K6706)
2) When a device number to be initialized exceeds "32767".
In this case, devices up to ER32767 are initialized. (Error code: K6706)
3) When the protect switch of the memory cassette is set to ON. (Error code: K6770)
4) When a memory cassette is not connected. (Error code: K6771)
Program example
In the program example shown below, the extension file registers ER0 to ER2047 in sector 0 are initialized.
[Structured ladder]
LDP WDT
EN ENO EN ENO
X000 s
The watchdog timer
is reset.
INITER
EN ENO
R0 s
K1 n
WDT
EN ENO
The watchdog timer
is reset.
[ST]
IF(LDP(TRUE,X000) THEN WDT(TRUE));
IF(LDP(TRUE,X000) THEN INITER(TRUE,R0,K1));
IF(LDP(TRUE,X000) THEN WDT(TRUE));
1) Extension file registers (ER) [inside the memory cassette]
Current value
Device number Before After
execution execution
ERO H1234 HFFFF
ER1 H5678 HFFFF
ER2 H90AB HFFFF
...
...
...
ER2047 HCDEF HFFFF
788
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
7.28 FX3U-CF-ADP
Outline
7.28.1 FLCRT
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S) 2
Instruction List
Outline
The FLCRT instruction creates a file inside the CompactFlashTM card mounted in the FX3U-CF-ADP. When
executed after creation of a new file, the FLCRT instruction checks the association with the file ID, and
evaluates it.
3
Instruction
Configuration of
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
4
Instructions
Explanation of
How to Read
FLCRT
EN ENO
s1
FLCRT 16 bits Continuous FLCRT(EN,s1,s2,s3,n);
s2
s3
n 5
Basic Instruction
2. Set data
Variable Description Data type
EN Execution condition Bit
File ID (Refer to Detailed explanation of setting data) ANY16 6
Input
Instructions
Step Ladder
File name (Refer to Detailed explanation of setting data) String
variable
File creation parameter (Refer to Detailed explanation of setting data) ANY16(0..3)
Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16
Output
ENO Execution state Bit
variable
7
Instructions
Applied
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
8
z z z z z
Function
and Pulse Catch
Interrupt Function
z z z z
z z z
z z
A
and addresses
between devices
Relationships
789
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
Function and operation explanation
1. 16-bit operation (FLCRT)
Command input FLCRT
EN ENO
File ID s1
File name s2
File creation parameter s3
Used channel number n
1) When the file ID is "K0"
When is "K0", the FLCRT instruction creates a FIFO file.
When the PLC creates two or more files for FIFO file, and executes FIFO (first in, first out) in units of files.
The PLC keeps the latest file, and deletes older files so that the total capacity of FIFO files and other files
does not exceed the specified capacity.
2) When the file ID is "K1" to "K63"
When is "K1" to "K63", the FLCRT instruction creates a file having the specified file name.
Sequence programs use the file ID for specifying a file. Accordingly, each file name saved in the
CompactFlashTM card is associated with the file ID, and controlled by the file ID table.
If a file having the specified file name already exists and is registered in the file ID table, the PLC finishes
the FLCRT instruction without executing any processing.
If a file having the specified name already exists but is not registered in the file ID table, the PLC only
registers the existing file to the file ID table.
790
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
Detailed explanation of setting data
Outline
Details of the setting data in the FLCRT instruction are as shown below.
Setting items Description Data Type
File ID
This ID number is associated with the file name.
The FLCRT instruction creates a file, and associates the file name with the file ID at
the same time. The user should use the file ID for specifying a file after that. Allowable
ANY16 2
Instruction List
setting range : K0 to K63 ("K0" indicates "FIFO file".)
File name
When is "K0 (FIFO file)"
Not used (ignored)
Use an unused device. (D or R)
When is "K1" to "K63"
Specify the file name in up to 8 characters until "null" or "null + null".
String 3
Instruction
Configuration of
Half-width alphanumeric characters and half-width symbols permitted in the MS-DOS
are available.
Half-width symbols : !, #, $, %, &, ', (, ), +, -, @, ^, _, ', [, ], ~
The extension is fixed to "CSV"
Time stamp setting
Set whether or not the time stamp is added to the file. Specify the format when adding
the time stamp. 4
K0 : None (NULL)
Instructions
Explanation of
How to Read
K1 : yyyy/mm/dd hh:mm:ss
K2 : yy/mm/dd hh:mm:ss
K3 : dd/mm/yyyy hh:mm:ss
K4 : dd/mm/yy hh:mm:ss
K5 : mm/dd/yyyy hh:mm:ss
K6 : mm/dd/yy hh:mm:ss
K7 : hh:mm:ss
5
Basic Instruction
Data type
Set the data type to be saved.
K0 : No data type specification (mixed type)
K1 : Bit type
File creation parameter
K2 : Decimal type (16-bit)
+1 K3 : Decimal type (32-bit)
K4 : Hexadecimal type (16-bit)
ANY16(0..3)
6
K5 : Hexadecimal type (32-bit)
Instructions
Step Ladder
K6 : Real numbers(Floating point data) Exponent expression type (32-bit)
K7 : Character string
Maximum number of lines
+2 Set the maximum number of lines.
Allowable setting range : K1 to K32767*1
When is "K0 (FIFO file)" 7
Set the CompactFlashTM card use ratio.
Instructions
Applied
Specify the ratio (%) out of the whole CompactFlashTM card capacity to be used.
Allowable setting range : 10 to 90 (%)
When is "K1" to "K63"
+3
File processing to be executed when the specified maximum number of lines is
reached.
Set the file processing method to be executed when the number of lines reaches the 8
specified maximum value.
Function
and Pulse Catch
Interrupt Function
K0 : Stops execution. (The line position remains the specified maximum line position.)
K1 : Returns to the head (ring buffer file).
Channel number used by the CF-ADP
K1 : ch1 ANY16
K2 : ch2
*1. Adjust the maximum number of lines to specify the file size available in the used application software
A
and addresses
between devices
Relationships
used.
For the file size calculation formula, refer to FX3U-CF-ADP User's Manual
791
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
Cautions
1) When the file ID is "K0"
a) The CF-ADP can create up to 1000 files (within the CompactFlashTM card capacity).
b) The file name is set to "FILE0000.CSV" to "FILE0999.CSV".
2) When the file ID is "K1" to "K63"
a) The user can create up to 63 files (within the CompactFlashTM card capacity).
b) The FLCRT instruction is completed abnormally if different file names are specified for the same file ID
or if the same file name is specified for different file IDs.
3) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
792
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
7.28.2 FLDEL
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
The FLDEL instruction deletes files stored in the CompactFlash TM card, or formats the CompactFlashTM
card.
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
3
Operation
Instruction
Configuration of
name form Structured ladder ST
FLDEL
EN ENO
FLDEL 16 bits Continuous s1 FLDEL(EN,s1,s2,n);
s2 4
n
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition
File ID (Refer to Detailed explanation of setting data)
Bit
ANY16
5
Input
Basic Instruction
variable File delete method (Refer to Detailed explanation of setting data) ANY16
Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
6
Instructions
Step Ladder
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z 7
Instructions
Applied
z z z z z
z z
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
793
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
Function and operation explanation
1. 16-bit operation (FLDEL)
Command input FLDEL
EN ENO
File ID s1
File delete method s2
Used channel number n
The FLDEL instruction deletes files stored in the CompactFlashTM card, or formats the CompactFlashTM card
in the following method.
1) Specify file deletion or file formatting using .
a) When is "K-1 (H0FFFF)", the FLDEL instruction deletes all files whose ID is 0 to 63.
b) When is "K0" to "K63", the FLDEL instruction deletes the file associated with the specified file ID.
c) When is "K512 (H200)", the FLDEL instruction formats the CompactFlashTM card.
2) Specify the file deletion method or format type using .
a) When is "K-1 (H0FFFF)" or "K0" to "K63", specify the deletion method
K0: The FLDEL instruction deletes the specified file.
K1: The FLDEL instruction deletes the association between the file name and the file ID (, but does
not delete the file itself).
However, when the file ID specified in is "0", the FLDEL instruction deletes the file without regard
to the setting of .
b) When is "K512 (H200)", specify the format type.
k256(H100) : The FLDEL instruction formats the CompactFlashTM card in FAT16 format.
For details, refer to Detailed explanation of setting data.
Detailed explanation of setting data
Details of the setting data in the FLDEL instruction are as shown below.
Setting items Description Data Type
File ID
K-1(H0FFFF) : The FLDEL instruction deletes all files.
ANY16
K0 to K63 : The FLDEL instruction deletes a file associated with the specified file ID.
K512(H200) : The FLDEL instruction formats the CompactFlashTM card.
When is "K-1 (H0FFFF)" or "K0" to "K63"
Specify the deletion method.
K0 : The FLDEL instruction deletes the specified file.
K1 : The FLDEL instruction deletes the association between the file name and the file ID
(but does not delete the file itself).
However, when the file ID specified in is "0", the FLDEL instruction deletes the file ANY16
itself without regard to the setting of .
When is "K512 (H200)"
Specify the format type.
K256(H100) : The FLDEL instruction formats the CompactFlashTM card in the FAT16
format.
Channel number used by the CF-ADP
K1 : ch1 ANY16
K2 : ch2
Cautions
1) When the file ID "K0 (FIFO file)" or "K-1 (all files)" is specified, it may take approximately 1 minute to
delete the files depending on the number of stored files.
2) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
794
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
7.28.3 FLWR
Outline
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline 2
Instruction List
The FLWR instruction writes data to the CompactFlashTM card or to the buffer inside the FX3U-CF-ADP.
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction
name
Operation
Execution
form Structured ladder
Expression in each language
ST
3
Instruction
Configuration of
FLWR
EN ENO
s1 d
FLWR 16 bits Continuous FLWR(EN,s1,s2,s3,n,d);
s2
s3 4
n
Instructions
Explanation of
How to Read
2. Set data
Variable Description Data type
EN Execution condition Bit
5
File ID (Refer to Detailed explanation of setting data) ANY16
Basic Instruction
Input Head of devices which store data to be written (Refer to Detailed
ANY_SIMPLE
variable explanation of setting data)
Data write parameter (Refer to Detailed explanation of setting data) ANY16(0..4)
Position after data writing (Refer to Detailed explanation of setting data) ANY16
Output ENO Execution state Bit 6
Instructions
Step Ladder
variable Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16(0..1)
3. Applicable devices
Bit Devices Word Devices Others
Operand
type
System user Digit specification
System
user
Special
unit
Index
Cons Real
tant Number
Character
String
Pointer 7
Instructions
Applied
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
zzz z z z z z z
z z z
z z z 8
Function
and Pulse Catch
Interrupt Function
z z
A
and addresses
between devices
Relationships
795
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
Function and operation explanation
1. 16-bit operation (FLWR)
Command input FLWR
EN ENO
File ID s1 d Position after data writing
Head of devices which s2
store data to be written
Data write parameter s3
Used channel number n
The FLWR instruction writes data specified by the device to a file stored in the CompactFlashTM card
specified by the file ID or to the buffer inside the CF-ADP. The FLWR instruction can overwrite data in the line
position specified by the device +1, and can write additional data (K-1). When the writing destination is
the buffer inside the CF-ADP, the FLWR instruction can only execute additional writing. When writing is
completed, the line position and column position after writing are as follows.
• When data in 1 line is written additionally
- Line position after writing : Written line position + K1
- Column position after writing : K1
• When a line having existing data is overwritten
- Line position after writing :
Written line position if data is not written to the final column position of the specified the line position
Line position next to the written line position if data is written to the final column position of the line
- Column position after writing:
Column position next to the final written data point K1 if data is written to the final data point in the line
"K1" if data is written to the final data point in the line
Both additional writing and overwriting are executed to the maximum number of lines specified during file
creation. If data is written up to the final column position, the line position after writing varies depending on the
file type and setting.
• When the processing is stopped by the maximum line position in a normal file
Line position after writing = Maximum line position + K1
K-32768 when the maximum line position is "K32767"
• In the case of a normal file in which processing returns to the head of the file from the end of the file (ring
buffer file)
Line position after writing = K1
• In the case of FIFO file
Line position after writing = K1
In either case, the column position after writing is "K1".
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FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
Detailed explanation of setting data
Outline
Details of the setting data in the FLWR instruction are as shown below.
Setting items Description Data Type
File ID
ANY16
K0 to K63
Head of devices which store data to be written. 2
Specify the head of devices which store the data to be written to the CompactFlashTM ANY_SIMPLE
Instruction List
card.
Specify the data writing type
K0 : Mixed type
K1 : Bit type
K2 : Decimal type (16-bit)
K3 : Decimal type (32-bit)
K4 : Hexadecimal type (16-bit) 3
K5 : Hexadecimal type (32-bit)
Instruction
Configuration of
K6 : Real numbers(Floating point data) Exponent expression type (32-bit)
Data write parameter
K7 : Character string (512 half-width/full-width characters maximum)
K8 : Data name :Character string consisting of up to 32 half-width/full-width
characters. Index, DATE TIME are added automatically.
Specify the line position of the writing destination, or specify additional writing. ANY16(0..4)
+1 Line position of the writing destination : K1 to specified maximum number of lines
Additional writing : K-1
4
Instructions
Explanation of
How to Read
Specify the data column position in the writing destination.
+2 Column position : K1 to K254
Additional writing : K-1
Number of written data points
+3 K1 to K254
+4
Writing destination
K0 : CompactFlashTM card
5
Basic Instruction
K1 : Buffer inside the CF-ADP
Line position after writing
K1 to specified maximum number of lines
ANY16(0..1)
Column position after writing
+1 K1 to K254
Channel number used by the CF-ADP
K1 : ch1 ANY16 6
K2 : ch2
Instructions
Step Ladder
Cautions
1) The FLWR instruction is completed abnormally if a CompactFlashTM card is not mounted.
2) The user should pay close attention to the number of times data is written when the writing destination is 7
set to the CompactFlashTM card because data is written every time the FLWR instruction is executed.
Instructions
Applied
For example, if data is written to the CompactFlashTM card every one minute, data is written 100,000
times in approximately 2 months.
3) Even if the writing destination is set to the buffer inside the CF-ADP, data is written to the
CompactFlashTM card in the case of overwriting.
8
4) The FLWR instruction writes data to the CompactFlashTM card after the internal buffer inside the CF-ADP
Function
and Pulse Catch
Interrupt Function
becomes full when the writing destination is set to the buffer. Data stored in the internal buffer inside the
CF-ADP is erased when a (instantaneous or long) power interruption occurs.
5) When the data type is a data name (K8), the user can specify only the head line position before writing
other data. Index and DATE TIME are added automatically.
6) The FLWR instruction may require several scans to acquire data. Take proper measures such as saving A
acquired data in another device if data consistency is required.
and addresses
between devices
Relationships
7) It is necessary to set the device number in multiples of 16 when a bit device is specified in and the
data type is set to anything other than bit type. When a word device is specified in and the data type
is set to bit, the FLWR instruction acquires data to be written from the least significant bit of the specified
device.
8) When is "K7" or "K8", 00H, which indicates the end of the string, must be added to the end of the
character string.
9) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
797
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
7.28.4 FLRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The FLRD instruction reads data from the CompactFlashTM card.
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FLRD
EN ENO
FLRD 16 bits Continuous s1 d1 FLRD(EN,s1,s2,n,d1,d2);
s2 d2
n
2. Set data
Variable Description Data type
EN Execution condition Bit
File ID (Refer to Detailed explanation of setting data) ANY16
Input
variable Data read parameter (Refer to Detailed explanation of setting data) ANY16(0..3)
Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16
ENO Execution state Bit
Output Device which stores the read data (Refer to Detailed explanation of setting
ANY_SIMPLE
variable data)
Number of data points existing in the specified line ANY16
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z
zz z z z z
z z z
z z
Function and operation explanation
1. 16-bit operation (FLRD)
Command input FLRD
EN ENO
File ID s1 d1 Device which stores the read data
Data read parameter s2 d2 Number of data points existing in the specified line
Used channel number n
The FLRD instruction reads corresponding number of data from the position determined by the line position
and column position in the file specified by the file ID, and stores the read data to a device specified in .
When reading data from a file in which only the same type of data exists in one line, refer to FX3U-CF-ADP
User's Manual.
When reading data from a file in which different types of data exist in one line, refer to FX3U-CF-ADP User's
Manual.
798
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
Detailed explanation of setting data
Outline
Details of the setting data in the FLRD instruction are as shown below.
Setting items Description Data Type
File ID
ANY16
K0 to K63
Specify the data reading type 2
K0 : Mixed type
Instruction List
K1 : Bit type
K2 : Decimal type (16-bit)
K3 : Decimal type (32-bit)
Data read parameter
K4 : Hexadecimal type (16-bit)
K5 : Hexadecimal type (32-bit)
K6 : Real numbers(Floating point data) Exponent expression type
K7 : Character string (512 half-width/full-width characters maximum)
ANY16(0..3)
3
Instruction
Configuration of
Specify the line position from which data is read.
+1 Line position : K1 to specified maximum number of lines
Specify the column position from which data is read.
+2 Column position : K1 to K254
Read points
+3 K1 to K254
Device which stores the read data
4
ANY_SIMPLE
Instructions
Explanation of
How to Read
Specify the head of devices which store the data read from the CompactFlashTM card.
Number of data points existing in the specified line
K1 to K254 ANY16
K0 : No data
Channel number used by the CF-ADP
K1 : ch1
K2 : ch2
ANY16
5
Basic Instruction
Cautions
1) The FLRD instruction is completed abnormally if a CompactFlashTM card is not mounted.
2) The FLRD instruction may require several scans to acquire data. Use the acquired data only after
confirming completion of the FLRD instruction if data consistency is required. 6
Instructions
Step Ladder
3) It is necessary to set the device number in a multiple of 16 when a bit device is specified in and the
read data type is anything other than bit. When a word device is specified in and the read data type
is bit, the FLRD instruction stores data read from the least significant bit of the specified word device.
4) When the data type is anything other than character string and the number of devices which store the
read data is insufficient, the FLRD instruction does not read data from the CF-ADP. An error occurs. 7
5) When the data type is a character string, the character string length is unknown. The PLC stores as much
Instructions
Applied
read data as possible. When reading is not completed even after the final device is reached, an error
occurs.
6) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
799
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
7.28.5 FLCMD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The FLCMD instruction gives instruction for operation to the FX3U-CF-ADP.
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FLCMD
EN ENO
FLCMD 16 bits Continuous FLCMD(EN,s,n);
s
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Instruction for operation (Refer to Detailed explanation of setting data) ANY16
variable
Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16
Output
ENO Execution state Bit
variable
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z
Function and operation explanation
1. 16-bit operation (FLCMD)
Command input FLCMD
EN ENO
Instruction for operation s
Used channel number n
The FLCMD instruction gives instruction for operation to the CF-ADP.
The contents of instruction are as follows.
1) When is "K-1", the FLCMD instruction forcibly writes all buffered data (stored in the buffer inside the
CF-ADP) to the CompactFlashTM card.
2) When is "K0" to "K63", the FLCMD instruction forcibly writes the buffered data of the specified file ID
(stored in the buffer inside the CF-ADP) to the CompactFlashTM card.
3) When is "K256 (H100)", the FLCMD instruction sets the CompactFlashTM card to the mounted
status if it is in the unmounted status.
4) When is "K512 (H200)", the FLCMD instruction sets the CompactFlashTM card to the unmounted
status if it is in the mounted status.
5) When is "K1280 (H500)", the FLCMD instruction clears error codes stored in the CF-ADP.
For details, refer to Detailed explanation of setting data.
800
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
Detailed explanation of setting data
Outline
Details of the setting data in the FLCMD instruction are as shown below.
Setting items Description Data Type
Contents of instruction for operation
K-1 : Forcibly writes all buffered data to the CompactFlashTM card.
K0 to K63 : Forcibly writes the buffered data of the specified file ID to the CompactFlashTM 2
card. ANY16
Instruction List
K256(H100) : Sets the CompactFlashTM card to the mounted status*1.
K512(H200) : Sets the CompactFlashTM card to the unmounted status*2.
K1280(H500) : Clears error codes stored in the CF-ADP.
Channel number used by the CF-ADP
K1 : ch1
K2 : ch2
ANY16
3
Instruction
Configuration of
*1. The CompactFlashTM card is available in the "mounted" status.
*2. The CompactFlashTM card is unavailable in the "unmounted" status.
Caution
4
1) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
Instructions
Explanation of
How to Read
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
801
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
7.28.6 FLSTRD
FX3U(C) FX3G FX2N(C) FX1N(C) FX1S FXU/FX2C FX0N FX0(S)
Outline
The FLSTRD instruction reads the status (including the error information and file information) of the FX3U-
CFADP.
→ As for explanation of the instruction, see the FX3U-CF-ADP User's Manual.
1. Format and operation, execution form
Instruction Execution Expression in each language
Operation
name form Structured ladder ST
FLSTRD
EN ENO
FLSTRD 16 bits Continuous FLSTRD(EN,s,d,n);
s d
n
2. Set data
Variable Description Data type
EN Execution condition Bit
Input Contents of status to be read (Refer to Detailed explanation of setting
ANY16
variable data)
Used channel number [contents of setting : K1 = ch1, K2 = ch2] ANY16
ENO Execution state Bit
Output
variable Head device to which the read status is written (Refer to Detailed
ANY16
explanation of setting data)
3. Applicable devices
Bit Devices Word Devices Others
Operand System Special Cons Real Character
System user Digit specification Index Pointer
type user unit tant Number String
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V Z Modifier K H E "
" P
z z z z z
z z z
z z
Function and operation explanation
1. 16-bit operation (FLSTRD)
Command input FLSTRD
EN ENO
Contents of status to be read s d Head device to which the
Used channel number n read status is written
The FLSTRD instruction reads the status information of the CF-ADP. The following contents can be read.
The number of data stored in varies depending on the contents of the read status.
1) When is "K0" to "K63" the FLSTRD instruction reads the final line number and final column position
of each file.
2) When is "K256 (H100)" the FLSTRD instruction reads file IDs stored in the CompactFlashTM card.
3) When is "K512 (H200)" the FLSTRD instruction reads the data capacity.
4) When is "K768 (H300)" the FLSTRD instruction reads the version information of the CF-ADP.
5) When is "K1024 (H400)" the FLSTRD instruction reads the error information (error flag) for errors
having occurred in the CF-ADP.
6) When is "K1280 (H500)" the FLSTRD instruction reads error codes and error code details. Up to 5
of the latest error codes and error code details can be stored.
For details, refer to Detailed explanation of setting data.
802
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
1
Detailed explanation of setting data
Outline
Details of the setting data in the FLSTRD instruction are as shown below.
Setting items Description Data Type
Contents of status to be read
K0 to K63 : Final line position of each file
K256(H100) : File IDs stored in the CompactFlashTM card 2
K512(H200) : Capacity of the CompactFlashTM card ANY16
Instruction List
K768(H300) : Version of the CF-ADP
K1024(H400) : Error information (error flag)
K1280(H500) : Error codes
Head device to which the read status is written
The number of data points stored in varies depending on the contents of the read ANY16
status. 3
Channel number used by the CF-ADP
Instruction
Configuration of
K1 : ch1 ANY16
K2 : ch2
• When is "K0" to "K63"
The FLSTRD instruction reads the final line position and final column position of each file.
Setting items Description
4
Instructions
Explanation of
How to Read
Final line position
K1 to the specified maximum line position
+1 Final column position
• When is "K256 (H100)"
The FLSTRD instruction reads file IDs stored in the CompactFlashTM card. For a file ID corresponding to 5
the read data, refer to the file ID correspondence table shown below.
Basic Instruction
When a file exists, a bit corresponding to the file ID turns ON.
Setting items Description
+1
Stores the existence of file IDs. 6
+2
Instructions
Step Ladder
+3
File ID correspondence table
Setting
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
items
7
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Instructions
Applied
+1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
+2 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
+3 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
• When is "K512 (H200)" 8
Function
and Pulse Catch
Interrupt Function
The FLSTRD instruction reads the data capacity, used space and free space of the CompactFlashTM card
to the following devices respectively.
Setting items Description
Data capacity of the CompactFlashTM card
+1,
(kB) Units, If the data capacity is less than 1 kB, "1" is stored.
Used space of the CompactFlashTM card
A
and addresses
between devices
Relationships
+3, +2
(kB) Units, If the data size is less than 1 kB, "1" is stored.
Free space of the CompactFlashTM card
+5, +4
(kB) Units, If the data size is less than 1 kB, "1" is stored.
• When is "K768 (H300)"
The FLSTRD instruction reads the version information of the CF-ADP.
Setting items Description
Stores the version of CF-ADP.
(Example) K100 = Ver.1.00
803
FXCPU Structured Programming Manual 7 Applied Instructions
(Basic & Applied Instruction) 7.28 FX3U-CF-ADP
• When is "K1024 (H400)"
The FLSTRD instruction reads the error information (error flag).
Setting items Description
Error detection signal
b0 : The CompactFlashTM card is not mounted.
b1 : The CompactFlashTM card is full.
b2 : An error has occurred in the CF-ADP.
b3 : CF-ADP H/W error
b4 : CompactFlashTM card error
b5 to b15 : Not used
• When is "K1280 (H500)"
The FLSTRD instruction reads the error code and error code details for errors having occurred in the CF-
ADP. Up to 5 of the latest error codes and error code details can be stored.
Setting items Description
Error code 1
+1 Error code details 1
+2 Error code 2
+3 Error code details 2
+4 Error code 3
+5 Error code details 3
+6 Error code 4
+7 Error code details 4
+8 Error code 5
+9 Error code details 5
Caution
1) The FX3U and FX3UC PLCs supports the instruction at V2.61 or later.
The FX3UC-32MT-LT-2 PLC is due to be upgraded later.
804
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.1 Outline
Outline
8. Interrupt Function and Pulse Catch Function
This chapter explains the built-in interrupt function and pulse catch function in FX PLCs. 2
The input, special devices and timers in the explanations relate to the FX3U and FX3UC PLCs. Note that these
Instruction List
differ from one model of PLC to another.
→ FX Structured Programming Manual (Device & Common)
8.1 Outline
3
Instruction
Configuration of
This section explains the function to immediately execute an interrupt program (interrupt routine) without
being affected by the operation cycle of the sequence program (main) while using an interrupt function as a
trigger.
The delay by operation cycle and machine operation affected by uneven time intervals in normal sequence
program process can be improved.
4
1. Input interrupt function (interrupt of external signal input (X))
Instructions
Explanation of
How to Read
By the input signal from an input (X000 to X005), the normal sequence program is paused, and an interrupt
routine program is executed with priority.
The input interrupt execution timing can be specified on the rising edge or falling edge of the signal by the
pointer number.
→ For details, refer to Section 8.3.
5
2. Input interrupt delay function (interrupt of external signal input (X))
Basic Instruction
By the input signal from an input (X000 to X005), the normal sequence program is paused, and an interrupt
routine program is executed with priority after the delay time (set in units of 1 ms).
The input interrupt execution timing can be specified on the rising edge or falling edge of the signal by the
pointer number.
→ For details, refer to Section 8.4. 6
Instructions
Step Ladder
3. Timer interrupt function (timer interrupt activated in a constant cycle)
The normal sequence program is paused in a constant cycle of 10 to 99 ms, and an interrupt routine program
is executed with priority.
→ For details, refer to Section 8.5.
4. High speed counter interrupt function (interrupt function given at counting up) 7
When the current value of a high speed counter reaches a specified value, the normal sequence program is
Instructions
Applied
paused and an interrupt routine program is executed with priority.
→ For details, refer to Section 8.6.
5. Pulse catch function
When the input signal from an input (X000 to X007) turns ON from OFF, a special auxiliary relay ;M8170 to
M8177 is set in the interrupt processing. By a relay M8170 to M8177 in a normal sequence program, a signal
8
Function
and Pulse Catch
Interrupt Function
that remains ON longer than the receivable range with regular input processing can be easily received.
When processing such a signal that turns ON and OFF several times in one operation cycle, however, use
the input interrupt function.
→ For details, refer to Section 8.7.
A
and addresses
between devices
Relationships
805
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.2 Common items
8.2 Common items
8.2.1 Interrupt function
Three types of interrupt, namely, input interrupt, timer interrupt and counter interrupt, are available.
Observe the following in creating an interrupt program.
1) Create a task for interrupt and main program.
2) Set an interrupt pointer in the event box for the interrupt program.
For the interrupt pointers set in the event box, refer to their respective explanations.
3) The IRET instruction does not need to be programmed because, at the time of compilation, it is
automatically added to the end of the program registered for the interrupt program task.
806
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.2 Common items
1
8.2.2 How to disable interrupt function and pulse catch function
Outline
This section describes how to disable the interrupt function and pulse catch function.
1. Limiting the program interrupt range [interrupt function and pulse catch function]
1) Programming method 2
Program the DI instruction to set the interrupt disabled zone.
Instruction List
Even if an interrupt is generated between the DI instruction and EI instruction (interrupt disabled zone),
the interrupt is executed after the EI instruction.
2) Program example
EN
EI
EO
3
Instruction
Configuration of
Interrupts are
enabled.
EN
DI
EO
4
Instructions
Explanation of
How to Read
Interrupts are
disabled.
EN
FEND
EO
5
Basic Instruction
3) Cautions
a) The interrupt inputs with special auxiliary relay for interrupt disable (M8050 to M8059) turned ON are
excluded. 6
This special auxiliary relay is not available for pulse catch function.
Instructions
Step Ladder
b) When the disabled zone is long, interrupts are accepted, but the interrupt processing is started after
considerable time.
When the interrupt disabling setting is not required, program only EI instruction. It is not always
necessary to program DI instruction.
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
807
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.2 Common items
2. Disabling interrupt pointers (for each interrupt routine) [interrupt function]
1) Programming method
The special auxiliary relays M8050 to M8059 for disabling interrupt are provided.
While an interrupt disable flag (M8050 to M8059) is ON, a corresponding interrupt program is not
executed even if the interrupt disable flag is set to OFF after a corresponding interrupt is generated.
The input interrupts X000 to X005 correspond to M8050 to M8055*1 respectively. When a relay
Input interrupt
M8050 to M8055 turns ON, a corresponding input interrupt is disabled.
The timer interrupts 16 to 18 correspond to M8056 to M8058*1 respectively. When a relay
Timer interrupt
M8056 to M8058 turns ON, a corresponding timer interrupt is disabled.
High speed counter interrupt When M8059*1 turns ON, all of the high speed counter interrupts 1010 to 1060 are disabled.
*1. Cleared when the PLC mode is changed from RUN to STOP.
2) Program example
In the program example shown below, when M8053 is set to ON by M20, the interrupt input I301 triggered
by X003 is disabled.
[Main program]
EI
EN ENO
M20
M8053 Interrupts
Command to disable an are enabled.
interrupt triggered by X003
FEND
EN ENO
[Interrupt program] When the rising edge
(Event: I301) of X003 is detected
Interrupt
routine
8.2.3 Related items
1. Using the I/O refresh function (REF instruction)
When controlling an input relay or output relay in an interrupt program, the I/O refresh instruction REF can be
used to acquire the latest input information and immediately output the operation result. As a result, high
speed control is achieved without being affected by the operation cycle of the PLC.
2. Interrupt operation while FROM/TO instruction is executed.
The interrupt operation is executed as follows depending on the ON/OFF status of the
special auxiliary relay M8028.
1) While M8028 is OFF
While FROM/TO instructions are being executed, interrupts are automatically disabled. Input interrupts
and timer interrupts are not executed.
Interrupts generated during this period are immediately executed when the execution of FROM/TO
instructions are completed.
FROM/TO instruction can be used in an interrupt program when M8028 is OFF.
2) While M8028 is ON
When an interrupt is generated while FROM/TO instruction is being executed, execution of the FROM/TO
instruction is paused and the interrupt program is executed.
FROM/TO instructions cannot be used in an interrupt routine program when M8028 is ON.
808
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.2 Common items
1
8.2.4 Cautions on use (common)
Outline
This section explains common cautions on using the interrupt function or pulse catch function.
Specific cautions on each interrupt function are explained in the description of each interrupt function.
1. Processing when many interrupts are generated
When many interrupts are generated in turn, priority is given to the first one. When many interrupts are
2
Instruction List
generated at the same time, priority is given to the one having the smallest pointer number.
While an interrupt routine is being executed, other interrupts are disabled.
2. When double interrupt (interrupt during another interrupt) is required [interrupt function]
Usually, interrupts are disabled in an interrupt routine (program). When EI and DI instructions are
programmed in an interrupt routine, up to two interrupts can be accepted. 3
The FX3G, FX1S, FX1N or FX1NC PLC does not support this function.
Instruction
Configuration of
3. Operation when a timer is used [interrupt function]
Note that counting using a general timer is disabled, even a 1 ms retentive type timer.
In an interrupt routine, use timers for routine program T192 to T199*1.
*1. The FX0, FX0S, FX0N, FX1S, FX1N or FX1NC PLC does not support the timers for routine programs. 4
Instructions
Explanation of
How to Read
4. Non-overlap of input [input interrupt (with or without delay function) and pulse catch
function]
The inputs X000 to X007 can be used for high speed counters, input interrupts, pulse catch, SPD, ZRN,
DSZR and DVIT instructions and for general purpose inputs. Make sure that input terminals do not overlap
with each other.
5
5. Operation of devices latched in the ON status [interrupt function]
Basic Instruction
Devices which were set to ON in an interrupt routine are held in the ON status even after the interrupt routine
is finished. When RST instruction for a timer or counter is executed, the reset status of the timer or counter is
also held.
To turn OFF a device held in the ON status or for canceling such a timer or counter held in the reset status,
reset such a device or deactivate RST instruction respectively inside or outside routine. 6
Instructions
Step Ladder
Example in which outputs are latched
In the program example shown below, the counter C0 is provided to count X001. When X000 turns ON from
OFF, the interrupt program I001 is executed only in one scan, and then the counter C0 is reset and Y007 is
output.
1) Program example
7
Instructions
Applied
[Main program]
EI
EN ENO
8
X001 OUT_C
EN ENO
CCoil
Function
and Pulse Catch
Interrupt Function
CC0
K10 CValue
FEND
EN ENO
[Interrupt program]
(Event: I001)
A
and addresses
between devices
Relationships
M8000 RST
EN ENO
d CC0
Y007
809
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.2 Common items
2) Timing chart
Execution of interrupt Interrupt program
program I001
triggered by X000
X001
Counter Because the C0 reset instruction
3 is reset. is valid, the current value of C0
Current value 2 remains unchanged even if
of C0 1 pulses are input.
RST
C0 C0 remains reset.
Y007 Y007 is being output.
Outputs are latched.
Example in which latched outputs are reset (countermeasures)
1) Program example
[Main program]
EI
EN ENO
X001 OUT_C
EN ENO
CC0 CCoil
K10 CValue
X002 RST Program to reset Y007 at an arbitrary time.
EN ENO
d Y007
FEND
EN ENO
[Interrupt program]
(Event: I001)
M8000 RST
EN ENO A
d CC0
B
M8001 RST
EN ENO
RUN monitor Program to deactivate the preceding C0
d CC0
(normally OFF) RST instruction inside the subroutine.
Y007
2) Timing chart
Execution of interrupt Interrupt program
program I001
triggered by X000
X001
3 4
Current value 3
2 2
of C0 1 1
Counter is reset. Counter reset instruction is deactivated
RST (part A in above (part B in above program).
C0 program)
Y007
X002 Y007 is reset
810
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
1
8.3 Input Interrupt (Interrupt Triggered by External Signal) [Without Delay
Outline
Function]
8.3.1 Input Interrupt (Interrupt Triggered by External Signal) [Without Delay Function]
2
Instruction List
1. Outline
An interrupt routine is executed by the input signal from an input X000 to X005.
2. Application
Because the external input signal can be processed without being affected by the operation cycle of the PLC,
this interrupt is suitable to high speed control and receiving of short pulses.
3
Instruction
Configuration of
3. Basic program (programming procedure)
[Main program]
EI Main program
EN ENO
Interrupts are enabled. Interrupt inputs are accepted after EI instruction.
It is not necessary to program DI (disable interrupt)
4
Instructions
Explanation of
How to Read
instruction if there is no zone where input interrupts
should be disabled.
Main program
[Interrupt program]
(Event: I001)
FEND instruction finishes the main program.
5
FEND
Basic Instruction
EN ENO
[Interrupt program] When the rising edge of X000 is detected
(Event: I001)
When X000 turns ON, its rising edge is detected, 6
Interrupt routine 1) and the interrupt routine 1) is executed.
Instructions
Step Ladder
(Interrupt program) The program execution returns to the main program
after executing routine 1).
[Interrupt program] When the falling edge of X001 is detected
(Event: I100)
7
Instructions
Applied
When X001 turns OFF, its falling edge is detected,
Interrupt subroutine 2) and the interrupt routine 2) is executed.
(Interrupt program) The program execution returns to the main program
after executing routine 2).
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
811
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
4. Number and operation of (six) interrupt pointers
I 0
0:Interrupt at falling edge 1:Interrupt at rising edge
0 to 5 according to the inputs X000 to X005
Pointer number
Input number*1 Interrupt disable command
Interrupt at rising edge Interrupt at falling edge
X000 I001 I000 M8050*2
X001 I101 I100 M8051*2
X002 I201 I200 M8052*2
X003 I301 I300 M8053*2
X004 I401 I400 M8054*2
X005 I501 I500 M8055*2
*1. The input numbers differ from one type of PLC to another.
FX0, FX0S and FX0N PLCs: supports X000 to X003 only.
*2. Cleared when the PLC mode is changed from RUN to STOP.
5. How to disable each interrupt input
When either one among M8050 to M8055 is set to ON in a program, interrupts from the corresponding input
number are disabled.
(Refer to the above table for the correspondence.)
6. Cautions
1) Do not use an input two or more times.
Make sure that an input relay number used as an interrupt pointer is not used in high speed counters,
pulse catch functions and pulse density instructions which use the same input range.
2) Automatic adjustment of the input filter
When an input interrupt pointer I
0
is specified, the input filter of the input relay is automatically
changed to the input filter for high speed receiving.
Accordingly, it is not necessary to change the filter value using REFF instruction or special data register
D8020 (input filter adjustment).
The input filter of an input relay not being used as an input interrupt pointer operates at 10 ms (initial
value).
3) Pulse width of input interrupt
For executing input interrupt by an external signal, it is necessary to input the ON or OFF signal having
the duration shown in the table below or more.
For the FX3U, FX3UC and FX3G PLCs
PLC Input number Input filter value when "0" is set
FX3U, FX3UC X000 to X005 5μs*1
X000, X001, X003, X004 10μs
FX3G
X002, X005 50μs
*1. When using the input filter at the filter value of 5 μs or when receiving a pulse whose response
frequency is 50 k to 100 kHz using a high speed counter, perform the following.
- Make sure that the wiring length is 5 m or less.
- Connect a bleeder resistor of 1.5 Ω (1 W or more) to an input terminal, and make sure that the load
current of the open collector transistor output in the counterpart equipment is 20 mA or more
including the input current in the main unit.
812
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
1
For the FX1S, FX1N, FX2N, FX1NC and FX2NC PLCs
Outline
PLC Input number Pulse width
X000, X001 10μs
FX1S, FX1N, FX1NC
X002 to X005 50μs
X000, X001 20μs
FX2N, FX2NC
X002 to X005 50μs 2
Instruction List
For the FX0, FX0S, FX0N, FXU and FX2C PLCs
PLC Input number Pulse width
FX0, FX0S, FX0N X000 to X003 100μs
FXU, FX2C X000 to X005 200μs
3
Instruction
Configuration of
4) Using a pointer number two or more times
It is not possible to program an interrupt at the rising edge and an interrupt at the falling edge for an input
such as I001 or I000.
Instructions
Explanation of
How to Read
5
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
813
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
7. Program example
1) When using both an external input interrupt at the rising edge and the output refresh (REF instruction)
In the program example shown below, the output Y000 immediately turns ON when the rising edge of the
external input X000 is detected.
[Main program]
EI Interrupts are enabled by EI instruction.
EN ENO The main program is described.
FEND The main program is finished by FEND instruction.
EN ENO
[Interrupt program] When the rising edge
(Event: I001) of X000 is detected
When an interrupt routine is executed by turning
M8000 SET ON of X000, Y000 is reset unconditionally.
EN ENO
RUN d Y000
monitor The outputs Y000 to Y007 are overwritten with the
REF latest information by the output refresh instruction.
EN ENO If the output refresh instruction is not provided, Y000
Y000 d turns ON after END instruction after the program
execution returned to the main routine.
K8 *1 n
If "SET Y000" is changed to "RST Y000", Y000 is
immediately set to OFF by turning ON of X000.
*1. Be sure to specify a multiple of "8" for the number of inputs/outputs to be refreshed by REF instruction.
If any value other than a multiple of "8" is specified, an operation error occurs and REF instruction is
not executed.
2) When using both an input interrupt and the input refresh (REF instruction)
In the program example shown below, an interrupt is executed using the latest input information.
[Main program]
EI Interrupts are enabled by EI instruction.
EN ENO The main program is described.
FEND The main program is finished by FEND instruction.
EN ENO
[Interrupt program] When the rising edge
(Event: I101) of X001 is detected
REF When an interrupt routine is executed by turning X001
M8000
EN ENO to ON, the input refresh is executed unconditionally,
RUN and the ON/OFF information of X010 to X017 at the
X010 d
monitor current time is received.
K8 *1 n
SET Y001 is set to ON or OFF according to the ON/OFF
X010
EN ENO status of X010.
d Y001
X010 RST
EN ENO
d Y001
*1. Be sure to specify a multiple of "8" for the number of inputs/outputs to be refreshed by REF instruction.
If any value other than a multiple of "8" is specified, an operation error occurs and REF instruction is
not executed.
814
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
1
3) When counting the number of times of input generation (in the same way as single phase high speed
Outline
counter)
In the program example shown below, external inputs are counted.
[Main program]
EN
EI
ENO
Interrupts are enabled by EI instruction.
The main program is described.
2
Instruction List
FEND The main program is finished by FEND instruction.
EN ENO
[Interrupt program] When the rising edge
3
Instruction
Configuration of
(Event: I201) of X002 is detected
When X002 turns ON, "1" is added to the value of D0.
M8000 INC INC instruction executes increment in every operation
EN ENO cycle, but the interrupt routine is executed only once
RUN d D0 by an input signal.
monitor Accordingly, it is not necessary to use INCP (pulse
operation type) instruction. 4
Instructions
Explanation of
How to Read
4) When catching a short pulse
In the program example shown below, the ON status is held for a certain period of time after a short pulse
turns ON.
Pulse input
X003 5
Basic Instruction
M0 ON ON
TO TO
[Main program]
EI Interrupts are enabled by EI instruction.
6
Instructions
Step Ladder
EN ENO
M0
Preparation for measurement
M0 OUT_T The period of time to hold M0 is specified.
TCo
EN
TCoil
ENO
7
Instructions
Applied
K10 TValue
T0 RST After the timer time, M0 is reset.
EN ENO
d M0
FEND The main program is finished by FEND instruction. 8
EN ENO
Function
and Pulse Catch
Interrupt Function
[Interrupt program] When the rising edge
(Event: I301) of X003 is detected
SET When X003 turns ON and the interrupt routine is
M8000
executed, M0 is set to ON unconditionally.
RUN
EN ENO
d M0
A
monitor
and addresses
between devices
Relationships
815
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
8.3.2 Examples of practical programs (programs to measure short pulse width)
By using a 1 ms retentive type timer or the special data register D8099 (high speed ring counter), the short
pulse width can be measured in 1 ms or 0.1 ms units.
1. Example of measuring short pulse width with retentive 1 ms timer
The sequence diagram below takes the FX3U PLC (sink input) as an example.
SW X010 Preparation for
measurement
24V 0V S/S X000 X001 SW(X000, X001)
PLC
This period of time is measured.
[Main program]
EI Interrupts are enabled by EI instruction.
EN ENO The main program is described.
FEND The main program is finished by FEND instruction.
EN ENO
[Interrupt program] When the rising edge
(Event: I001) of X000 is detected
M8000 RST When X000 turns ON, the 1 ms timer T246 is started
EN ENO up by the interrupt I001.
d TC246
X010 RST
EN ENO
d M0
RST
EN ENO
d D0
OUT_T
EN
TC246 TCoil
K32767 TValue
[Interrupt program] When the falling edge
(Event: I100) of X001 is detected
X010 MOV When X001 turns OFF, the current value of T246 is
EN ENO transferred to the data register D0 for storing the
measured value by the interrupt I100, and M0 for
T246 s d D0 the complete signal is set to ON.
SET
EN ENO
d M0
M0 OUT_T
EN
TC246 TCoil
K32767 TValue
M8000 RST
EN ENO
d TC246
816
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal)
1
2. Example of program to measure the short pulse width using a high speed ring counter (For
Outline
FX3U and FX3UC PLCs only)
[Main program]
EI Interrupts are enabled by EI instruction.
2
EN ENO The main program is described.
Instruction List
X010
3
M8099 The ring counter is set to ON.
D8099
Instruction
Configuration of
FEND
EN ENO
[Interrupt program] When the rising edge
(Event: I001) of X000 is detected
X010 RST When X000 turns ON: The ring counter is 4
EN ENO reset to OFF, and measurement is started.
Instructions
Explanation of
How to Read
d D8099
RST
EN ENO M0
d
5
[Interrupt program]
Basic Instruction
When the rising edge
(Event: I100) of X001 is detected
MOV When X001 turns OFF: The ring counter value is
EN ENO transferred to D0, and measurement is completed.
D8099 s d D0 6
Instructions
Step Ladder
SET
EN ENO
d M0
The special data register M8099 up-counts the 0.1 ms clock
from the next operation cycle after being driven.
When the count value exceeds "32,767", it is returned to "0".
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
817
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.4 Input Interrupt (Interrupt by External Signal) [With
8.4 Input Interrupt (Interrupt by External Signal) [With Delay function]
1. Outline
An input interrupt has the function to delay execution of an interrupt routine in units of 1 ms.
The delay time can be specified using the pattern program shown below.
By using the delay function, the mounting position of a sensor used for input interrupts can be adjusted
electrically without changing the actual position.
The FX0 , FX0S , FX0N , FXU, FX2C, FX1S, FX1N, FX1NC , FX2N, FX2NC or FX3G PLC does not support this
function.
2. Programming procedure
[Interrupt program]
(Event: I )
Contact for setting delay time
M8393 MOV Delay time specification program
EN ENO Be sure to describe the delay time specification program
*
K s d D8393 shown on the left at the head of an interrupt routine program.
Because this program is a pattern program, change only the
1) Delay time (unit: ms) delay time 1).
Only a constant (K) or data register (D) is available for
specifying the time here *.
Program to be executed as input interrupt
3. Timing chart
Because the previous interrupt processing is not
completed, the interrupt processing is not executed here.
Interrupt input(X000 to X005)
Valid
Interrupt input is
executed
Delay time (ms) IRET instruction
818
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle)
1
8.5 Timer Interrupt (Interrupt in Constant Cycle)
Outline
8.5.1 Timer Interrupt (Interrupt in Constant Cycle)
1. Outline
2
Instruction List
An interrupt routine is executed at every 10 to 99 ms without being affected by the operation cycle of a PLC.
The FX0, FX0S, FX0N, FX1S, FX1N or FX1NC PLC does not support the timer interrupt function.
2. Application
This type of interrupt is suitable when a certain program should be executed at high speed while the main
program operation time is long or when a program should be executed at a constant time interval in sequence 3
operations.
Instruction
Configuration of
3. Basic program (programming procedure)
[Main program]
Interrupts are enabled. Main program
4
EI
EN ENO Timer interrupts are enabled after EI instruction.
It is not necessary to program DI (disable interrupt) if there
Instructions
Explanation of
How to Read
is no zone where timer interrupts should be disabled.
Main program
5
FEND FEND instruction indicates the end of the main program.
Basic Instruction
EN ENO End of main program Be sure to describe an interrupt routine after FEND instruction.
[Interrupt program] When interrupt is
(Event: I620) given at every 20 ms.
Interrupt program
The interrupt routine is executed at every 20 ms. 6
Interrupt routine
Instructions
Step Ladder
Create a program to be executed as interrupt.
IRET instruction returns the program execution to the main program.
4. Number and operation of (three) timer interrupt pointers
I 7
Instructions
Applied
Timer time 10 to 99 (ms)
Timer interrupt pointer 6,7,8
An interrupt program is executed at every specified interrupt cycle time (10 to 99 ms). Use this type of
interrupt in control requiring cyclic interrupt processing regardless of the operation cycle of a PLC.
Input number Interrupt cycle (ms) Interrupt disable flag 8
I6
M8056*1
Function
and Pulse Catch
Interrupt Function
An integer in the range from 10 to 99 is put in "
" in the pointer name.
I7
M8057*1
Example: "I610" indicates a timer interrupt at every 10 ms.
I8
M8058*1
*1. Cleared when the PLC mode is changed from RUN to STOP.
Caution A
and addresses
between devices
Relationships
If the timer interrupt time is set to 9 ms or less, the timer interrupt processing may not be executed in an
accurate cycle in the following cases. Therefore, using a time that is over 10 ms is recommended.
• When the interrupt program processing time is long.
• When the main program contains an applied instruction whose processing time is long.
5. Cautions
• Each pointer number (I6, I7 or I8) can be used only once.
• When M8056 to M8058 is set to ON in a program, a corresponding timer interrupt is disabled.
819
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle)
6. Program example
In the program example shown below, data is added and addition result is compared with the set value at
every 10 ms.
1) Program example
[Main program]
EI Interrupts are enabled by EI instruction.
EN ENO The main program is described.
SET When M3 is set to ON, INC instruction becomes valid.
X001
EN ENO
d M3 The main program is finished by FEND instruction.
FEND
EN ENO
[Interrupt program] When interrupt is
(Event: I610) given at every 10 ms
INC "1" is added to the current value of D0 at every 10 ms.
M3
EN ENO
d D0
LD-EQ RST When the current value of D0 reaches "1000", M3 is reset.
EN ENO EN ENO
K1000 s1 d M3
D0 s2 The current value of D0 is ramp data which changes from
"0" to "1000" in 10 seconds.
In the program example using RAMP instruction shown
later, the ramp data is made using a dedicated instruction.
8.5.2 Example of practical program (timer interrupt program using instruction)
RAMP, HKY, SEGL, ARWS and PR instructions execute a series of operations in synchronization with the
scan time.
Because the total time may be too long or time fluctuation may cause a problem in these instructions, it is
recommended to execute these instructions at a constant time interval using the timer interrupt function.
When not using the timer interrupt function, use the constant scan mode.
1. Timer interrupt processing of HKY instruction
[Main program]
EI Interrupts are enabled by EI instruction.
EN ENO The main program is described.
FEND The main program is finished by FEND instruction.
EN ENO
[Interrupt program]
(Event: I620)
M8000 REF
EN ENO
X000 d
K8 n
HKY
EN ENO
X000 s d1 Y000
d2 D0
d3 M0
REF
EN ENO
Y000 d
K8 n
820
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle)
1
2. Timer interrupt processing of RAMP instruction
Outline
The ramp signal output circuit shown below is programmed using the timer interrupt function executed every
10 ms.
1) Ramp output pattern
D4 is occupied as a register for counting the number of times of execution.
2
(D 2) = 255
Instruction List
While M8026 is ON
(D 3)
(D 1) = 1 While M8026 is OFF
10 seconds 3
Instruction
Configuration of
X000 = ON
M8029 Execution completed
2) Program
[Main program]
EI Interrupts are enabled by EI instruction.
4
Instructions
Explanation of
How to Read
EN ENO The main program is described.
With M8026 turned ON, when the value of (D3) reaches
M8026
the final value (D2), the value of Y is latched.
X000 MOV As soon as the start command is given, the initial value
EN ENO (D1) and target value (D2) are transferred.
5
Start K1 s d D1
Basic Instruction
MOV
EN ENO
K255 s d D2
EN
PLS
ENO 6
Instructions
Step Ladder
d M0
M0 SET
EN ENO
d M1
EN
FEND
ENO
The main program is finished by FEND instruction.
7
Instructions
Applied
[Interrupt program] When interrupt is
(Event: I610) given at every 10 ms
M1 RAMP While the instruction is executed 1000 times (in 10 seconds),
EN ENO the contents of D3 are changed from the value of D1 to the
(Initial value)D1 s1 d D3
value of D2
.
8
(Target value)D2 s2 (Current
Function
and Pulse Catch
Interrupt Function
(Number of times n value)
of transfer)K1000
RST When the instruction execution complete flag M8029 turns
M8029
EN ENO ON, RAMP instruction drive input is set to OFF.
If RAMP instruction is continuously executed while M8026
d M1
is OFF, the value of D3 returns to the initial value (D1)
immediately after it reaches the final value (D2), and then A
the same operation is repeated.
and addresses
between devices
Relationships
This program is not necessary when M8026 is ON.
821
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.6 Counter Interrupt - Interrupt Triggered by Counting Up
8.6 Counter Interrupt - Interrupt Triggered by Counting Up of High Speed
Counter
1. Outline
This type of interrupt utilizes the current value of a high speed counter.
The FX0, FX0S, FX0N, FX1S, FX1N, FX1NC or FX3G PLC does not support the counter interrupt function.
The FX2C PLC of V 3.07 or later supports the counter interrupt function.
2. Application
This type of interrupt is used together with the comparison set instruction DHSCS. When the current value of
a high speed counter reaches the specified value, an interrupt routine is executed.
3. Basic program (programming procedure)
[Main program]
Main program
EI
Interrupts are enabled by EI instruction.
EN ENO
The main program is described.
M8000 OUT_C The coil of a high speed counter is driven,
EN ENO and an interrupt pointer is specified in
RUN DHSCS instruction.
CC255 CCoil
monitor K2,147,483,647 CValue
DHSCS
EN ENO
*1
K1000 s1 d I010
CC255 s2
Interrupt point number
is specified.
FEND
EN ENO
[Interrupt program]
(Event: I010) When counter interrupt is specified
When the current value of C255 changes from
"999" to "1000", the interrupt routine is executed.
Interrupt subroutine
For an interrupt program use example, refer to
(Interrupt program)
the input interrupt function described in the
preceding section.
*1. When the comparison value specified by a data register, etc. is changed, the current value is actually
changed to the specified value when END instruction is executed.
4. Number and operation of (six) counter interrupt pointers
I0 0
Counter interrupt pointer (1 to 6)
Pointer No. Interrupt disable flag
I010
I020
I030
M8059*1
I040
I050
I060
*1. Cleared when the PLC mode is changed from RUN to STOP.
5. When setting an interrupt output (Y or M) to ON or OFF using a high speed counter
When only controlling the ON/OFF status of an output relay (Y) or auxiliary relay (M) according to the current
value of a high speed counter, a required program can be easily created using DHSCS, DHSCR or DHSZ
instruction.
822
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.7 Pulse Catch Function[M8170 to M8177]
1
6. Cautions
Outline
1) Pointer number
Pointer numbers cannot overlap with each other.
2) Disabling interrupts
When the special auxiliary relay M8059 is set to ON in a program, all counter interrupts are disabled.
2
Instruction List
8.7 Pulse Catch Function[M8170 to M8177]
When the input relay X000 to X007 turns ON from OFF after the EI instruction is executed, the special
auxiliary relay M8170 to M8177 is set for interrupt processing.
The FX0, FX0S, FX0N, FX1S, FX1N or FX3G PLC does not require the EI instruction. 3
Instruction
Configuration of
1. Assignment of input numbers and special auxiliary relays
Pulse catch input*1 Pulse catch relay
M8170*2
X000 (M8065*2 in the FX0,
FX0S and FX0N PLCs) 4
Instructions
Explanation of
How to Read
M8171*2
X001 (M8057*2 in the FX0,
FX0S and FX0N PLCs)
M8172*2
X002 (M8058*2 in the FX0,
FX0S and FX0N PLCs) 5
M8173*2
Basic Instruction
X003 (M8059*2 in the FX0,
FX0S and FX0N PLCs)
X004 M8174*2
X005 M8175*2
X006 M8176*2 6
X007 M8177*2
Instructions
Step Ladder
*1. Differs from one PLC to another.
FXU, FX2C, FX1S, FX1N, FX2N, FX1NC, FX2NC, FX3G : Supports X000 to X005 only.
FX0, FX0S, FX0N : Supports X000 to X003 only.
*2. Cleared when the PLC mode is changed from STOP to RUN.
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
823
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.7 Pulse Catch Function[M8170 to M8177]
2. Program example
The FX0, FX0S, FX0N, FX1S or FX3G PLC
does not require the EI instruction.
When the rising edge of X000 is detected,
M8170 is set as interrupt.
The pulse catch result is reset.
Reset
input
EI
Input pulse width (shown below)
X000 (Input)
M8170
X002 (Reset)
FX3U and FX3UC PLCs FX3G PLCs FX1S, FX1N, FX1NC, FX2N and FX2NC PLCs
X000 to X005: 5μS or more*1 X000, X001, X003, X004: 10μS or more X000,X001 : 10μS or more (FX1S,FX1N,FX1NC)
X006, X007 : 50μS or more X002, X005 : 50μS or more : 20μS or more (FX2N,FX2NC)
X002 to X005: 50μS or more
FXU and FX2C PLCs FX0, FX0S and FX0N PLCs
X000 to X005: 50μS or more X000 X003: 50μS or more
*1. When using the pulse catch function at 5μs or when receiving a pulse whose response frequency is
50 kHz to 100 kHz using a high speed counter, perform the following:
- Make sure that the wiring length is 5 m or less.
- Connect a bleeder resistor of 1.5 Ω (1 W or more) to an input terminal, and make sure that the load
current of the open collector transistor output in the counterpart equipment is 20 mA or more
including the input current in the main unit.
3. Cautions on use
1) When receiving an input again, it is necessary to reset the device which was once set using a program.
Accordingly, until a device is reset, a new input cannot be received.
2) When it is necessary to receive continuous short pulses (input signals), use the external input interrupt
function or high speed counter function.
3) A filter adjustment program is not required.
4) The pulse catch function is executed regardless of the operations of the special auxiliary relays M8050 to
M8055 for respectively disabling interrupts.
824
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function
1
8.8 Pulse width/Pulse period measurement function [M8075 to M8083,
Outline
D8074 to D8097]
This function is supported only in FX3G PLC Ver.1.10 or later.
The pulse width/pulse period measurement function stores the values of 1/6 μs ring counters at the input 2
Instruction List
signal rising edge and falling edge to special data registers. This function also divides by "60" the difference in
the counter value (pulse width) between the rising edge and the falling edge or the difference in the counter
value (pulse period) between the previous rising edge and the current rising edge, and stores the obtained
pulse width or pulse period in units of 10 μs to special data registers.
The pulse width/pulse period measurement function becomes valid when a program is described using 3
M8075 as a contact. Specify the pulse width measurement flag in the subsequent OUT instruction, and set an
Instruction
Configuration of
input terminal to be used.
When the pulse width/pulse period measurement function is valid, it always operates while the PLC mode is
RUN.
Assignment of special auxiliary relays and special data registers
Pulse width/ Pulse Ring counter value Ring counter value Pulse width /Pulse
4
Pulse period
Instructions
Explanation of
How to Read
Pulse input period measurement for rising edge*1 for falling edge*1 period*1*2
measurement mode
flag [Unit: 1/6 μs] [Unit: 1/6 μs] [Unit: 10 μs]
X000 M8076 M8080 D8075, D8074 D8077, D8076 D8079, D8078
X001 M8077 M8081 D8081, D8080 D8083, D8082 D8085, D8084
X003
X004
M8078
M8079
M8082
M8083
D8087, D8086
D8093, D8092
D8089, D8088
D8095, D8094
D8091, D8090
D8097, D8096
5
Basic Instruction
*1. Cleared when the PLC mode switches from STOP to RUN.
*2. The measurable pulse width is 10 μs minimum and 100 s maximum.
The measurable pulse period is 20 μs minimum.
1. Program example 6
1) Pulse width measurement
Instructions
Step Ladder
The pulse width of the input signal from X000 is measured.
X000 ON
OFF
This duration is measured. 7
Instructions
Applied
[Main program]
EI
EN ENO
M8075
8
M8076 X000 is used for the pulse width/pulse period
Pulse width/Pulse measurement function.
period measurement
Function
and Pulse Catch
Interrupt Function
setting flag
FEND
EN ENO
[Interrupt program] X000 Falling edge interrupt
(Event: I000) A
and addresses
between devices
Relationships
M8000 DMOV When the interrupt routine is executed at the
EN ENO falling edge of the input signal from X000, the
RUN monitor pulse width of input signal from X000 stored in
VAR_01*1 s d VAR_02*2 D8078 and D8079 is transferred to D1 and D0.
User program
*1. VAR_01 is a global label and is defined as D8078.
*2. VAR 02 is a global label and is defined as D0.
825
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function
2) Pulse period measurement
The pulse period of the input signal from X000 is measured.
X000 ON
OFF
This duration is measured.
[Main program]
EI
EN ENO
M8075
M8076 X000 is used for the pulse width/pulse period
Pulse width/Pulse measurement function.
period measurement
setting flag
X2
M8080 When X002 turns ON, the pulse period measurement
mode is actuated.
FEND
EN ENO
[Interrupt program] X000 Rising edge interrupt
(Event: I001)
M8000 DMOV When the interrupt routine is executed at the
EN ENO rising edge of the input signal from X000, the
RUN monitor pulse period of input signal from X000 stored in
VAR_01*1 s d VAR_02*2 D8078 and D8079 is transferred to D1 and D0.
User program
*1. VAR_01 is a global label and is defined as D8078.
*2. VAR_02 is a global label and is defined as D0.
- Timing chart
The pulse period is not measured when the input signal rises for the first time after the PLC mode is
changed from STOP to RUN, or when the input signal rises for the first time after the pulse period
measurement mode (M8080) is set to ON from OFF. (Accordingly, D8078 and D8079 are not updated.)
The pulse period is measured when the input signal rises at the next time. (As a result, D8078 and
D8079 are updated.)
Make the pulse width/pulse period measurement setting flag (M8080) remain OFF for 1 operation cycle
or more when discontinuing the pulse input.
If M8080 does not remain OFF for 1 operation cycle or more, the "a" period shown below is stored as
the pulse period.
RUN/STOP RUN
one operation cycle
M8080 ON ON
a
pulse period
X000
The pulse period is The pulse period is
not measured. not measured.
The pulse period is measured. The pulse period is measured.
(D8078 and D8079 are updated.) (D8078 and D8079 are updated.)
826
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function
1
3) Signal delay time measurement
Outline
The delay time from the rising edge of the input signal from X000 to the rising edge of the input signal
from X001 is measured.
X000 ON
OFF
X001 ON 2
Instruction List
OFF
This duration is measured.
3
[Main program]
Instruction
Configuration of
EI
EN ENO
M8075
M8076 X000 is used for the pulse width/pulse period
Pulse width/Pulse measurement function.
period measurement
setting flag
M8077 X001 is used for the pulse width/pulse period
measurement function.
4
Instructions
Explanation of
How to Read
FEND
EN ENO
Basic Instruction
6
Instructions
Step Ladder
7
Instructions
Applied
8
Function
and Pulse Catch
Interrupt Function
A
and addresses
between devices
Relationships
827
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function
[Interrupt program] X001 Rising edge interrupt The interrupt routine is executed at the rising edge of
(Event: I101) the input signal from X001.
M8000 DMOV
EN ENO The ring counter value at the rising edge of the input
RUN monitor *1 *1 signal from X000 stored in D8074 and D8075 is
VAR_03 s d VAR_04 transferred to D1 and D0.
DMOV
EN ENO The ring counter value at the rising edge of the input
*1 *1 signal from X001 stored in D8080 and D8081 is
VAR_05 s d VAR_06 transferred to D3 and D2.
DSUB
EN ENO The value "Ring counter value at the rising edge of
*1
s1 d *1 the input signal from X001 - Ring counter value at the
VAR_07 VAR_09
rising edge of the input signal from X000" is stored in
VAR_08 *1
s2 D9 and D8.
When either one between the ring counter value at the rising edge of the input signal from X000 and the ring counter
value at the rising edge of the input signal from X001 is located within the range from H80000000 to HFFFFFFFF,
the following process is executed, and the value "Ring counter value at the rising edge of the input signal from
X001 - Ring counter value at the rising edge of the input signal from X000" is stored in D9 and D8*2.
LDD>= ANDD< DSUB
EN ENO EN ENO EN ENO
VAR_11 *1 s1 VAR_13 *1 s1 VAR_15 *1 s1 d VAR_17 *1
VAR_16 *1 s2
VAR_12 *1 s2 VAR_14 *1 s2
DSUB
X000 Rising edge ring counter value: EN ENO
H0 to H7FFFFFFF
VAR_18 *1 s1 d VAR_20 *1
X001 Rising edge ring counter value:
H80000000 to HFFFFFFFF VAR_19 *1 s2
DADD
EN ENO
VAR_21 *1 s1 d VAR_23 *1
VAR_22 *1 s2
DINC
EN ENO
d VAR_24 *1
LDD< ANDD>= DSUB
EN ENO EN ENO EN ENO
VAR_25
*1
s1 VAR_27
*1
s1 VAR_29 *1 s1 d VAR_31 *1
*1
s2 *1
s2 VAR_30 *1 s2
VAR_26 VAR_28
DSUB
X000 Rising edge ring counter value: EN ENO
H80000000 to HFFFFFFFF VAR_32 *1 s1 d VAR_34 *1
X001 Rising edge ring counter value:
H0 to H7FFFFFFF VAR_33 *1 s2
DINC
EN ENO
d VAR_35 *1
M8000 DDIV
EN ENO
The obtained value is converted into a value
VAR_36*1 s1 d VAR_38*1
in units of 10 μs.
VAR_37*1 s2
User program
828
FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function
(Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function
1
*1. VAR_01 to VAR_38 is a global label and define as following.
Outline
Global label Defined device Global label Defined device
VAR_03 D8074 VAR_36 D8
VAR_04 D0 VAR_37 K60
VAR_05 D8080 VAR_38 D10 2
VAR_06 D2
Instruction List
VAR_07 D2
VAR_08 D0
VAR_09 D8
VAR_11 D0
VAR_12 K0
3
Instruction
Configuration of
VAR_13 D2
VAR_14 K0
VAR_15 H7FFFFFFF
VAR_16 D0
VAR_17 D4 4
VAR_18 D2
Instructions
Explanation of
How to Read
VAR_19 H80000000
VAR_20 D6
VAR_21 D4
VAR_22 D6
VAR_23 D8 5
Basic Instruction
VAR_24 D8
VAR_25 D0
VAR_26 K0
VAR_27 D2
VAR_28 K0
6
VAR_29 HFFFFFFFF
Instructions
Step Ladder
VAR_30 D0
VAR_31 D4
VAR_32 D2
VAR_33 D4
VAR_34 D8 7
Instructions
Applied
VAR_35 D8
*2. The ring counter offers 32-bit data including the most significant bit.
The DSUB instruction does not give a correct value because it handles the most significant bit as the
sign bit. To obtain a correct value, add the processing inside the dotted frame.
2. Cautions on use 8
Function
and Pulse Catch
Interrupt Function
• The pulse width/pulse period measurement function and input interrupts can be used at the same time in a
same input terminal.
• When a same input terminal is used by the pulse width/pulse period measurement function and the SPD,
DSZR or ZRN instruction, an operation error occurs when the instruction is executed.
• The input terminal used for the pulse width/pulse period measurement function cannot be used for the A
pulse catch function.
and addresses
between devices
Relationships
• When a same input terminal is used by the pulse width/pulse period measurement function and a high
speed counter, a grammatical error occurs.
• Make sure that the total frequency of four input channels is 50 kHz or less when using the pulse width/
pulse period measurement function.
• When the pulse width/pulse period measurement function and a high speed counter are used together, the
overall frequency of the high speed counter is affected.
→ FX Structured Programming Manual (Device & Common)
829
FXCPU Structured Programming Manual Appendix A: Relationships between devices and
(Basic & Applied Instruction)
Appendix A: Relationships between devices and addresses
The table below shows the relationships between devices and addresses.
Example of corresponding device and
Device and address
Device address
Device Address Device Address
Input relay X Xn %IXn X367 %IX247
Output relay Y Yn %QXn Y367 %QX247
Auxiliary relay M Mn %MX0.n M499 %MX0.499
Contact TS Tn %MX3.n TS191 %MX3.191
Coil TC Tn %MX5.n TC191 %MX5.191
Timer
%MW3.n TN191 %MW3.191
Current value TN Tn
%MD3.n T190 %MD3.190
Contact CS Cn %MX4.n CS99 %MX4.99
Counter
Coil CC Cn %MX6.n CC99 %MX6.99
%MW4.n CN99 %MW4.99
Current value CN Cn
%MD4.n C98 %MD4.98
%MW0.n D199 %MW0.199
Data register D Dn
%MD0.n D198 %MD0.198
Intelligent function unit %MW14.x.n %MW14.0.10
G Ux\Gn U0\G09
device %MD14.x.n %MD14.0.9
%MW2.n R32767 %MW2.32767
Extension register R Rn
%MD2.n R32766 %MD2.32766
Extension file register ER ERn Not corresponding - -
Pointer P Pn " "(blank) P4095 Not corresponding
Interrupt pointer I In Not corresponding - -
Nesting N Nn Not corresponding - -
%MW7.n Z7 %MW7.7
Z Zn
Index register %MD7.n Z6 %MD7.6
V Vn %MV6.n V7 %MW6.7
State S Sn %MX2.n S4095 %MX2.4095
830
Outline Instruction List Configuration of How to Read Basic Instruction Step Ladder Applied Interrupt Function Relationships
1
A
Instruction Explanation of Instructions Instructions and Pulse Catch between devices
Instructions Function and addresses
Appendix A: Relationships between devices and
831
MEMO
FXCPU Structured Programming Manual
(Basic & Applied Instruction)
FXCPU Structured Programming Manual
(Basic & Applied Instruction) Warranty
Warranty
Please confirm the following product warranty details before using this product.
1. Gratis Warranty Term and Gratis Warranty Range 2. Onerous repair term after discontinuation of
If any faults or defects (hereinafter "Failure") found to be production
the responsibility of Mitsubishi occurs during use of the 1) Mitsubishi shall accept onerous product repairs for
product within the gratis warranty term, the product shall be seven (7) years after production of the product is
repaired at no cost via the sales representative or discontinued.
Mitsubishi Service Company. However, if repairs are Discontinuation of production shall be notified with
required onsite at domestic or overseas location, expenses Mitsubishi Technical Bulletins, etc.
to send an engineer will be solely at the customer's
discretion. Mitsubishi shall not be held responsible for any 2) Product supply (including repair parts) is not available
re-commissioning, maintenance, or testing on-site that after production is discontinued.
involves replacement of the failed module. 3. Overseas service
Overseas, repairs shall be accepted by Mitsubishi's local
[Gratis Warranty Term]
overseas FA Center. Note that the repair conditions at
The gratis warranty term of the product shall be for one
each FA Center may differ.
year after the date of purchase or delivery to a designated
place. Note that after manufacture and shipment from 4. Exclusion of loss in opportunity and secondary
Mitsubishi, the maximum distribution period shall be six (6) loss from warranty liability
months, and the longest gratis warranty term after Regardless of the gratis warranty term, Mitsubishi shall not
manufacturing shall be eighteen (18) months. The gratis be liable for compensation of damages caused by any
warranty term of repair parts shall not exceed the gratis cause found not to be the responsibility of Mitsubishi, loss
warranty term before repairs. in opportunity, lost profits incurred to the user or third
person by Failures of Mitsubishi products, special
[Gratis Warranty Range]
damages and secondary damages whether foreseeable or
1) The range shall be limited to normal use within the not , compensation for accidents, and compensation for
usage state, usage methods and usage environment, damages to products other than Mitsubishi products,
etc., which follow the conditions and precautions, etc., replacement by the user, maintenance of on-site
given in the instruction manual, user's manual and equipment, start-up test run and other tasks.
caution labels on the product.
5. Changes in product specifications
2) Even within the gratis warranty term, repairs shall be
The specifications given in the catalogs, manuals or
charged for in the following cases.
technical documents are subject to change without prior
a) Failure occurring from inappropriate storage or
notice.
handling, carelessness or negligence by the user.
Failure caused by the user's hardware or software 6. Product application
design. 1) In using the Mitsubishi MELSEC programmable logic
b) Failure caused by unapproved modifications, etc., controller, the usage conditions shall be that the
to the product by the user. application will not lead to a major accident even if any
c) When the Mitsubishi product is assembled into a problem or fault should occur in the programmable logic
user's device, Failure that could have been controller device, and that backup and fail-safe
avoided if functions or structures, judged as functions are systematically provided outside of the
necessary in the legal safety measures the user's device for any problem or fault.
device is subject to or as necessary by industry
2) The Mitsubishi programmable logic controller has
standards, had been provided.
been designed and manufactured for applications in
d) Failure that could have been avoided if
general industries, etc. Thus, applications in which the
consumable parts (battery, backlight, fuse, etc.)
public could be affected such as in nuclear power
designated in the instruction manual had been
plants and other power plants operated by respective
correctly serviced or replaced.
power companies, and applications in which a special
e) Relay failure or output contact failure caused by
quality assurance system is required, such as for
usage beyond the specified Life of contact
Railway companies or Public service purposes shall
(cycles).
be excluded from the programmable logic controller
f) Failure caused by external irresistible forces such
applications.
as fires or abnormal voltages, and failure caused
In addition, applications in which human life or
by force majeure such as earthquakes, lightning,
property that could be greatly affected, such as in
wind and water damage.
aircraft, medical applications, incineration and fuel
g) Failure caused by reasons unpredictable by
devices, manned transportation, equipment for
scientific technology standards at time of
recreation and amusement, and safety devices, shall
shipment from Mitsubishi.
also be excluded from the programmable logic
h) Any other failure found not to be the responsibility
controller range of applications.
of Mitsubishi or that admitted not to be so by the
However, in certain cases, some applications may be
user.
possible, providing the user consults their local
Mitsubishi representative outlining the special
requirements of the project, and providing that all
parties concerned agree to the special circumstances,
solely at the users discretion.
832
FXCPU Structured Programming Manual
(Basic & Applied Instruction) Revised History
Revised History
Date created Revision Description
1/2009 A First edition
7/2009 B • Instructions are added:
INV, MEP, MEF, RS,FLCRT, FLDEL, FLWR, FLRD, FLCMD, FLSTRD
• The following instructions are provided in the FX3G series.
RD3A, RD3AP, WR3A, WR3AP
833
FXCPU Structured Programming Manual
(Basic & Applied Instruction) Revised History
MEMO
834
FXCPU
Structured Programming Manual [Basic & Applied Instruction]
HEAD OFFICE: TOKYO BUILDING, 2-7-3 MARUNOUCHI, CHIYODA-KU, TOKYO 100-8310, JAPAN
HIMEJI WORKS: 840, CHIYODA CHO, HIMEJI, JAPAN
MODEL FX-KP-SM-E
MODEL CODE 09R926
JY997D34701B Effective Jul. 2009
(MEE) Specifications are subject to change without notice.
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