The architecture is the programmers view of a computer.

It is defined by the instruction set (language) and

operand locations (registers and memory). Many different architectures exist, such as ARM, x86, MIPS,
SPARC, and PowerPC. Computers vocabulary = instruction set. Instruction = operation + operand

ARM architecture
It represents each instruction as a 32 bit word. Each machine language instruction is read
and executed by microprocessor (contain od registers, memories, ALUs, etc).

Assembly Language
Human readable.
a=b+c ADD a, b, c (so does substraction (?)). ADD is a mnemonis, b and c are source
operands, a is destination operands
ARM is a reduced instruction set computer (RISC) architecture. RISC >< CISC
(complex instruction set computer) such as x86.

Registers
Operands stored in memory take a long time to retrieve. ARM Architecture uses 16
registers, (register set or register file). Fewer register, faster they can be accessed.
SMALLER IS FASTER
Hexadecimal constants in ARM assembly language start with 0x.
Memory
A 32-bit word consists of four 8-bit bytes, so each word address is a multiple of 4. Most
significant byte (MSB) on left and LST on right. 32-bit word address and data are given
inhexadecimal.
Ex: 0xF2F1AC07 stored at memory address 4.
LDR (to read data word from memory to register)
STR (to write data word from register to memory)

ARM prefers little-endian.

Logical Instruction
AND, ORR (OR), EOR (XOR), and BIC (bit clear). BIC R6, R1, R2 computer R1 AND
NOT R2 (clears the bits that are asserted in R2, top two bytes of R1 cleared, and
the unmasked bottom two bytes of R1 are placed in R6.)
Shift Instruction
Shift the value ina register left or right, dropping bits off the end.
- LSL (logical shift left)
- LSR (logical shift right)
- ASR (arithmetic shift right)
- ROR (rotate right) THE IS NO ROL

Multiply Instruction
Multiplyinf two 32-bit numbers produces a 64-bit product, but ARM can result 32-
bit product with MUL. UMULL (unsigned multiply long) and SMULL (signed
multiply long) produce 64-bit product (least significant saved on right register,
most significant saved in left register.

Condition Flag
Status flag = negative (N), zero (Z), carry (C), overflow (V). Instruction mnemonic
is followed by condition mnemonic that indicated when to execute.
EQ (equal), NE (not equal), CS/HS (Carry set), MI (negative) PL (plus). Ex: ADDEQ
R1, R2, R3

Branching
Branch also called jump.

Conditional Statements
If statement executes only if the condition is met.

CMP R0, R1 ; apples == oranges ?

ADDEQ R2, R3, #1 ; f = i + 1 on equality (i.e., Z = 1)
SUB R2, R2, R3 ; f = f i

If/else statement
BNE=skips the if block and executes the else block
; R0 = apples, R1 = oranges, R2 = f, R3 = i
CMP R0, R1 ; apples == oranges?
BNE L1 ; if not equal, skip if block
ADD R2, R3, #1 ; if block: f = i + 1
B L2 ; skip else block
L1
SUB R2, R2, R3 ; else block: f = f i
L2
Switch/case

While loops
ARM Assembly Code
; R0 = pow, R1 = x
MOV R0, #1 ; pow = 1
MOV R1, #0 ; x = 0
WHILE
CMP R0, #128 ; pow != 128 ?
BEQ DONE ; if pow == 128, exit loop
LSL R0, R0, #1 ; pow = pow * 2
ADD R1, R1, #1 ; x = x + 1
B WHILE ; repeat loop
DONE
High-Level Code
int pow = 1;
int x = 0;
while (pow != 128) {
pow = pow * 2;
x = x + 1;
}

For loops

Memory
LDR R3, [R0, R1, LSL #2], R1 is scaled (shifted left by 2) then added to the base
address (r0). Memory address= R0+(R1x4)
Array

ASCII, given in hexa. Lowercase and uppercase letters differ by 0x20 (32).

, LDRB loads the byte at memory address 2 into

least significant byte of R1 and fills the remaining register bits with 0. LDRSB
loads this byte into R2 and sign-extends the bte into the upper 24 bits of the
register. STRB stores the least significant byte of R3 into memory byte 3.

Function Calls
The caller stores the return address in the libk register LR at the same time it
jumps to the callee using the branch and link instruction (BL).
Stack
LIFO queue. Uses: save and restore registers that are used by a function.
PUSH = STMFD SP!, POP = LSMFD SP!
Leaf function = function that doesnt call other. Nonleaf function = call other.
Recursive = call itself (Ex: factorial).
ARM Assembly Code
0x8500 FACTORIAL PUSH {R0, LR} ; push n and LR on stack
0x8504 CMP R0, #1 ; R0 <= 1?
0x8508 BGT ELSE ; no: branch to else
0x850C MOV R0, #1 ; otherwise, return 1
0x8510 ADD SP, SP, #8 ; restore SP
0x8514 MOV PC, LR ; return
0x8518 ELSE SUB R0, R0, #1 ; n = n 1
0x851C BL FACTORIAL ; recursive call
0x8520 POP {R1, LR} ; pop n (into R1) and LR
0x8524 MUL R0, R1, R0 ; R0 = n * factorial(n 1)
0x8528 MOV PC, LR ; return