Contents

Boolean Algebra ........................................................................................................................................................... 2

Rule in Boolean Algebra ....................................................................................................................................... 2
Boolean Laws............................................................................................................................................................ 2
Boolean Expression Function.............................................................................................................................. 3
Logic Gates ..................................................................................................................................................................... 4
AND Gate .................................................................................................................................................................... 4
OR Gate........................................................................................................................................................................ 5
NOT Gate .................................................................................................................................................................... 5
NAND Gate ................................................................................................................................................................. 6
NOR Gate .................................................................................................................................................................... 6
XOR Gate ..................................................................................................................................................................... 7
XNOR Gate.................................................................................................................................................................. 7
Combinational Circuits .............................................................................................................................................. 8
Sequential Circuits ...................................................................................................................................................... 8
Flip - Flops ...................................................................................................................................................................... 8
1. S-R Flip Flop ......................................................................................................................................................... 9
S-R Flip Flop using NOR Gate ............................................................................................................................. 9
S-R Flip Flop using NAND Gate ....................................................................................................................... 10
Clocked S-R Flip Flop .......................................................................................................................................... 11
2. D Flip Flop .......................................................................................................................................................... 12
D Flip Flop ............................................................................................................................................................... 12
3. J-K Flip Flop ....................................................................................................................................................... 12
4. T Flip Flop .......................................................................................................................................................... 13
Registers....................................................................................................................................................................... 14
Serial Input Serial Output ................................................................................................................................. 15
Serial Input Parallel Output ............................................................................................................................. 17
Parallel Input Serial Output (PISO) ............................................................................................................... 17
Parallel Input Parallel Output (PIPO)........................................................................................................... 18
Full Adder .................................................................................................................................................................... 18
Decoder......................................................................................................................................................................... 19
Multiplexers ................................................................................................................................................................ 19
Computer Architecture ........................................................................................................................................... 21
Computer Organization .......................................................................................................................................... 21
Data Structure ............................................................................................................................................................ 24

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Functions ..................................................................................................................................................................... 24
Why a Propagation delay occurs in circuit? ................................................................................................... 25
Results of Counter Applications.......................................................................................................................... 25
Digital Clock ........................................................................................................................................................... 26
Time measurement ............................................................................................................................................. 26
A to D converter (analog and Digital) .......................................................................................................... 26
Frequency divider circuits ............................................................................................................................... 27
Digital triangular wave generator ................................................................................................................. 27
Bonus .............................................................................................................................................................................. 28

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Boolean Algebra
Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses only the
binary numbers i.e. 0 and 1. It is also called as Binary Algebra or logical Algebra. Boolean
algebra was invented by George Boole in 1854.

Rule in Boolean Algebra

Following are the important rules used in Boolean algebra.
Variable used can have only two values. Binary 1 for HIGH and Binary 0 for LOW.
Complement of a variable is represented by an over bar (-). Thus, complement of variable B

is represented as . Thus if B = 0 then = 1 and B = 1 then = 0.

O Ring of the variables is represented by a plus (+) sign between them. For example O Ring
of A, B, C is represented as A + B + C.
Logical ANDing of the two or more variable is represented by writing a dot between them
such as A.B.C. Sometime the dot may be omitted like ABC.

Boolean Laws
There are six types of Boolean Laws.
Commutative law
Any binary operation which satisfies the following expression is referred to as commutative
operation.

Commutative law states that changing the sequence of the variables does not have any effect
on the output of a logic circuit.
Associative law
This law states that the order in which the logic operations are performed is irrelevant as their
effect is the same.

Distributive law
Distributive law states the following condition.

AND law
These laws use the AND operation. Therefore they are called as AND laws.

OR law
These laws use the OR operation. Therefore they are called as OR laws.

INVERSION law
This law uses the NOT operation. The inversion law states that double inversion of a variable
results in the original variable itself.

Important Boolean Theorems

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 Following are few important Boolean Theorems.

Boolean function/theorems Description

Boolean Functions Boolean Functions and Expressions, K-Map and
NAND Gates realization
De Morgan's Theorems De Morgan's Theorem 1 and Theorem 2

Boolean Expression Function

Boolean algebra deals with binary variables and logic operation. A Boolean Function is
described by an algebraic expression called Boolean expression which consists of binary
variables, the constants 0 and 1, and the logic operation symbols. Consider the following
example.

Here the left side of the equation represents the output Y. So we can state equation no. 1

Truth Table Formation

A truth table represents a table having all combinations of inputs and their corresponding
result.
It is possible to convert the switching equation into a truth table. For example, consider the
following switching equation.

The output will be high (1) if A = 1 or BC = 1 or both are 1. The truth table for this equation is
shown by Table (a). The number of rows in the truth table is 2n where n is the number of input
variables (n=3 for the given equation). Hence there are 23 = 8 possible input combination of
inputs.

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Logic Gates
Logic gates are the basic building blocks of any digital system. It is an electronic circuit having
one or more than one input and only one output. The relationship between the input and the
output is based on a certain logic. Based on this, logic gates are named as AND gate, OR gate,
NOT gate etc.

AND Gate
A circuit which performs an AND operation is shown in figure. It has n input (n >= 2) and one
output.

Logic diagram

Truth Table

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OR Gate
A circuit which performs an OR operation is shown in figure. It has n input (n >= 2) and one
output.

Logic diagram

Truth Table

NOT Gate
NOT gate is also known as Inverter. It has one input A and one output Y.

Logic diagram

Truth Table

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NAND Gate
A NOT-AND operation is known as NAND operation. It has n input (n >= 2) and one output.

Logic diagram

Truth Table

NOR Gate
A NOT-OR operation is known as NOR operation. It has n input (n >= 2) and one output.

Logic diagram

Truth Table

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XOR Gate
XOR or Ex-OR gate is a special type of gate. It can be used in the half adder, full adder and
subtractor. The exclusive-OR gate is abbreviated as EX-OR gate or sometime as X-OR gate. It
has n input (n >= 2) and one output.

Logic diagram Truth Table

XNOR Gate
XNOR gate is a special type of gate. It can be used in the half adder, full adder and subtractor.
The exclusive-NOR gate is abbreviated as EX-NOR gate or sometime as X-NOR gate. It has n
input (n >= 2) and one output.

Logic diagram Truth Table

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Combinational Circuits

Combinational circuit is a circuit in which we combine the different gates in the circuit, for
example encoder, decoder, multiplexer and demultiplexer. Some of the characteristics of
combinational circuits are following
The output of combinational circuit at any instant of time, depends only on the levels
present at input terminals.
The combinational circuits do not use any memory. The previous state of input does not
have any effect on the present state of the circuit.
A combinational circuit can have an n number of inputs and m number of outputs.

Block diagram

Sequential Circuits

The combinational circuit does not use any memory. Hence the previous state of input does
not have any effect on the present state of the circuit. But sequential circuit has memory so
output can vary based on input. This type of circuits uses previous input, output, clock and a
memory element.

Block diagram

Flip - Flops

Flip flops are actually an application of logic gates. With the help of Boolean logic you can
create memory with them. Flip flops can also be considered as the most basic idea of a
Random Access Memory [RAM]. When a certain input value is given to them, they will be
remembered and executed, if the logic gates are designed correctly. A higher application of flip
flops is helpful in designing better electronic circuits.
The most commonly used application of flip flops is in the implementation of a feedback
circuit. As a memory relies on the feedback concept, flip flops can be used to design it.

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There are mainly four types of flip flops that are used in electronic circuits. They are

The basic Flip Flop or S-R Flip Flop

Delay Flip Flop [D Flip Flop]
J-K Flip Flop
T Flip Flop

1. S-R Flip Flop

The SET-RESET flip flop is designed with the help of two NOR gates and also two NAND gates.
These flip flops are also called S-R Latch.

S-R Flip Flop using NOR Gate

The design of such a flip flop includes two inputs, called the SET [S] and RESET [R]. There are
also two outputs, Q and Q. The diagram and truth table is shown below.

From the diagram it is evident that the flip flop has mainly four states. They are
S=1, R=0Q=1, Q=0
This state is also called the SET state.
S=0, R=1Q=0, Q=1
This state is known as the RESET state.
In both the states you can see that the outputs are just compliments of each other and that the
value of Q follows the value of S.
S=0, R=0Q & Q = Remember
If both the values of S and R are switched to 0, then the circuit remembers the value of S and R
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in their previous state.
S=1, R=1Q=0, Q=0 [Invalid]
This is an invalid state because the values of both Q and Q are 0. They are supposed to be
compliments of each other. Normally, this state must be avoided.

S-R Flip Flop using NAND Gate

The circuit of the S-R flip flop using NAND Gate and its truth table is shown below.

Like the NOR Gate S-R flip flop, this one also has four states. They are
S=1, R=0Q=0, Q=1
This state is also called the SET state.
S=0, R=1Q=1, Q=0
This state is known as the RESET state.
In both the states you can see that the outputs are just compliments of each other and that the
value of Q follows the compliment value of S.
S=0, R=0Q=1, & Q =1 [Invalid]
If both the values of S and R are switched to 0 it is an invalid state because the values of both Q
and Q are 1. They are supposed to be compliments of each other. Normally, this state must be
avoided.
S=1, R=1Q & Q= Remember
If both the values of S and R are switched to 1, then the circuit remembers the value of S and R
in their previous state.

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Clocked S-R Flip Flop
It is also called a Gated S-R flip flop.
The problems with S-R flip flops using NOR and NAND gate is the invalid state. This problem
can be overcome by using a bistable SR flip-flop that can change outputs when certain invalid
states are met, regardless of the condition of either the Set or the Reset inputs. For this, a
clocked S-R flip flop is designed by adding two AND gates to a basic NOR Gate flip flop. The
circuit diagram and truth table is shown below.

A clock pulse [CP] is given to the inputs of the AND Gate. When the value of the clock pulse is
0, the outputs of both the AND Gates remain 0. As soon as a pulse is given the value of CP
turns 1. This makes the values at S and R to pass through the NOR Gate flip flop. But when the
values of both S and R values turn 1, the HIGH value of CP causes both of them to turn to 0
for a short moment. As soon as the pulse is removed, the flip flop state becomes intermediate.
Thus either of the two states may be caused, and it depends on whether the set or reset input
of the flip-flop remains a 1 longer than the transition to 0 at the end of the pulse. Thus the
invalid states can be eliminated.

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2. D Flip Flop
The circuit diagram and truth table is given below.

D Flip Flop

D flip flop is actually a slight modification of the above explained clocked SR flip-flop. From the
figure you can see that the D input is connected to the S input and the complement of the D
input is connected to the R input. The D input is passed on to the flip flop when the value of CP
is 1. When CP is HIGH, the flip flop moves to the SET state. If it is 0, the flip flop switches to
the CLEAR state.

3. J-K Flip Flop

J-K Flip Flop

A J-K flip flop can also be defined as a modification of the S-R flip flop. The only difference is
that the intermediate state is more refined and precise than that of a S-R flip flop.
The behavior of inputs J and K is same as the S and R inputs of the S-R flip flop. The letter J
stands for SET and the letter K stands for CLEAR.

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When both the inputs J and K have a HIGH state, the flip-flop switch to the complement state.
So, for a value of Q = 1, it switches to Q=0 and for a value of Q = 0, it switches to Q=1.
The circuit includes two 3-input AND gates. The output Q of the flip flop is returned back as a
feedback to the input of the AND along with other inputs like K and clock pulse [CP]. So, if the
value of CP is 1, the flip flop gets a CLEAR signal and with the condition that the value of Q
was earlier 1. Similarly output Q of the flip flop is given as a feedback to the input of the AND
along with other inputs like J and clock pulse [CP]. So the output becomes SET when the value
of CP is 1 only if the value of Q was earlier 1.
The output may be repeated in transitions once they have been complimented for J=K=1
because of the feedback connection in the JK flip-flop. This can be avoided by setting a time
duration lesser than the propagation delay through the flip-flop. The restriction on the pulse
width can be eliminated with a master-slave or edge-triggered construction.

The circuit diagram and truth-table of a J-K flip flop is shown below.

4. T Flip Flop
This is a much simpler version of the J-K flip flop. Both the J and K inputs are connected
together and thus are also called a single input J-K flip flop. When clock pulse is given to the
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flip flop, the output begins to toggle. Here also the restriction on the pulse width can be
eliminated with a master-slave or edge-triggered construction. Take a look at the circuit and
truth table below.

Registers

Flip-flop is a 1 bit memory cell which can be used for storing the digital data. To increase the
storage capacity in terms of number of bits, we have to use a group of flip-flop. Such a group of
flip-flop is known as a Register. The n-bit register will consist of n number of flip-flop and it
is capable of storing an n-bit word.
The binary data in a register can be moved within the register from one flip-flop to another.
The registers that allow such data transfers are called as shift registers. There are four mode
of operations of a shift register.
Serial Input Serial Output
Serial Input Parallel Output
Parallel Input Serial Output
Parallel Input Parallel Output

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Serial Input Serial Output

Let all the flip-flop be initially in the reset condition i.e. Q3 = Q2 = Q1 = Q0 = 0. If an entry of a
four bit binary number 1 111 is made into the register, this number should be applied to Din
bit with the LSB bit applied first. The D input of FF-3 i.e. D3 is connected to serial data input
Din. Output of FF-3 i.e. Q3 is connected to the input of the next flip-flop i.e. D2 and so on.

Block Diagram

Operation
Before application of clock signal, let Q3 Q2 Q1 Q0 = 0000 and apply LSB bit of the number to be
entered to Din. So Din = D3 = 1. Apply the clock. On the first falling edge of clock, the FF-3 is set,
and stored word in the register is Q3 Q2 Q1 Q0 = 1000.

Apply the next bit to Din. So Din = 1. As soon as the next negative edge of the clock hits, FF-2 will
set and the stored word change to Q3 Q2 Q1 Q0 = 1100.

Apply the next bit to be stored i.e. 1 to Din. Apply the clock pulse. As soon as the third negative
clock edge hits, FF-1 will be set and output will be modified to Q3 Q2 Q1 Q0 = 1110.

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Similarly with Din = 1 and with the fourth negative clock edge arriving, the stored word in the
register is Q3 Q2 Q1 Q0 = 1111.

Truth Table

Waveforms

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Serial Input Parallel Output
In such types of operations, the data is entered serially and taken out in parallel fashion.
Data is loaded bit by bit. The outputs are disabled as long as the data is loading.
As soon as the data loading gets completed, all the flip-flops contain their required data, the
outputs are enabled so that all the loaded data is made available over all the output
lines at the same time.
4 clock cycles are required to load a four bit word. Hence the speed of operation of SIPO
mode is same as that of SISO mode.

Block Diagram

Parallel Input Serial Output (PISO)

Data bits are entered in parallel fashion.
The circuit shown below is a four bit parallel input serial output register.
Output of previous Flip Flop is connected to the input of the next one via a combinational
circuit.
The binary input word B0, B1, B2, B3 is applied though the same combinational circuit.
There are two modes in which this circuit can work namely - shift mode or load mode.
Load mode
When the shift/load bar line is low (0), the AND gate 2, 4 and 6 become active they will pass
B1, B2, B3 bits to the corresponding flip-flops. On the low going edge of clock, the binary input
B0, B1, B2, B3 will get loaded into the corresponding flip-flops. Thus parallel loading takes place.
Shift mode
When the shift/load bar line is low (1), the AND gate 2, 4 and 6 become inactive. Hence the
parallel loading of the data becomes impossible. But the AND gate 1,3 and 5 become active.
Therefore the shifting of data from left to right bit by bit on application of clock pulses. Thus
the parallel in serial out operation takes place.

Block Diagram

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Parallel Input Parallel Output (PIPO)
In this mode, the 4 bit binary input B0, B1, B2, B3 is applied to the data inputs D0, D1, D2, D3
respectively of the four flip-flops. As soon as a negative clock edge is applied, the input binary
bits will be loaded into the flip-flops simultaneously. The loaded bits will appear
simultaneously to the output side. Only clock pulse is essential to load all the bits.

Block Diagram

Full Adder
Full adder is developed to overcome the drawback of Half Adder circuit. It can add two one-bit
numbers A and B, and carry c. The full adder is a three input and two output combinational
circuit.

Block diagram

Truth Table

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Circuit Diagram

Decoder
A decoder is a combinational circuit. It has n input and to a maximum m = 2n outputs. Decoder
is identical to a de-multiplexer without any data input. It performs operations which are
exactly opposite to those of an encoder.

Block diagram

Examples of Decoders are following.

Code converters
BCD to seven segment decoders
Nixie tube decoders
Relay actuator

Multiplexers

Multiplexer is a special type of combinational circuit. There are n-data inputs, one output and
m select inputs with 2m = n. It is a digital circuit which selects one of the n data inputs and
routes it to the output. The selection of one of the n inputs is done by the selected inputs.
Depending on the digital code applied at the selected inputs, one out of n data sources is
selected and transmitted to the single output Y. E is called the strobe or enable input which is
useful for the cascading. It is generally an active low terminal that means it will perform the
required operation when it is low.

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Block diagram

Multiplexers come in multiple variations

2 : 1 multiplexer
4 : 1 multiplexer
16 : 1 multiplexer
32 : 1 multiplexer

Block Diagram

Truth Table

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Computer Architecture

Computer architecture is a specification detailing how a set of software and hardware

technology standards interact to form a computer system or platform. In short, computer
architecture refers to how a computer system is designed and what technologies it is
compatible with.
As with other contexts and meanings of the word architecture, computer architecture is
likened to the art of determining the needs of the user/system/technology, and creating a
logical design and standards based on those requirements.

A very good example of computer architecture is Von Neumann architecture, which is still
used by most types of computers today. This was proposed by the mathematician John Von
Neumann in 1945. It describes the design of an electronic computer with its CPU, which
includes the arithmetic logic unit, control unit, registers, memory for data and instructions, an
input/output interface and external storage functions.

There are three categories of computer architecture:

System Design: This includes all hardware components in the system, including data
processors aside from the CPU, such as the graphics processing unit and direct memory
access. It also includes memory controllers, data paths and miscellaneous things like
multiprocessing and virtualization

Instruction Set Architecture (ISA): This is the embedded programming language of the
central processing unit. It defines the CPU's functions and capabilities based on what
programming it can perform or process. This includes the word size, processor register
types, memory addressing modes, data formats and the instruction set that
programmers use.

Micro architecture: Otherwise known as computer organization, this type of architecture

defines the data paths, data processing and storage elements, as well as how they should be
implemented in the ISA.

Computer Organization
Computers play a significant role in meeting our everyday requirements. You can
now browse the Internet for a new home, order from a supermarket on-line and
have the goods delivered to your door. You can import a new car from abroad at
the touch of a button, order clothes from a catalogue company and communicate
with friends overseas.

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 The ways in which you learn are also changing.
You can complete a school or college assignment
using a general purpose package, or solve
programming problems at home on your own PC,
emailing your results to your instructor for
feedback. You can use computer based learning
tools to assist you in understanding new concepts.
You are using one such tool right now!

Computer organiz ation

Computers are digital machines that execute machine code programs and operate
on data in binary form. By binary form we mean a representation of information as
0s and 1s. Binary representation of information was considered earlier in this unit.
Here we examine the internal organization of the computer to understand how
machine code programs are run.

Organization of a Simple Computer

A simple computer consists of the following components

Processor;
Memory;
Input/output devices;
Communication channels

Input devices include the keyboard and mouse and can be used to supply input to
the processor. Output devices include the screen and printers and these can be
used to supply output from the processor. Input and output devices are often
known as peripheral devices.

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Some computers have more than one processor; however we will concentrate on
single processor machines in this topic. The processor is where instructions are
processed and computations are carried out. It is the control centre of the
computer.

The communication channels allow data and control signals to be communicated

between the main components of the computer via the system bus or external bus.
A bus is a collection of parallel wires each of which can carry a digital signal. Thus a
16-bit wide bus could transmit 16 bits simultaneously. The processor has its own
internal bus allowing the communication of data and control signals between its
component parts.

It is worth noting here that the system bus contains lines to transmit data, lines to
transmit memory addresses and various control lines. Frequently it is thought of as
if these were separate buses: a data bus, an address bus and control lines. Sometimes
the data and address lines are not separate at all and the same lines are used for
different purposes at different times. For example, one moment sending an address
to memory and the next transmitting data from the addressed memory location to
the processor.

A more detailed diagram of the main components of a simple computer are shown
in Figure 2.2.

The Organization of a Simple Computer

The computer illustrated in Figure 2.2 is a typical example of a Von Neumann

architecture. Virtually all computers follow this architecture model that has its
origins in the stored program concept proposed by John Von Neumann in 1945.
The basic idea behind the Stored Program Concept is that the sequence of
instructions (or program) to solve a problem should be stored in the same memory
as the data. This ensured that the computer became a general-purpose, problem-
Solving tool, since to make it solve a different problem required only that a different program be
placed in memory.

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 The component parts of the computer are:

Processor. Carries out computation and has overall control of the computer.
Main memory. Stores programs and data while the computer is running. Has fast access, is
directly accessible by the processor, is limited in size and non-permanent.

External memory. Holds substantial quantities of information too large for storage in main
memory. Slower access than main memory, not accessible directly by the processor but can be
used to keep a permanent copy of programs and data.

Peripheral devices (input/output devices). These allow the computer to communicate with
the outside world.
External system bus. This allows communication of information between the component
parts of the computer.

Some possible transfers of information via the system bus include:

data transmitted from main memory to the processor

input data from an external device (e.g. the keyboard) travelling from the device to
main memory

information from external memory transmitted to main memory The processor
typically consists of
 a Control Unit (CU) which exerts overall control over the operation of the processor;
 an Arithmetic and Logic Unit (ALU) which carries out computation;
 a set of registers which can hold intermediate results during a computation. These
components are linked by an internal bus.
In practice, the architecture of a modern digital computer will be more complex than the
description given here, with each component itself being an assembly of parts connected by
various different buses. However, for the moment, this will suffice as a model for how the
major parts of a digital computer are organized.

Data Structure
Data Structures are the programmatic way of storing data so that data can be used efficiently.
Almost every enterprise application uses various types of data structures in one or the other
way.

Functions

A function is a block of organized, reusable code that is used to perform a single, related
action. Functions provide better modularity for your application and a high degree of code
reusing. You have already seen various functions like print f() and main(). These are called
built-in functions provided by the language itself, but we can write our own functions as well
and this tutorial will teach you how to write and use those functions in C programming
language.
Good thing about functions is that they are famous with several names. Different
programming languages name them differently, for example, functions, methods, sub-routines,
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procedures, etc.

Why a Propagation delay occurs in circuit?

1) Propagation delay, symbolized tpd, is the time required for a digital signal to travel from the
input(s) of a logic gate to the output. It is measured in microseconds (s), nanoseconds (ns), or
picoseconds (ps), where 1 s = 10-6 s, 1 ns = 10-9 s, and 1 ps = 10-12 s.
The propagation delay for an integrated circuit (IC) logic gate may differ for each of the inputs.
If all other factors are held constant, the average propagation delay in a logic gate IC increases
as the complexity of the internal circuitry increases. Some IC technologies have interently
longer tpd values than others, and are considered "slower." Propagation delay is important
because it has a direct effect on the speed at which a digital device, such as a computer, can
operate. This is true of memory chips as well as microprocessors.
2) In a communications system, propagation delay occurs due to the time lag between
the departure of a signal from the source and the arrival of the signal at the destination.
This can range from a few nanoseconds or microseconds in local area networks (LANs) up to
about 0.25 s in geostationary-satellite communications systems. Additional propagation
delays can occur as a result of the time required for packets to make their way through
land-based cables and nodes of the Internet.

Results of Counter Applications

Power supply is 15V with LM317/LM337. There is also a separate stabilizer with 7808 which
supplies frequency counter board.
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Digital Clock

Time measurement

Schematic diagram of a digital measuring device used to measure time intervals: (GG) gate
pulse generator, (CC) coincidence circuit, (CPG) clock pulse

A to D converter (analog and Digital)

Routine for optimum performance, which allows the noise floor and dynamic range to
improve by 1-2dB.
2dB. The calibration cycle operates by calibrating the gain and the zero
reference of the A/D converter.
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Frequency divider circuits

Digital triangular wave generator

This circuit generates a triangular waveform with a frequency of about 1 kHz; the circuit was
taken from [1]. You will use Fourier Analysis to determine its frequency spectrum.

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Bonus

A circuit counts the number of 1 bits in an unsigned binary integer ABCD and outputs an unsigned
binary integer PQR. For example, if ABCD = 0101, then PQR 010; if ABCD =1011,then PQR 011. You are
also told that the value of the input ABCD is in the range
from zero through eleven only (i.e, 12, 13, 14 and 15 are invalid inputs.)

(a) What is the simplified SOP expression of P?

P=O

(b) What is the simplified SOP expression of Q?

Q = A.C+A.D+B.C+B.D+C.D

(c) What is the simplified SOP expression of R?

R = A-C~D'+ A-C-D + B-CD'+ B-C-D + A~WCD + AtBtC.D'

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