EE-712 Embedded system design

Supporting document for Assembly programming

January 5, 2016

1 Register configurations for GPIO Ports:

There are two on-chip buses that connect the core to the peripherals. The
Advanced Peripheral Bus (APB) bus is the legacy bus. The Advanced High-
Performance Bus (AHB) bus provides better back-to-back access performance
than the APB bus. APB can be used for this Labwork.

Following registers have to be configured to use a port as GPIO.

1. GPIO Data (GPIODATA): The GPIODATA register is the data reg-
ister. In software control mode, values written in the GPIODATA register
are transferred onto the GPIO port pins if the respective pins have been
configured as outputs through the GPIO Direction (GPIODIR) register.
The GPIO ports allow for the modification of individual bits in the GPIO
Data (GPIODATA) register by using bits [9:2] of the address bus as a
mask.

For example, GPIODATA Port F (APB) base: 0x40025000. To use all

bits in this port we should unmask bits 9 to 2 of the address bus thus
making the GPIODATA Port F address as 0x400253FC.
2. GPIO Direction (GPIODIR): The GPIODIR register is the data di-
rection register. Setting a bit in the GPIODIR register configures the
corresponding pin to be an output, while clearing a bit configures the cor-
responding pin to be an input. Port pins 7 to 0 are mapped to 7:0 of this
register.

For example, GPIO DIR register address for Port F(APB) is 0x40025400(with
offset). So, to configure pins 0, 4 as inputs and remaining as outputs we
need to send #0x0E to the above address. Likewise, other ports DIR
register addresses can be found on page 661 of tm4c123gh6pm.pdf
3. GPIO Digital Enable (GPIODEN): To use the pin as a digital input
or output, the corresponding GPIODEN bit must be set. Port pins 7 to 0

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 are mapped to 7:0 of this register. All GPIO DEN register addresses can
be found on page 681 of above mentioned pdf.

4. GPIO Analog Mode Select (GPIOAMSEL): Port pins 7 to 0 are

mapped to 7:0 of this register. To disable analog function of the pin,
enable isolation, and to make the pin capable of digital functions as spec-
ified, 0 has to be written to it. All GPIO AMSEL register addresses can
be found on page 685 of above mentioned pdf.

5. GPIO Alternate Function Select (GPIOAFSEL): The GPIOAF-

SEL register is the mode control select register. If a bit is clear, the pin is
used as a GPIO and is controlled by the GPIO registers. Setting a bit in
this register configures the corresponding GPIO line to be controlled by
an associated peripheral.
Port pins 7 to 0 are mapped to 7:0 of this register. In this lab assignment,
we will use only GPIO functionality. So, 0 has to be send to the corre-
sponding pins. All GPIO AMSEL register addresses can be found on page
669 of above mentioned pdf.
6. GPIO Port Control (GPIOPCTL): The GPIOPCTL register is used
in conjunction with the GPIOAFSEL register and selects the specific pe-
ripheral signal for each GPIO pin when using the alternate function mode.
Most bits in the GPIOAFSEL register are cleared on reset, therefore most
GPIO pins are configured as GPIOs by default. All GPIO PCTL register
addresses can be found on page 687 of above mentioned pdf.

Each pin is assigned with 4 bits in this register. Bits 31 to 28 correspond

to pin7, bits 27 to 24 are to pin6 and so on. So, to use a pin as GPIO, 4
bits associated to it are to be cleared.

7. GPIO Run Mode Clock Gating Control (RCGCGPIO): The RCGCG-

PIO register provides software the capability to enable and disable GPIO
modules in Run mode. When enabled, a module is provided a clock and
accesses to module registers are allowed. When disabled, the clock is dis-
abled to save power and accesses to module registers generate a bus fault.

Address of RCGCGPIO register is 0x400FE608. Bits 0 to 5 are mapped

to ports A to F. 1 to corresponding port bit enables clock for that port.
Note that each GPIO module clock must be enabled before the registers
can be programmed. There must be a delay of 3 system clocks after the
GPIO module clock is enabled before any GPIO module registers are ac-
cessed.
8. GPIO Lock (GPIOLOCK) & GPIO Commit (GPIOCR) : The
purpose of GPIOCR is to provide a layer of protection against accidental

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 programming of critical hardware signals including the GPIO pins that
can function as JTAG/SWD signals and the NMI signal. In order to use
a pin as an input pin, we have to unlock this pin. Writing 0x4C4F434B
to the GPIOLOCK register unlocks the GPIOCR register.
For example, PORT-F has a base address of 0x40025000 and GPIOLOCK
has an offset 0x520. Thus we have to write 0x4C4F434B at location
0x40025520. The GPIOLOCK register enables write access to the GPI-
OCR register. GPIOCR has an offset of 0x524 and we have to write 1 in
the last bit of this register, i.e. at location 0x40025524, to unlock PF0.
9. GPIO Pull-Up Select (GPIOPUR): The GPIOPUR register is the
pull-up control register. When a bit is set, a weak pull-up resistor on
the corresponding GPIO signal is enabled. Write access to this register is
protected with the GPIOCR register.
Bits 7:0 of this register are mapped to port pins 7 to 0. When using a
port pin as input, it has to be configured with pull-ups.

2 Setting up Assembly project in CCS:

1. Go to Project New CCS project. Select all the information same as
mentioned in CCS Installation.pdf (only for this window).
2. After the project is created, Delete main.c file from the project.

3. Right click on the projectShow Build SettingsAdvanced OptionsAssembler

Options
Check Keep the Generated Assembly language file
Check Generate listing file
4. Right click on the project New File t Give filename as filename.asm
Write your code in the asm file.
5. Build the project
6. Load .out file to the target to see the output.

3 Sample code with comments

Below program makes different color LEDs on based on the switches SW1, SW2.
Switches and LEDs are connected to port F.
. thumb
. text
. align 2
GPIO PORTF DATA R . f i e l d 0x400253FC , 3 2
GPIO PORTF DIR R . f i e l d 0 x40025400 , 3 2
GPIO PORTF AFSEL R . f i e l d 0 x40025420 , 3 2

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GPIO PORTF PUR R . field 0 x40025510 , 3 2
GPIO PORTF DEN R . field 0 x4002551C , 3 2
GPIO PORTF LOCK R . field 0 x40025520 , 3 2
GPIO PORTF CR R . field 0 x40025524 , 3 2
GPIO PORTF AMSEL R . field 0 x40025528 , 3 2
GPIO PORTF PCTL R . field 0 x4002552C , 3 2
GPIO LOCK KEY . field 0x4C4F434B , 3 2 ; Unlocks t h e GPIO CR r e g i s t e r
RED . equ 0 x02
BLUE . equ 0 x04
GREEN . equ 0 x08
SW1 . equ 0 x10 ; on t h e l e f t s i d e o f t h e Launchpad board
SW2 . equ 0 x01 ; on t h e r i g h t s i d e o f t h e Launchpad board
SYSCTL RCGCGPIO R . field 0x400FE608 , 3 2

. g l o b a l main

main : . asmfunc
BL P o r t F I n i t ; i n i t i a l i z e i n p u t and output p i n s o f Port F
loop
LDR R0 , FIFTHSEC ; R0 = FIFTHSEC ( d e l a y 0 . 2 s e c o n d )
BL d e l a y ; d e l a y a t l e a s t ( 3 R0) c y c l e s
BL P o r t F I n p u t ; r e a d a l l o f t h e s w i t c h e s on Port F
CMP R0 , #0x01 ; R0 == 0 x01 ?
BEQ s w 1 p r e s s e d ; i f so , s w i t c h 1 p r e s s e d
CMP R0 , #0x10 ; R0 == 0 x10 ?
BEQ s w 2 p r e s s e d ; i f so , s w i t c h 2 p r e s s e d
CMP R0 , #0x00 ; R0 == 0 x00 ?
BEQ b o t h p r e s s e d ; i f so , both s w i t c h e s p r e s s e d
CMP R0 , #0x11 ; R0 == 0 x11 ?
BEQ n o p r e s s e d ; i f so , n e i t h e r s w i t c h p r e s s e d
; i f none o f t h e above , unexpected r e t u r n v a
MOV R0 , #(RED+GREEN+BLUE) ; R0 = (RED|GREEN|BLUE) ( a l l LEDs on )
BL PortF Output ; t u r n a l l o f t h e LEDs on
B loop
sw1pressed
MOV R0 , #BLUE ; R0 = BLUE ( b l u e LED on )
BL PortF Output ; t u r n t h e b l u e LED on
B loop
sw2pressed
MOV R0 , #RED ; R0 = RED ( r e d LED on )
BL PortF Output ; t u r n t h e r e d LED on
B loop
bothpressed
MOV R0 , #GREEN ; R0 = GREEN ( g r e e n LED on )
BL PortF Output ; t u r n t h e g r e e n LED on
B loop

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 nopressed
MOV R0 , #0 ; R0 = 0 ( no LEDs on )
BL PortF Output ; t u r n a l l o f t h e LEDs o f f
B loop
. endasmfunc
;del ay
; Delay f u n c t i o n f o r t e s t i n g , which d e l a y s about 3 count c y c l e s .
; Input : R0 count
; Output : none
ONESEC . f i e l d 5333333 ,32 ; a p p r o x i m a t e l y 1 s d e l a y a t 16 MHz c l o
QUARTERSEC . f i e l d 1333333 ,32 ; a p p r o x i m a t e l y 0 . 2 5 s d e l a y a t 16 MHz
FIFTHSEC . f i e l d 1066666 ,32 ; a p p r o x i m a t e l y 0 . 2 s d e l a y a t 16 MHz
delay : . asmfunc
SUBS R0 , R0 , #1 ; R0 = R0 1 ( count = count 1 )
BNE d e l a y ; i f count (R0) != 0 , s k i p t o delay
BX LR ; return
. endasmfunc

;P o r t F I n i t
; I n i t i a l i z e GPIO Port F f o r n e g a t i v e l o g i c s w i t c h e s on PF0 and
; PF4 a s t h e Launchpad i s w i r e d . Weak i n t e r n a l p u l l up
; r e s i s t o r s a r e enabled , and t h e NMI f u n c t i o n a l i t y on PF0 i s
; d i s a b l e d . Make t h e RGB LED s p i n s o u t p u t s .
; Input : none
; Output : none
; M o d i f i e s : R0 , R1 , R2
PortF Init : . asmfunc
LDR R1 , SYSCTL RCGCGPIO R ; 1 ) a c t i v a t e c l o c k f o r Port F
LDR R0 , [ R1 ]
ORR R0 , R0 , #0x20 ; s e t b i t 5 t o t u r n on c l o c k
STR R0 , [ R1 ]
NOP
NOP ; a l l o w time f o r c l o c k t o f i n i s h
LDR R1 , GPIO PORTF LOCK R ; 2) unlock the lock r e g i s t e r
LDR R0 , GPIO LOCK KEY ; u n l o c k GPIO Port F Commit R e g i s t e r
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF CR R ; e n a b l e commit f o r Port F
MOV R0 , #0xFF ; 1 means a l l o w a c c e s s
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF AMSEL R ; 3) d i s a b l e analog f u n c t i o n a l i t y
MOV R0 , #0 ; 0 means a n a l o g i s o f f
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF PCTL R ; 4 ) c o n f i g u r e a s GPIO
MOV R0 , #0x00000000 ; 0 means c o n f i g u r e Port F a s GPIO
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF DIR R ; 5) s e t d i r e c t i o n r e g i s t e r

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 MOV R0,#0x0E ; PF0 and PF74 input , PF31 output
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF AFSEL R ; 6) r e g u l a r port f unctio n
MOV R0 , #0 ; 0 means d i s a b l e a l t e r n a t e f u n c t i o n
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF PUR R ; p u l l up r e s i s t o r s f o r PF4 , PF0
MOV R0 , #0x11 ; e n a b l e weak p u l l up on PF0 and PF4
STR R0 , [ R1 ]
LDR R1 , GPIO PORTF DEN R ; 7 ) e n a b l e Port F d i g i t a l p o r t
MOV R0 , #0xFF ; 1 means e n a b l e d i g i t a l I /O
STR R0 , [ R1 ]
BX LR
. endasmfunc

;PortF Input
; Read and r e t u r n t h e s t a t u s o f t h e s w i t c h e s .
; Input : none
; Output : R0 0 x01 i f o n l y Switch 1 i s p r e s s e d
; R0 0 x10 i f o n l y Switch 2 i s p r e s s e d
; R0 0 x00 i f both s w i t c h e s a r e p r e s s e d
; R0 0 x11 i f no s w i t c h e s a r e p r e s s e d
; M o d i f i e s : R1
PortF Input : . asmfunc
LDR R1 , GPIO PORTF DATA R ; p o i n t e r t o Port F data
LDR R0 , [ R1 ] ; r e a d a l l o f Port F
AND R0 , R0,#0 x11 ; j u s t t h e i n p u t p i n s PF0 and PF4
BX LR ; r e t u r n R0 with i n p u t s
. endasmfunc

;PortF Output
; S e t t h e output s t a t e o f PF31.
; Input : R0 new s t a t e o f PF
; Output : none
; M o d i f i e s : R1
PortF Output : . asmfunc
LDR R1 , GPIO PORTF DATA R ; p o i n t e r t o Port F data
STR R0 , [ R1 ] ; w r i t e t o PF31
BX LR
. endasmfunc

. end ; end o f f i l e

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4 References
1. tm4c123gh6pm.pdf
2. TivaC examples by ValvanoExamples