Whites, EE 481/581 Lecture 25 Page 1 of 11

Lecture 25: Wilkinson Power Divider.

The next three port network we will consider is the Wilkinson
power divider, in particular the 1:1 power divider (Fig 7.8b):

/4
Z0 Port 2
Z 0,Q
Port 1 Z0 R

Z 0,Q
Z0 Port 3
/4

This is a popular power divider because it is easy to construct

and has some extremely useful properties:
1. Matched at all ports,
2. Large isolation between output ports,
3. Reciprocal,
4. Lossless when output ports are matched.

There is much symmetry in this circuit that we can exploit to

make the S parameter calculations easier. Specifically, we will
excite this circuit in two very special configurations
(symmetrically and anti-symmetrically), then add these two
solutions for the total solution.

This mathematical process is called an even-odd mode

analysis. It is a technique used in many branches of science
such as quantum mechanics, antenna analysis, etc.

2016 Keith W. Whites

Whites, EE 481/581 Lecture 25 Page 2 of 11

We will now show that for a 1:1 Wilkinson power divider,

Z 0,Q 2Z 0 and R 2 Z 0 . To simplify matters, as in the text, we
will:
1. Normalize all impedances to Z 0 ,
2. Not draw the return line for the TL.
For example, a TL with characteristic impedance 2Z 0 will be
delineated as
2

Hence, the Wilkinson power divider shown in the first figure

above, and with matched terminations, can be drawn as

z0,Q
z0,Q

Even-Odd Mode Analysis of the

Wilkinson Power Divider

In the even-odd mode analysis for the S parameters, we will first

excite this network symmetrically at the two output ports,
followed by an anti-symmetrical excitation.
Whites, EE 481/581 Lecture 25 Page 3 of 11

Symmetric excitation (even mode):

V2e

z0,Q
e
V 1
z0,Q

V3e

Notice that I 0 because we have symmetrical excitation.

Hence, V2e V3e and we can bisect this circuit as shown to
simplify the analysis (Fig. 7.10a):

V2e

zine Vg 2 2V
z0,Q
V1e

We can recognize this circuit as a QWT. Consequently,

z0,2 Q
zin
e
(7.33),(1)
2
or z0,Q 2 zine (2)

We want the output ports to be matched. Therefore,

zine 1 z0,Q 2 (3)
Since zine 1, then by voltage division at the output port
zine 1
V2 e
e
Vg 2 Vg 2 V (4)
zin 1 2
Whites, EE 481/581 Lecture 25 Page 4 of 11

Next, to find V1e well use the TL equation

V x V e j x e j x
so that V 0 V 1 V1e (5)
Therefore,
j 2 4 2
j
V 4 V e

e 4
(7.34a),(6)
jV 1 V2e V
(4)

is the reflection coefficient at port 1 seen looking towards the

normalized load of 2 /. Therefore,
2 z0,Q 2 2
(7)
2 z0,Q 3 2 2
Substituting V from (6) into (5) and using (7) we find that
V
V1e 1
jV 2 (8)
j 1 7

Anti-symmetric excitation (odd mode):

V2o

z0,Q

z0,Q

V3o
Whites, EE 481/581 Lecture 25 Page 5 of 11

Since the circuit is fed anti-symmetrically, V3o V2o and the

voltage = 0 at points A and B. Hence, to simplify the analysis,
we can bisect the circuit with grounds as shown (Fig 7.10b):
V2o

zino 2V
2
V1o

For zino , notice that the load is a short circuit and the TL is 4
long (1/2 rotation around the Smith chart). This means zino .
Therefore, to match port 2 (and 3) for odd mode excitation,
select
r
1 r 2 [/] (9)
2

Further, because zino , then with r 2 and port 2 matched:

r 2
V2o 2V V (10)
r 2 1 9

Even and odd solutions are eigenvectors. Any solution can be

determined by summing appropriately weighted eigenvectors.

With this information, well be able to deduce most of the S

parameters. But first, lets determine zin,1 so we can compute
S11 . Terminating ports 2 and 3 gives the circuit in Fig. 7.11a:
Whites, EE 481/581 Lecture 25 Page 6 of 11

2
zin,1

By symmetry, V2 V3 so we can bisect the circuit like we did in

the even mode analysis (Fig 7.11b):

2
zin,1

This input impedance is that from a parallel combination of two

matched QWTs:
2 2
2 2
zin,1 z0,Q z0,Q 1 (7.36),(11)

In other words, we have a matched input at port 1.

Also, notice that the effects of r no longer appear so this circuit

is ideally lossless when matched at both output ports.
Whites, EE 481/581 Lecture 25 Page 7 of 11

S Parameters of the Wilkinson Power Divider

Finally, we will determine the S parameters of the Wilkinson

power divider.

S11 . From (11),

S11 0 (12)

S22 and S33 . Well compute S22 here, while by symmetry,

S33 S 22 .

A circuit with a voltage source applied to only port 2 can be

obtained by simply adding the even and odd mode excitation
problems together:
V2e 1 1 V2o 1 1
/4 /4
Vg2 2V Vg2 2V
1 z0,Q 1 z0,Q
r r
1 z0,Q 1 z0,Q
1 1
/4 /4
V e 1 V o 1
3 Vg3 2V 3 Vg3 -2V

V2 1 1
/4
Vg2 4V
1 z0,Q
r
1 z0,Q
1
/4
V3 1

To be specific, what were adding together are the voltages

(and currents) everywhere in the identical two circuits that
have different excitations.
Whites, EE 481/581 Lecture 25 Page 8 of 11

By definition
V2
S 22
V2 V1 V3 0

The voltage wave amplitudes V2 and V2 are the sum of the

respective voltages from the even and odd mode excitation
circuits. That is,
V2e , V2o ,
S 22 e ,
V2 V2o , V V 0
1 3

Earlier in (3), we chose z0,Q 2 in the even mode solution

so that port 2 was matched, meaning V2e , 0 . Likewise, in
the odd mode solution we chose r = 2 in (9) to match port 2,
meaning V2o , 0 . Using these two results means that
S 22 0 S33 (13)
The last equality is valid due to the symmetry in the
Wilkinson power divider circuit with respect to ports 2 and 3.

S12 and S 21 . By definition

V1
S12
V2 V1 V3 0

We can use the previous figure with excitation at port 2 for

this solution to S12. Well add voltages together from the even
and odd mode solutions, similar to what we did in the solution
for S22.
Whites, EE 481/581 Lecture 25 Page 9 of 11

Because port 1 is matched in both the even and odd mode

circuits (V1e , V1o , 0 ), the total voltage at port 1 is just V1 :
V1 V1 V1e V1o (14)
Similarly, since port 2 is matched in both the even and odd
mode circuits (V2e , V2o , 0 ) then
V2 V2 V2e V2o (15)

Consequently, using (14) and (15) along with (4), (8), (10),
and V1o 0 (p. 5) we find
V1e V1o jV 2 0 2
S12 e j
V2 V2o V V 2
j
or S12 S 21 (16)
2
The last equality arises because the Wilkinson power divider
is a reciprocal network.

S13 and S31 . Using a similar approach as that for S12 and S 21 ,
it can be shown that
j
S13 S31 (17)
2

S32 and S23 . By definition

V3 V3e, V3o ,
S32 e,
V2 V V 0 V2 V2o , V1 V3 0
1 3

But, from the symmetry of the circuit and the odd and even
nature of the solutions, we know
Whites, EE 481/581 Lecture 25 Page 10 of 11

V3e , V2e , and V3o , V2o ,

such that,
V2e, V2o ,
S32 e, (18)
V2 V2o , V1 V3 0

Using (4) and (10) in (18), we find:

V V
S32 0 S 23 (19)
V V
This last result shows that at the design frequency there is
complete isolation between the output ports! Nice.

Remember that these S parameters for the Wilkinson divider are

only applicable at the design frequency since we used QWTs.

Recap

Lets reflect on this Wilkinson power divider design for a

moment. We listed on page 1 four properties we wanted to build
into this power divider. We began with only two degrees of
freedom in the circuit on page 1: Z 0,Q and R . Both of these
were used to obtain three matched ports.

So how are the other three conditions satisfied since weve used
up all the degrees of freedom available to us? First, the circuit is
obviously reciprocal since it is constructed from metal and
dielectric materials only.
Whites, EE 481/581 Lecture 25 Page 11 of 11

The remaining two conditions (large isolation and lossless when

the output ports are matched) are met because of the symmetric
nature of the circuit! Consequently, it is very important to ensure
that Wilkinson power divider circuits maintain this physical
symmetry when they are constructed.