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The document is a lecture outline on circuit and packet switching. It contains two problems analyzing the delays of circuit-switched networks for different amounts of data transferred, and calculating the arrival times of 5 datagrams traveling over different paths through a network.

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219 views10 pages

Answers Asgn 5 PDF

The document is a lecture outline on circuit and packet switching. It contains two problems analyzing the delays of circuit-switched networks for different amounts of data transferred, and calculating the arrival times of 5 datagrams traveling over different paths through a network.

Uploaded by

Deep M Patel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Multimedia Systems

WS 2010/2011

20.12.2010

M. Rahamatullah Khondoker (Room # 36/410 )


University of Kaiserslautern
Department of Computer Science
Integrated Communication Systems ICSY
http://www.icsy.de
Outline

Sheet 4: Circuit and Packet Switching

M. Rahamatullah Khondoker, University of Kaiserslautern 2


Circuit and Packet Switching

1. A path in a digital circuit-switched network has a data rate


of 1 Mbps. The exchange of 1000 bits is required for the
setup and teardown phases. The distance between two
parties is 3000 km. Answer the following questions if the
propagataion speed is 2 108 m/s:
a. What is the total delay if 1000 bits of data are exchanged during
the data transfer phase?
b. What is the total delay if 100,000 bits of data are exchanged
during the data transfer phase?
c. What is the total delay if 1,000,000 bits of data are exchanged
during the data transfer phase?
d. Find the delay per 1000 bits of data for each of the above cases
and compare them. What can you infer?

M. Rahamatullah Khondoker, University of Kaiserslautern 3


Circuit and Packet Switching

Total delay (t) = delay of setup and tear down (d1) + delay
of data transfer (d2)

Delay of setup and tear down (d1) = ( 3 * propagation


delay) + (3 * transmission delay)
Delay of data transfer = propagation delay + transmission
delay

M. Rahamatullah Khondoker, University of Kaiserslautern 4


Circuit and Packet Switching

1. Delay of setup and tear down (d1)


= ( 3 * propagation delay) + (3 * transmission delay)
3000 1000
= 3 +3
(2108 /) 1
= (3 15) + (3 1)
= 48
Lets assume, data transmission is in one direction
a. = 1 + 2
= 48 + + = 48 +
15 + 1 = 64
b. = 1 + 2
= 48 + + = 48 +
15 + 100 = 163

M. Rahamatullah Khondoker, University of Kaiserslautern 5


Circuit and Packet Switching

c. = 1 + 2
= 48 + + = 48 +
15 + 1000 = 1053
163
d. For a, we have 64 ms, for b, we have, = 1.63 ms, for c, we
100
1053
have, = 1.053 ms. The ratio for the case of 3 is the smallest
1000
because of using one setup and tear down phase for sending
more data

M. Rahamatullah Khondoker, University of Kaiserslautern 6


Circuit and Packet Switching

2. Five equal-size datagrams belonging to the same


message leave for the destination one after another.
However, they travel through different paths as shown in
the following table
Datagram Path Length Visited Switches
1 3200 Km 1,3,5
2 11,700 Km 1,2,5
3 12,200 Km 1,2,3,5
4 10,200 Km 1,4,5
5 10,700 Km 1,4,3,5

We assume that the delay for each switch (including waiting and processing)
is 3, 10, 20, 7, and 20 ms respectively. Assuming that the propagation speed
is 2 108 m/s, find the order the datagrams arrive at the destination and the
delay for each. Ignore any other delays in transmission.

M. Rahamatullah Khondoker, University of Kaiserslautern 7


Circuit and Packet Switching

2. Assuming that the transmission time is negligible (i.e., all


datagrams start at time 0). The arrival times are calculated as
3200
: 8
+ 3 + 20 + 20 = 59
2 10 /
11700
: 8
+ 3 + 10 + 20 = 91.5 Switch Delay
2 10 / (ms)

12200
1 3

: + 3 + 10 + 20 + 20 = 114 2 10

2 108 / 3 20

10200
4 7

: + 3 + 7 + 20 = 81 5 20

2 108 /
10700
: + 3 + 7 + 20 + 20 = 103.5
2 108 /
The order of the arrival is 3 5 2 4 1

M. Rahamatullah Khondoker, University of Kaiserslautern 8


Thanks for your attention

Any questions, comments or


concerns?
M. Rahamatullah Khondoker, M.Sc.
Integrated Communication Systems ICSY
University of Kaiserslautern
Department of Computer Science
P.O. Box 3049
D-67653 Kaiserslautern
Phone: +49 (0)631 205-26 43
Fax: +49 (0)631 205-30 56
Email: [email protected]
Internet: http://www.icsy.de

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