Applications Description: General Purpose NPN Transistor Array
Applications Description: General Purpose NPN Transistor Array
Applications Description: General Purpose NPN Transistor Array
Applications Description
Three Isolated Transistors and One Differentially The CA3086 consists of five general-purpose silicon NPN
Connected Transistor Pair For Low-Power Applications transistors on a common monolithic substrate. Two of the
from DC to 120MHz transistors are internally connected to form a differentially
connected pair.
General-Purpose Use in Signal Processing Systems
Operating in the DC to 190MHz Range The transistors of the CA3086 are well suited to a wide vari-
ety of applications in low-power systems at frequencies from
Temperature Compensated Amplifiers
DC to 120MHz. They may be used as discrete transistors in
See Application Note, AN5296 Application of the conventional circuits. However, they also provide the very
CA3018 Integrated-Circuit Transistor Array for significant inherent advantages unique to integrated circuits,
Suggested Applications such as compactness, ease of physical handling and ther-
mal matching
Ordering Information
PART NUMBER TEMP. PKG.
(BRAND) RANGE ( oC) PACKAGE NO.
CA3086 -55 to 125 14 Ld PDIP E14.3
CA3086M -55 to 125 14 Ld SOIC M14.15
(3086)
CA3086M96 -55 to 125 14 Ld SOIC Tape M14.15
(3086) and Reel
Pinout
CA3086
(PDIP, SOIC)
TOP VIEW
1 14
Q5
2 13 SUBSTRATE
Q1
3 12
Q2
4 11
Q4
5 10
6 9
Q3
7 8
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
| Intersil and Design is a trademark of Intersil Americas Inc. | Copyright Intersil Americas Inc. 2001
File Number 483.4
5-1
CA3086
NOTES:
1. The collector of each transistor in the CA3086 is isolated from the substrate by an integral diode. The substrate (Terminal 13) must be
connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor
action. To avoid undesirable coupling between transistors, the substrate (Terminal 13) should be maintained at either DC or signal (AC)
ground. A suitable bypass capacitor can be used to establish a signal ground.
2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC, Typical Values Intended Only for Design Guidance
TYPICAL
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
IE = 10mA 0.800 V
5-2
CA3086
Electrical Specifications TA = 25oC, Typical Values Intended Only for Design Guidance (Continued)
TYPICAL
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
102 103
IB = 0
IE = 0
COLLECTOR CUTOFF CURRENT (nA)
COLLECTOR CUTOFF CURRENT (nA)
10 102
VCB = 15V VCE = 10V
VCB = 10V
10
1 VCB = 5V
VCE = 5V
10-1 1
10-2 10-1
10-3 10-2
10-4 10-3
0 25 50 75 100 125 0 25 50 75 100 125
TEMPERATURE (oC) TEMPERATURE (oC)
5-3
CA3086
120 0.8
VCE = 3V VCE = 3V
TA = 25 oC TA = 25oC
0.7
100 VBE
90
0.6
80
70
0.5
60
50 0.4
0.01 0.1 1 10 0.01 0.1 1.0 10
EMITTER CURRENT (mA) EMITTER CURRENT (mA)
100
VCB = 3V VCE = 3V
f = 1kHz
TA = 25oC hFE = 100 hOE
NORMALIZED h PARAMETERS
hIE = 3.5k AT
hRE = 1.88 x 10-4
BASE-TO-EMITTER VOLTAGE (V)
0.7
I E = 3mA hFE
1.0
0.6
IE = 1mA
IE = 0.5mA
0.5 hRE
hIE
0.4 0.1
-75 -50 -25 0 25 50 75 100 125 0.01 0.1 1.0 10
TEMPERATURE (oC) COLLECTOR CURRENT (mA)
5
INPUT CONDUCTANCE (gIE)
30
4
gFE
20
3
bIE
10
2
0
gIE
-10 bFE 1
-20 0
0.1 1 10 100 0.1 1 10 100
FREQUENCY (MHz) FREQUENCY (MHz)
5-4
CA3086
-1.0
2
1 -1.5
gOE
0 -2.0
0.1 1 10 100 1 10 100
FREQUENCY (MHz) FREQUENCY (MHz)
VCE = 3V
TA = 25 oC
1000
GAIN BANDWIDTH PRODUCT (MHz)
900
800
700
600
500
400
300
200
100
0
0 1 2 3 4 5 6 7 8 9 10
COLLECTOR CURRENT (mA)
FIGURE 11. fT vs IC
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporations quality certifications can be viewed at website www.intersil.com/design/quality/iso.asp.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
5-5