Scribd
Upload
127 views2 pages

Figure 1. Block Diagram of N-Bit Magnitude Comparator

The document describes a 2-bit magnitude comparator. A magnitude comparator is a combinational circuit that compares two numbers, A and B, and determines if A is greater than, equal to, or less than B. It has 2n inputs and outputs three binary variables to indicate the comparison. For a 2-bit comparator, there are 4 inputs and the truth table has 16 rows. The document then discusses how the choice of logic style can impact the speed, size, power dissipation, and wiring complexity of the circuit.

Uploaded by

Srikanthchowdary Maguluri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
127 views2 pages

Figure 1. Block Diagram of N-Bit Magnitude Comparator

The document describes a 2-bit magnitude comparator. A magnitude comparator is a combinational circuit that compares two numbers, A and B, and determines if A is greater than, equal to, or less than B. It has 2n inputs and outputs three binary variables to indicate the comparison. For a 2-bit comparator, there are 4 inputs and the truth table has 16 rows. The document then discusses how the choice of logic style can impact the speed, size, power dissipation, and wiring complexity of the circuit.

Uploaded by

Srikanthchowdary Maguluri
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 2

2-BIT MAGNITUDE COMPARATOR

INTRODUCTION:

In digital system, comparison of two numbers is an arithmetic operation that determines if


one number is greater than, equal to, or less than the other number . So comparator is used for
this purpose. Magnitude comparator is a combinational circuit that compares two numbers, A
and B, and determines their relative magnitudes (Fig.1). The outcome of comparison is
specified by three binary variables that indicate whether A>B, A=B, or A<B.

Figure 1. Block Diagram of n-Bit Magnitude Comparator

The circuit, for comparing two n-Bit numbers, has 2n inputs & 22n entries in the truth table,
for 2-Bit numbers, 4-inputs & 16-rows in the truth table, similarly, for 3-Bit numbers 6-inputs
& 64-rows in the truth table . The logic style used in logic gates basically influences the
speed, size, power dissipation, and the wiring complexity of a circuit. Circuit size depends on
the number of transistors and their sizes and on the wiring complexity. The wiring complexity
is determined by the number of connections and their lengths. All these characteristics may
vary considerably from one logic style to another and thus proper choice of logic style is very
important for circuit performance.

2-BIT MAGNITUDE COMPARATOR


2
2-BIT MAGNITUDE COMPARATOR

BACHELOR OF TECHNOLOGY
In
ELECTRONICS AND COMMUNICATION ENGINEERING
By
D.Bhanu prakash (14004452)

Y.Bojjiyya (14004478)

Mahesh (14004476)
(14004481)

ABSTRACT

In this project a new design of comparator is described with the help of CMOS
design style. In the world of technology it has become essential to develop
various new design methodologies to reduce the power and area consumption.
In this paper comparator are developed using various design of CMOS design
style. This will reduce the power of the comparator design. The proposed
comparator has been designed using DSCH andMicrowind at 120 nm
technologies. The developed comparator will show an improvement in power.

You might also like