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    Assignment 1 OS Sem I 16 17

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    Hazimah Sairin
    This document outlines an assignment for a computer architecture course. It includes 5 questions about interrupt-driven I/O, cache memory tradeoffs, differences between multiprocessor and multicore systems, and hypothetical microprocessor architectures. Students are to submit handwritten or typed hard copies of their answers to these 5 questions by February 17th before 5pm.

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    Assignment 1 OS Sem I 16 17

    Uploaded by

    Hazimah Sairin
    221 views1 page
    This document outlines an assignment for a computer architecture course. It includes 5 questions about interrupt-driven I/O, cache memory tradeoffs, differences between multiprocessor and multicore systems, and hypothetical microprocessor architectures. Students are to submit handwritten or typed hard copies of their answers to these 5 questions by February 17th before 5pm.

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    operating systems questions

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    This document outlines an assignment for a computer architecture course. It includes 5 questions about interrupt-driven I/O, cache memory tradeoffs, differences between multiprocessor and multicore systems, and hypothetical microprocessor architectures. Students are to submit handwritten or typed hard copies of their answers to these 5 questions by February 17th before 5pm.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    221 views1 page

    Assignment 1 OS Sem I 16 17

    Uploaded by

    Hazimah Sairin
    This document outlines an assignment for a computer architecture course. It includes 5 questions about interrupt-driven I/O, cache memory tradeoffs, differences between multiprocessor and multicore systems, and hypothetical microprocessor architectures. Students are to submit handwritten or typed hard copies of their answers to these 5 questions by February 17th before 5pm.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    Assignment 1 (Chapter 1) (Section 2 & 3 ONLY)

    Type of submission: hard copy (handwritten or typing)


    Submission due date: 17th Feb. -2017 (Before 5 pm)

    Q1: Explain briefly how interrupt-driven I/O works? Why interrupt-driven is better than
    Programmed I/O technique?

    Q2: What are the trade-offs that determine the size of the cache memory? Explain them in
    details

    Q3: What is the difference between a multiprocessor and a multicore system? Explain them in
    details and discuss the impact of the multicore/multiprocessor on the performance f the
    computer system

    Q4: Consider a hypothetical 64-bit microprocessor having 64-bit instructions composed of two
    fields. The first two bytes contains the opcode and the reminder an immediate operandor an
    operand address.

    a. What is the maximum directly addressable memory capacity (in byte)?


    b. Discuss the impact on the system speed if the microprocessor bus has
    1. A 64-bit local address bus and a 16-bit local data bus.
    2. A 32-bit local address bus and a 16-bit local data bus
    c. How many bits are needed for the program counter and the instruction register?

    Q5: Consider a hypothetical microprocessor generating a 32-bit address (e.g., assume that the
    program counter and the address registers are 32 bits wide) and having a 32-bit data bus.

    a. What is the maximum memory address space that the processor can access directly if it
    is connected to a 32-bit memory?
    b. What is the maximum memory address space that the processor can access directly if it
    is connected to an 16-bit memory?

    End of the Questions

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