PDC Lesson Plan New
PDC Lesson Plan New
PDC Lesson Plan New
Sl.
No.
FACULTY
LESSON PLAN
The objective of this course is to introduce different IC technologies, fabrication ,electric properties,constructions of
layout diagram and study of different array logics such as PLA,PAL,FPGA,CPLD and CMOS testing.
Topic
1. Acquire qualitative knowledge about the fabrication process of integrated circuit using MOS
Transistor.
2. Choose an appropriate inverter depending on specifications required for circuit
3. Draw the layout of any logic circuit which helps to understand and estimate parasitic of any logic circuit.
4. Design different types of logic gates using CMOS inverter and analyze their transfer characteristics.
5. Provide design concepts required to design building blocks of data path using gates.
6. Provide design concepts required to design building blocks of data path using gates.
7. Design simple logic circuit using PLA, PAL, FPGA and CPLD.
8. Understand different types of faults that can occur in a system and learn the concept of testing and adding extra har
improve testability of system.
HOD
DEAN
I/13
II/12
III/13
IV/13
V/13
extra hardware to
SVSIT
II
Class& Se
Year& Sem
III
IV
SVSIT
Class& Section: EC
Year& Semester: II
MULTIVIBRATORS:Analysis, Operation
Bistable Multivibrator
Mono-stable Multivibrator
Astable Multivibrator
Schmmitt trigger circuit
TIME BASE GENERATORS:General features of Time base signal, methods of generating time base
signal
Basic principles of Time base generators
Transistor Miller Time base Generator
Transistor Bootstrap Time base Generator
Transistor current Time base generators
Methods of Linearity Improvement
Problem solving
SYNCHRONIZATION & FREQUENCY DIVISION
Pulse Synchronization of Relaxation devices
Frequency division in Sweep circuits
stability of relaxation devices
Astable relaxation circuit
Monostable relaxation circuit
Synchronization of sweep circuit with Symmetrical signals
Sine wave frequency division with a sweep circuit
A sinusoidal divider using Regeneration & Modulation
REALIZATION OF LOGIC GATES WITH DIODES & TRANSISTORS: AND, OR, NOT gates
using Diodes
AND, OR, NOT gates using Transistors
DCTL, RTL logic families
DTL & TTL Logic families
CML logic families & comparison of all logic families
TEXT BOOKS:
1. Digital and Switching waveforms- J. Millman H. Taub and Mothiki S. Prakash Rao, 2 Ed., 2008, TMH
2. Solid State Pulse Circuits- David A. Bell, 4 Ed., 2002 PHI
REFERENCE BOOKS:
1. Pulse and Digital Circuits-A. Anand Kumar, 2005, PHI
2. Fundamentals of Pulse and Digital Circuits-Ronald J. Tocci, 3 Ed., 2008
Faculty
HOD
RATED CAMPUS
Hours taken
as per the
Topic
Cumulative
Hours taken
1/9/2017
1/10/2017
1/11/2017
1/16/2017
1/17/2017
1/18/2017
1/19/2017
1/20/2017
1/21/2017
1/23/2017
1/24/2017
2008, TMH
1/25/2017
1/27/2017
2/20/2017
2/21/2017
2/22/2017
2/23/2017
2/25/2017
2/27/2017
2/28/2017
3/1/2017
3/2/2017
3/3/2017
3/6/2017
3/7/2017
3/8/2017
3/16/2017
3/17/2017
3/20/2017
3/21/2017
3/22/2017
3/23/2017
3/29/2017
3/30/2017
4/3/2017
4/4/2017
4/5/2017
Principal
G. RAMESH
UNIT
TOPIC
SUB-TOPICS
High pass RC ckt and its response to Sinusoidal,Step & Pulse i/ps
High pass RC ckt and its response to Square and Ramp i/ps
Low pass RC ckt and its response to Sinusoidal,Step & Pulse i/ps
Low pass RC ckt and its response to Square and Ramp i/ps
II
III
SWITCHING
CHARACTERISTICS OF
DEVICES
Diode as a Switch
Piece wise Linear Diode characteristics
Diode Switching Times
Trasistor as Switch, Break down voltages, Trasistor in saturation
Temperature variation of saturation parameters
Transistor switching times
Silicon Controlled Switch circuits
Sampling Gates: Basic principle: Uni-directional gates
Bi-Directional gates
Four Diode sampling gate
Reduction of pedastal in Gate circuits
SYNCHRONIZATION &
FREQUENCY DIVISION and
REALIZATION OF LOGIC
GATES WITH DIODES &
TRANSISTORS
General features of Time base signal, methods of generating time base signal
Basic principles of Time base generators
Transistor Miller Time base Generator
Transistor Bootstrap Time base Generator
Transistor current Time base generators
Methods of Linearity Improvement
Pulse Synchronization of Relaxation devices
Frequency division in Sweep circuits
stability of relaxation devices
Astable relaxation circuit
Monostable relaxation circuit
Synchronization of sweep circuit with Symmetrical signals
Sine wave frequency division with a sweep circuit
A sinusoidal divider using Regeneration & Modulation
AND, OR, NOT gates using Diodes
AND, OR, NOT gates using Transistors
DCTL, RTL logic families
DTL & TTL Logic families
CML logic families & comparison of all logic families
TEXT BOOKS:
1. Digital and Switching waveforms- J. Millman H. Taub and Mothiki S. Prakash Rao, 2 Ed., 2008, TMH
2. Solid State Pulse Circuits- David A. Bell, 4 Ed., 2002 PHI
REFERENCE BOOKS:
R1: Pulse and Digital Circuits-A. Anand Kumar, 2005, PHI
Signature of Faculty
Signature of HOD
NTEGRATED CAMPUS
F ECE
N-I
Class & Section: ECE
Year & Sem: II-II
Methods of
Teching
Teaching Aid
No. of
Lecturer
Hours
CLASS ROOM
DISCUSSION
BB
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2
1
1
1
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Objective
Descriptive
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LAB
PPT
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LAB
PPT
NPTEL video
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NPTEL video
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CLASS ROOM
DISCUSSION
LAB
GUEST LECTURE
CLASS ROOM
DISCUSSION
LAB
GUEST LECTURE
Date of
Reference
Type of
Completion of Book for SubAssignment Works
Unit
Topic
12/23/2016
T1
R1 & R3
1/6/2017
T1
R1 & R3
CLASS ROOM
DISCUSSION
LAB
CLASS ROOM
DISCUSSION
PPT
BB
NPTEL video
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1
1
1
1
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Case study
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Objective
Descriptive
Case study
Objective
1/24/2017
T2
R2 & R3
CD
LAB VERIFICATION
GUEST LECTURE
CLASS ROOM
DISCUSSION
CLASS ROOM
DISCUSSION
LAB
CLASS ROOM
DISCUSSION
GUEST LECTURE
NPTEL video
NPTEL video
NPTEL video
NPTEL video
PPT
1
1
1
1
1
Descriptive
Descriptive
Descriptive
Descriptive
Case study
NPTEL video
Objective
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NPTEL video
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NPTEL video
PPT
1
1
1
1
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1
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1
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Case study
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Case study
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Case study
Case study
Descriptive
Objective
Objective
Objective
Objective
Descriptive
3/3/2017
T1
R1 & R3
4/5/2017
T1
R1 & R2
Signature of Principal