Determining Optimal Lot Size
Determining Optimal Lot Size
KEY WORDS
Lot size, semiconductor manufacturing, queuing,
simulation, production logistics.
INTRODUCTION
Productivity
improvement
efforts
in
the
semiconductor industry have historically focused
on wafer fab operations. However, it has recently
been recognized that the so-called back-end
factories have great potential for improvement,
particularly in the area of production logistics.
Figure 1 shows the general material flow of
semiconductor manufacturing from wafer fab
through the elements of the back-end factory (preassembly through mark/scan/pack).
Wafer
Start
Wafer
Fab
Pre-Assembly
Assembly
End Of Line
Burn In / Test
Mark Scan Pack
Product
Ship
4
3.5
3
2.5
2
1.5
1
0.5
E[ A] =
0
100
1100
2100
3100
4100
5100
6100
7100
E[L] (units)
1 + cB 2
E[CT ] =
E[ B] + E[ B]
2 1
(For an English derivation of this formula, see
Hopp and Spearman [1996, pg. 295].) As a next
step, we have to look at the lot size dependency of
the three factors B, and cB2 .
The service time increases linearly for increasing
lot size L, according to the following formula. The
constant overhead part is denoted by C.
E[ B] = E[ L ] + C
E[ B ] unit ( E[ L ] + C )
=
E[ A]
E[ L ]
unit <
E [ L]
E [ L] + C
E[ L]
unit
0.6
0.5
0.4
0.3
0.2
0.1
0
100
1100
2100
3100
4100
5100
6100
7100
E[L] (units)
1
0.5
0
100
1100
2100
3100
4100
5100
6100
7100
E[L] (units)
0.4
0.2
0.15
0.1
0
0.6
100
1100
2100
3100
4100
5100
6100
7100
E[L] (units)
8
7
0.5
6
5
0.4
0.3
0.2
0.1
3
2
1
0
0
1000
2000
3000
4000
5000
6000
7000
8000
E[L] (units)
16
14
12
3
10
14
12
1
0
4
2
0
0
1000
2000
3000
4000
5000
6000
7000
8000
E[L] (units)
0.3
0.25
0.05
10
0.35
10
8
6
4
2
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
SIMULATION APPLICATION:
LOT SIZE INFLUENCE
cycle time
+ 14%
Throughput
cycle time
lot size 3k
+ 8.5%
Throughput
CONCLUSION
ACKNOWLEDGMENTS
The authors gratefully acknowledge the technical
contribution of Dr. Jennifer Robinson, Chance &
Robinson, Inc., and the editorial assistance of Mr.
Steven Brown, Infineon Technologies. We thank
our many partners from the Malacca and Singapore
factories for their active participation.
REFERENCES
AUTHOR BIOGRAPHIES
JUERGEN POTORADI is a Factory Modeling
and Simulation analyst and project leader with
Infineon
Technologies
(formerly
Siemens
Semiconductor Division). He is currently
responsible for implementing simulation techniques
and methodologies in the Asian back-end factories:
Singapore and Malaysia. Mr. Potoradi received his
undergraduate and graduate degrees in Computer
Science from the University of Wuerzburg in
Germany. He has extensive experience in
simulation analysis of semiconductor wafer fab and
back-end production operations. His email address
is [email protected].
GERALD WINZ received his doctorate in
engineering from Fraunhofer Institute, Dortmund.
After logistics consulting for the German
production and trade industry, he joined Infineon
Technologies (then Siemens Semiconductor
Division) in 1997. Dr. Winz is in charge of OCM
introduction (Operating Curve Management, a
queuing theory application) in the Asian back-end
factories: Singapore and Malaysia. His email
address is [email protected].