Welcom To
EE323-Microprocessor Interfacing
Program: CE (Fall 2016)
Lecture: 1
Course Instructor: Muhammad Suleman ([email protected])
Room: F08
TA: Engr. Ahsan Shah
Prerequisite: EE222-Computer Architecture
Text Books:
The 8051 Microcontroller and Embedded Systems, M. A. Mazidi,
J. G. Mazidi, R. D. McKinlay
PIC Microcontroller and Embedded Systems, M. A. Mazidi, R.D.
McKinlay
Reference Books:
The 8051 Microcontroller (4rd Edition), I. Scott MacKenzie
The Intel Microprocessors (Sixth Edition), Barry B. Brey
Grading Policy:
Project
Quizzes (Announced + Surprise)
Mid-Term Exam
Final-Term Exam
Quizzes:
15%
15%
25%
45%
Weekly or biweekly (Announced/Un-announced)
No re-takes
Attendance:
80% class attendance is mandatory, in order to appear in the final
exam.
Office Hours:
2:30 to 3:30 PM
Note:
Above contents could be changed if required
Quizzes and MID term must be checked in prescribed date and time.
After one week of the displayed result, no changes in marks are
accepted.
Course Outline
Introduction to Microprocessors, Introduction to 8051, Hardware of 8051
Memory of 8051, Introduction to Assembly Language, Assembly Language
Programming of 8051, Addressing Modes of 8051
Use of Jumps, Loops and Subroutines
I/O Port Programming, Arithmetic & Logic Instruction
Timer Programming of 8051
Timer, Serial port programming of 8051
Serial, Interrupt Programming of 8051
Interrupt Programming of 8051, Interfacing External memory
Introduction to PIC18, Hardware structure of PIC, Software Model of PIC
Assembly Language Programming of PIC18
Timer, Serial Port Programming of PIC
Interrupt programming of PIC
CCP and ECCP programming
MOTOR Control, PWM
LCD AND KEYBORD Interfacing
Learning Outcomes
Be able to explain the architecture, basic components, and
functions of different types of
microcontroller/microprocessor and program a
microcontroller using its various addressing modes. (PLO 1)
Be able to apply the concepts of delay generation, show
how to generate a square wave using Timers and/or
interrupts, and employ the serial port of a microcontroller
to transfer data serially between two devices. (PLO3)
Be able to design networks to interface and
control/manipulate devices with
microcontroller/microprocessor using Assembly language
and C programming. (PLO 3)
Project/Problem Based Learning
Project to be graded both in course and lab
Projects offered as a problem based learning (PBL) exercise
This year 3 projects will be offered in Microprocessor Interfacing
2016 Lab Manual
Details available in Lab-14 of the Lab Manual
Choose a PBL lab and register by the end of 9th week
Submission of a proposal by the end of 10th week (not more than one
page)
Submission of progress report by the end of 12th week (not more than
2 pages)
Final report submission on 1st day of 15th week before 5:00 PM
Final demonstration and viva during 15th week.
Each of the activities listed above will contribute towards your final
project score
Do not miss deadlines and strictly adhere to the prescribed formats
Details about proposal and report guidelines will be shared on
course website in the coming weeks.
Introduction To Microprocessors
Outline
Microprocessors
Inside The Computer
CPU
Busses
Storage Devices
Registers
ALU
Program Counter
Instruction Decoder
Internal Working Of A Computer
Microprocessor
General Purpose microprocessors
Intel x86 family or Motorola 680x0 family
No RAM, no ROM, no I/O ports on chip
Inside the Computer
CPU (Central Processing Unit)
Executes information stored in memory
I/O (Input/output) devices
Provide a means of communicating with CPU
Memory
RAM (Random Access Memory)
Temporary storage of programs that computer is running
The data is lost when computer is off
Volatile memory
ROM (Read Only Memory)
Contains programs and information essential to operation of the
computer
The information cannot be changed and is not lost when switched off
Nonvolatile memory
10
A Typical Computer
11
CPU
The CPU is connected to memory and I/O
through strips of wire called a bus
A bus carries information from place to place
Address bus
Data bus
Control bus
12
Address bus
Busses
An address for every device (memory or I/O)
Must be a unique address
The CPU puts the address on the address bus and the decoding
circuitry finds the device
Control bus
Provides read or write signals to the device to indicate if the
CPU is asking for information or sending it information
Data bus
The CPU either gets data from the device or sends data to it
13
Busses Contd
The more data buses available, the better the CPU
Think of data buses as highway lanes
More data buses mean a more expensive CPU and
computer
The average size of data buses in CPUs varies between 8 and 64-bit
Data buses are bidirectional
To receive or send data
The processing power of a computer is related to the
size of its buses
8 bit can send 1 byte at a time
16-bit can send 2 bytes at a time => Twice as fast as 8-bit
14
Busses Contd
More address buses mean more addressable devices
The number of locations with which a CPU can
communicate is always equal to 2x, where x is the address
lines or address bits, regardless of the size of the data bus
e.g; a CPU with 24 address lines and 16 data lines can provide a total
of 224 or 16M bytes of addressable memory
Each location can have a maximum of 1 byte of data, thus
all general-purpose CPUs are byte addressable
i.e; data is accessed 8-bits at a time
Though many common architectures can address more than 8bits of data at a time
The address bus is unidirectional
Only used for sending out addresses
15
Storage Devices
For the CPU to process information, the data must be
stored in RAM or ROM, which are referred to as primary
memory
ROM provides information that is fixed and permanent
Tables for character patterns or initialization program
RAM stores information that is not permanent and can
change with time
Various versions of OS and application packages
CPU gets information to be processed first form RAM (or
ROM)
If it is not there, then seeks it from a mass storage device,
called secondary memory, and transfers the information to
RAM
16
Internal Block Diagram Of A CPU
17
Registers
Program stored in memory, provides CPU instructions to perform an
action
The CPU uses registers to store information temporarily
Values to be processed
Address of value to be fetched from memory
In general, the more and bigger the registers, the better the CPU
Registers can be 8, 16, 32 or 64-bit
More Registers => Better CPU
Disadvantage: Increased cost of CPU
18
ALU (Arithmetic/Logic Unit)
Resposible for performing:
Arithematic operations
Addition, Subtraction, Multiplication and Division
Logic functions
AND, OR and NOT
19
Program Counter (IP)
Points to the address of next instruction to be executed
As an instruction is executed, program counter
increments and points to the address of the next
instruction to be executed
Contents of program counter are placed on address
bus to find and fetch the desired instruction
Program counter is a register called IP or instruction
pointer
20
Instruction Decoder
Interprets the instruction fetched into the CPU
Kind of a dictionary that posseses meaning for
each instruction
Dictonary: more words => more pages
CPU: more instructions => more transistors to design
21
Microcontrolloer
Microcontrollers are hidden inside most of the
electronic products
Microwave oven
Modern automobiles (at least 1 to 6 microcontrollers)
TV
VCR
Camcorder
Digital Cameras and so on
22
Microcontroller Contd
Microcontrollers are embedded inside some
other device
A PC plugged into a wall socket might
consume 50 Watts, while battery powered
microcontroller might consume as low as 50
milliwatts
It can control a device by sending signals to
different components inside the device.
e.g; a TV
23
Microcontrollers VS General Purpose
Microprocessors
General-purpose microprocessors contains
No RAM
No ROM
No I/O ports
Microcontroller has
CPU (microprocessor)
RAM
ROM
I/O ports
Timer
ADC and other peripherals (added by some manufacturers)
24
Microcoprocessor VS Microcontroller
Contd
25
Microcoprocessor VS Microcontroller
Contd
General-purpose microprocessors
Must add RAM, ROM, I/O ports, and timers externally to make
them functional
Makes the system bulkier and much more expensive
Have the advantage of versatility on the amount of RAM, ROM,
and I/O ports
Microcontroller
The fixed amount of on-chip ROM, RAM, and number of I/O
ports makes them ideal for many applications in which cost and
space are critical
In many applications, the space it takes, the power it consumes,
and the price per unit are much more critical considerations
than the computing power
26
Microcontrollers and Embedded
Systems
An embedded product uses a microprocessor (or microcontroller) to do
one task and one task only
e.g; A printer
Unlike PC, in an embedded system there is only one application software
that is typically burned into ROM
A PC, in contrast with the embedded system, can be used for any number
of applications
A PC contains or is connected to various embedded products like
keyboard, printer, modem, mouse etc.
Each one peripheral has a microcontroller inside it that performs only one task
Name a few embedded products?
27
Embedded Processor OR
Microcontroller
At times microcontroller might be inadequate
for the task
Solution: general purpose microprocessor
Very often the terms embedded processor
and microcontroller are used interchangeably
28
Embedded Processors
One of the most critical needs of an
embedded system is to decrease power
consumption and space
Integrating more functions into CPU chip
In many cases using EMBEDDED PROCESSORS
BASED ON x86 saves money and shortens
development time [How?]
29
Embedded Processors Contd
EMBEDDED PROCESSORS BASED ON x86 save
money and shortens development because:
Vast library of Software has been written for DOS
and Windows Platforms
Windows is a widely used and well understood
platform
30
Choosing a Microcontoller
4 major 8-bit microcontrollers
Motorolas 6811
Intels 8051
Zilogs Z8
Microchips PIC 16X
Each of these have a unique instruction set and register
set
There are also 16-bit and 32-bit
microcontrollers
31
Lecture: 2
32
Criteria In Choosing Microcontrollers
1) Meeting the computing needs of the task at hand
efficiently and cost effectively
Speed
Packaging (important in terms of space, assembling
and prototyping the end product)
Power consumption (when working with batterypowered products)
The amount of RAM and ROM on chip
The number of I/O pins and the timer on chip
Cost per unit
33
Criteria Contd
2) Availability of software development tools
Compilers
Assemblers
Debuggers
Emulator
Technical support etc
3) Wide availability and reliable sources of the
microcontroller both in present and in future
The 8051 family of Intel has the largest number of diversified
(multiple source) suppliers of 8-bit microcontrollers such as
Atmel
Philips/Signetics
AMD
Infineon (formerly Siemens)
Matra
Dallas Semiconductor/Maxim
34
Advantages over Microprocessor
Simple circuitry
Intergrated Chip (RAM, ROM, I/O etc)
Cheaper
Easy to program
35
Hardware Of Microcontrollers
8051 Family
Intel introduced 8051, referred to as MCS-51, in 1981
The 8051 is an 8-bit processor
The CPU can work on only 8 bits of data at a time
The 8051 had
128 bytes of RAM
4K bytes of on-chip ROM
Two timers
One serial port
Four I/O ports, each 8 bits wide
6 interrupt sources
Interrupt: A notification to microcontroller.
Respond to external stimulus (interrupts) in real time
Suspend an on going process and respond to the interrupt
The 8051 became widely popular after allowing other manufactures
to make and market any flavor of the 8051, but remaining codecompatible
Microcontroller Block Diagram
Comparison among 8051/52/31
The 8051 is a subset of the 8052
The 8031 is a ROM-less 8051
Add external ROM to it and get as high as 64KB ROM
You lose two ports (one to address and one to data and
address), and leave only 2 ports for I/O operations
Solu onAdd external I/O to 8031
Some Versions Of 8051
8751 microcontroller
UV-EPROM
You need PROM burner as well as an eraser
Takes about 20 minutes to erase 8751 before you can program it
AT89C51 from Atmel Corporation
Flash (erase before write)
Erasable in seconds
You only need a ROM burner that supports flash
A separate eraser is not needed
Ideal for fast development
DS89C4x0 from Dallas Semiconductor, now part of Maxim
Corp.
Flash memory
A version of 8051/8052 that can be programmed via PC COM port
Versions Contd
OTP (One Time Programmable) version of 8051
Flash and NV-RAM are typically used for product
development or prototyping
OTP version is used for mass production after product
is finalized
Because its cheaper in terms of price per unit
8051 family from Philips
ADC, DAC, extended I/O
Both OTP and flash
The Hardware of 8051
A total of 40 pins
32 function as I/O port lines
24 of these lines are dual purpose (26 on 8032
and 8052)
Each can operate as I/O or as a control line or
part of the address or data bus
8051 Pinouts
Port 0
Port Functions
Dual purpose port on pins 32-39
Used as general purpose I/O port in minimum component
design
For larger designs with external memory, it becomes a
multiplexed address and data bus
Port 1
Performs I/O fucntions on pins 1-8
Unlike Port 0, no alternate functions for Port 1 pins
Used solely for interfacing to external devices
Exceptions: 8032/8052
P1.0 and P1.1 are used either as I/O lines or as external inputs to a
third timer
Port Functions Contd
Port 2
Like Port 0, its a dual purpose port on pins 21-28
Can serve as a general purpose I/O
Or as the high byte of address bus for designs
with external code memory or more than 256
bytes of external data memory
Port 3
A general purpose I/O as well as dual-purpose
port on pins 10-17
Pins have alternate purposes related to special
features of the 8051
Port Functions Contd
P1.0 and P1.1 are used as either I/O or external
inputs to the third timer in 8032/8052 ICs
Port Functions Contd
8051 has 4 dedicated bus control signals
PSEN = Program Store Enable
Sends output on pin 29
Enables the external program (code)
memory
Usually connects to Output Enable (OE) pin
of external EPROM to permit reading of
bytes
It is active low while reading program code
from external memory and latching it into
8051s instruction register for decoding
Remains in the inactive (high) state when
code is executed from internal ROM
Port Functions Contd
EA = External Access
Used when on chip ROM is insufficient or unavailable
as in 8031
Its an input signal on pin 31 that executes programs
from an external memory
Generally connected to Vcc with a high (+5V)
High => 8051/8052 executes programs from internal
ROM (lower 4K/8K of memory)
Low => programs are executed from external memory
and PSEN pulses are low accordingly
Note that EA tells the microcontroller that the code is
not available internally but externally, whereas PSEN
enables that external code memory
Port Functions Contd
ALE = Address Latch Enable
Its an output signal on pin 30
8051 uses it for demultiplexing the address and data
bus
When Port 0 is used in alternate mode as a data bus
and low-byte (0-7) of address bus then;
ALE is the pin that latches the address into external register
during first half of a memory cycle
After this Port 0 lines are available for data input or
output during second half of memory cycle, when
data transfer takes place
Port Functions Contd
RST = Reset
Its on pin 9
This input is master reset for 8051 and terminates
all activities when pressed
If set active high for at least two machine cycles,
8051s internal registers get loaded with
appropriate values for an orderly system start up
Program counter is set to all zeros
RST is low during normal operation
Port Functions Contd
On Chip Oscillator Inputs
This on chip oscillator requires an external clock
(crystal) to run it
Typically driven by a crystal connected to pins 18 and
19
Capacitors provide stability
The on chip oscillator can also be driven by a TTL clock
source thats is connected to XTAL1 and XTAL2
Typically 12 MHz for most ICs in 8051 family
The frequency of the on-chip oscillator must match that of
the external crystal
Power Connections
8051 operates from a single +5V supply
Vcc connection is on pin 40
Vss (ground) connection is on pin 20
EE323: Microprocessor Interfacing
Lecture 3: 8051 Memory
Memory Organization
Internal Memory
On Chip ROM
On Chip RAM
On chip RAM is divided into sections of:
General purpose storage
Bit addressable storage
Register banks
Special Function Registers
Registers and I/O ports are memory mapped
=> Accessable like any other memory location
General Purpose RAM
Locations accessible through direct or
indirect addressing
MOV A, 5FH Direct addressing
Value at 5FH moved into accumulator
MOV R0, #5FH
MOV A, @R0 Indirect addressing
R0 and R1 can act as pointer registers to
an address in memory location
LSB of instruction opcode determines
whether R0 or R1 is used
Bit Addressable RAM
210 bit addressable locations (210 bits)
128 bits are at byte locations 20H through 2FH
The rest of 82 bit addressable locations are in special
function registers (SFRs)
Bits can be set, cleared, ANDed, ORed etc with
a single instruction
Simplifies software interface to single-bit inputs and
outputs
These addresses can be accessed either as a
byte or as a bit
SETB 67H
; Sets bit number 7 at byte number 2CH
Same operation with microprocessor
MOV A, @2CH
ORL A, #10000000B
MOV 2CH, A
; Read entire byte
; Set MSB
; Write back entire byte
Register Banks
Present at bottom 32 bytes of internal RAM
8051 instruction set supports eight registers, R0 to R7
8 registers/bank
Each register is of 1 byte
By default Bank 0 is active
For example R5 of bank 0 is at 05H memory location
MOV A, R5 ; loads the contents of R5 or 05H in
accumulator
1 byte instruction (in the opcode, last three least
significant bits indicate the register number)
MOV A, 05H
Two byte instruction
Instructions using R0 to R7 are shorter than the equivalent
instructions using direct addressing
Data value used frequently should use one of these
registers
If bank three was active then any operation from
accumulator to R0 would write to location 18H
A bank can be activated using register bank select bits in
program status word (more on this later)
Special Function Registers (SFRs)
A total of 21 SFRs in 8051 from memory
location 80H to FFH
These are on top of the internal RAM
26 SFRs in 8032/8052
SFRs can be accessed directly
Some SFRs are both bit and byte
addressable
SETB 0E0H ; sets bit 0 in accumulator
E0H is both byte address of accumulator
and bit address of LSB in accumulator
SETB operates on only bits not bytes
How to set most significant bit in
accumulator B?
Program Status Word (PSW)
Contains status bits at address D0H
Each bit has a special function
Carry Flag (C or CY) has dual purpose
Used in arithmetic operations
E.g; if there is a carry out of bit 7 during add ,or set if there is a borrow into bit 7
during subtraction
ADD A, #1 {while; A= 11111111}
Accumulator is left with 00H after add operation and sets the carry flag to 1
Carry flag is also used as a Boolean Accumulator
Serves as a 1 bit register for boolean instructions operating on bits
e.g; ANDing with carry flag and putting the result back into C
ANL C, 25H ; ANDs the bit 25H with the carry flag
Boolean processing facilitates in writing the optimum code
Auxiliary Carry Flag (AC)
Auxiliary Carry Flag (AC)
AC is set if there is a carry from bit 3 into bit 4
Or if the result in the lower nibble is in the range of 0AH-0FH => if
greater than 9d
MOV R5, #1
MOV A, #9
ADD A, R5
1
00000001
+ 00001001
00001010
ACC result= 0AH => 10d
=> AC = 1
Register Bank Select Bits
RS0 and RS1 bit in PSW determine the active bank register
Cleared after system reset or change by software as needed
System reset activates bank 0 (address 00-07H) by default
PSW.4 (RS1)
0
0
1
1
PSW.3 (RS0)
0
1
0
1
Active Bank
0 (00-07H)
1 (08-0FH)
2 (10-17H)
3 (18-1FH)
Overflow flag and Parity Bit
Overflow flag indicates if during add/subtract
operations between signed numbers, the
numbers are in the correct range
Parity bit is automatically set or cleared every
machine cycle
Used for establishing even parity with accumulator
The number of 1s in accumulator plus parity bit is
always even
Used in serial port routines to check for parity during
transmission and reception
B Register
B Register is also called accumulator B
Used along with accumulator A for multiply
and divide operations
Lower byte of multiplication result goes to A
and higher byte goes to B
In division, integer result goes to A and
remainder goes to B
Also a bit addressable register
Stack Pointer
Contains address of data item currently on top of
the stack or last used location of stack
Default value in SP is 07H
Thus stack starts from 08H
Stack operations include pushing data on top of
stack and popping data off the stack
Pushing on stack increments SP before writing
data
Popping from the stack reads data and then
decrements the SP
Data Pointer
Used for accessing external code or data memory
Its a 16 bit register at address 82H(low-byte) and 83H(highbyte)
Port Registers
8051 has four ports; P0, P1, P2 and P3 at 80H, 90H, A0H
and B0H respectively
P0, P2 and P3 are not available for I/O when external
memory is connected or during interrupts or serial port
communications
P1.2 to P1.7 are always available as general purpose I/O
lines
All ports are bit addressable
CLR P1.7 and CLR 97H are same instructions
Timer Registers
8051 has two 16-bit timer registers for timer
intervals or counting events
Serial Port Registers
Used for communicating with serial devices such
as modems , IC interfaces (A/D converter etc)
SBUF holds the transmit and receive data
Writing to SBUF loads data for transmission
Reading SBUF accesses received data
SCON is a serial port control register
SCON is bit addressable
Power Control Register (PCON)
Contains various control bits
e.g; SMOD bit doubles the baud rate (or data rate)
PCON is not bit addressable
Some general purpose flags are also present
IDL (Idle mode) is activated to save power
The last instruction of a program can activate IDL to take microcontroller into
idle mode in order to save power
Clock signal is Gated off to CPU
Terminated via enabled interrupt or system reset
Power down mode
When PD bit is set 8051 goes into power down mode
Instruction setting PD bit will be the last instruction
Oscillator stopped
All functions stopped
On-chip RAM contents are retained
Port pins retain their logic levels
PD mode can be exited through system reset
External Memory
