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Verilog

The document describes a basic alarm clock system with inputs to set the time and alarm time, and outputs displaying the current time and activating an alarm output when the time matches the alarm time. The system is modeled with a block diagram and tables describing the input and output pins. The Verilog code for the system and a test stimulus are left incomplete for the reader to finish.

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LoiLeVan
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© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
664 views

Verilog

The document describes a basic alarm clock system with inputs to set the time and alarm time, and outputs displaying the current time and activating an alarm output when the time matches the alarm time. The system is modeled with a block diagram and tables describing the input and output pins. The Verilog code for the system and a test stimulus are left incomplete for the reader to finish.

Uploaded by

LoiLeVan
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Project Description.

A basic alarm clock system is modelled to the block diagram


(Figure 1) and pin description functional tables (Table 1 and Table
2). A 10Hz clock input should be used to output real time in the
24-hour format of hour, minute and second. (HH:MM:SS). The
hour and minute can be set from input pins, as can the alarm time.
If the real time equals the alarm time, the "Alarm" output should
be activated.

Table 1: Inputs Pin Description and functional table

PIN

Input / Output

Description

Input

Active high reset pulse, to set the time


to the input hour and minute (as
defined by the H_in1, H_in0, M_in1,
and M_in0 inputs) and the second to
00.It should also set the alarm value to
0.00.00, and to set the Alarm (output)
low.For normal operation, this input
pin should be 0.

Input

A 10Hz input clock. This should be


used to generate each real-time
second.

Input (2-bit)

A 2-bit input used to set the most


significant hour digit of the clock (if
LD_time=1),or the most significant
hour digit of the alarm (if
LD_alarm=1). Valid values are 0 to 2.

Input (4-bit)

A 4-bit input used to set the least


significant hour digit of the clock (if
LD_time=1),or the least significant
hour digit of the alarm (if
LD_alarm=1). Valid values are 0 to 9.

M_in1

Input (4-bit)

A 4-bit input used to set the most


significant minute digit of the clock (if
LD_time=1),or the most significant
minute digit of the alarm (if
LD_alarm=1). Valid values are 0 to 5.

M_in0

Input (4-bit)

A 4-bit input used to set the least


significant minute digit of the clock (if
LD_time=1),or the least significant

reset

clk

H_in1

H_in0

minute digit of the alarm (if


LD_alarm=1). Valid values are 0 to 9.

LD_time

LD_alarm

STOP_al

AL_ON

Input

If LD_time=1, the time should be set


to the values on the inputs H_in1,
H_in0, M_in1, and M_in0. The
second time should be set to 0.If
LD_time=0, the clock should act
normally (i.e. second should be
incremented every 10 clock cycles).

Input

If LD_alarm=1, the alarm time should


be set to the values on the inputs
H_in1, H_in0, M_in1, and M_in0.If
LD_alarm=0, the clock should act
normally.

Input

If the Alarm (output) is high, then


STOP_al=1 will bring the output back
low.

Input

If high, the alarm is ON (and Alarm


will go high if the alarm time equals
the real time). If low the the alarm
function is OFF.

Table 2: Output Pin Description and functional table

PIN

Input / Output

Description

Alarm

Output

This will go high if the alarm time


equals the current time, and AL_ON
is high. This will remain high, until
STOP_al goes high, which will bring
Alarm back low.

H_out1

Output (2-bit)

The most significant digit of the hour.


Valid values are 0 to 2.

H_out0

Output (4-bit)

The least significant digit of the hour.


Valid values are 0 to 9.

M_out1

Output (4-bit)

The most significant digit of the


minute. Valid values are 0 to 5.

M_out0

Output (4-bit)

The least significant digit of the


minute. Valid values are 0 to 9.

S_out1

Output (4-bit)

The most significant digit of the


second. Valid values are 0 to 5.

S_out0

Output (4-bit)

The least significant digit of the


second. Valid values are 0 to 9.

Design the Verilog Behavioural Code for the above system.


module aclock
.
.
.
.
.
.
endmodule

(..............);

Complete the following test stimulus to test the full functionality of


the circuit.
module test;
.
.
.
.
aclock i1 (................);
.
.
.
.
endmodule
Simulate and Synthesise the design.

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