Lab 2 (All Sections) Prelab: Pseudo Instructions and

Memory Access

Name:
Eunsu Kim

Sign the following statement:

On my honor, as an Aggie, I have neither given nor received unauthorized aid
on this academic work
Eunsu Kim

Objective

The main objectives of this lab are to:

1. Learn several pseudo-instructions which are available in the MIPS architecture;
2. Gain experience with memory access instructions.
Before proceeding with this lab, you should be familiar with basic MIPS instructions.

Pseudo-Instructions

MIPS has a simple and regular instruction set, which is typical for RISC architectures. In
particular, it contains only one memory addressing mode (base + displacement) and all
instructions have a fixed size (32 bit).
1

Computer Architecture and Design, PreLab 2

For programmer convenience, the MIPS assembly language includes several pseudo-instructions.
These are not real instructions (that is a MIPS processor will not implement them). The
assembler translates these instructions into equivalent real machine instructions.
Consider the following pseudo-instruction:
move $t0, $t1

#register $t1s value is copied into register $t0

The assembler will translate this pseudo instruction into the equivalent instruction:
add $t0, $0, $t1

#register $t1s value is added to $zero and stored in register $t0

#Remember, $zero always contains the value 0

Accessing Memory

MIPS is a load-store architecture, which means that only the load and store instructions
access memory. Computation instructions only operate on the values in registers. In
addition, MIPS is limited to accessing memory in a single mode (base + displacement),
written as c(rx). The address is computed by adding the constant displacement c with
the base register, rx. For example
lw $t0, 4($t2)

# $t0 M[$t2 + 4]

Most load and store instructions only operate on aligned data. That means that a word (4
bytes) must be stored at addresses which are multiples of 4 and a half-word (2 bytes) must
be stored at even address. MIPS does contain some instructions which can manipulate
unaligned data.
Figure 1 shows the memory layout of the MIPS processor. User space is reserved for user
programs and the Kernel space is reserved for use by the operating system. User programs
cannot directly use the Kernel space. The text segment contains the user code (executable
binary) the system is executing. The data segment has two sections:
Static data, which contains the space for static and global variables; generally speaking this is the storage place for data object whose life is the same as the programs.
Dynamic data, where space is allocated for data objects at run time (typically using
malloc).
Static data can be accessed through two different methods:
Data declared within a .data section of the program will be accessed using an address
within the data segment as base (most likely the start address of the data segment).
There are two instructions the assembler generates for each load/store instruction.

During this exercise you will use the load word (lw) and store word (sw) instructions.

Background
The only way CPU can access the memory in MIPS is through load and store instructions. There is only one
addressing mode (base+displacement). Having just one addressing mode is part of the RISC philosophy to
Computerkeep
Architecture
and Design, PreLab 2
instructions simple thus allowing for a simple control structure and efficient pipelining.

The figure below shows the memory layout for MIPS systems. The user space is reserved for user programs.
0xffffffff

Kernel

0x80000000
0x7fffffff
Stack

User
Dynamic Data
Static Data
Text Segment (code)
Reserved

0x00000000

The kernel space can not be directly

accesses
by user
programs,
and it is reserved for the use of the operating
Fig. 1:
MIPS
Memory
Layout

Data that is declared using the .extern assembler directive will be stored in a special
area within the data segment and will be accessed using the reserved $gp (global
pointer) register. Therefore each access to such data will be only one instruction as
the $gp register has been set to the proper value when the program was loaded.

1996, Virgil Bistriceanu

The stack segment grows towards small addresses and is used for the call/return mechanism
as well as to hold local variables (those defined inside a block and which are not declared
to be static).
To access data on the stack we use register $sp (the stack pointer). Stack pointer register
is a reserved register, that means its usage convention indicates that the register $29 ($sp)
be used as a stack pointer. But there is no mechanism to restrict its usage for a different
purpose.
To access the memory we need to do the following:
Load the base address in the base register: in general this is done using the lui
instruction (load upper immediate).

Computer Architecture and Design, PreLab 2

Access the memory using the base register and by adding proper displacement.

Questions
1. State whether the following translations for the given pseudo-instructions are valid
or not?
Pseudo-Instruction
move $rt, $rs
<$rt := $rs>
li $rs, small
<$rs[15..0] := small>
li $rs, big
<$rs := big>

Translation
addi $rt, $rs, $0

Valid

Valid/Invalid

addi $rs, $0, small

Valid

lui $rs, upper(big)

ori $rs, $rs, lower(big)

Valid

Note: small represents a 16-bit number and big represents a 32-bit number. The
function upper(big) represents the upper 16-bits of a 32-bit value and lower(big)
represents the lower 16-bits of a 32-bit value.
2. What is the content of register $t2 after the instruction la $t2, var has been executed? Note that this pseudo-instruction contains a lui followed by an immediate
instruction. Assume var is stored at address 0x00001000 and it contains a value of
10? Also write the native MIPS instructions to which this instruction is
translated.
la instruction copies the variable address into the specified register
la $t2,var where var=10 and var address=0x00001000
So after execution of this instruction $t2=0x00001000
Instruction translation
lui $t2, var[31:16]
ori $1,$1, var[15:0]

3. Write a sequence of instructions for loading a value of 0xabcd0080 into register $1.
lui$1, 0xabcd0080 (using load immediate instruction)
orif 0xabcd0080 is address of a varaible
then we will use
la $1,var where var address=0xabcd0080
la instruction copies the variable address into the specified register

Computer Architecture and Design, PreLab 2

4. Write a MIPS assembly language implementation of the following C language instruction:

A[ 2 i ]=A[ 2 k+j ] ;

where A is an array of integers that starts at address Astart (32-bit value), and
variables i, j, and k are stored in registers $s0,$s1, and $s3, respectively. You may
use registers $t0,$t1, and $t2 for temporary values, if needed. Each element of A
is four bytes long.
add $t0, $0,$s0
add $t0, $t0, $s0
add $t1, $s1, $t0
lw

5. Explain how the following program can be used to determine whether a computer is
big-endian or little-endian
1
2
3

l i $t0 , 0xABCD9876
sw $t0 , 1 0 0 ( $0 )
lb $s5 , 1 0 1 ( $0 )

in big-endian the lb will load a CD into $s5since location 100 will have ABCD9876
in little-endian the lb will load a 98 into $s5 sincelocation 100 will have 7698CDAB