Experiment-5: Aim: Implement 4-Bit Parallel Adder Parallel Binary Adders
Experiment-5: Aim: Implement 4-Bit Parallel Adder Parallel Binary Adders
The figure below shows a parallel 4 bit binary adder which has three full adders and one halfadder. The two binary numbers to be added are A3A2A1A0 and B3B2B1B0 which are applied to
the corresponding inputs of full adders. This parallel adder produces their sum as C4S3S2S1S0
where C4 is the final carry.
In the 4 bit adder, first block is a half-adder that has two inputs as A0B0 and produces their sum
S0 and a carry bit C1. Next block should be full adder as there are three inputs applied to it.
Hence this full adder produces their sum S1 and a carry C2. This will be followed by other two
full adders and thus the final sum is C4S3S2S1S0.