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Programmable Electronic Assignment

This document outlines an assignment involving VHDL design and implementation. It includes tasks to write VHDL descriptions for common digital circuits like decoders, converters between binary and gray code, and a truth table-based design. It also involves designing projects for an FPGA board including a binary to BCD converter, handling signed values, generating quadrature encoder pulses, implementing an up/down counter with encoder pulses, and measuring the period of encoder pulses. Verification of the designs through simulation and test is required.

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93 views2 pages

Programmable Electronic Assignment

This document outlines an assignment involving VHDL design and implementation. It includes tasks to write VHDL descriptions for common digital circuits like decoders, converters between binary and gray code, and a truth table-based design. It also involves designing projects for an FPGA board including a binary to BCD converter, handling signed values, generating quadrature encoder pulses, implementing an up/down counter with encoder pulses, and measuring the period of encoder pulses. Verification of the designs through simulation and test is required.

Uploaded by

nazir143
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MEE10203 Programmable Electronic

Assignment 1
PART A
1. Give the definition, syntax and potential use of a VHDL constant data object.
2. Perform an Internet search and find a datasheet for the 74154 4-to-16 decoder.
From the functional description given in the data sheet, write a VHDL description
for a 74154 4-to-16 decoder. Use only STD_LOGIC and STD_LOGIC_VECTOR
data types in constructing your design. Enter the design into the Quartus II
software and verify the syntactic correctness by compiling the design. The design
should compile without error. Use suggested style guidelines for your VHDL
source code. Turn in both the datasheet and the VHDL source.
3. Write a VHDL description for a 4-bit binary-to-gray code converter. Enter the
design into the Quartus II software and verify the syntactic correctness by
compiling the design. Use suggested style guidelines for your VHDL source
code. The design should compile without error.
4. Write a VHDL description for a 4-bit gray-to-binary code converter. Enter the
design into the Quartus II software and verify the syntactic correctness by
compiling the design. Use suggested style guidelines for your VHDL source
code. The design should compile without error.
5. Implement the following truth table-based design in VHDL code.
A B C D Y1 Y2
0 00 01 0
0 00 11 0
0 01 01 0
0 01 11 0
0 10 01 0
0 10 11 0
0 11 01 0
0 11 11 0
1 00 01 0
1 00 10 1
1 01 00 1
1 01 11 1
1 10 01 0
1 10 11 0
1 11 01 0
1 11 11 0

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Verify the correctness of the entered design by simulation using the Altera Quartus
II software. Include a functional timing simulation, a Vector Waveform File (.vwf), in
your solution verifying the correctness of the design.
6. Perform a functional simulation of the designs for problems 7, 8, and 9. Submit a
Vector Waveform File (.vwf) verifying the correctness of the design for each
problem.

PART B
Write a Word document discussing the following projects. Submit supporting VHDL
projects code.
1. Design and implement a DE2/DE1 project that demonstrates a binary to BCD
converter. Use the switches SW [15:0] to define the input binary value and the
seven-segment displays to show the resulting decimal equivalent. For example, if
the first five switches are on: 0x1F, the seven-segment display should read 31.
2. Modify the binary to BCD converter project so that it handles and displays signed
values.
3. Design and implement a DE2/DE1 project that generates simulated quadrature
encoder pulses. Use SW[15:0] to set the quarter-period. Use the GPIO pins for
the output. Use SW3 to change direction. In one direction, the pulse sequence is
00, 01, 11, 10. In the other direction the pulse sequence is 00, 10, 11, 01.
4. Design, implement, and test a DE2/DE1 project that handles quadrature encoder
pulses using an up/down counter. Start with A and B low. If A goes high first,
increment the count. If B goes high first, decrement the count. Use the results of
the previous exercise to provide sample encoder pulses.
5. Design, implement, and test a DE2/DE1 project that measures the period of
quadrature encoder pulses. Start with both A and B low and measure the time
required for both A and B to go high. Use the 50 MHz clock as the timer. Use
exercise 3 as a source of encoder pulses.

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