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DFT: A I: N Ntroduction

The document discusses why testing of integrated circuits is important. Testing is needed to guarantee IC performance and reliability given manufacturing flaws. It also discusses how the cost of finding faults increases at each subsequent level of complexity. Testing helps detect defects from manufacturing issues and ensures ICs meet specifications. The document outlines different types of testing and how testing needs are evolving with technology trends like increasing transistor densities and higher clock rates.

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balajigururaj
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68 views22 pages

DFT: A I: N Ntroduction

The document discusses why testing of integrated circuits is important. Testing is needed to guarantee IC performance and reliability given manufacturing flaws. It also discusses how the cost of finding faults increases at each subsequent level of complexity. Testing helps detect defects from manufacturing issues and ensures ICs meet specifications. The document outlines different types of testing and how testing needs are evolving with technology trends like increasing transistor densities and higher clock rates.

Uploaded by

balajigururaj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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DFT : AN INTRODUCTION

WHY TEST?
IC manufacturing process is inherently defective,
but must still provide high quality ICs.
Guarantee IC performance to spec for every IC.
Reliability is a concern
Testing is for manufacturing flaws, NOT to check
Functionality !!

WHY TEST?
Devices

fail due to
manufacturing problems

Contamination
Insufficient doping
Process errors etc

Defects

can result in

Shorts to power/ground
Slow transistors etc

WHY TEST?
THE BUCKS FACTOR

The

bucks factor

Device level
Board level
System level
Field level

1 unit of cost
10 units of cost
100 units of cost
1000 units of cost
4

WHY TEST?
THE BUCKS FACTOR
Cost

will increase by a
factor of ten as fault
finding moves from one
level of complexity to the
next.
The result

Reduced Profit Margins


Delayed Product
Introduction
Dissatisfied customers

VLSI DESIGN PROCESS

VERIFICATION VS TEST
Specification

Implementation

Verification

Verification
Verifies correctness of design
Performed by simulation
Performed once before
manufacturing.

Silicon

Test
o

Test
Verifies correctness of
manufactured hardware
2 step process: (i) Test(s)
generation: software process
executed once during the design.
(ii) Test(s) application: tests
applied to hardware through ATEs.
Tests applied on each and every
device
7

ROLES OF TESTING

Detection: Determination whether or not the device under


test (DUT) has some fault.
Diagnosis: Identification of a specific fault that is present on
DUT.
Device characterization: Determination and correction of
errors in design and/or test procedure.
Failure mode analysis (FMA): Determination of
manufacturing process errors that may have caused defects on
the DUT.
8

TERMINOLOGIES

GOOD chip that pass the test. This is the yield.

Some good chips are rejected. The fraction (or


percentage) of such chips is called the yield loss.
Some bad chips pass tests. The fraction (or
percentage) of bad chips among all passing chips
is called the defect level. Measured in parts per
million (ppm)
DL is a measure of the effectiveness of tests

10

TESTING
Good chips
Prob(pass test) = high
Prob(good) = y

Mostly
good
chips

Fabricated
chips
Defective chips
Prob(bad) = 1- y Prob(fail test) = high

Mostly
bad
chips
12

VLSI TECHNOLOGY TRENDS AFFECTING TESTING


Rising Chip Clock Rates:
--The exponentially rising clock rate indicates several changes in
testing over the next 10 years.

At-Speed Testing:
--Stuck-fault tests are more effective when applied at the circuits
rated clock speed , rather than at a lower speed.
--For a reliable high-speed test, the automatic test equipment
(ATE) must operate as fast as, or faster than, the circuit-undertest (CUT.)

13

COST OF MANUFACTURING TESTING IN 2000AD


ATE Cost
--0.5-1.0GHz, analog instruments,1,024 digital pins: ATE
purchase price

= $1.2M + 1,024 x $3,000 = $4.272M

--Running cost (five-year linear depreciation)

= Depreciation + Maintenance + Operation


= $0.854M + $0.085M + $0.5M
= $1.439M/year

--Test cost (24 hour ATE operation)

= $1.439M/(365 x 24 x 3,600)
= 4.5 cents/second

14

EMI.
--A chip operating in the GHz frequency range must be
tested for electromagnetic interference (EMI.).
--Inductance in the wiring becomes active at these higher
frequencies, whereas it could be ignored at lower
frequencies.

15

Increasing

Transistor Density:

Transistor feature sizes on a VLSI chip reduce roughly by 10.5%


per year, resulting in a transistor density increase of roughly
22.1% every year.
The doubling of transistors on an integrated circuit every 18 to
24 months has been known as Moores Law since the mid1970s. Although many have predicted its end, it continues to
hold, which leads to several results:
Test complexity
--Testing difficulty increases as the transistor density increases.
-- The internal chip modules (particularly embedded
memories)(Difficult to access)
16

Feature scaling and power dissipation.

Verification

testing must check for power buses


overloaded by excessive current, causing a brownout in the chip.
The test vectors must be adjusted to reduce power.
Shrinking features will eventually require the design
of transistors with reduced threshold voltage. These
devices have higher leakage current, which reduces
17
the effectiveness of IDDQ testing

Integration of Analog and Digital Devices onto One


Chip:
-- Integration onto one chip eliminates a significant delay
and reduces cost also, but brings new issues of testing
mixed-signal circuits on one chip.

18

TYPES OF TESTING

Verification testing, characterization testing, or design


debug

Verifies correctness of design and correctness of test


procedure may require correction of either or both

Manufacturing testing

Factory testing of all manufactured chips for parametric and


logic faults, and analog specifications
Burn-in or stress testing

Acceptance testing (incoming inspection)

User (customer) tests purchased parts to ensure quality

19

SUMMARY
Designers

customarily used to strive for an optimal


design in terms of the area, power and speed.
At present equally important consideration is
testability.
Why to test
-- To guarantee
Reliability
Quality
Performance

SUMMARY
What to test:
-- Need to know
Types of defect/fault/failure
Types of circuit-digital/ analog /memory
How to test
--Test pattern generation
--Test pattern application
--Response evaluation
When to test
--Need to know the costs and effect
Test coverage and tests costs
Relationship between test coverage and quality.

SUMMARY
Benefits

of Testing:

Quality and economy are two major benefits of testing.


The purpose of testing is to weed out all bad products.
The number of bad products heavily affect the price of good
products.--economy
The number of bad products not identified decides the
quality.

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