Datasheet - HK rt8110 7327105 PDF
Datasheet - HK rt8110 7327105 PDF
Datasheet - HK rt8110 7327105 PDF
Features
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Applications
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RT8110
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area, otherwise visit our website for detail.
LGATE
(TOP VIEW)
4
VCC
Pin Configurations
GND
FB
UGATE
Note :
DRIVE
PHASE
Package Type
J8 : TSOT-23-8
BOOT
Ordering Information
TSOT-23-8
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1
RT8110
Typical Application Circuit
VIN
8V to 23V
DBOOT
CIN
R
RT8110
2
4 VCC
CVCC
PHASE
Q2
Shutdown
CBOOT
BOOT 1
UGATE 7
DRIVE
MU
L1
LGATE 5
6
GND
FB
COUT
ML
R1
R2
C3
R3
VIN
5V to 23V
DBOOT
CIN
RT8110
2
DRIVE
RX
5V
4 VCC
PHASE
LGATE 5
6
GND
CVCC
Q1
BOOT 1
UGATE 7
FB
CBOOT
MU
L1
8
ML
COUT
Shutdown
R1
R2
C3
R3
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RT8110
Functional Pin Description
Pin No.
1
Pin Name
BOOT
Pin Function
This pin provides power to the high-side MOSFET gate driver. Use bootstrap circuit to drive
the high-side MOSFET.
DRIVE
FB
VCC
LGATE
Pre-regulator Control Pin. Connect this pin to the base of external BJT, and connect the
collector to VIN to obtain a regulated output voltage to support VCC. If VCC is directly
supplied, the BJT is not required, and this pin should be pulled high to VCC through a
resistor. DRIVE pin can also be used for enable control. Pull low this pin to GND can
shutdown the controller.
Inverting Input of the Error Amplifier. This pin is connected to the joint of output voltage
divider resistors to set the output voltage. The voltage at this pin is also monitored for under
voltage protection.
Main Bias Supply of the IC. VCC can be directly supplied or by VIN through external BJT
driven by DRIVE pin. This pin also provides power for the low-side MOSFET gate driver.
Connect ceramic capacitor to this pin. The voltage at this pin is monitored for power on
reset (POR).
Gate Drive Pin for Low-Side MOSFET.
GND
Signal and Power Ground of the IC. All voltage levels are referenced with respect to this pin.
UGATE
PHASE
Switching Node of the Buck Converter. This pin is also used to monitor the voltage drop
across the low-side MOSFET for over current protection.
VCC
VCC
VCC
Pre-Regulator
PowerOn Reset
POR
0.8VREF
ROC
OC
PHASE
+
0.5V
UVP
Soft-Start
and Fault
Logic
SS
S1L
FB
IOC
+
+Gm
-
EO
+
-
PWM
Gate
Control
Logic
+
PH_M
1.5V
VCC
UGATE
BOOT
LGATE
GND
Oscillator
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RT8110
Absolute Maximum Ratings
(Note 1)
(Note 3)
Electrical Characteristics
(VIN = 5V, TA = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
--
mA
5.1
5.3
5.5
3.6
3.9
4.2
0.3
0.5
0.7
0.784
0.8
0.816
320
400
480
kHz
--
2.2
--
ICC
VCC
Power-On Reset
VCC Threshold Voltage
Rising
VREF
Oscillator
Free Running Frequency
fSW
Ramp Amplitude
VOSC
Error Amplifier
E/A Transconductance
Gm
Note 5
--
0.3
--
ms
AO
Note 5
60
90
--
dB
--
4.5
RUS OURCE
VBOOT PHASE = 5V
VBOOT VUGATE = 1V
To be continued
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RT8110
Parameter
Symbol
Test Conditions
VUGATE PHASE = 1V
Min
Typ
Max
Units
--
RUS INK
--
RLSINK
VLGATE = 1V
--
IUS OURCE
VBOOT VUGA TE = 5V
--
0.72
--
IUS INK
VUGATE PHASE = 5V
--
0.82
--
IUS OURCE
VVCC VLGATE = 5V
--
0.65
--
IUS INK
VLGATE GND = 5V
--
1.18
--
VOC
230
200
170
mV
--
80
--
--
0.5
0.6
ms
VBOOT PHASE = 5V
Protection
Over Current Threshold
Maximum Duty Cycle
UVP Threshold
FB Falling
Soft Start
Soft-Start Interval
TSS
Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. These
are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. JA is measured in the natural convection at TA = 25C on a low effective single layer thermal conductivity test
board of JEDEC 51-3 thermal measurement standard.
Note 5. Guarantee by design.
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Free
Datasheet
http://www.datasheet4u.com/
RT8110
Typical Operating Characteristics
Power Off
Power On
VIN = 12V
VIN = 12V
VIN
(10V/Div)
VIN
(10V/Div)
V CC
(5V/Div)
V CC
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
UGATE
(20V/Div)
UGATE
(20V/Div)
Time (20ms/Div)
Time (2ms/Div)
VIN
(10V/Div)
FB
(500mV/Div)
V CC
(5V/Div)
VOUT
(2V/Div)
UGATE
(20V/Div)
UGATE
(20V/Div)
LGATE
(10V/Div)
power stage VIN comes controller VIN
Time (2ms/Div)
Time (10ms/Div)
VOUT
(5V/Div)
UGATE
(20V/Div)
V CC
(5V/Div)
Inductor
Current
(20A/Div)
UGATE
(20V/Div)
LGATE
(5V/Div)
LGATE
(5V/Div)
Inductor
Current
(20A/Div)
Time (4ms/Div)
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Time (4ms/Div)
RT8110
Switching Frequency vs. Temperature
480
0.812
0.808
0.804
0.800
0.796
0.792
0.788
460
440
420
400
380
360
340
320
0.784
-50
-25
25
50
75
100
125
-50
-25
25
50
75
100
125
Temperature (C)
Temperature (C)
5.45
VCC (V)
5.40
5.35
5.30
5.25
5.20
5.15
5.10
-50
-25
25
50
75
100
125
Temperature (C)
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RT8110
Applications Information
The RT8110 is a compact voltage-mode PWM controller
with integrated MOSFET gate drivers for single-phase
synchronous buck converter. It features tiny package and
an internal regulator driver, which drives an external BJT
to provide regulated output voltage to support VCC from
converter input voltage. Therefore, RT8110 can operate in
wide input range. VCC can also be directly supplied from
5V without using the external BJT. This part provides
internal soft start, internal loop compensation and
protection functions.
5V
(3)
(4)
(5)
where
Vbe is the base to emitter voltage of Q1
is the current gain (hFE) of Q1
Ie is the emitter current of Q1
Iy is the sink current of DRIVE pin
Design example :
VHV = 12V, VCC = 5.3V, Ie(MAX) = 30mA, Q1 = 2N3904,
Vbe = 0.7V, = 100
When VHV = 8V
~ 1.5V
(2)
(6)
Select R = 5.6k
RX
~ 1.25V
V VCC Vbe
Ix = HV
R
Ie
Ib =
DRIVE
VCC
Q1
Shutdown
90k
Internal
Sub-Circuit
30k
V HV
8V to 23V
Shutdown
Comparator
+
-
~ 1.5V
Ix
~ 1.25V
DRIVE
VCC
Iy
Q1
Ib
Ie
90k
Internal
Sub-Circuit
Q2
Shutdown
30k
RT8110
Power-Up and Soft Start
The power-on-reset (POR) function continuously monitors
the voltage at the VCC pin. When VCC rises and exceeds
the POR threshold, the controller initiates its power-up
sequence with continuous low-frequency, small-width
pulses at UGATE (~6kHz). These pulses are used for
converter power stage input voltage (VIN) detection. If VIN
is applied, the voltage at PHASE pin will rise and fall due
to these detection pulses. A digital counter and a
comparator are used to record the number of times that
voltage at PHASE pin exceeds the internally-defined
voltage level (~1.5V). If the voltage at PHASE pin exceeds
and below the internally-defined voltage level for two times,
detection pulse stops and VIN is recognized to be ready.
Once VIN is ready, soft-start will then initiate after a time
delay. Otherwise the detection pulse at UGATE continues.
RT8110 provides soft start function internally. Figure 5
shows the PWM comparator and the operational
transconductance amplifier (OTA). The OTA has three
inputs: reference voltage VREF, feedback voltage signal
FB, and soft start signal SS. During the soft start interval,
the feedback voltage signal tracks the SS signal. Because
SS signal rises from zero in monotone, therefore the PWM
duty cycle will increase gradually at start up to prevent
large inrush current. When FB voltage reaches VREF, soft
start ends and FB will track VREF. The typical soft start
time interval is 3ms
QGATE
VBOOTSTRAP
R2
UGATE
C BOOT
Q1
PHASE
V OUT
R1
V IN
BOOT
Transconductance
Error Amplifier
FB +GM
+
+
V REF
PWM Comparator
+
-
Compensation
Network
SS
PWM
+
Comparator -
LGATE
Q2
RT8110
determined internally by the current source IOC and the
internal resistor ROC. The current source IOC flows through
resistor ROC and builds voltage VOC (=IOC x ROC) which is
referenced to the PHASE pin. When load current increase
and the sensed PHASE voltage falls below VOC in one
switching cycle, controller will treat this as an over current
event. Each over current event will cause one UGATE
PWM pulse to be prohibited, but has no influence on
LGATE signal, it still keep switching. UGATE PWM pulse
is permitted when over current event does not exist. If
over current event does not occur in the next switching
cycle, UGATE will switching again, or the UGATE pulse
will still be prohibited. In this way, inductor peak current
will be limited.
If the load current further increases, either over current
protection or under voltage protection will be tripped. The
over current protection will be tripped when the over current
event occurs for continuously four PWM pulses. When
OCP is triggered, both UGATE and LGATE go low,
controller will initiate re-start in hiccup way. For OCP,
controller has three times of hiccupped re-start before
shutdown. Controller will latch off after three times of
hiccup.
The OCP threshold is determined by the RDS(ON) of lowside MOSFET. The inductor peak current IPEAK can be
calculated using the following equation.
VOC
IPEAK
RDS(ON)
Note that IPEAK is the inductor peak current, therefore IPEAK
should be set greater than IOUT(MAX) + (I)/2 to prevent
false tripping, where I is the output inductor ripple current,
and IOUT(MAX) is the maximum load current. Since MOSFET
RDS(ON) increases with temperature, the controller will trip
OCP/current limit earlier at high temperature. To avoid
false tripping, considering the highest junction temperature
of the MOSFET and calculate the OCP threshold to select
RDS(ON).
V IN
V CC
Q1
IOC
R OC
OC
Comparator
+
-
PHASE
+
IOC x R OC
IL x R DS(ON)
Q2
IRMS =
The input RMS current varies with load and input voltage,
and has a maximum of half the output current when output
voltage is equal to half the input voltage. In addition,
ceramic capacitor is recommended for high frequency
decoupling because of its low equivalent series resistance
and low equivalent inductance. These ceramic capacitors
should be placed physically between and close to the
drain of high-side MOSFET and the source of the lowside MOSFET.
The voltage rating is another key parameter for the input
capacitor. In general, choose the voltage rating with 50%
higher than the input voltage for the input capacitor to ensure
the operation reliability.
Output Voltage Setting
The converter output voltage can be set by the external
voltage divider resistors. Figure 8 shows the connection
of the output voltage divider resistors. The controller will
RT8110
regulate the output voltage according to the ratio of the
voltage divider resistors R1 and R2.
V OUT
Transconductance
Error Amplifier
GM
+
+
R1
FB
Output Inductor
R2
V REF
Q1
ESR
Q2
V IN
DCR
Output
Capacitor
Optional
C3
VREF
R2 = R1
VOUT VREF
R LOAD
C OUT
C P 10pF
Transconductance
Error Amplifier
GM
+
R S 50k
+
V REF
C S 4nF
R1
R3
R2
Gain (dB)
1
2 ESR COUT
F LC F ESR
FC
Compensation Gain
Freq.(Log)
0
F Z1
F P1
F Z2
Modulation Gain
F P2
1
2 RS CS
1
C CP
2 RS S
CS + CP
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RT8110
The external R3 and C3 introduces a zero at FZ2 :
1
FZ2 =
2 (R3 + R2 ) C3
VIN VOUT
V
OUT 1
IFULL_LOAD 0.1 VIN
FSW
IRIPPLE
8 COUT FSW
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Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) TA ) / JA
Where T J(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the JA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8110, the maximum junction temperature is 125C and
TA is the maximum ambient temperature. The junction to
ambient thermal resistance JA is layout dependent. For
TSOT-23-8 packages, the thermal resistance JA is 235C/
W on the standard JEDEC 51-3 single layer thermal test
board. The maximum power dissipation at TA = 25C can
be calculated by following formula :
PD(MAX) = (125C - 25C) / (235C/W) = 0.426W for
TSOT-23-8 package
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance JA. For RT8110 package, the Figure 3 of
derating curve allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
RT8110
Maximum Power Dissipation (W)
0.50
0.45
0.40
0.35
TSOT-23-8
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0
25
50
75
100
125
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RT8110
Outline Dimension
H
D
L
C
b
A
A1
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
0.700
1.000
0.028
0.039
A1
0.000
0.100
0.000
0.004
1.397
1.803
0.055
0.071
0.220
0.380
0.009
0.015
2.591
3.000
0.102
0.118
2.692
3.099
0.106
0.122
0.585
0.715
0.023
0.028
0.080
0.254
0.003
0.010
0.300
0.610
0.012
0.024
Headquarter
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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