Scribd
Upload
43 views11 pages

Scaling of Mos Circuits Unit - 5

Scaling of MOS circuits brings advantages like lower power dissipation and higher operating frequencies. However, as feature sizes decrease with scaling, noise problems increase due to the smaller distances between transistors and wires. There are several types of noise that limit scaling, including thermal noise, flicker noise, capacitive noise, and inductive noise. All of these noises increase with higher operating frequencies and shorter rise times as feature sizes are reduced. Current density limits of around 1-2 mA/um^2 also constrain scaling due to electromigration effects that can damage interconnects at higher densities.

Uploaded by

sangeeta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
43 views11 pages

Scaling of Mos Circuits Unit - 5

Scaling of MOS circuits brings advantages like lower power dissipation and higher operating frequencies. However, as feature sizes decrease with scaling, noise problems increase due to the smaller distances between transistors and wires. There are several types of noise that limit scaling, including thermal noise, flicker noise, capacitive noise, and inductive noise. All of these noises increase with higher operating frequencies and shorter rise times as feature sizes are reduced. Current density limits of around 1-2 mA/um^2 also constrain scaling due to electromigration effects that can damage interconnects at higher densities.

Uploaded by

sangeeta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 11

SCALING OF MOS CIRCUITS

UNIT -5

LECTURE-4

Limits on Logic Levels and Supply Voltage due to noise

General advantages of CMOS scaling


Smaller gate delay time.(decreased s by )
22
Higher operating frequency(increased by )
Lower power dissipation.

Limitation- Distance between features(transistors ,wires etc )


has reduced and at great switching speeds noise problems arise.
Noise also gets amplified during the signal propagation
process.

Mean square current fluctuation in the channel is given by

i 2 4 KTRn g m f
Rn is equivalent noise resistance at the input

f is the bandwidth.
gm is transconductance.
F.M Klassen and J.Prins have investigated about thermal noise
in a MOS transistor over a range of substrate levels of 1014 to
1017cm-3.

When the transistor is operating in saturation gm is no longer


proportional to Vg.

Where Vpis pinch-off voltage given by

VB is junction built in potential and a

2 si o qN B

Thermal noise Rngm is given by

Strongly dependent on tox and NB.


Less dependent on Vg.

Flicker noise
Noise due to fluctuations of carriers trapped in the channel by the
surface states.

dnt
s
dn
I= DC drain current
f =frequency
Vd=Applied drain Voltage

Output noise is represented by V

qs (Vd 0.5Vd )
V
Cg f
2

When the transistor operates in saturation then Vd=Vg

1 qsVg
V
2 Cg f
2

Flicker noise is scaled by 1 for constant voltage scaling

1
and 2 by combined scaling method.

Cross talk between two parallel signal lines on the chip .


Capacitive noise
Capacitive noise is proportional to C.dv/dt.
C is interline capacitance.
dv/dt =Va/tr
Inductive noise
Inductive noise is proportional to L.dI/dt
L is mutual inductance.
dI/dt =Isat/tr.
Cross talk noise increases as operating frequency increases and
tr is reduced.

Limits due to Current density


Aluminium is very attractive for interconnects.
Scaling down increases the current density .
When current density approaches 10 mA/um2 interconnects are
burnt off
This is called as electromigration.
Allowable current density limits are 1 to 2 mA/um2.

You might also like