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Example: Parity Checker: More Moore/Mealy Machines

1) The document discusses Moore and Mealy machines for implementing a parity checker circuit. It provides state diagrams and state tables for both Moore and Mealy models. 2) The lecture covers state minimization, state encoding, and logic minimization techniques for implementing the parity checker design using flip-flops. 3) An example vending machine design is presented to illustrate a Moore machine implementation using states and state transitions to control the release mechanism based on coin inputs.

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VIKRAM
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615 views3 pages

Example: Parity Checker: More Moore/Mealy Machines

1) The document discusses Moore and Mealy machines for implementing a parity checker circuit. It provides state diagrams and state tables for both Moore and Mealy models. 2) The lecture covers state minimization, state encoding, and logic minimization techniques for implementing the parity checker design using flip-flops. 3) An example vending machine design is presented to illustrate a Moore machine implementation using states and state transitions to control the release mechanism based on coin inputs.

Uploaded by

VIKRAM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Lecture 18

Example: Parity checker

More Moore/Mealy machines

Serial input string





OUT=1 if odd # of 1s in input


OUT=0 if even # of 1s in input

Lets do this for Moore and Mealy

1. State diagram

2. State transition table

Moore

Mealy

0/00
Even
[0]

Even
[0]

Input

Next
State

Present
Output

Even
Even
Odd
Odd

0
1
0
1

Even
Odd
Odd
Even

0
0
1
1

1 1/0

1/11

Odd
[1]

Present
State

Mealy

Odd
[1]

Moore

Present
State

Input

Next
State

Present
Output

Even
Even
Odd
Odd

0
1
0
1

Even
Odd
Odd
Even

0
1
1
0

0/1

3. State minimization


4. State encoding

Already minimized



Need both states (even and odd)


Use one flip-flop

Present
State

Input

Next
State

Present
Output

0
0
1
1

0
1
0
1

0
1
1
0

0
0
1
1

Mealy

Assignment
Even 0
Odd 1

Moore

Present
State

Input

Next
State

Present
Output

0
0
1
1

0
1
0
1

0
1
1
0

0
1
1
0
6

5. Next-state logic minimization





6. Implement the design

Assume D flip-flops
Next state = (present state) XOR
(present input)

Moore

Mealy
Output

Input

Output

Input

Q
Q

CLK

CLK

Example: Vending machine

Moore machine
present
state
0

Reset
Reset
0
N
Coin
Sensor

N
Vending
Machine
FSM

Open

Release
Mechanism

5
D
10

N
D

10
15

N+D

Clock

15
[open]

inputs
D
N
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1

next
state
0
5
10

5
10
15

10
15
15

15

present
output
0
0
0

0
0
0

0
0
0

symbolic state table

10

Mealy machine
present
state
0

Reset

0
N/0
5

5
D/0

N/0
D/1

10

10
N + D/1
15

15

Current
State

Moore machine: State encoding


inputs
D
N
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1

next
state
0
5
10

5
10
15

10
15
15

15

present
output
0
0
0

0
0
1

0
1
1

present
state
0

10

15

symbolic state table

inputs
D
N
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1

next
state
0
5
10

5
10
15

10
15
15

15

present
output
0
0
0

0
0
0

0
0
0

present state inputs


Q1 Q0
D
N
0 0
0
0
0
1
1
0
1
1
0 1
0
0
0
1
1
0
1
1
1 0
0
0
0
1
1
0
1
1
1 1

next state
D1 D0
0 0
0 1
1 0

0 1
1 0
1 1

1 0
1 1
1 1

1 1

present
output
0
0
0

0
0
0

0
0
0

symbolic state table

11

12

Mealy machine: State encoding


present
state
0

10

15

inputs
D
N
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1

next
state
0
5
10

5
10
15

10
15
15

15

present
output
0
0
0

0
0
1

0
1
1

present state inputs


Q1 Q0
D
N
0 0
0
0
0
1
1
0
1
1
0 1
0
0
0
1
1
0
1
1
1 0
0
0
0
1
1
0
1
1
1 1

Logic minimization

next state
D1 D0
0 0
0 1
1 0

0 1
1 0
1 1

1 0
1 1
1 1

1 1

present
output
0
0
0

0
0
1

0
1
1

symbolic state table

0 1

N
D

X X
1
Q0

Q1

D1

Q1

D0
0

Q0

1
Q0

N
D

0 1

X X
1
Q0

Q1

Open

N
D

1
Q0

14

7.24
Mealy


A Moore machine has two inputs (X1, X2)


and one output (Z). The output remains a
constant value unless one of the following
input sequence occurs:


15

7.23


Q1

Open

Mealy

13

Moore

Q1

D0

Q0

Implementation

Q1

D1 Moore

A Mealy machine has one input (X)


and two outputs (Z1 and Z2). An
output Z1 = 1 occurs every time the
input sequence 101 is observed,
provided the sequence 011 has never
been seen. An output Z2 = 1 occurs
every time the input 011 is observed.
17

The input sequence 00,11 causes the output to


become 0.
The input sequence 01,11 causes the output to
become 1.
The input sequence 10,11 causes the output to
toggle value.
16

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