Control Strategy For Three-Phase PWM Boost Rectifier Operating Under Different Supplyvoltage Conditions
Control Strategy For Three-Phase PWM Boost Rectifier Operating Under Different Supplyvoltage Conditions
Abstract:In this paper, a proposed control strategy is presented to improve the performance of the
pulse width modulation (PWM) boost type rectifier when operating under different supply voltage
conditions (balanced, unbalanced, and distorted three-phase supply voltages). The proposed control
strategy is divided into two parts, the first part is voltage controller and the second part is current
controller. In the voltage controller, Repetitive Controller (RC) is used to reduce the even order
harmonics in the regulated output dc voltage so small output capacitor (filter) is used instead of large
capacitor. RC also reduces the even order harmonics which appear in the reflected dc current (I MAX),
this leads to reduce the odd order harmonics which appear in the input currents. While in the current
controller, Enhanced Phase Locked Loop (EPLL) technique is used to obtain sinusoidal and balanced
three phases, to construct the reference currents, which are in phase with the fundamental supply
voltages. Therefore, the supply-side power factor is kept close to unity. A proportional controller is
used to give excellent tracking between the line and the reference currents. The complete system with
the proposed control strategy are simulated using Matlab/Simulink. The results for the complete
system using repetitive voltage controller are obtained and compared to the results of the system with
the conventional voltage controller (Proportional-Integral (PI) controller connected in series with a
Low Pass Filter (LPF)). The results with the repetitive controller show better response and stable
operation in the steady state under different input voltage conditions, as well as in the transient
response under changing the load condition.
Index Terms Enhanced Phase Locked Loop,Repetitive Controller,Three-Phase PWM Boost Rectifier,
Proportional-Integral controller.
I.
INTRODUCTION
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84
II.
(1a)
e2=Emsin(t 120)
(1b)
e3=Emsin(t 120)
(1c)
(2a)
i2=Imsin(t 120)
(2b)
(2c)
RL i1 =VAD = e1 (VDN
VNO) (3)
and
d1'=0
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VDN = i1 RS +Vo
(4)
and
'
d1 =1
+L
+L
(d1+d2+d3)+3VNO
(15)
0 = Vo(d1+d2+d3)+3VNO
and
VDN=i1RS
Vo
VNO =
(5)
(16)
Substitute
equation
(16)
in
equations (10), (11), and (12), the result
will be
R i1 = e1 us1
(17)
R i2 = e2 us2
(18)
d1 + d1'=1 so
R i3 = e3 us3
(19)
L
RL i1 = e1 [i1RS d1+Vo d1+ i1RS d1'
+ VNO]
(7)
Where
us1 = Vo (
(20)
L
RL i1 = e1 [i1 RS (d1+ d1')+Vo d1
+VNO]
(8)
us2 = Vo (
(21)
us3 = Vo (
(22)
R i1 = e1 [Vo d1+VNO]
(10)
R i2 = e2 [Vo d2+VNO]
(11)
R i3 = e3 [Vo d3+VNO]
(12)
idc=ic + Io
(13)
(23)
C
= i1 d1+i2 d2+i3 d3
(24)
(14)
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df1= A1
(25)
df2= A2
(26)
df3= A3
(27)
(28)
i2=Im2sin(t 120)
(29)
i3=Im3sin(t 120)
(30)
(31)
(32)
=[ ]
(33)
=[
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(34)
(35)
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=[
(36)
=[
=[
(38)
(41)
(42)
Tn in =
(43)
Tp in =
(44)
Tn ip =
(45)
idc =
Where
Idc =
(48)
ish=
(49)
Io = idc
(50)
Io = Idc + ish
(51)
Vo = Ro Io
(52)
Vo = Ro[Idc + ish
Vo=
(53)
+
(54)
(47)
(39)
Vo = Vdc + vsh
(55)
(56)
ir1 = IMAX
(46)
ir1 = I
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+ Ic
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ir1=I
(57)
CONTROL STRATEGY
A. Voltage Controller
The first objective of this voltage
controller is to reduce the second order
harmonic in the output dc voltage (less
than 5% of Vo) inequation (55), and the
second objective is to reduce the second
order harmonics in the reflected IMAX
88
of
Grc(s) =
Where Krc is the gain and To =
the
(58)
, fo
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Grc(s)
[
Grc(s)=
]
[
]]
Grc(s) =
(61)
]
(59)
Where
Mathematically, RC is equivalent to
parallel combination of proportional
controller, integral controller, and many
resonant controllers, as shown in Figure 5.
[11]
If s = x
, where
, so
].
Figure 5: Equivalent form of RC controller
], each x =
so
B. Current Controller
The objectives of the current
controller are: to construct the reference
currents by using Phase Locked Loop
(PLL) technique, and to achieve good
tracking between the actual and the
[
]
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reference
currents
by
employing
proportional
controller
only.
The
components of the current controller will
be discussed in details in the following
sections.
-
(63)
(62)
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Proportional Controller:
(67)
source voltage
converter input voltage
gain of the P controller
gain of the PWM block
time constant of the plant =
KRL
i1
ir1
Where Te =
V.
SIMULATION RESULTS
10000Hz
Output dc
voltage
Vo
300V
Resistance of
0.01
Inductance of
reactors (L)
5 mH
Nominal
input
voltage
(V)
supply
frequency
dc-bus
capacitor (C)
480 F
Kip
133
Load
resistance Ro
100
1, 2, 3
18,0.1,0.1
reactor(RL)
91
120V
50 Hz
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CASE 4:
In this case, a 7th order harmonic of
25% distorts unbalanced input voltages
(Em1=157V,Em2=120V,and
Em3=85V).
Figure 17 shows the waveforms of the
input voltages of this case. Figure 18
shows the input line currents, while Figure
19 shows the output dc voltage.
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3rd
order(A)
i1
i2
i3
0.0
1
0.0
1
Conventional
method
i1
i2
i3
0.25
0.25
0.25
Ripple(P.P)
5.62 V
8.6 V
0.026
0.271
Negative
CASE1
THD%
of phase1
1.93
THD%
of phase2
1.93
THD%
of phase3
2.05
CASE2
1.96
2.01
1.98
CASE3
1.94
2.03
2.15
CASE4
1.97
1.97
CASE5
1.99
1.89
2.07
sequence
current (A)
CASE1
THD%
of phase1
1.78
THD%
of phase2
1.75
THD%
of phase3
1.83
CASE2
6.13
6.25
CASE3
3.57
2.93
3.27
CASE4
3.64
3.18
3.91
CASE5
4.11
3.58
3.98
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VI.
Conclusions
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VII.
REFERENCES
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