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Post-Layout Simulation in Cadence: 11/3/2007 Sheng-Yu Peng

This document provides instructions for performing post-layout simulation in Cadence. It outlines steps such as creating a symbol from a schematic, editing and saving the symbol, creating a layout and extracted cell views, creating a new schematic with stimulus and the circuit symbol, changing parameters in the analog design environment, copying extracted model files and changing lines in those files, choosing an analysis type and running post-layout simulation, and checking the netlists. The goal is to simulate a circuit layout to verify its performance after layout is complete.

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Rekha Yadav
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72 views10 pages

Post-Layout Simulation in Cadence: 11/3/2007 Sheng-Yu Peng

This document provides instructions for performing post-layout simulation in Cadence. It outlines steps such as creating a symbol from a schematic, editing and saving the symbol, creating a layout and extracted cell views, creating a new schematic with stimulus and the circuit symbol, changing parameters in the analog design environment, copying extracted model files and changing lines in those files, choosing an analysis type and running post-layout simulation, and checking the netlists. The goal is to simulate a circuit layout to verify its performance after layout is complete.

Uploaded by

Rekha Yadav
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Post-Layout Simulation in

Cadence
11/3/2007
Sheng-Yu Peng

Create a Symbol from Schematic


DesignCreate CellView From Schematic

Edit your Symbol and Save it

Create Layout and Extracted CellViews

Create Another Schematic including


Stimulus and Circuit Symbol

Change the Parameters in the Analog Design Environment


SetupEnvironment ...
Add extracted in front of those in the Switch View List

Copy the EKV Model Files


cp EKVMOSP.m tsmc35P.m
cp EKVMOSN.m tsmc35N.m
Change the second line of these files to
be .MODEL tsmc35P EKV ( TYPE=0 &
and .MODEL tsmc35N EKV ( TYPE=0 &
respectively

Choose Analysis and Run Post-layout Simulation

Check the Netlists


SimulationNetlistCreate Final

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