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    Optix - Asic Design Environment Tool: Executive Summary

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    The OptiX tool is a full-chip design environment that automates the RTL to GDSII flow to simplify design implementation and monitoring. It covers technology nodes from 180nm to 14nm. OptiX provides intuitive GUI-based flow creation, execution automation, and project reporting. It helps build automation solutions for configuring ASIC flows and tools, libraries, and foundry files to improve productivity and reduce risk. A case study shows how OptiX helped a chip design client achieve on-time tape out of their first lower node chip by improving predictability, productivity, and effective use of engineers and resources through automated flow, block, and run time management and interactive dashboards.

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    Optix - Asic Design Environment Tool: Executive Summary

    Uploaded by

    pinakin4u
    102 views2 pages
    The OptiX tool is a full-chip design environment that automates the RTL to GDSII flow to simplify design implementation and monitoring. It covers technology nodes from 180nm to 14nm. OptiX provides intuitive GUI-based flow creation, execution automation, and project reporting. It helps build automation solutions for configuring ASIC flows and tools, libraries, and foundry files to improve productivity and reduce risk. A case study shows how OptiX helped a chip design client achieve on-time tape out of their first lower node chip by improving predictability, productivity, and effective use of engineers and resources through automated flow, block, and run time management and interactive dashboards.

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    Case_Study_-OptiX_ASIC_Flow_Tool.pdf

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    The OptiX tool is a full-chip design environment that automates the RTL to GDSII flow to simplify design implementation and monitoring. It covers technology nodes from 180nm to 14nm. OptiX provides intuitive GUI-based flow creation, execution automation, and project reporting. It helps build automation solutions for configuring ASIC flows and tools, libraries, and foundry files to improve productivity and reduce risk. A case study shows how OptiX helped a chip design client achieve on-time tape out of their first lower node chip by improving predictability, productivity, and effective use of engineers and resources through automated flow, block, and run time management and interactive dashboards.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    102 views2 pages

    Optix - Asic Design Environment Tool: Executive Summary

    Uploaded by

    pinakin4u
    The OptiX tool is a full-chip design environment that automates the RTL to GDSII flow to simplify design implementation and monitoring. It covers technology nodes from 180nm to 14nm. OptiX provides intuitive GUI-based flow creation, execution automation, and project reporting. It helps build automation solutions for configuring ASIC flows and tools, libraries, and foundry files to improve productivity and reduce risk. A case study shows how OptiX helped a chip design client achieve on-time tape out of their first lower node chip by improving predictability, productivity, and effective use of engineers and resources through automated flow, block, and run time management and interactive dashboards.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    OptiX

    ASIC Design
    Environment Tool
    ASIC design Environment tool
    Covers RTL to GDSSII

    Technology node process ready

    Case Study

    High Productivity & Predictabilty

    Executive Summary
    The OptiX is a full-chip design environment that includes innovative automation and reporting

    capabilities to help designers implement and monitor their designs. It includes a production
    RTL-to-GDSII flow that can be leveraged to simplify and automate flows for many critical
    implementation and validation tasks, enabling engineers to focus on achieving performance
    and design goals. OptiX Design System covers support for 180-nanometer (nm) to 14-nm.
    GUI provides intuitive, easy-to-use flow creation, execution automation and project reporting.
    Build innovative and sophisticated automation solutions such as

    Configuration of ASIC flow from RTL to GDSII covering configuration of ASIC Stages &
    ASIC tools
    Configuration for library and foundry files with support for 3rd party tools, enabling
    flow portability and customization across multiple projects
    Reducing risk and accelerating project schedules by enhancing productivity

    www.einfochips.com | [email protected]

    Case Study: Optix ASIC Design Environment Tool

    Client Profile
    The client is a leading solutions provider for chip
    design services, working with multiple Fortune
    100 companies.

    Business Challenge
    The client wanted to achieve schedule
    adherence with quality and productivity. They
    had no tool, flow to make project schedule
    predictable with productivity at DSM - 45nm and
    the required technology nodes.

    Client Benefits

    Solution
    eInfochips team provided OptiX ASIC Design
    Environment tool to address the most complex
    logic blocks configuration, run time, flow and
    dashboard to achieve the Tape out on-time.
    OptiX ASIC Design Environment with OptiCon,
    OptiRun and OptiStat features
    Very strong configuration manager to
    configure ASIC Flow, ASIC tools, Library,
    foundry files through its OptiFlow utility
    Complete configuration of 50+ blocks with
    ~3M gates each with library and foundry
    database
    Run time manager to handle block/Chip run
    on various servers with EDA tools
    OptiStat- Interactive Dashboard for status
    reporting and monitoring provided very
    strong effectiveness during Project
    As a result, it Improved Productivity and
    Predictability and ensured Successful Tape
    out

    The client launched one of the first lower node


    chips on time with effective use of Engineers,
    tools and resources. The Tape out had high
    predictability of each block, stage, issue, risk and
    run time. Thus it helped to predict, manage and
    mitigate schedule issues and Productivity.

    The client continues to


    leverage OptiX Design
    Environment tool on the
    other chip projects, with
    eInfochips as the physical
    design partner

    About eInfochips
    eInfochips is a global technology firm specializing in Product Engineering and Software R&D services. The company is
    recognized for technology leadership by Gartner, Frost & Sullivan, NASSCOM and Zinnov. eInfochips has contributed
    to 500+ products for top global companies, with more than 10 million deployments across the world.
    USA HQ 1230 Midas Way, Suite #200, Sunnyvale (CA) 94085 | (+1) 408 496 1882
    INDIA HQ 11 A/B Chandra Colony, CG Road, Ellisbridge, Ahmedabad 380 006

    www.einfochips.com | [email protected]

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