Design of Analog MOS LSI

Lecture 3
Small Signal Modeling of CMOS Subcircuits

Michael Perrott
September 10, 2003
Copyright 2003 by Michael H. Perrott
All rights reserved.

Outline

Thevenin modeling for small-signal analysis

Small-signal analysis of CMOS Subcircuits

- Amplifiers
- Current mirrors
- Current sources
- Cascode and enhanced cascode techniques

M.H. Perrott 2003

Small Signal Analysis

A CMOS Amplifier

Small Signal Analysis Steps

ID

RD

1) Solve for bias current Id

RG

vout

vin
Vbias

RS

2) Calculate small signal

parameters (such as gm, ro)
3) Solve for small signal response
using transistor hybrid- small
signal model

Key analysis step is to plug in the Hybrid- model

- Small signal parameters determined from biasing

- All independent sources are set to zero

M.H. Perrott 2003

Analysis of Amplifier Using Hybrid-Pi Model

Fill in Hybrid-model for transistor and set independent

sources to zero
MOS Hybrid- Small Signal Model
RG

vin

vgs

gmvgs

vs

-gmbvs

ro

RD

vout

RS

Use KCL/KVL to solve for node voltages/currents

- Requires solution of simultaneous equations!

Is there a faster way?

M.H. Perrott 2003

Thevenin/Norton Modeling

Allows simplification of circuits into One-Port and

Two-Port models

- Eliminates having to solve simultaneous equations!

-

With practice, can calculate many circuit characteristics

by inspection
Note: we will assume unilateral behavior for two-ports
This is valid for transistor circuits given the Hybrid-
model on the previous slide

M.H. Perrott 2003

Basics of One-Port Modeling

Linear Network

Thevenin Equivalent

Norton Equivalent

Zth
Vth

Ith

Zth

Vth computed as open circuit voltage at port nodes

Ith computed as short circuit current across port
nodes
Zth computed as Vth/Ith

M.H. Perrott 2003

Basics of Two-Port Modeling (Unilateral)

Linear Network

Zs
Vin

ZL

No Independent
Sources

We now include a
dependent current or
voltage source
Zin

- Solve using 1-Port

analysis at input

Zout

- Solve using 1-Port

analysis at output
with V1 = 0

Zs
Vin

V1 Zin

GmV1

Zout

ZL

GM

- Short circuit output

current as a function
of V1

OR
Zs
Vin

M.H. Perrott 2003

Zout
V1 Zin

AvV1

ZL

Av

- Open circuit output

voltage as a function
of V1
7

Analysis of Cascaded Blocks

Block 1

Block 2

Block 3

Linear Network

Linear Network

Linear Network

No Independent
Sources

Vin

Zin GmVin

Zout

Va

Vc ZL

Vb

Va

Vin

No Independent
Sources

Zin GmVa

Zout

No Independent
Sources

GmVb

Vb

Zin

Vb

Zin,effective

Zout

Vc ZL

Zout,effective
Vth,effective

Analysis carried out without solving simultaneous equations!

M.H. Perrott 2003

Thevenin Modeling of CMOS Transistors

Hybrid- Model
Rthd
RG

Key Small-Signal Parameters

RD
d

Parameter
gm

Rthg

vgs

gmvgs

-gmbvs

vs

RS

Weak Inversion
qID
nkT

2nCox(W/L)ID

ro
gmb

Rths

Strong Inversion

ro

gm
2 2|F| + VSB

(n-1)qID
nkT

1
ID

1
ID

Use the Hybrid- model of transistor to calculate

Thevenin resistances at each transistor node
Key point: we dont need to do this every time we
analyze a circuit

- We can derive expressions for Thevenin resistances for

general use

M.H. Perrott 2003

Thevenin Resistance Expressions

Hybrid- Model
Rthd
RG

Key Small-Signal Parameters

RD
d

Parameter
gm

Rthg

vgs

gmvgs

-gmbvs

s
vs

RS

Thevenin Resistances

ro

Exact
Rth = ro (1+(gm+gmb)RS)+RS
d

ID
RG

g
Rthg

Rthd

Rths= (1+RD /ro ) (ro

1
)
gm+gmb

Approximation
(gmb << gm, gmro >> 1)

s
Rths
RS

M.H. Perrott 2003

Rth = infinite

RD

2nCox(W/L)ID

ro
gmb

Rths

Strong Inversion

Rthd= ro (1+gmRS)
Rth = infinite
g
1 + RD /ro
Rth =
gm
s

1
gm

gm

Weak Inversion
qID
nkT

2 2|F| + VSB

(n-1)qID
nkT

1
ID

1
ID

Thevenin resistances
useful for many
calculations
It would be nice to
replace Hybrid-
model with Thevenin
equivalent
10

Replace Hybrid- Model with Thevenin Model

Hybrid- Model
Rthd
RG

Key Small-Signal Parameters

RD
d

Parameter

Strong Inversion

gm
Rthg

vgs

gmvgs

-gmbvs

ro

gm

s
vs

RS

Thevenin Resistances

RG

g
Rthg

Rthd

1
ID

1
ID

Proposed Thevenin Model

Exact
Rthg= infinite

RD

2 2|F| + VSB

(n-1)qID
nkT

ro

Rth = ro (1+(gm+gmb)RS)+RS
d
ID

Rths= (1+RD /ro ) (ro

1
)
gm+gmb

Rths
RS

M.H. Perrott 2003

Rthd= ro (1+gmRS)
Rthg= infinite
1 + RD /ro
Rth =
gm
s

Rthg vg

Avvg

is

Rthd

s
Approximation
(gmb << gm, gmro >> 1)

Exact
1
gm

is

Rths

Approximation
(gmb << gm, gmro >> 1)

qID
nkT

2nCox(W/L)ID

gmb
Rths

Weak Inversion

Av= gmro
= 1

gm
gm+gmb

Av = 1
= 1

11

Example 1: Source Follower Amplifier

Perform small signal analysis by plugging in Thevenin

model rather than Hybrid- model

- Determine parameters using calculations on summary

sheet in previous slide
d

RG
g
Vin

M1
Vout

s
RS

M1
is

Rths

RG
g
vin

d
Rthg

vg

is

Avvg

Rthd

s
RS

M.H. Perrott 2003

vout

12

Reduce to Two-Port For Convenience

Since Av is approximately 1, we see that a source

follower acts like a voltage buffer with overall gain < 1

- Note that overall gain is highly influenced by R

RG
g
Vin

Rths

RG

M1
Vout

s
RS

vin

vg

Rthg

RS

Avvg

vout

M1
is

Rths

RG
g
vin

d
Rthg

vg

is

Avvg

Rthd

s
RS

M.H. Perrott 2003

vout

13

The Issue of the Backgate Effect

RG

RG
M1

Vin

Vout

vin

vg

gm
v
gm+gmb g

1
gm+gmb

Rs

vout

RS

Backgate effect alters VT as the source node varies

Backgate effect is eliminated if we tie the bulk

connection of the device to its source

- Leads to reduced gain for the source follower

- Causes g to be set to zero

- For N-well process, this is only possible for PMOS
mb

devices

M.H. Perrott 2003

14

Some Technologies Allow Elimination of Backgate Effect

RG

RG
M1

Vin

Vout

vin

vg

gm
v
gm+gmb g

1
gm+gmb

Rs

vout

Rs

vout

RS
n-well process

RG

RG
M1

Vin

Vout

vin

vg

vg

1
gm

RS

p-well or triple well process

(tie the well and source)

P-well process: NMOS devices

Triple well process: both NMOS and PMOS devices

M.H. Perrott 2003

15

Example 2: Degenerated Common Source Amplifier

Again plug in Thevenin model for transistor

Reduction to two-port model achieved by lumping impact of
middle stage of model into last stage

- Dependent current source will then depend on v

rather than is

RD
Vout

RG
M1
Vin

RS

M1
RG

vin

Rthg

is

Rths

vg

is

Avvg

Rthd

RD

vout

s
RS

M.H. Perrott 2003

16

Reduce to Two-Port

Calculation of Gm

RG

RD
Vout

RG
M1
Vin

vin

vg

Rthg

Rthd

Gmvg

RD

vout

RS

M1
RG

vin

Rthg

is

Rths

vg

is

Avvg

Rthd

RD

vout

s
RS

M.H. Perrott 2003

17

Example 3: Common Gate Amplifier

Reduction to two-port is easy once we realize that

dependent source Avvg is zero since vg = 0
RD
Vout
M1
RS
Vin
M1

Rthg

is

Rths

vg

is

Avvg

Rthd

RD

vout

s
RS
vin

M.H. Perrott 2003

18

Reduce to Two-Port

Left section is eliminated

RS

RD

is

Vout
M1

vin

Rths

is

Rthd

RD

vout

RS
Vin
M1
is

Rths

Rth

vg

is

Avvg

Rthd

RD

vout

s
RS
vin

M.H. Perrott 2003

19

Example 4: Cascode Amplifier

RD
Vout

M2

M2

Rths2

is2

d2

RG
M1
Vin

2is2

RS

Rthd2

RD

vout

s2
M1
RG

vin

Rths1

g1

Rthg1

Common Gate
is1

d1

1is1

vg1 Av1vg1

Rthd1

s1
General Model

RS

Allows elimination of Miller effect of Cgd1

Reduction to two-port will be done in several steps

M.H. Perrott 2003

20

Eliminate Middle Sections

RD
Vout

M2

M2

Rths2

is2

d2

RG
M1
Vin

2is2

RS

Rthd2

RD

vout

s2
M1
RG

vin

g1

Rthg1

d1

vg1

Gm1vg1

Rthd1

Calculation of Gm1 same as for common source amp

To reduce further, note that

M.H. Perrott 2003

21

Resulting Two-Port Similar to Common Source Amp

RD
Vout

M2

M2

d2
RG
M1
Vin

Gm1vg1

RS

Rthd2

RD

vout

M1
RG

vin

g1

Rthg1

vg1

Key difference: drain impedance much larger

M.H. Perrott 2003

22

Example 5: Differential Amplifier

R1

R2

Vo- Vo+

Vin+

M1

M2

Vin-

Ibias
Vbias

M4

Useful for amplifying signals in the presence of noise

Useful for high speed digital circuits

- Common-mode noise is rejected

- Low voltage swing allows faster gate/buffer

performance

M.H. Perrott 2003

23

First Steps in Small Signal Modeling

R1

Vo- Vo+

Vin+

M1

R1

R2

M2

Vin-

Vin+

R2

Vo- Vo+
M1

M2

Vin-

Ibias
Vbias

Rthd4= ro4

M4

Small signal analysis assumes linearity

- Impact of M on amplifier is to simply present its drain

impedance to the diff pair transistors (M and M )
- Impact of V and V can be evaluated separately and
4

in+

in-

then added (i.e., superposition)

By symmetry, we need only determine impact of Vin+
Calculation of Vin- impact directly follows

M.H. Perrott 2003

24

Calculate Impact of Vin+ using Thevenin Models

R1
Vin+

R2

Vo- Vo+
M1

M2

ro4
R1
M1

R2
M2

Vo+

Rths2 2 is2

Rthd2

Vois1

Rths1
Vin+

Rthg1

vg1 Av1vg1

1is1

Rthd1

is2
General Model

ro4

Common Gate

Analysis follows fairly easily, but there is a simpler way!

M.H. Perrott 2003

25

Method 2 of Differential Amplifier Analysis

R1
Vin+

R2

Vo- Vo+
M1

M2

ro4

R1

R2

Vo- Vo+

VinVid
2
Vic

M1

M2
-Vid
2
ro4

Partition input signals into common-mode and

differential components
By superposition, we can add the results to determine
the overall impact of the input signals

M.H. Perrott 2003

26

Differential Analysis

R1
Vid
2

is1

M2

-Vid
2

R1
Vid
2

R2

R1

Vo- Vo+
M1

M2

Vid
2

VoM1

Vo+
M2

-Vid
2

ro4

- Inputs are equal in magnitude but opposite in sign to

each other
- By linearity and symmetry, i must equal i

Key observations

s1

-Vid
2

R2

is2
iR

R2

Vo- Vo+
M1

is1= is2
iR = 0

s2

This implies iR is zero, so that voltage drop across ro4 is

zero
The sources of M1 and M2 are therefore at incremental
ground and decoupled from each other!

Analysis can now be done on identical half-circuits

M.H. Perrott 2003

27

Common-Mode Analysis
R1
Vic

Vo- Vo+
M1

iR

Vic

M2

is1

is1= is2
iR = 2is1= 2is2

R2

R1
Vo-

Vic

Vo+

M1

is1

is2

R2

ro4

M2
idiff = 0

2ro4

R1
Vic

Vic

VoM1

R2
Vo+
M2

Vic

is2
2ro4

2ro4

2ro4

Key observations

- Inputs are equal to each other

- By linearity and symmetry, i must equal i
This implies i = 2i = 2i
- We can view r as two parallel resistors that have equal
s1

s1

s2

s2

o4

current running through them

Allows us to break up amplifier into two identical halfcircuits

M.H. Perrott 2003

28

Issue: Thevenin Method Breaks Down in Some Cases

RthA

M1

RS

Using Thevenin method

But, in reality

Issue: coupling between source, drain, or gate

- Do we have to abandon the Thevenin method?

M.H. Perrott 2003

29

Thevenin Resistance of Diode-Connected MOS

Derive RthA Using
Hybrid-p Model

Diode-Connected
Device

Resulting
One-Port Model

RthA
RthA

RthA

vgs

gmvgs

M1

RS

vs

-gmbvs

ro

(gm+gmb)

gm

gm

RS

RS

Plug in Hybrid- to do the analysis

Whenever you see this exception, you can simply use
this result for small signal analysis (i.e., Hybrid-
model not needed anymore)

M.H. Perrott 2003

30

Example: Current Mirror / Current Source

Ibias
n1
M2

M2

M1

M1

n1
g1

1
gm2

Diode-Connected

Iref

n2

Rthg1

n2

n2

d1

vg1

g m1vg1

Rthd1

Rthd1= ro1

Common Source

Key parameter of current source output is its output

resistance

M.H. Perrott 2003

31

Cascoded Current Source

Rthd3

Iref
Vbias

Ibias

M2

M3

M1

Rthd3
Vbias

M3

ro1

Offers increased output resistance

Calculation straightforward using Thevenin resistance
method

M.H. Perrott 2003

32

Double Cascode Current Source

I1

I2

M4

Vbias2

M3

Vbias1

M2

Rthd3

M1

Offers even higher output resistance

Calculation straightforward using Thevenin resistance
method

M.H. Perrott 2003

33

Wilson Current Mirror

I2
Rthd2

I1
M2

M3

M1

Relies on feedback in its operation

- Thevenin method cannot be applied due to source/gate

coupling!

Using Hybrid- analysis

- Output resistance comparable to cascode current source

This circuit is rarely used these days

M.H. Perrott 2003

34

Enhanced Cascode Current Source

Ibias2

Ibias

Iref
M4

M3
M2

M1

Offers output resistance comparable to double

cascode current source
As with Wilson mirror, analysis is tricky due to
source/gate coupling

- Must resort to Hybrid- model

- Result (using R formula in the following slide)
thd

M.H. Perrott 2003

35

Thevenin Resistances for CMOS Transistor Feedback Pair

RC

RA

RC

RA
M4

Rthd

Rthd

M4
M3

vgs4

M3

Rths

gm4vgs4

ro4

-gmb4vs4

RB
ro3

gm3vgs3 vgs3

-gmb3vs3

S
vs4

Rths
RB

vs3=0

M.H. Perrott 2003

36

Variation on a Theme: Enhanced Cascode Amplifiers

Ibias1

Ibias2

R1
Vout
M4
Input Source

M3
M2

M1

Iin

Rs

We can turn the enhanced cascode current source

into an amplifier

- Inject a current input at the source of M

Key aspects of small signal analysis can be done

using Thevenin method

- Simply leverage Thevenin resistance formulas shown on

previous slide

M.H. Perrott 2003

37

Small-Signal Analysis of Enhanced Cascode Amp

Ibias1

Ibias2

R1 Rout

R1
Vout

Vout

M4

M4
Input Source

Input Source

M3
M2

M3
M1

Iin

Rs

1
gm2

Rthd1

Rin

Iin

- Input impedance is quite low

From Thevenin resistance calculations, we know

- Output impedance is probably determined by R

Rs

This amplifier is useful for extracting a current signal

from a high impedance source

M.H. Perrott 2003

38

Conclusion

CMOS subcircuits form key building blocks for larger

circuits (such as op-amps)

- Consists of amplifiers, current mirrors, current sources

Thevenin modeling can be used to quickly perform

small-signal analysis of CMOS subcircuits

- Avoids having the solve simultaneous equations

Thevenin approach is limited to subcircuits that do

not have coupling between source, drain, and/or gate

- However, can often derive specific Thevenin equivalents

for such subcircuits
Examples: diode-connected devices, enhancedcascode configuration

M.H. Perrott 2003

39