IC Applications Lab Manual
IC Applications Lab Manual
ECE, BIET
INTRODUCTION
STUDY OF IC741, IC555 & IC565
AIM: To study pin details, specifications, applications and features of IC741 (Op-Amp) IC555 (Timer)
& IC565.
COMPONENTS: IC741, IC555 & IC565
Pin Configuration:
Specifications:
Supply Voltage
Internal Power Dissipation
Differential input voltage
Input Voltage
Operating temperature range
18V
310mw
30V
15V
0C to 70C
Applications:
Non-inverting amplifier
Inverting amplifier
Integrator
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Differentiator
Low Pass, High Pass, Band pass and Band Reject Filters
Features:
No External frequency compensation is required
Short circuit Protection
Off Set Null Capability
Large Common mode and differential Voltage ranges
Low Power Dissipation
No-Latch up Problem
741 is available in three packages: 8-pin metal can, 10-pin flat pack and 8 or 14-pin DIP
IC555: (Timer)
Pin Configuration:
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Specifications:
Supply Voltage
Maximum Current rating
5V to 18V
200mA
0C to 70C
Applications:
1. Astable Multivibrator, Schmitt trigger, Free running ramp Generator, etc.,
2. Monostable Multivibrator, Frequency divider, Pulse structure
Features:
555 timers are reliable, easy to use and low cost. The device is available as an 8 pin circular style, an 8
pin mini DIP or a 14 Pin DIP
ECE, BIET
Applications:
1.
2.
3.
4.
Modems
FSK Demodulation
FM Demodulation
Frequency Synthasizers etc.
ECE, BIET
VIVA QUESTIONS:
1.
What is the symbol of op-amp?
2.
Draw the pin diagram of op-amp.
3.
What is the supply voltage range that an op-amp can with stand?
4.
What is the input voltage range that an op-amp can with stand?
5.
What are the available package types of IC741?
6.
What is a virtual ground? What are the differences between the physical ground and the
virtual ground?
7.
What is the current flowing through the input terminals of an Ideal op-amp?
8.
Which loop voltage gain is larger, closed or open?
9.
What is the normal value of saturation voltage of an op-amp?
10.
Mention a few applications of op-amp.
11.
Mention some features of op-amp.
12.
What is the main purpose of IC555 timer?
13.
Draw the pin diagram of op-amp.
14.
Draw the functional diagram of IC555 timer.
15.
How many comparators are present in IC555 timer?
16.
What are the trigger voltages of UC and LC?
17.
What is the functionality of power amplifier in the output stage of IC555 timer?
18.
Which is the Flip-Flop used in IC555 timer?
19.
What is the use of RESET pin in IC555 timer?
20.
What are the available package types of IC555 timer?
21.
Mention a few applications of IC555 timer.
22.
What is the dc level required for the negative going trigger pulse at pin 2 of IC555 timer?
23.
What is IC565?
24.
Draw the pin diagram of IC565
ECE, BIET
EXPERIMENT NO: 1
DATE:
AIM: To study Adder, Subtractor & Comparator circuits using OP-AMP IC741 and verify their
theoretical and practical output.
APPARATUS:
Bread Board
IC741, Resistors
DC Supply
Function Generator
Multi meter
CRO
Probes, Connecting Wires
THEORY:
Adder: Op-amp can be used to design a circuit whose output is the sum of several input signals. Such a
circuit is called a summing amplifier or an adder. Summing amplifier can be classified as inverting &
non-inverting summer depending on the input applied to inverting & non-inverting terminals
respectively. Circuit Diagram shows a non-inverting adder with n inputs. Here the output will be the
linear summation of input voltages. The circuit can be used either as summing amplifier, scaling
amplifier, or as averaging amplifier.
From the circuit of adder, it can be noted that at pin3
I1+I2+I3+.In=0
+
=0
=0
Va=
Vo
Va
Vo
Vo = (1+
)
)(
= (1+ (n-1)) (
ECE, BIET
) =n (
Vo= V1+V2+V3++Vn
This means that the output voltage is equal to the sum of all the input voltages.
Subtractor: A subtractor is a circuit that gives the difference of the two inputs, Vo =V2-V1, Where V1
and V2 are the inputs. By connecting one input voltage V1 to inverting terminal and another input
voltage V2 to the non inverting terminal, we get the resulting circuit as the Subtractor. This is also
called as differential or difference amplifier using op-amps.
Output of a differential amplifier (subtractor) is given as
Vo = (-Rf/R1) (V1-V2)
If all external resistors are equal in value, then the gain of the amplifier is equal to -1. The output
voltage of the differential amplifier with a gain of -1 is
Vo = (V2-V1)
Thus the output voltage Vo is equal to the voltage V2 applied to the non inverting terminal
minus the voltage V1 applied to the inverting terminal. Hence the circuit is called a Subtractor.
Comparator: A Comparator is a non-linear signal processor. It is an open loop mode application of Opamp operated in saturation mode. Comparator compares a signal voltage at one input with a reference
voltage at the other input. Here the Op-amp is operated in open loop mode and hence the output is
Vsat. It is basically classified as inverting and non-inverting comparator. In a non-inverting
comparator Vin is given to +ve terminal and V ref to ve terminal. When Vin < Vref, the output is Vsat and
when Vin > Vref, the output is +Vsat (see expected waveforms). In an inverting comparator input is given
to the inverting terminal and reference voltage is given to the non inverting terminal. The output of the
inverting comparator is the inverse of the output of non-inverting comparator. The comparator can be
used as a zero crossing detector, window detector, time marker generator and phase meter.
CIRCUIT DIAGRAM:
Adder:
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Subtractor:
Comparator:
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
PROCEDURE:
Adder:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Apply dc voltages at each input terminal for V 1 and V2 from the dc supply and check the output
voltage Vo at the output terminal.
Tabulate 3 different sets of readings by repeating the above step.
Compare practical Vo with the theoretical output voltage Vo =V1+V2.
Subtractor:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Apply dc voltages at each input terminal for V 1 and V2 from the dc supply and check the output
voltage Vo at the output terminal.
Tabulate 3 different sets of readings by repeating the above step.
Compare practical Vo with the theoretical output voltage Vo =V2-V1.
10
1.
2.
4.
5.
6.
8.
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Comparator:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
3. Apply 1 KHz sine wave with 5 Vpp at the non-inverting input terminal of IC741 using a function
generator.
Apply 1V dc voltage as reference voltage at the inverting terminal of IC741.
Connect the channel-1 of CRO at the input terminals and channel-2 of CRO at the output
terminals.
Observe the input sinusoidal signal at channel-1 and the corresponding output square wave at
channel-2 of CRO. Note down their amplitude and time period.
7. Overlap both the input and output waves and note down voltages at positions on sine wave
where the output changes its state. These voltages denote the Reference voltage.
Plot the output square wave corresponding to the sine input with Vref = 1V.
TABLE:
Adder:
S.No. V1
Volts
V2
Volts
Theoretical
Subtractor:
S.No. V1
Volts
V2
Volts
Theoretical
Practical Vo
Volts
Vo=V1+V2
Practical Vo
Volts
Vo=V2-V1
Comparator:
Theoretical Reference voltage (from
circuit)
Practical Reference voltage (from output
waveforms)
11
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EXPECTED WAVEFORMS:
COMPARATOR INPUT & OUTPUT WAVEFORMS
RESULT:
QUESTIONS:
Draw the circuit diagram of 3 input adder.
What is the other name for adder?
Draw the circuit diagram of a Subtractor.
Which amplifier acts as a Subtractor?
How many basic input parameters are required for a comparator?
Draw the circuit diagram of a non-inverting comparator and inverting comparator.
7. What is the output of a non-inverting comparator and inverting comparator if the input
is sinusoidal?
8.
What are the differences between the Inverting and NonInverting comparator?
9.
What is the name of the comparator if the reference voltage is 0V?
10.
Draw the circuit diagram and the output waveform of a Zero Crossing Detector if the input
is sinusoidal?
11.
What is the name of a regenerative comparator?
12.
Draw an op- amp circuit whose output Vo is V1+ V2 V3 V4.
1.
2.
3.
4.
5.
6.
12
IC Applications and HDL Simulation Lab
ECE, BIET
Manual
EXPERIMENT NO: 2
DATE:
AIM: To study the operation of the Integrator & differentiator using op-amp and trace the output
wave forms for sine and square wave inputs.
APPARATUS:
Bread Board
IC741, Resistors, Capacitors
Function Generator
CRO
Probes
Connecting wires
THEORY:
Integrator:
A circuit in which the output voltage is the integration of the input voltage is called an
integrator.
In the practical integrator to reduce the error voltage at the output, a resistor R F is connected
across the feedback capacitor CF. Thus, R F limits the low-frequency gain and hence minimizes the
variations in the output voltage.
The frequency response of the integrator is shown in the fig. 2.1. f b is the frequency at which
the gain is 0 dB and is given by
fb = 1/2 R1Cf.
13
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In this fig. there is some relative operating frequency, and for frequencies from f to f a the gain
RF/R1 is constant. However, after fa the gain decreases at a rate of 20 dB/decade. In other words,
between fa and fb the circuit of fig. 2.1 acts as an integrator. The gain-limiting frequency fa is given by
fa = 1/2 RfCf.
Normally fa<fb. From the above equation, we can calculate R f by assuming fa & Cf. This is very
important frequency. It tells us where the useful integration range starts.
If fin < fa
If fin = fa
If fin = 10fa
In the circuit diagram of Integrator, the values are calculated by assuming f a as 50 Hz. Hence the
input frequency is to be taken as 500Hz to get 99% accuracy results.
Integrator has wide applications in
1. Analog computers used for solving differential equations in simulation arrangements.
2. A/D Converters
3. Signal wave shaping
4. Function Generators.
Differentiator:
As the name suggests, the circuit performs the mathematical operation of differentiation, i.e. the
output voltage is the derivative of the input voltage.
Vo = - Rf C1
dVin
dt
Both the stability and the high-frequency noise problems can be corrected by the addition of two
components: R1 and Cf, as shown in the circuit diagram. This circuit is a practical differentiator.
The input signal will be differentiated properly if the time period T of the input signal is larger
than or equal to RfC1. That is, T>= RfC1
Differentiator can be designed by implementing the following steps.
1. Select fa equal to the highest frequency of the input signal to be
differentiated. Then, assuming a value of C 1<1 F, calculate the value
of Rf
2. Calculate the values of R1and Cf so that R1C1=RfCf.
Differentiator has wide applications in
1. Monostable Multivibrator
2. Signal wave shaping
3. Function Generators.
14
Differentiator:
15
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PROCEDURE:
Integrator:
1.
Connect the components/equipment as shown in the circuit diagram.
2.
Switch ON the power supply.
3.
4.
5.
Apply sine wave at the input terminals of the circuit using function Generator.
Connect channel-1 of CRO at the input terminals and channel-2 at the output terminals.
o
Observe the output of the circuit on the CRO which is a cosine wave (90 phase shifted from the
sine wave input) and note down the position, the amplitude and the time period of Vin & Vo.
6.
Now apply the square wave as input signal.
7.
Observe the output of the circuit on the CRO which is a triangular wave and note down the
position, the amplitude and the time period of Vin & Vo.
8.
Plot the output voltages corresponding to sine and square wave inputs.
Differentiator:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Apply sine wave at the input terminals of the circuit using function Generator.
Connect channel-1 of CRO at the input terminals and channel-2 at the output terminals.
o
Observe the output of the circuit on the CRO which is a cosine wave (90 phase shifted from the
sine wave input) and note down the position, the amplitude and the time period of Vin & Vo.
6.
Now apply the square wave as input signal.
7.
Observe the output of the circuit on the CRO which is a spike wave and note down the position,
the amplitude and the time period of Vin & Vo.
8.
Plot the output voltages corresponding to sine and square wave inputs.
1.
2.
3.
4.
5.
EXPECTED WAVEFORMS:
16
ECE, BIET
Differentiator:
RESULT:
QUESTIONS:
1.
What is an Integrator?
2.
Draw the circuit of the Integrator using op-amp IC741.
3.
Write down the expression for Vo of an Integrator.
4.
Draw the frequency response of the Integrator and explain.
5.
Draw the output waveform of the Integrator when the input is a Square wave.
6.
What is the purpose behind the connection of Rf in the feedback path of Integrator?
7.
What are the applications of Integrator?
8.
Why Rcomp is used in both Integrator and Differentiator circuits?
9.
What is a Differentiator?
10.
Draw the circuit of the Differentiator using op-amp IC741.
11.
Write down the expression for Vo of a Differentiator.
12.
Draw the output waveform of the Differentiator when the input is a Sine wave.
13.
Why R1 and Cf are connected in the circuit of the Differentiator?
14.
What are the applications of Differentiator?
17
ECE, BIET
EXPERIMENT NO: 3
ACTIVE FILTER APPLICATIONS - LPF & HPF (1
DATE:
ST
ORDER)
st
Bread Board
Function Generator
CRO
Probes
Connecting Wires
741 Op-amp, Resistors, Capacitors
THEORY:
Filters are classified as follows:
Based on components used in the circuit
Active filters Use active elements like transistor or op-amp(provides
gain)
in addition to passive elements
Passive filters Use only passive elements like resistors, capacitors and
inductors, hence no gain here.
Based on frequency range
Low pass filter(LPF) Allows low frequencies
High pass filter(HPF) Allows high frequencies
Band pass filter(BPF) Allows band of frequencies
Active Filter is often a frequency selective circuit that passes a specified band
of frequencies and blocks or attenuates signals of frequencies outside this band.
These Active Filters are most extensively used in the field of communications and
signal processing. They are employed in one form or another in almost all sophisticated
electronic systems such as Radio, Television, Telephone, Radar, Space Satellites, and BioMedical Equipment.
Active Filters employ transistors or Op Amps in addition to that of resistors and
capacitors. Active filters have the following advantages over passive filters. (1) Flexible
gain and frequency adjustment. (2) No loading problem (because of high input impedance
and low output impedance) and
(3) Active filters are more economical than passive filters.
A first Order Low Pass Butterworth filter uses RC network for filtering. Note
that the op-amp is used in the non-inverting configuration; hence it does not load down the
RC network. Resistors R1 and RF determine the gain of the filter.
The gain magnitude equation of the Low Pass filter can be obtained by
converting equation
into its equivalent polar form, as follows.
2
| Vo / Vin |
= AF/1+ (f / fH)
18
IC Applications and HDL Simulation Lab Manual
Where
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1
fH = -------------------- = high cut-off frequency of the filter.
2 RC
The operation of the low pass filter can be verified from the gain magnitude equation.
1. At very low frequencies, that is f < fH
| Vo/Vin |
= AF
2. At f = fH, | Vo/Vin |
= AF/2 = 0.707 AF
3. At f > fH
< AF
| Vo/Vin |
Thus the Low Pass filter has a constant gain AF from 0 Hz to the almost high cutoff frequency, fH, it has the gain 0.707AF at exactly fH, and after fH it decreases at a
constant rate with an increase in frequency. The gain decreases 20 dB (= 20 log 10) each
time the frequency is increased by 10. Hence the rate at which the gain rolls off after f H is
20 dB/decade. The frequency f = fH is called the cut-off frequency because the gain of the
filter at this frequency is down by 3 dB (=20log 0.707) from 0 Hz. Other equivalent terms
for cut-off frequency are -3dB frequency, break frequency, or corner frequency.
DESIGN:
1.
Choose a value for high cut-off frequency, fH(1 KHz) and a value for gain, AF (2)
2.
Assume a value of C 1F (0.1 F)
3.
Calculate the value of R using the equation
4.
Finally, select values of R1 and RF dependent on the desired pass band gain AF
using
A
F
=
1
+
R
F
/
R
1
2
=
1
+
R
F
/
R
1
R
F
=
R
1
CIRCUIT DIAGRAM:
(You can assume any value for C which is available in the Lab)
19
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PROCEDURE:
1.
2.
3.
4.
5.
6.
7.
Connect channel -1 of CRO to input terminals (Vin) and channel -2 to output terminals (Vo).
Set Vin = 1V & fin=10Hz using function generator.
By varying the input frequency in regular intervals, note down the output voltage.
Calculate the gain (Vo/Vin) and Gain in dB = 20 log (Vo/Vin) at every frequency.
Plot the frequency response curve (taking frequency on X-axis & Gain in dB on Y-axis) using
Semi log Graph.
8. Find out the high cut-off frequency, fH (at Gain= Constant Gain, Af 3 dB) from the frequency
response plotted.
9.
Verify the practical (fH from graph) and the calculated theoretical cut-off frequency (f H =
1/2RC ).
TABLE:
Vin = 1V
S.No. Input Frequency
f(Hz)
Output Voltage
Vo (V)
CALCULATIONS:
THEORETICAL Cut-off frequency:
fH = 1 / (2RC) = high cut-off frequency of the Low pass filter.
=
PRACTICAL Cut-off frequency (from Graph) :
fH = high cut-off frequency of the Low pass
filter = 3dB cut-off frequency =
20
RESULT:
21
ECE, BIET
ECE, BIET
st
Bread Board
Function Generator
CRO
Probes
Connecting Wires
741 Op-amp, Resistors, Capacitors
THEORY:
First Order High Pass Filter consists of RC network for filtering. First Order High Pass filter can
be constructed from a First Order Low Pass filter simply by interchanging frequency determining
components R & C . Op-Amp is used in the non inverting configuration. Resistor R 1 and RF
determine the gain of the Filter.
The voltage gain magnitude equation of the second order High-pass filter is
V0
A F(f/fL)
----- =
---------------2
[1+(f/fL) ]
Vin
where AF = 1 + RF / R1
f = Operating (input) frequency.
1
fL = -------------------- = Low cut-off frequency of the filter.
2RC
This is the frequency at which the magnitude of the gain is 0.707 times its pass band value.
Obviously, all frequencies higher than fL are Pass Band frequencies, with the highest frequency
determined by the closed-loop bandwidth of the OP-Amp.
The operation of the highpass filter can be verified from the gain magnitude
equation. 1. At very low frequencies, that is f < fL
| Vo/Vin |
< AF
2. At f = fL, | Vo/Vin |
= AF/2 = 0.707 AF
3. At f > fL,
= AF
| Vo/Vin |
22
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For example, in the first order High Pass filter the gain rolls off or increases at the rate of
20dB/decade in stop band, that is for input signal frequency lesser than Low cut-off frequency (fL ) ;
High Pass filter has constant gain AF, after the Low cut-off frequency onwards (fL).
DESIGN: Follow the same procedure as given for low-pass filter.
CIRCUIT DIAGRAM:
1.
2.
PROCEDURE:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
3.
4.
5.
6.
7.
Connect channel -1 of CRO to input terminals (Vin) and channel -2 to output terminals (Vo).
Set Vin = 1V & fin=10Hz using function generator.
By varying the input frequency in regular intervals, note down the output voltage.
Calculate the gain (Vo/Vin) and Gain in dB = 20 log(Vo/Vin) at every frequency.
Plot the frequency response curve (taking frequency on X-axis & Gain in dB on Y-axis) using
Semi log Graph.
8. Find out the low cut-off frequency, fL (at Gain= Constant Gain, Af 3 dB) from the frequency
response plotted.
9.
Verify the practical (fL from graph) and the calculated theoretical cut-off frequency (f L =
1/2RC).
23
IC Applications and HDL Simulation Lab
ECE, BIET
Manual
TABLE:
Vin = 1V
S.No. Input Frequency
f(Hz)
Output Voltage
Vo (V)
CALCULATIONS:
THEORETICAL Cut-off frequency:
fL = 1 / (2RC) = Low cut-off frequency of the HPF.
=
PRACTICAL Cut-off frequency:
fL = Low cut-off frequency of the HPF. = 3dB cut-off
frequency
=
EXPECTED GRAPH:
RESULT:
24
ECE, BIET
QUESTIONS:
1.
How filters are classified? Give one example for each classification.
2.
What is an active filter and why it is called so?
3.
How an active filter differs from a passive filter?
4.
What are the advantages of active filters over passive filters?
5.
Draw the circuit diagrams of active filters LPF and HPF.
6.
Draw the frequency response of all filters (LPF, HPF, BPF, BRF and All-pass).
st
nd
7.
What is the gain roll off rate for a 1 order and 2 order filter?
8.
What is the formula for cut-off frequency?
9.
What is a 3 dB frequency and why it is called so?
10.
What are the other names for 3 dB frequency?
25
ECE, BIET
EXPERIMENT NO: 4
DATE:
IC 741 WAVEFORM GENERATORS SINE, SQUAREWAVE AND TRIANGULAR WAVES
AIM: To design a Waveform Generator which generates Sine, Square and Triangular waveforms using
IC741 and to verify its various output waveforms.
APPARATUS:
Bread Board
CRO
Probes
741 Op-amp, Resistors, Capacitors
THEORY:
Waveform generator using IC741 is a circuit which generates Sine wave, Square wave and
Triangular wave. This circuit is a combination of Wien Bridge oscillator, Zero crossing detector
(Comparator with zero reference voltage) and Integrator. The Wien Bridge oscillator generates Sine
wave which is fed to the input of Zero crossing detector. This detector gives the square wave output
which is connected to the input of the Integrator which in turn produces the Triangular wave output.
The frequency of oscillations of the Sine wave output of Wien Bridge oscillator is given by
fo = 1/2RC
The frequency of oscillations of Square and Triangular wave outputs will also be the
same frequency as that of the Sine wave output.
For theory of individual circuits i.e. Wien Bridge oscillator, Zero Crossing Detector and
Integrator, please refer to the THEORY section of respective experiments mentioned earlier in this
manual.
DESIGN for Wien Bridge Oscillator:
1.
Choose a desired frequency of oscillation, say fo =500 Hz.
2.
Choose a value for capacitor C (0.1 F) and then calculate the value of R by using the equation
for fo (fo = 1/2RC).
3. Choose a value for R1 (10 K) and calculate the value of Rf from the gain equation (Av =
1+Rf/R1 = 3). (Note: In practical, the value of Rf may need to be varied to be more than
the calculated value.)
26
27
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1.
2.
3.
4.
5.
6.
7.
PROCEDURE:
Sine wave Generator:
Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Connect output to the CRO.
Adjust the potentiometer to get an undistorted waveform.
Note down the amplitude and the time period, T of the sine wave and calculate the frequency of
oscillation, fo = 1 / T.
Verify the practical frequency of oscillation calculated in the preceding step with the theoretical
value, fo =1/2RC.
Plot the waveform.
28
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Connect the input to the channel-1 of CRO and output to the channel-2 of CRO.
Observe the triangular wave output at channel-2 and note down the amplitude and time period, T
of the wave form.
6.
Verify that the frequency of oscillation
of both the input and the output waves is same. Also
o
verify that the output wave is inverted i.e. 180 phase shift from the input wave.
7.
Plot the output waveform in accordance with the input waveform.
CALCULATIONS:
THEORETICAL Frequency of Oscillation
fo =1/2RC
=
PRACTICAL Frequency of Oscillation
fo = 1/T
=
EXPECTED WAVEFORMS:
RESULT:
29
1.
2.
3.
4.
6.
ECE, BIET
QUESTIONS:
What is a Function Generator?
What are the different stages in a Function Generator and how they are connected?
Draw the output waveforms at different stages of Function Generator.
What is the relationship among the frequencies of output waveforms at different stages of
Function Generator?
5. Will there be any phase shift between the input and the output of any stage in the Function
Generator and what factor it depends on?
Why is Rcomp used in the circuit of Triangular wave generator?
Why is potentiometer used in the circuit of Wien Bridge Oscillator?
30
ECE, BIET
DATE
a) Monostable Multivibrator
AIM: To design a Monostable Multivibrator using IC555 and compare its theoretical and practical
pulse width.
APPARATUS: Bread Board.
CRO
Probes
Connecting wires
555 Timer, Resistors, Capacitors
THEORY:
Monostable multivibrator is also called as oneshot Multivibrator. When the output is low, the
circuit is in stable state, transistor T1 is ON and Capacitor C is shorted to the ground. However, upon
application of a negative trigger pulse to Pin2, transistor T1 is turned OFF, which releases short circuit
across the external capacitor and drives the output High. The capacitor C now starts charging up toward
VCC through R. However when the voltage across the external capacitor equals 2/3 V CC, upper
comparators output switches from low to high which in turn derives the output to its low state. And the
output of the flip flop turns transistor T1 ON, and hence the capacitor C rapidly discharges through the
transistor. The output of the Monostable remains low until a trigger pulse is again applied. Then the
cycle repeats. The time during which the output remains high is given by
tp = 1.1 R C
31
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Once triggered, the circuits output will remain in the high state until the set time tp elapses. The
output will not change its state even if an input trigger is applied again during this time interval t p.
DESIGN:
1.
Choose a desired pulse width, say tp =1.1 ms.
2. Choose a value for capacitor C (0.1 F) and then calculate the value of R by using the equation
for tp.
CIRCUIT DIAGRAM:
32
2.
3.
4.
5.
6.
8.
ECE, BIET
PROCEDURE:
1. Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Connect function generator at the trigger input.
Connect channel-1 of CRO to the trigger input and channel-2 of CRO to the output (Pin 3).
Using Function Generator, apply 1 KHz square wave with amplitude of approx. equal to 9 V pp at
the trigger input.
Observe the output voltage with respect to input and note down the pulse width and amplitude.
7. Now connect channel-2 of CRO across capacitor and observe the voltage across the capacitor
and note it down.
Compare the practical pulse width noted in the step above with its theoretical value (tp=1.1 RC)
CALCULATIONS:
THEORETICAL Pulse width
R=C=
tp = 1.1 RC =
PRACTICAL Pulse width
tp =
33
RESULT:
1.
2.
3.
4.
5.
6.
QUESTIONS:
What is the other name for monostable multivibrator (MSMV)?
When MSMV is in stable state, what is the output level?
Why trigger is required in the case of MSMV?
Which type of trigger pulse is required for MSMV?
What is the formula for the output pulse width of MSMV?
How long MSMV stays in unstable state?
34
ECE, BIET
ECE, BIET
(1)
Similarly, the time during which the capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to the time the
output is low and is given by
td = 0.69 (RB)C
(2)
Thus the total time period of the waveform is
T = tc + td = 0.69(RA + 2RB)
(3)
35
(4)
ECE, BIET
Circuit Diagram:
2.
3.
4.
5.
6.
PROCEDURE:
1. Connect the components/equipment as shown in the circuit diagram.
Switch ON the power supply.
Connect channel-1 of CRO to the output (Pin 3).
Observe the output voltage and note down the time period and duty cycle.
Now connect channel-2 of CRO across capacitor and observe the voltage across the capacitor
and note it down.
Compare the practical time period and duty cycle.
CALCULATIONS:
THEORETICAL time periods
tc = 0.69 (RA + RB) C
36
ECE, BIET
td = 0.69 (RB)C
Total time period of the waveform, T = tc + td
% Duty Cycle = (tc / T) *100
PRACTICAL (from output waveforms)
time period, T =
% Duty cycle =
RESULT:
QUESTIONS:
1.
What is the other name for Astable multivibrator (AMV)?
2.
What is the formula for the time period of the waveform of AMV?
3.
What is the formula for the % of Duty cycle?
37
ECE, BIET
EXPERIMENT NO: 6
DATE
AIM: To study the Schmitt trigger characteristics by using IC741 and compare theoretical and practical
values of the Upper Threshold voltage, VUT and the Lower Threshold voltage, VLT.
APPARATUS:
741 Op-Amp
Resistors
Bread board
Function generator
CRO
Probes
Connecting wires
THEORY:
Circuit shows an inverting comparator with positive feedback. This circuit converts an irregular
shaped waveform to square wave or pulse. This circuit is known as Schmitt trigger or Regenerative
comparator or Squaring circuit. The input voltage Vin triggers (changes the state of ) the output Vo every
time it exceeds certain voltage levels called Upper threshold voltage, V UT and Lower threshold voltage,
VLT. The hysteresis width is the difference between these two threshold voltages i.e. V UT VLT. These
threshold voltages are calculated as follows.
VUT = (R1/R1+R2) Vsat
when Vo= Vsat
VLT = (R1/R1+R2) (-Vsat)
The output of Schmitt trigger is a square wave when the input is sine wave or triangular wave, where as
if the input is a saw tooth wave then the output is a pulse wave.
CIRCUIT DIAGRAM:
PROCEDURE:
2.
38
ECE, BIET
6.
Overlap both the input and output waves and note down voltages at positions on sine wave
where output changes its state. These voltages denote the Upper threshold voltage and the Lower
threshold voltage (see EXPECTED WAVEFORMS below).
7. Verify that these practical threshold voltages are almost same as the theoretical threshold
voltages calculated using formulas given in the THEORY section above.
8.
Sketch the waveforms by noting down the amplitude and the time period of the input Vin and the
output Vo.
EXPECTED WAVEFORMS:
39
ECE, BIET
TABLE:
RESULT:
1.
2.
3.
4.
5.
6.
7.
QUESTIONS:
Which is type of comparator called Schmitt trigger using IC741?
What is the output wave of Schmitt trigger if the input is sine wave?
What type of waveform is obtained when triangular or ramp waveforms are applied to
Schmitt trigger circuit?
Explain how a square wave is obtained at the output of timer when sine wave input is given?
What is the Threshold voltage?
How do you calculate the theoretical values of VUT and VLT in the case of IC741?
What is the Hysteresis width?
8. What is the minimum amplitude of the input sine wave in the case of Schmitt trigger
using IC741?
40
IC Applications and HDL Simulation Lab
ECE, BIET
Manual
EXPERIMENT NO: 7
DATE
IC565 PLL APPLICATION
AIM:
1. To study the operation of NE565 PLL
2. To use NE565 as a multiplier
EQUIPMENTSANDCOMPONENTS:
APPARATUS
1. DC power supply
2. CRO
3. Breadboards
4. Function Generator-
1 No.
1 No.
1 No.
1 No.
THEORY
The 565 is available as a14-pin DIP package. It is produced by Signatic Corporation. The output
frequency of the VCO can be rewritten as
fo = 0.25 / RT CT Hz.
Where RT and CTare the external resistor and capacitor connected to pin8 and pin9. A value between
2k and 20k is recommended for RT .The VCO free running frequency is adjusted with R T and CT to be
at the centre for the input frequency range.
CIRCUIT DIAGRAM
41
ECE, BIET
PROCEDURE:
i. Connect the circuit using the component values as shown in the figure
ii .Measure the free running frequency of VCO at pin4 with the input signal Vinset=
zero. Compare it with the calculated value=0.25/RTCT
iii. Now apply the input signal of 1Vpp square wave at a1kHz to pin2
st
iv. Connect1 channel of the scope to pin2 and display this signal on the scope.
v .Gradually increase the input frequency till the PLL is locked to the input frequency. This frequency
f1 gives the lower ends of the capture range. Go on increase the input frequency; till PLL tracks the
input signal, say to a frequency f2.This frequency f2 gives the upper end of the lock range. If the input
frequency is increased further the loop will get unlocked.
vi. Now gradually decrease the input frequency till the PLL is a gain locked. This is the frequency f3,
the upper end of the capture range .Keep on decreasing the input frequency until the loop is unlocked.
This frequency f4 gives the lower end of the lock range
vii. The lock range fL=(f2 f4) compare it with the calculated value of (7.8 f o /12)
Also the capture range is fc=(f3 f1). Compare it with the calculated value of capture range.
3
1/2
viii To use PLL as a multiplier,make connections as show in fig. The circuit uses a 4-bit binary
counter7490 used as a divide-by-5circuit.
ix. Set the input signal at 1Vpp square wave at 500Hz
x..Vary the VCO frequency by adjusting the 20K potentiometer till the PLL is locked. Measure
the output frequency.
xi. Repeat step9 and10 for input frequency of 1kHz and 1.5kHz.
42
fC =
CALCULATIONS:
fL = (f2 f4) = 7.8fO /12
3
GRAPH:
RESULT:
fO =
fL =
fC =
1/2
ECE, BIET