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Course Outline CSC 201 Computer Architecture AUG - DEC 2015

This document provides a course outline for CSC 201 Computer Architecture, which will run from August to December 2015. It outlines the course code, prerequisites, instructor details, class times and locations, purpose, instructional objectives over 16 weeks, topics to be covered each week, assignments and assessments, grading breakdown, required textbook, and remarks. The course aims to provide an understanding of computer architecture principles, design, and implementation through studying components like the ALU, control techniques, pipelining and parallel processing. Students will be evaluated through quizzes, assignments, a midterm, attendance, participation, and a final exam.

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0% found this document useful (0 votes)
82 views3 pages

Course Outline CSC 201 Computer Architecture AUG - DEC 2015

This document provides a course outline for CSC 201 Computer Architecture, which will run from August to December 2015. It outlines the course code, prerequisites, instructor details, class times and locations, purpose, instructional objectives over 16 weeks, topics to be covered each week, assignments and assessments, grading breakdown, required textbook, and remarks. The course aims to provide an understanding of computer architecture principles, design, and implementation through studying components like the ALU, control techniques, pipelining and parallel processing. Students will be evaluated through quizzes, assignments, a midterm, attendance, participation, and a final exam.

Uploaded by

church123
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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COURSE OUTLINE

CSC 201 COMPUTER ARCHITECTURE


AUG DEC 2015
LTPC
3003

Total Contact Hours - 45


Prerequisite:
System Software/Microprocessor
Course Code:
CSC 201 / EC302
Class Timing/Venue
: Mondays (NW BLK R1) 12:45-2pm, Wednesdays 3:304:45pm (LT 401)
Fridays 10:30-11:45am (LT 402)
Instructor :
(Mr.) Julian A. Bennett
Phone:
+233 549 169 113
Email:
[email protected]
Office hours:
Tuesdays 8-10am, Thurdays 12 2pm.
Office Location:
Top Floor - SSTL
PURPOSE
Understanding of the basic principles underlying computer development, demystifying
computer architecture and enhancing good engineering design.
INSTRUCTIONAL OBJECTIVES
1. To enable a clear and concise understanding of what computer architecture is all
about
2. To provide a structure and underlying principles for the design of a digital computer
3. To study the design of the arithmetic and logic unit and implementation of
operations
4. To study the types of control techniques, understanding the concept of pipelining
and parallel processing
5. To be able to propose new computer architectures that provide higher computing
performance with low energy and/or at reduced cost.
Assignment/ Assessment /Grading
Quizzes, test and written assignment (homework) shall be conducted from time to time
to assess the level of understanding of students. All written assignment shall be
submitted on or before the last date for submission.
Marks will be award in the following order:
Assignment, Quizzes, Written test
:
Mid-sem
:
Attendance
:
Devotion/TPD
:
End-of Sem Exam
:

10%
20%
5%
5%
60%

TEXT BOOK
1. Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Computer Organization,
McGraw-Hill, Fifth Edition, Reprint 2012.

Week

Topic
Overview of Computer Architecture
Introduction, History, classes of
computers.
Fundamental principles of Computer
Architecture Basic design concept,
Organization, Instruction set
Instruction Set Architecture

Functional Organization

Functional Organization

Logic Circuits

7
8
9

Mid - Semester
Logic Circuits

10
11
12

Implementation
Putting it all together
Case Study - 8086 or M68000
microprocessor architecture

13

Case Study - 8086 or M68000


microprocessor architecture

14
15

Remarks

Functional units Basic


operational concepts, Bus
structures Software performance
Operands/opcodes, Addressing
modes, memory
location/addressing/instruction,
assembly language, basic I/O
operations
Memory organization, I/O
interfaces, bus Organization,
control consideration
Pipelining, parallelism and
multiprocessing
Decoders, multiplexers, Full and
half adders.Addition and
subtraction of signed numbers
Assignment 1
Implementing BCD-7segment
decoder

Multiple bus organization


Hardwired control Micro
programmed control
Group Project Assignment
Presentatin
Pre-Exam Revision

16

Revision / Exams

1. David A. Patterson and John L. Hennessy, Computer Architecture-A


Quantitative Approach, Elsevier, a division of reed India Private Limited, Fifth
edition, 2012.

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