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VALLIAMMAI ENGINEERING COLLEGE
SRM Nagar, Kattankulathur 603 203
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Question Bank

VII SEMESTER ECE

EC6013 Advanced Microprocessors and Microcontrollers
Regulation 2013
2016 17 ODD Sem

Prepared by
Dr. C. Amali, Assistant Professor/ECE
Mr. C. Saravanakumar, Assistant Professor/ECE

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UNIT I HIGH PERFORMANCE CISC ARCHITECTURE PENTIUM

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CPU Architecture- Bus Operations Pipelining Branch predication floating point unit- Operating Modes Paging
Multitasking Exception and Interrupts Instruction set addressing modes Programming the Pentium processor.

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PART A
Questions
Compare RISC and CISC.
What is meant by paging?
Define multitasking.
What are the advantages of instruction pipelining?
Investigate the effects of pipeline hazards during execution process?
Describe the operating modes of Pentium processor.
Illustrate the merits of RISC.
Discuss the limitations of paging mechanism.
How many memory banks are available in Pentium processor?
Classify the addressing modes with its types.
Write down register indirect with post increment addressing modes.
Differentiate page and segment.
Validate the need of page fault exception in memory management.
List the general purpose registers of Pentium processor.
What are the advantages of segmented memory?
Recall the different types of pipeline hazards?
Point out the system management mode of operation for the Pentium?
How an interrupt is processed in a Pentium processor?
Justify that Pentium is a super scalar processor.
How do you apply branch prediction in Pentium processor?
PART B
(i) With suitable examples, explain the addressing modes available in
Pentium processor? (10)
(ii) Write short notes on register file. (6)
(i) Evaluate the techniques used to minimize the hazards in a pipeline
processor. (10)
(ii) Discuss about the structure and the details of IVT. (6)
(i) Discuss in detail about how the instruction level parallelism achieved in
microprocessor. (8)
(ii) Summarize the concepts of paging with respect to Pentium processor.(8)
Compare the following architectures in detail
(i)RISC(8)
(ii)CISC (8)
(i) Illustrate the design considerations of page size in paging system. (10)
(ii) Sketch the CISC processor with main components? (6)
(i) Explain the different operating modes of Pentium processor? (8)
(ii) Differentiate multitasking from multithreading. (8)
Discuss the hardware signals and superscalar architecture of Pentium
processor? (16)
Elaborate on the on chip floating point unit of Pentium processor? (16)
Write short notes on
(i)
Pipelining
(8)
(ii)
Multitasking
(8)
(i) Classify the different group of instructions in Pentium processor?(10)
(ii)Demonstrate on assembly language programming of Pentium processor
with examples. (6)
Discuss the integer and floating point pipeline operation in Pentium

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BT
Level
BTL 4
BTL 1
BTL 1
BTL 1
BTL 6
BTL 2
BTL 3
BTL 6
BTL 2
BTL 4
BTL 1
BTL 4
BTL 5
BTL 1
BTL 2
BTL 1
BTL 2
BTL 3
BTL 5
BTL 3

Competence
Analyze
Remember
Remember
Remember
Create
Understand
Apply
Create
Understand
Analyze
Remember
Analyze
Evaluate
Remember
Understand
Remember
Understand
Apply
Evaluate
Apply

BTL 1

Remember

BTL 5

Evaluate

BTL2

Understand

BTL 4

Analyze

BTL 3

Apply

BTL 4

Analyze

BTL 2

Understand

BTL 6
BTL 1

Create
Remember

BTL 4

Analyze

BTL 2

Understand

processor? (16)
12. (i)How will you use multitasking environment in Pentium processor? (8)
BTL 3
(ii) Illustrate on branch group instructions of Pentium. (8)
13. What are pipeline hazards? Discuss them in detail. (16)
BTL 1
14. (i) List and explain the interrupt processing techniques in Pentium BTL 1
processor? (10)
(ii) Write about exceptions in Pentium processor. (6)

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Apply
Remember
Remember

UNIT II HIGH PERFORMANCE RISC ARCHITECTURE ARM

Arcon RISC Machine Architectural Inheritance Core & Architectures - Registers Pipeline - Interrupts ARM
organization - ARM processor family Co-processors - ARM instruction set- Thumb Instruction set - Instruction cycle
timings - The ARM Programmer s model ARM Development tools ARM Assembly Language Programming - C
programming Optimizing ARM Assembly Code Optimized Primitives.

PART A
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Questions

BT
Level
Point out the ARMs visible registers
BTL 1
Summarize how ARM handles the exceptions
BTL2
Identify the need of thumb instruction set?
BTL2
Mention any two of the thumb instruction set
BTL2
Write down the ARM CPSR format
BTL 1
State any two data transfer and control flow instructions
BTL2
What facts would you select to list the features of the ARM instruction set
BTL5
Formulate necessary code using ARM assembly language program for BTL6
creating a delay
Illustrate Branch with Link and exchange instruction in ARM Processor
BTL4
Identify the application of SWI instruction?
BTL3
Which features does ARM have in common with many other RISC BTL4
architectures?
Suggest the rules which apply to ARM data processing instructions
BTL3
Evaluate the allocation of registers in ARM processor
BTL5
Define pointer aliasing?
BTL 1
How to avoid pointer aliasing
BTL3
Categorize the tricks used to optimize primitives
BTL4
Define Primitives
BTL 1
What is meant by Profiler?
BTL 1
Propose any 3 tools used to optimize ARM assembly code
BTL6
Write about Loop unrolling?
BTL 1
PART B
(i)Define the architectural inheritance of ARM processor and explain? (8)
BTL1
(ii)Name the principle features of ARM architecture (8)
(i) List the different ARM Development Tools and describe about them(10) BTL1
(ii)Illustrate the ARM Programmers Model with necessary diagrams (6)
State in detail about the
BTL1
(i)3 stage pipelined ARM Organization(8)
(ii) 5 stage pipelined ARM Organization(8)
(i) Explain the bus architecture of an ARM Processor? (8)
BTL4
(i)Discuss in detail the different modes of operation of ARM processor? (8)
(i)Define Addressing mode? List the addressing modes of ARM BTL1

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Competence
Remember
Understand
Understand
Understand
Remember
Understand
Evaluate
Create
Analyze
Apply
Analyze
Apply
Evaluate
Remember
Apply
Analyze
Remember
Remember
Create
Remember
Remember
Remember
Remember

Analyze
Remember

processor?(6)
(ii)Explain the addressing modes of an ARM Processor with examples?
(10)
(i) Examine the implementation of branch, call and return instructions in
ARM instruction set? (12)
(ii) Write a program to find the product of two numbers? (4)
Illustrate the thumb instruction set of ARM processor with examples in
detail (16)
Describe the organization of CPU of a high performance RISC
architecture.(16)
(ii)Write a program to arrange N number of data in ascending order (8)
(ii)Write a code using ARM instructions to calculate square root using
Newton Raphson Iterations. (8)
(i) Choose an approach to remove the test for N being zero that occurs in a
for loop? (8)
(ii) Develop the points for the efficient use of C types (8)
How to construct loop structures
(i) using fixed number of iterations (8)
(ii) using variable number of iterations (8)
(i) Summarize the Transcendental functions in ARM processor. (8)
(ii) Outline the concept of converting divide into multiples. (8)
(i) Conclude on Optimizing the assembly code in ARM processor (12)
(ii) Point out the factors that influence the efficiency of loops structure(4)
(i) Analyze the structure arrangement in programming ARM processor. (8)
(ii)Propose the accomplishment of Push and Pop instructions in ARM. (8)

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BTL4

Analyze

BTL2

Understanding

BTL2

Understanding

BTL6

Create

BTL3

Apply

BTL3

Apply

BTL2

Understanding

BTL5

Evaluate

BTL4

Analyze

UNIT III
UNIT III ARM APPLICATION DEVELOPMENT
Introduction to DSP on ARM FIR filter IIR filter Discrete fourier transform Exception handling Interrupts
Interrupt handling schemes- Firmware and bootloader Embedded Operating systems Integrated Development
Environment- STDIO Libraries Peripheral Interface Application of ARM Processor - Caches Memory protection
Units Memory Management units Future ARM Technologies.
PART A
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Questions

BT
Level
Identify the role of Memory Management Unit
BTL2
How are relocation registers used in memory management unit?
BTL3
Describe how to represent a digital signal for ARM processor
BTL4
Develop the guidelines to write DSP code for ARM?
BTL6
What happens when an exception changes mode of the core?
BTL4
Prioritize the exceptions of ARM processor?
BTL6
Summarize about interrupt latency?
BTL2
Write the difference between firmware and bootloader?
BTL3
What is context switching?
BTL 1
Define a cache memory?
BTL 1
Draw the Relationship that a cache has between the processor core and BTL5
main memory
Point out the formula to calculate the cache hit rate
BTL 1
Distinguish between caches flush and clean?
BTL3
What did you infer from cache Lock down?
BTL5
Illustrate the rules that govern the protected regions of memory?
BTL2

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Competence
Understand
Apply
Analyze
Create
Analyze
Create
Understand
Apply
Remember
Remember
Evaluate
Remember
Apply
Evaluate
Understand

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What do you mean by Virtual address and Physical address

Name the functions of ARM MMU
List the replacement policies that are supported by ARM cached core?
Describe briefly cache miss penalty?
Outline the different interrupt handling schemes of ARM processor
PART B
(i)Discuss the interrupt handling schemes of ARM processor (10)
(ii)Summarize its Advantages and Disadvantages (6)
(i)List the guidelines to write code for FIR filters on ARM?(6)
(ii)Implement a block filter in ARM processor using DSP concepts?(10)
Design an IIR filter using ARM7TDMI processor for 1 x 2 block (16)
Develop a code to implement radix 4 FFT using ARM processor (16)
In accordance to ARM processor , write in detail about
(i)The exceptions and its associated modes(8)
(ii) Exception Priorities(8)
(i)Describe about the interrupts and its associated usage in ARM
processor(10)
(ii)How would you enable and disable FIQ and IRQ exceptions(6)
Design a Basic interrupt stack and discuss how to implement in ARM(16)
Illustrate the firmware for an ARM processor with an example (16)

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BTL 1
BTL 1
BTL 1
BTL2
BTL4

Remember
Remember
Remember
Understand
Analyze

BTL2

Understand

BTL3

Apply

BTL4 Analyze
BTL6 Create
BTL 1 Remember

BTL3

Apply

BTL4
BTL2

Analyze
Understand

Write in detail about the fundamental components of Embedded operating BTL 1 Remember
systems (16)
(i)What are the basic cache architecture and the operation of Cache BTL 1 Remember
controller (8)
(ii)Name the different methods to Lock down cache. Explain in detail with
necessary code snippets
(8)
(i)Demonstrate the cache policies for replacement and allocation during a BTL2 Understand
cache miss (8)
(ii)With respect to ARM processor, explain the concepts of flushing and
cleaning of cache.(8)
(i)Code the ARM processor to set the starting address, size of a region, and
BTL5 Evaluate
the enable bit of Memory (8)
(ii)Summarize about initializing MPU, caches and Write Buffer (8)
Design a Memory protection unit with respect to ARM application BTL4 Analyze
development (16)
Write Short notes on
BTL 1 Remember
(i)Working of Virtual memory systems. (8)
(ii)Translation Lookaside buffer (8)

UNIT IV MOTOROLA 68HC11 MICROCONTROLLERS

Instruction set addressing modes operating modes- Interrupt system- RTC-Serial Communication Interface A/D
Converter PWM and UART.

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PART A
Questions
Examine the major features of UART
What are the built-in peripherals in 68HC11?
Identify the features of 68HC11 microcontrollers?
Discuss the functions of CCR in 68HC11?
When did the conversion complete flag will set in 68HC11?
How to program 68HC11 to operate at 9600 band?
Name the interrupts used in 68HC11.

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BT
Level
BTL3
BTL 1
BTL3
BTL6
BTL5
BTL6
BTL 1

Competence
Apply
Remember
Apply
Create
Evaluate
Create
Remember

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Mention about the operating modes of 68HC11 Microcontroller?

What is the use of real time clock?
State the registers of 68HC11?
Evaluate the use of test instructions available in 68HC11?
Distinguish between SCI and SPI?
Define polling?
Classify the different techniques of A/D conversion?
Write about semaphores?
Point out any 2 features of internal ADC of MC68HC11?
Discuss the different techniques to poll a interrupt?
Describe about the single chip operating mode of Motorola processor.
How would you use Pulse Width modulation?
Differentiate full duplex from Half duplex communication
PART B
(i) Name the various operating modes of Motorola 68HC11 Microcontroller.
(4)
(ii) Summarize about each operating mode in detail (12)
Demonstrate the following with respect to 68HC11
(i) Interrupt system of microcontroller? (8)
(ii) UART interface with Motorola microcontroller? (8)
(i) Explain the concept of serial communication with a suitable application
in MC68HC11? (8)
(ii) Illustrate the Arithmetic instructions of 68HC11 with suitable examples?
(8)
Discuss in detail about
(i) ADC unit features in 68HC11. (8)
(ii) A/D conversion process in 68HC11 microcontroller. (8)
(i) Summarize the different addressing modes used in 68HC11? (4)
(ii) Elaborate each addressing mode and explain with examples?(12)
Using PWM control of 68HC11, write a program to control the speed of the
Motor? (16)
Realize 68HC11 microcontroller environments to transmit and receive data
at different bits rates in serial fashion. (16)
Outline the Concepts of
(i)Real Time clock in 68HC11. (8)
(ii)Interrupt vectors and its priorities.(8)
List and explain in detail about the instruction set of 68HC11 with
examples? (16)
How the different types of polling system are used to service an interrupt in
68HC11? (16)
Suggest a design to interface Keyboard and Printer using Interrupts in
68HC11.(16)
With a suitable diagram, describe the architecture of Motorola 68HC11?
(16)
List the problems that occur in serial Port printer interface and choose a
technique to overcome those difficulties? Illustrate with diagrams. (16)
Illustrate the interfacing details with supporting diagrams for SCI receive
only Interrupt Interface and SCI transmit only Interrupt Interface. (16)

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BTL 1
BTL2
BTL 1
BTL5
BTL4
BTL 1
BTL4
BTL 1
BTL2
BTL2
BTL2
BTL3
BTL4

Remember
Understand
Remember
Evaluate
Analyze
Remember
Analyze
Remember
Understand
Understand
Understand
Apply
Analyze

BTL 1 Remember

BTL3

Apply

BTL4

Analyze

BTL2

Understand

BTL2

Understand

BTL4

Analyze

BTL5

Evaluate

BTL2

Understand

BTL 1 Remember
BTL 1 Remember
BTL3

Apply

BTL 1 Remember
BTL6

Create

BTL4

Analyze

UNIT V PIC MICROCONTROLLER

CPU Architecture Instruction set interrupts- Timers- I2C Interfacing UART- A/D Converter PWM and introduction
to C-Compilers.

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PART A
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Questions

BT
Level
What are the features of Harvard architecture?
BTL 1
Illustrate the steps required to perform read/write operation using I2C bus? BTL 3
What are the interrupts in PIC microcontroller?
BTL 1
Test the functions of retlw and retfie instructions?
BTL 6
Assess the relationship between length of the PC and memory size?
BTL 5
Sketch the status register format in PIC micro controller.
BTL 3
Evaluate the role of INDF register in PIC micro controller.
BTL 5
Analyze the use of CCP module in PIC microcontroller?
BTL 4
Draw the format of a data transfer packet of I2C.
BTL 2
Specify the different interrupt resources present in the PIC microcontroller? BTL 2
Demonstrate the role of I2C interfacing in PIC microcontroller.
BTL 4
What is the use of PCLATH in program memory?
BTL 1
What are the applications of PWM output?
BTL 1
Compare serial and parallel transmission.
BTL 4
How many I/O ports of supported in PIC micro controller?
BTL 2
What are the features of ADC in PIC?
BTL 1
Elaborate the use of Watchdog timer in PIC micro controller
BTL 6
Explain about INTCON and ADCON registers
BTL 2
Write a PIC microcontroller program for decrementing a 16 bit counter.
BTL 3
Write a short note on C-compiler.
BTL 1
PART B
(i) Describe the architecture of PIC micro controllers. (10)
BTL 2
(ii) Discuss the features of register bank in PIC micro controller. (6)
(i) Explain the data communication protocol of I2C bus. (8)
BTL 2
(ii) Discuss in detail the organization of program and data memory of
PIC microcontrollers? (8)
(i) What are the architectural features of PIC microcontrollers? (6)
BTL 1
(ii) Draw and explain the interrupt structure of PIC microcontrollers. (10)
Realize the following applications using PIC Microcontroller
BTL 4
(i)To measure the received Pulse Width and control a DC motor based on
the pulse width.
(8)
(ii)Burglar Alarm.
(8)
(i) Classify the timers of PIC microcontroller and explain it. (8)
BTL 4
(ii)Demonstrate the role of an A/D in a PIC microcontroller. (8)
(i)Write a program to turn on a LED at interval of one second (8)
BTL 3
(ii) Illustrate the various features of I2C bus for peripheral chip access.
Write short notes on (i) C Compiler
(8)
BTL 1
(ii) CCP Module in PIC (8)
Propose an architecture of PIC microcontroller with design considerations in BTL 6
detail? (16)
(i) Write a note on PWM in PIC microcontroller. (6)
BTL 1
(ii) Discuss briefly about the UART interface of PIC micro controller. (10)
Enumerate on (i) Interrupt service routine in PIC. (8)
BTL 1
(ii) I/O port expansion in PIC.(8)

Competence
Remember
Apply
Remember
Create
Evaluate
Apply
Evaluate
Analyze
Understand
Understand
Analyze
Remember
Remember
Analyze
Understand
Remember
Create
Understand
Apply
Remember
Understand
Understand

Remember
Analyze

Analyze
Apply
Remember
Create
Remember
Remember

11. (i)Describe how the timers are used as event counters in PIC
BTL 2 Understand
microcontroller (10)
(ii)Explain interrupts handling in PIC micro controller.
12. (i)Describe the instruction set of PIC microcontroller and explain the BTL 3 Apply
programming of PIC microcontroller with suitable examples. (16)

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13. (i)Justify how the PIC microcontroller supports Harvard architecture?

BTL 5
(ii)Evaluate how the peripheral devices are interfaced with PIC.
14. (i)Analyze the merits and demerits of asynchronous mode of BTL 4
transmission.(6)
(ii)Explain about the asynchronous transmission and reception in PIC
microcontroller. (10)

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Evaluate
Analyze