BJT Load Line
BJT Load Line
BJT Load Line
Q-point is generally taken to be the intersection point of load line with the output
characteristics of the transistor. There can be infinite number of intersection points
but q-point is selected in such a way that irrespective of AC input signal swing the
transistor remain in active region.
DC load line
The dc load line is the locus of I C and VCE at which BJT remains in active region i.e. it
represents all the possible combinations of IC and VCE for a given amplifier.
The
acts
as
can
be
represented
by
open
circuit
terminals.
shown
the figure.
in
(Equation 1)
Cutoff point : To find the cutoff point equate the collector current to zero(actually
in cutoff the collector current is I COwhich will be of micro amperes order and hence
can be assumed to be zero). In equation 1 equating Ic to zero the cutoff point is (Vcc,
0).
Saturation point : To find the saturation point equate the collector voltage to
zero(actually in saturation the collector voltage will be around o.2 Volts which is
small and hence can be assumed to be zero). In equation 1 equating Vce to zero the
cutoff point is (0, Vcc/Rc).
(Vcc, 0) is cut off point where transistor enters in to cut off region from active region
and (0, Vcc/Rc) is saturation point where the transistor enters saturation region.
AC load line:
DC load line analysis gives the variation of collector currents and voltage for static
situation of Zero AC voltage. The ac load line tells you the maximum possible output
voltage swing for a given common-emitter amplifier i.e. the ac load line will tell you
the maximum possible peak-to-peak output voltage V ce(cut off) from a given amplifier.
For AC input signal frequencies the biasing capacitors are chosen such that they
acts as short circuits and as open circuits for DC voltages. Hence the AC signal
equivalent circuit is shown in the figure below along with the AC load line
Vce =
The
(Rc//Rl)*Ic
AC
output
Vce can
quiescent
at
most
Vceq (since
normally
chosen
in
the
have
point
is
signal
negative
Vceq and
Vmin =
stays in active region for entire input signal excursion ), hence the maximum
current for that corresponding Vceq is Vceq / (Rc//Rl). Also output collector current can
be at most Icq hence the maximum voltage for that corresponding I cq is Icq*(Rc//Rl).
Hence by adding quiescent currents the end points of AC load line are
Ic(sa)t = Icq+ Vceq/(Rc//Rl) and Vce(off) = Vceq+ Icq*(Rc//Rl)