Scribd Logo
Upload

Welcome to Scribd!

  • 59 views

    Vaigai College of Engineering: Therkutheru, Melur (TK), Madurai - 625122

    Uploaded by

    Rajesh Lingam
    This document contains an examination question paper for the subject Embedded and Real Time Systems for the 7th semester B.E. / B.Tech. degree examination from Vaigai College of Engineering. The paper contains 2 parts - Part A with 9 short answer questions carrying 2 marks each and Part B with 2 long answer questions carrying 16 marks each. Part A questions ask students to define terms related to ARM processors like DCC, CPSR and cache. It also asks about ARM instruction features, buses and performance parameters. Part B questions require discussion on ARM architecture, instruction sets, and modern train controllers. The paper carries a total of 50 marks and students are required to answer all questions in 1 hour and 30

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd

    Vaigai College of Engineering: Therkutheru, Melur (TK), Madurai - 625122

    Uploaded by

    Rajesh Lingam
    59 views4 pages
    This document contains an examination question paper for the subject Embedded and Real Time Systems for the 7th semester B.E. / B.Tech. degree examination from Vaigai College of Engineering. The paper contains 2 parts - Part A with 9 short answer questions carrying 2 marks each and Part B with 2 long answer questions carrying 16 marks each. Part A questions ask students to define terms related to ARM processors like DCC, CPSR and cache. It also asks about ARM instruction features, buses and performance parameters. Part B questions require discussion on ARM architecture, instruction sets, and modern train controllers. The paper carries a total of 50 marks and students are required to answer all questions in 1 hour and 30

    Original Title

    embdeded 1st.docx

    Copyright

    © © All Rights Reserved

    Available Formats

    DOCX, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    This document contains an examination question paper for the subject Embedded and Real Time Systems for the 7th semester B.E. / B.Tech. degree examination from Vaigai College of Engineering. The paper contains 2 parts - Part A with 9 short answer questions carrying 2 marks each and Part B with 2 long answer questions carrying 16 marks each. Part A questions ask students to define terms related to ARM processors like DCC, CPSR and cache. It also asks about ARM instruction features, buses and performance parameters. Part B questions require discussion on ARM architecture, instruction sets, and modern train controllers. The paper carries a total of 50 marks and students are required to answer all questions in 1 hour and 30

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    59 views4 pages

    Vaigai College of Engineering: Therkutheru, Melur (TK), Madurai - 625122

    Uploaded by

    Rajesh Lingam
    This document contains an examination question paper for the subject Embedded and Real Time Systems for the 7th semester B.E. / B.Tech. degree examination from Vaigai College of Engineering. The paper contains 2 parts - Part A with 9 short answer questions carrying 2 marks each and Part B with 2 long answer questions carrying 16 marks each. Part A questions ask students to define terms related to ARM processors like DCC, CPSR and cache. It also asks about ARM instruction features, buses and performance parameters. Part B questions require discussion on ARM architecture, instruction sets, and modern train controllers. The paper carries a total of 50 marks and students are required to answer all questions in 1 hour and 30

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 4

    Reg.

    No:

    VAIGAI COLLEGE OF
    ENGINEERING

    THERKUTHERU, MELUR [TK], MADURAI - 625122

    Question Paper Code:


    VCEEC73
    B.E. / B.TECH. DEGREE EXAMINATION, INTERNAL -

    I [2016 - 2017]

    Seventh Semester
    Electronics and Communication Engineering
    EC6703Embedded And Real Time Systems
    (Regulation 2013)
    Time: One Hour Thirty minutes

    Date: 10.08.16
    Maximum: 50 Marks

    Answer ALL questions

    PART A (9X 2 = 18 Marks)


    1.
    2.
    3.
    4.
    5.
    6.
    7.
    8.
    9.

    Define DCC?
    List the functions of ARM supervisor mode
    Write short notes on ARM Processor
    What are the CPU buses?
    What are the parameters used to evaluate the CPU performance?
    List the ARM instruction features.
    Define CPSR
    List out the instruction sets of ARM?
    Define Cache bus and cache bit
    PART B (16+16 = 32 Marks)
    10. (a) Briefly discuss about ARM architecture
    (OR)
    (b )Briefly discuss about ARM features and modes of operations
    11.
    (a) List the instruction set and explain in detail

    (16)
    (16)

    (16)
    (OR)
    (b).Briefly discuss about modern train controller

    Staff in-charge

    (16)

    HOD/ECE

    VAIGAI COLLEGE OF
    ENGINEERING

    THERKUTHERU, MELUR [TK], MADURAI - 625122

    Reg.No:

    Question Paper Code:


    VCEEC73

    B.E. / B.TECH. DEGREE EXAMINATION, INTERNAL -

    I [2016 - 2017]

    Seventh Semester
    Electronics and Communication Engineering
    EC6703Embedded And Real Time Systems
    (Regulation 2013)
    Time: One Hour Thirty minutes

    Date: 10.08.16
    Maximum: 50 Marks

    Answer ALL questions

    PART A (9X 2 = 18 Marks)


    1.
    2.
    3.
    4.
    5.
    6.
    7.
    8.
    9.

    Define DCC?
    List the functions of ARM supervisor mode
    Write short notes on ARM Processor
    What are the CPU buses?
    What are the parameters used to evaluate the CPU performance?
    List the ARM instruction features.
    Define CPSR
    List out the instruction sets of ARM?
    Define Cache bus and cache bit
    PART B (16+16 = 32 Marks)
    10. (a) Briefly discuss about ARM architecture
    (OR)
    (b )Briefly discuss about ARM features and modes of operations
    11.
    (a) List the instruction set and explain in detail

    (16)
    (16)

    (16)
    (OR)
    (b).Briefly discuss about modern train controller

    Staff in-charge

    (16)

    HOD/ECE

    VAIGAI COLLEGE OF
    ENGINEERING
    THERKUTHERU, MELUR [TK], MADURAI - 625122

    Reg.No:

    Question Paper Code:


    VCEEC73
    B.E. / B.TECH. DEGREE EXAMINATION, INTERNAL -

    I [2016 - 2017]

    Seventh Semester
    Electronics and Communication Engineering
    EC6703Embedded And Real Time Systems
    (Regulation 2013)
    Time: One Hour Thirty minutes

    Date: 10.08.16
    Maximum: 50 Marks

    Answer ALL questions

    PART A (9X 2 = 18 Marks)


    1.
    Define ARM?
    2. List the functions of ARM co processor mode
    3. Write short notes on ARM Processor
    4. What are the CPU buses?
    5. What are the parameters used to evaluate the CPU performance?
    6. List the any 5 ARM instructions.
    7. Define cache
    8. List out the instruction sets of ARM?
    9. Define Cache bus and cache bit
    PART B (16+16 = 32 Marks)
    10. (a) List the instruction set and explain in detail

    (16)

    (OR)
    (b) .Briefly discuss about modern train controller

    (16)

    11.(a) Briefly discuss about ARM architecture

    (16)

    (OR)
    (b )Briefly discuss about ARM features and modes of operations

    Staff in-charge

    (16)

    HOD/ECE

    VAIGAI COLLEGE OF
    ENGINEERING

    THERKUTHERU, MELUR [TK], MADURAI - 625122

    Question Paper Code:


    VCEEC73
    B.E. / B.TECH. DEGREE EXAMINATION, INTERNAL -

    I [2016 - 2017]

    Seventh Semester
    Electronics and Communication Engineering
    EC6703Embedded And Real Time Systems
    (Regulation 2013)
    Time: One Hour Thirty minutes

    Date: 10.08.16
    Maximum: 50 Marks

    Answer ALL questions

    PART A (9X 2 = 18 Marks)


    1.
    2.
    3.
    4.
    5.
    6.
    7.
    8.
    9.

    Define ARM?
    List the functions of ARM co processor mode
    Write short notes on ARM Processor
    What are the CPU buses?
    What are the parameters used to evaluate the CPU performance?
    List the any 5 ARM instructions.
    Define cache
    List out the instruction sets of ARM?
    Define Cache bus and cache bit
    PART B (16+16 = 32 Marks)
    10. (a) List the instruction set and explain in detail

    (16)

    (OR)
    (b) .Briefly discuss about modern train controller
    11.(a) Briefly discuss about ARM architecture
    (OR)
    (b )Briefly discuss about ARM features and modes of operations

    Staff in-charge

    (16)
    (16)
    (16)

    HOD/ECE

    You might also like