Chapter No. Description Page No.: 1.1 Block Diagram 3
Chapter No. Description Page No.: 1.1 Block Diagram 3
Chapter No. Description Page No.: 1.1 Block Diagram 3
ABSTRACT
Chapter No.
Chapter 1
Description
INTRODUCTION
1.1 Block Diagram
Chapter 2
Page No.
1
3
DESCRIPTION OF HARDWARE
COMPONENTS
2.1 AT89S52
2.1.3 Features
7
2.1.4 Pin Description
8
2.2 POWER SUPPLY
20
2.2.1 Introduction
20
2.2.2 Transformer
21
2.2.3 Rectifier
21
2.2.4 Regulator
24
2.3 RF MODULES
46
2.4 RF ENCODER AND DECODER
2.5 MQ-3 Sensor
49
Chapter 3
CIRCUITS DIAGRAM
69
REFERENCES
72
APENDEX A
73
APENDEX B
89
APENDEX C
92
ABSTRACT
Components used:
AT89X5X microcontroller
HT 12E
HT 12D
Parallox RF433 Receiver and transmitter modules
CHAPTER 1
INTRODUCTION
A traffic accident is defined as any vehicle accident occurring on a public
highway (i.e. originating on, terminating on, or involving a vehicle partially on the
highway). These accidents therefore include collisions between vehicles and
animals, vehicles and pedestrians, or vehicles and fixed obstacles. In higherincome countries, road traffic [1] accidents are already among the top ten
leading causes of disease burden in 1998 as measured in DALYs (disabilityadjusted life years). In less developed countries, road traffic accidents were the
most significant cause of injuries, ranking eleventh among the most important
causes of lost years of healthy life. In Indian road system, widening of the road is
not an alternative solution to avoid traffic in such a cities [2]. The problems with
state drunk driving control systems can be solved in many ways. The most
effective will follow several principles: They will invest authority and
responsibility in people and organizations at all levels, local to national, because
drunken driving control [6] requires action at all levels. They will operate in the
public eye, using the media to report on problems and solutions, because
ultimate decisions on priorities and resources to control drunk driving must have
public support. They will not promise instant solutions based on a single action
but rather will take steady steps towards long-term improvement. And they will
establish mechanisms for identifying and solving problems rather than
attempting to apply one-sizefits-all methods.
HARDWARE COMPONENTS
1. AT89S52 MICROCONTROLLER
2. POWER SUPPLY.
3. RF MODULES
SIMULATION
TOOL
KEIL MICROVISION
6
PLATFORM
: WINDOWS
LANGUAGE : EMBEDDED C
CHAPTER 2
DESCRIPTION OF HARDWARE COMPONENTS
2.1 AT89S52
2.2.1 A BRIEF HISTORY OF 8051
In 1981, Intel corporation introduced an 8 bit microcontroller called 8051. this
microcontroller had 128 bytes of RAM, 4K bytes of chip ROM, two timers, one serial port,
8
and four ports all on a single chip. At the time it was also referred as A SYSTEM ON A
CHIP
The 8051 is an 8-bit processor meaning that the CPU can work only on 8 bits data at a
time. Data larger than 8 bits has to be broken into 8 bits pieces to be processed by the CPU.
The 8051 has a total of four I\O ports each 8 bit wide.
There are many versions of 8051 with different speeds and amount of on-chip ROM
and they are all compatible with the original 8051. this means that if you write a program for
one it will run on any of them.
The 8051 is an original member of the 8051 family. There are two other members in
the 8051 family of microcontrollers. They are 8052 and 8031. All the three Microcontrollers
will have the same internal architecture, but they differ in the following aspects.
8051 has 4K ROM, 128 bytes of RAM, two timers and 6 interrupts.
8052 has 8K ROM, 256 bytes of RAM, three timers and 8 interrupts.
An Example
8085 chip needs
An Address latch for separating address from multiplex address and data.32-KB RAM and
32-KB ROM to be able to satisfy most applications. As also Timer / Counter, Parallel
programmable port, Serial port, and Interrupt controller are needed for its efficient
applications.
In comparison a typical Micro controller 8051 chip has all that the 8051 board has except a
reduced memory as follows.
Debugging
Lots of Microprocessor circuitry and program to debug. In Micro controller there is
no Microprocessor circuitry to debug.
Slower Development time: As we have observed Microprocessors need a lot of
debugging at board level and at program level, where as, Micro controller do not have the
excessive circuitry and the built-in peripheral chips are easier to program for operation.
So peripheral devices like Timer/Counter, Parallel programmable port, Serial
Communication Port, Interrupt controller and so on, which were most often used were
integrated with the Microprocessor to present the Micro controller .RAM and ROM also were
integrated in the same chip. The ROM size was anything from 256 bytes to 32Kb or more.
RAM was optimized to minimum of 64 bytes to 256 bytes or more.
Microprocessor has following instructions to perform.
1. Reading instructions or data from program memory ROM.
2. Interpreting the instruction and executing it.
3. Microprocessor Program is a collection of instructions stored in a Nonvolatile memory.
10
2.1.3 FEATURES
Compatible with MCS-51 Products
8K Bytes of In-System Programmable (ISP) Flash Memory
Endurance: 1000 Write/Erase Cycles
11
PIN DIAGRAM
12
accesses to external pro-gram and data memory. In this mode, P0 has internal pullups
Port 0 also receives the code bytes during Flash programmi ng an d ou tpu t s the c o de
bytes during prog r a m verification. External pullups are required during program verification.
PORT 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled
high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current because of the internal pullups. In addition,
P1.0 and P1.1 can be configured to be the timer/counter 2 external count input
(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the
following table.Port 1 also receives the low-order address bytes duringFlash programming
and verification
Port Pin
Alternate Functions
P1.0
P1.1
PORT 2
Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled
high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are
externally being pulled low will source current because of the internal pullups.Port 2 emits
the high-order address byte during fetches from external program memory and during
accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pullups when emitting 1s. During accesses to
external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents
of the P2 Special Function Register. Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.
PORT 3
14
Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled
high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are
externally being pulled low will source current because of the pullups. Port 3 also serves the
functions of various special features of the AT89S51, as shown in the following table. Port 3
also receives some control signals for Flash programming and verification.
Port Pin
Alternate Functions
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
RST
Reset input. A high on this pin for two machine cycles while the oscillator is
running resets the device.
ALE/PROG
Address Latch enable is an output pulse for latching the low byte of the address
during access to external memory. This pin is also the program pulse input(PROG) during
flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking Note, however, that one ALE
pulse is skipped during each access to external data memory. If desired, ALE
operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is
active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled
high. Setting the ALE-disable bit has no effect if the microcontroller is in external
execution mode.
15
16
MEMORIES
Types of memory
The 8052 have three general types of memory. They are on-chip memory, external
Code memory and external Ram. On-Chip memory refers to physically existing memory on
the micro controller itself. External code memory is the code memory that resides off chip.
This is often in the form of an external EPROM. External RAM is the Ram that resides off
chip. This often is in the form of standard static RAM or flash RAM.
a) Code memory
Code memory is the memory that holds the actual 8052 programs that is to be run.
This memory is limited to 64K. Code memory may be found on-chip or off-chip. It is
possible to have 8K of code memory on-chip and 60K off chip memory simultaneously. If
17
only off-chip memory is available then there can be 64K of off chip ROM. This is controlled
by pin provided as EA.
b) Internal RAM
The 8052 have a bank of 256 bytes of internal RAM. The internal RAM is found onchip. So it is the fastest Ram available. And also it is most flexible in terms of reading and
writing. Internal Ram is volatile, so when 8051 is reset, this memory is cleared. 256 bytes of
internal memory are subdivided. The first 32 bytes are divided into 4 register banks. Each
bank contains 8 registers. Internal RAM also contains 256 bits, which are addressed from 20h
to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the
user. They are numbered 00h to FFh. The user may make use of these variables with
commands such as SETB and CLR.
Special Function registered memory
Special function registers are the areas of memory that control specific functionality
of the 8052 micro controller.
a) Accumulator (0E0h)
As its name suggests, it is used to accumulate the results of large no of instructions. It
can hold 8 bit values.
b) B registers (0F0h)
The B register is very similar to accumulator. It may hold 8-bit value. The b register is
only used by MUL AB and DIV AB instructions. In MUL AB the higher byte of the product
gets stored in B register. In div AB the quotient gets stored in B with the remainder in A.
c) Stack pointer (81h)
The stack pointer holds 8-bit value. This is used to indicate where the next value to
be removed from the stack should be taken from. When a value is to be pushed onto the
stack, the 8052 first store the value of SP and then store the value at the resulting memory
location. When a value is to be popped from the stack, the 8052 returns the value from the
memory location indicated by SP and then decrements the value of SP.
d) Data pointer
18
The SFRs DPL and DPH work together work together to represent a 16-bit value
called the data pointer. The data pointer is used in operations regarding external RAM and
some instructions code memory. It is a 16-bit SFR and also an addressable SFR.
e) Program counter
The program counter is a 16 bit register, which contains the 2 byte address, which
tells the 8052 where the next instruction to execute to be found in memory. When the 8052 is
initialized PC starts at 0000h. And is incremented each time an instruction is executes. It is
not addressable SFR.
f) PCON (power control, 87h)
The power control SFR is used to control the 8051s power control modes. Certain
operation modes of the 8051 allow the 8051 to go into a type of sleep mode which
consumes much lee power.
19
timers to only count when an external pin is activated or to count events that are indicated
on an external pin.
The interrupt priority SFR is used to specify the relative priority of each interrupt. On
8051, an interrupt maybe either low or high priority. An interrupt may interrupt interrupts.
For e.g., if we configure all interrupts as low priority other than serial interrupt. The serial
interrupt always interrupts the system, even if another interrupt is currently executing.
However, if a serial interrupt is executing no other interrupt will be able to interrupt the serial
interrupt routine since the serial interrupt routine has the highest priority.
21
The program Status Word is used to store a number of important bits that are set and
cleared by 8052 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag,
the parity flag and the overflow flag. Additionally, it also contains the register bank select
flags, which are used to select, which of the R register banks currently in use.
SBUF is used to hold data in serial communication. It is physically two registers. One
is writing only and is used to hold data to be transmitted out of 8052 via TXD. The other is
read only and holds received data from external sources via RXD. Both mutually exclusive
registers use address 99h.
I/O PORTS
One major feature of a microcontroller is the versatility built into the input/output
(I/O) circuits that connect the 8052 to the outside world. The main constraint that limits
numerous functions is the number of pins available in the 8051 circuit. The DIP had 40 pins
and the success of the design depends on the flexibility incorporated into use of these pins.
For this reason, 24 of the pins may each used for one of the two entirely different functions
which depend, first, on what is physically connected to it and, then, on what software
programs are used to program the pins.
PORT 0
Port 0 pins may serve as inputs, outputs, or, when used together, as a bi directional loworder address and data bus for external memory. To configure a pin as input, 1 must be
written into the corresponding port 0 latch by the program. When used for interfacing with
22
the external memory, the lower byte of address is first sent via PORT0, latched using Address
latch enable (ALE) pulse and then the bus is turned around to become the data bus for
external memory.
PORT 1
Port 1 is exclusively used for input/output operations. PORTS 1 pin have no dual
function. When a pin is to be configured as input, 1 is to be written into the corresponding
Port 1 latch.
PORT 2
Port 2 may be used as an input/output port. It may also be used to supply a high
order address byte in conjunction with Port 0 low-order byte to address external memory.
Port 2 pins are momentarily changed by the address control signals when supplying the high
byte a 16-bit address. Port 2 latches remain stable when external memory is addressed, as
they do not have to be turned around (set to 1) for data input as in the case for Port 0.
PORT 3
Port 3 may be used to input /output port. The input and output functions can be
programmed under the control of the P3 latches or under the control of various special
function registers. Unlike Port 0 and Port 2, which can have external addressing functions and
change all eight-port b se, each pin of port 3 maybe individually programmed to be used as
I/O or as one of the alternate functions. The Port 3 alternate uses are.
23
Pin (SFR)
Alternate Use
P3.0-RXD (SBUF)
P3.1-TXD (SBUF)
P3.2-INTO 0 (TCON.1)
External interrupt 0
External interrupt 1
P3.4 - T0 (TMOD)
P3.5 T1 (TMOD)
P3.6 - WR
P3.7 - RD
INTERRUPTS
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and
INT1), three timer interrupts (Timers0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 10. Each of these interrupt sources can be individually
enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also
contains a global disable bit, EA, which disables all interrupts at once. Note that Table 5
shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also
24
unimplemented. User software should not write 1s to these bit positions, since they may be
used in future AT89 products.
Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register
T2CON. Neither of these flags is cleared by hardware when the service routine is vectored
to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that
generated the interrupt, and that bit will have to be cleared in software.The Timer 0 and Timer
1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values
are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at
S2P2 and is polled in the same cycle in which the timer overflows.
25
230V
Transformer
AC
Mains
Rectifier
Smoothing
Regulator
Regulated
5V DC
Similarly, 12v regulated supply can also be produced by suitable selection of the
individual elements. Each of the blocks is described in detail below and the power supplies
26
made from these blocks are described below with a circuit diagram and a graph of their
output
2.2.2 TRANSFORMER
A transformer steps down high voltage AC mains to low voltage AC. Here we are
using a center-tap transformer whose output will be sinusoidal with 36volts peak to peak
value.
2.2.3 RECTIFIER
A rectifier converts AC to DC, but the DC output is varying. There are several types
of rectifiers; here we use a bridge rectifier.
The Bridge rectifier is a circuit, which converts an ac voltage to dc voltage using both
half cycles of the input ac voltage. The Bridge rectifier circuit is shown in the figure. The
circuit has four diodes connected to form a bridge. The ac input voltage is applied to the
diagonally opposite ends of the bridge. The load resistance is connected between the other
two ends of the bridge.
For the positive half cycle of the input ac voltage, diodes D1 and D3 conduct, whereas
diodes D2 and D4 remain in the OFF state. The conducting diodes will be in series with the
load resistance RL and hence the load current flows through RL.
27
For the negative half cycle of the input ac voltage, diodes D2 and D4 conduct
whereas, D1 and D3 remain OFF. The conducting diodes D2 and D4 will be in series with the
load resistance RL and hence the current flows through R L in the same direction as in the
previous half cycle. Thus a bi-directional wave is converted into unidirectional.
28
Smoothing
The smoothing block smoothes the DC from varying greatly to a small ripple and the
ripple voltage is defined as the deviation of the load voltage from its DC value. Smoothing is
also named as filtering.
Filtering is frequently effected by shunting the load with a capacitor. The action of
this system depends on the fact that the capacitor stores energy during the conduction period
and delivers this energy to the loads during the no conducting period. In this way, the time
during which the current passes through the load is prolonging Ted, and the ripple is
considerably decreased. The action of the capacitor is shown with the help of waveform.
2.2.4 REGULATOR
29
Fig.2.10 Regulator
2.3 RF MODULES
30
RFReceiverModuleRX433
Remote Control Products
RFReceiver
ModuleRX433
This compact radio frequency (RF) receiver module is suitable for remote control or
telemetry applications. The double sided circuit board is pre-populated with Surface Mount
Devices (SMD) and is tuned to 433MHz. No module assembly or adjustments are required.
RF receiver module RX433 receives RF control signals from the 8 channel RF remote control
transmitter K8058 and performs as an RF receiver interface when used on the 8 channel
remote control relay board K8056. (Only one RX433 RF receiver is needed for full RF
remote control operation of the 8 channel relay board K8056). RF receiver module RX433 is
a highly sensitive passive design that is easy to implement with a low external parts count.
RF remote receiver module RX433 can also be used with 433MHz RF Transmitter
TX433N for your custom remote control or telemetry requirements. (However, the FCC has
restrictions on the sale of the TX433N transmitter module in the U.S., so we don't have these
transmitters available).
RF Receiver Module Features
stable output
Specifications
31
modulation: AM
circuit shape: LC
sensitivity: 3Vrms
TRANSMITTER
TX433: 433MHz Transmitter Module
32
Modulation
: AM
RF output
8mW
Power supply
3 12 VDC
: -20 to +85
*Soldering temperature
: 10 seconds
Features
No adjustments required
Stable output
Specifications
Freqency
433Hz
Modulation
AM
RF Output
8mW
Power Supply
3 -12 Vdc
Circuit Shape
SAW
Data Rate
8 Kbps
Pin numbers
33
GND
Data IN
Vcc
ANT
RF ENCODER
General Description
The 3^18 encoders are a series of CMOS LSIs for remote control system
applications. They are capable of encoding 18 bits of information which consists of N address
bits and 18-N data bits. Each address/data input is externally trinary programmable if bonded
out. It is other wise set floating internally. Various packages of the 3^18 encoders offer
flexible combinations of programmable address/data to meet various application needs. The
programmable address/data is transmitted together with the header bits via an RF or an
infrared transmission medium upon receipt of a trigger signal. The capability to select TE
trigger type or a DATA type further enhances the application flexibility of 3^18 series of
encoders.
Features
Operating voltage : 2.4V 12V
Lower power and high noise immunity CMOS technology
34
35
36
37
38
Functional Description
Operation
The 3^18 series of encoders begins a three word transmission cycle upon receipt of a
transmission
enable
(TE
for
the
HT600/HT640/HT680
or
D12~D17
for
the
Information word
An information word consists of periods as shown:
Composition of information
39
40
41
RF DECODER
General Description
The 3^18 decoders are a series of CMOS LSIs for remote control system
applications. They are paired with the 3^18 series of encoders. For proper operation a pair of
encoder /decoder pair with same number of address and data format should be selected (refer
to the encoder/decoder cross reference tables).
The 3^18 series of decoders receives serial address and data from that series of
encoders that are transmitted by a carrier using an RF or an IR transmission medium. It then
compares the serial input data twice continously with its local address. If no errors or
unmatched codes are encountered, the input data codes are decoded and then transferred to
the output pins. The VT pins also goes high to indicate a valid transmission.
The 3^18 decoders are capable of decoding 18 bits of information that consist of N
bits od address and 18 N bits of data. To meet various applications they are arranged to
provide a number of data pin whose range is from 0 to 8 and an address pin whose range is
from 8 to 18. In addition, the 3^18 decoders provide various combinations of address/data
number in different packages.
Features
42
Applications
43
44
45
CHAPTER 3
CIRCUIT DIAGRAM
46
47
Fig.3.2 Microcontrollor
1M
Fig.3.4 RF Encoder
56K
Fig.3.5 RF Decoder
48
REFERENCES
[1] Road accidents in India [online] 2007 June 25. Available from: URL:
http://www.easydriveforum.com/f44-share-yourroad-experience/road-accidentsin-india- 834.html [2] Articles base directory [online] 2011 Feb. 16 Available from:
URL: http://www.dwworld.de/dw/article/0,,5519345,00.html
[3] Article from The Hindu [online] 2011 Feb. 10 Available from:
URL:http://www.hindu.com/2011/02/10/stories/ 2011021063740500.htm
[4] Yue Cheng Wu, Yun-qing Xia &, Zhegiang, Multichannel reflective PPG
earpiece sensor with passive motion cancellation Biomedical Circuits &System,
IEEE, 2007, PP 235-241.
[5] Drunk Drivers Beware Of Saab Device,
[http://www.buzzle.com/articles/drunkdrivers-beware-saab-device.html]
[6] Nissan to drink driveproof its vehicles, September 2006,
[http://www.nissanglobal.com/EN/NEWS/ 2007/_STORY/070723-01]
[7] Drunken driving protection system International Journal of Scientific &
Engineering Research Volume 2, Issue 12, December-2011 1 ISSN 2229-5518
[8] Alcohol sensor and Automatic control system for bike, Volume 2, Issue
ICRAET12, May 2012, ISSN Online: 2277-2677.
49
APENDEX A
SOFTWARE DEVELOPMENT
Introduction
In this chapter the software used and the language in which the program code is
defined is mentioned and the program code dumping tools are explained. The chapter also
documents the development of the program for the application. This program has been
termed as Source code. Before we look at the source code we define the two header files
that we have used in the code.
Tools Used
50
Keil development tools for the 8051 Microcontroller Architecture support every level
of software developer from the professional applications.
VISION
Vision3 adds many new features to the Editor like Text Templates, Quick Function
Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog
based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used
in parallel with Vision2.
Vision3 is an IDE (Integrated Development Environment) that helps you write,
compile, and debug embedded programs. It encapsulates the following components:
A project manager.
A make facility.
Tool configuration.
Editor.
A powerful debugger.
To help you get started, several example programs (located in the \C51\Examples,
\C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided.
51
HELLO is a simple program that prints the string "Hello World" using the Serial Interface.
TRAFFIC is a traffic light controller with the RTX Tiny operating system.
Select Project - Select Device and select an 8051, 251, or C16x/ST10 device from the Device
Database.
Select Project - Targets, Groups, Files. Add/Files, select Source Group1, and add the source
files to the project.
Select Project - Options and set the tool options. Note when you select the target device from
the Device Database all special options are set automatically. You typically only need to
configure the memory map of your target hardware. Default memory model settings are
optimal for most applications.
52
Use the Step toolbar buttons to single-step through your program. You may enter G, main in
the Output Window to execute to the main C function.
Open the Serial Window using the Serial #1 button on the toolbar.
Debug your program using standard options like Step, Go, Break, and so on.
Starting Vision2 and Creating a Project
Vision2 is a standard Windows application and started by clicking on the program icon. To
create a new project file select from the Vision2 menu
Project New Project. This opens a standard Windows dialog that asks you for the new
project file name.We suggest that you use a separate folder for each project. Youcan simply
usethe icon Create New Folder in this dialog to get a new empty folder. Thenselect this folder
and enter the file name for the new project, i.e. Project1.Vision2creates a new project file
with the name PROJECT1.UV2 which contains a default target and file group name. You can
see these names in the Project
Window Files.
Now use from the menu Project Select Device for Target and select a CPUfor your
project.The Select Device dialog box shows the Vision2 devicedatabase. Just select the
microcontroller you use. We are using for our examples the Philips 80C51RD+
CPU.Thisselection sets necessary tool options for the 80C51RD+ device and simplifies in
this way the tool Configuration
Building Projects and Creating a HEX Files
Typical, the tool settings under Options Target are all you need to start a new
application. You may translate all source files and line the application with aclick on the
Build Target toolbar icon. When you build an application withsyntax errors, Vision2 will
display errors and warning messages in the Output Window Build page. A double click on a
message line opens the source file on the correct location in a Vision2 editor window. Once
you have successfully generated your application you can start debugging.
After you have tested your application, it is required to create an Intel HEX file to
download the software into an EPROM programmer or simulator. Vision2 creates HEX files
53
with each build process when Create HEX files under Options for Target Output is enabled.
You may start your PROM programming utility after the make process when you specify the
program under the option Run User Program #1.
CPU Simulation
Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for
read, write, or code execution access. The Vision2 simulator trapsand reports illegal
memory accesses.
In addition to memory mapping, the simulator also provides support for theintegrated
peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you have
selected are configured from the Device
Database selection
You have made when you create your project target. Refer to page 58 for more
information about selecting a device. You may select and display the on-chip peripheral
components using the Debug menu. You can also change the aspects of each peripheral using
the controls in the dialog boxes.
Start Debugging
You start the debug mode of Vision2 with the Debug Start/Stop DebugSession
command. Depending on the Options for Target DebugConfiguration, Vision2 will load
the application program and run the startupcode Vision2 saves the editor screen layout and
restores the screen layout of the last debug session. If the program execution stops, Vision2
opens aneditor window with the source text or shows CPU instructions in the disassembly
window. The next executable statement is marked with a yellow arrow. During debugging,
most editor features are still available.
For example, you can use the find command or correct program errors. Program
source text of your application is shown in the same windows. The Vision2 debug mode
differs from the edit mode in the following aspects:
The Debug Menu and Debug Commands described below are available. The
additional debug windows are discussed in the following.
54
The project structure or tool parameters cannot be modified. All build Commands are
disabled.
Disassembly Window
The Disassembly window shows your target program as mixed source and assembly
program or just assembly code. A trace history of previously executed instructions may be
displayed with Debug View Trace Records. To enable the trace history, set Debug
Enable/Disable Trace Recording.
If you select the Disassembly Window as the active window all program step
commands work on CPU instruction level rather than program source lines. You can select a
text line and set or modify code breakpoints using toolbar buttons or the context menu
commands.
You may use the dialog Debug Inline Assembly to modify the CPU instructions.
That allows you to correct mistakes or to make temporary changes to the target program you
are debugging.
CODE DEVELOPMENT
1.Click on the Keil uVision Icon on Desktop.
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5.Save the Project by typing suitable project name with no extension in u r own folder sited
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15.Click on the file option from menu bar and select new.
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16.The next screen will be as shown in next page, and just maximize it by double clicking on
its blue border.
18.For a program written in Assembly, then save it with extension . asm and for C based
program save it with extension .C.
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19.Now right click on Source group 1 and click on Add files to Group Source.
20.Now you will get another window, on which by default C files will appear.
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21.Now select as per your file extension given while saving the file.
22.Click only one time on option ADD.
23.Now Press function key F7 to compile. Any error will appear if so happen.
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26.Then Click OK
27.Now Click on the Peripherals from menu bar, and check your required port as shown in
fig below
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Five simple steps to erasing and programming a device and setting any options
desired.
Check which Flash blocks are blank or in use with the ability to easily erase all blocks
in use.
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Reprogram the Boot Vector and Status Byte with the help of confirmation features that
prevent accidentally programming incorrect values.
Single-click access to the manual, Flash Magic home page and NXP Microcontrollers
home page.
Ability to use high-speed serial communications on devices that support it. Flash
Magic calculates the highest baud rate that both the device and your PC can use and
switches to that baud rate transparently.
Command Line interface allowing Flash Magic to be used in IDEs and Batch Files.
Able to control the DTR and RTS RS232 signals when connected to RST and /PSEN
to place the device into Boot ROM and Execute modes automatically. An example
circuit diagram is included in the Manual. This is essential for ISP with target
hardware that is hard to access.
This enables us to send commands to place the device in Boot ROM mode, with
support for command line interfaces. The installation includes an example project for
the Keil and Raisonance 8051 compilers that show how to build support for this
feature into applications.
Powerful, flexible Just In Time Code feature. Write your own JIT Modules to generate
last minute code for programming.
Uses include
a) Serial number generation
b) Copy protection and copy authorization
c) Storing program date and time - manufacture date
d) Storing program operator and location
e) Lookup table generation
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Requirements
Flash Magic works on any version of Windows, except Windows 95. 10Mb of
disk space is required. As mentioned earlier , we are automating two different routines in our
project and hence we used the method of polling to continuously monitor those tasks and act
accordingly.
BIBILOGRAPHY
1.
WWW.MITEL.DATABOOK.COM
2.
WWW.ATMEL.DATABOOK.COM
3.
WWW.FRANKLIN.COM
4.
WWW.KEIL.COM
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APENDEX B
SAMPLE PROGRAMS
Example 1
org 00h
acall delay
mov P1,#0AAh
lcall delay
sjmp back
delay: mov r5,#30h
again: djnz r5,again
ret
// Generating delay
// Return Of Loop
end
// End Of Program
Example 2
#include<reg51.h>
void delay(unsigned int); //Global Declaration Of Delay
void main()
{
P0=0x00;
while(1)
// Clearing Of Port O
//Infinite Loop
{
P0=0xAA;
delay(30);
P0=0x55;
delay(30);
}
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}
void delay(unsigned int x)
{
unsignedinti,j;
for(i=0;i<=x;i++)
for(j=0;j<=1275;j++);
}
Example 3
#include<reg51.h>
sbit SWITCH=P1^0;
// Input to P1.0
// Out to P2.5
void main()
{
while(1)
//Infinite Loop
{
if (SWITCH==0)
{
LED=1;
}
else
{
LED=0;
}
}
}
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Example 4
#include<reg51.h>
unsigned char str[10]="MAGNI5"; // String Of Data
void main()
{
unsignedinti=0;
TMOD=0X20;
// Timer1, Mode2
SCON=0X50;
TH1=-3;
TR1=1;
//Start Timer 1
While(1)
{
for(i=0;i<10;i++)
{
SBUF=str[i];
while(TI==0); // Wait Data Till Bit Of Data
TI=0;
}
}
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APENDEX C
SOURCE CODE
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