Stanford University

Department of Electrical Engineering

EE101A

Winter 2015

Final Examination
Professor T. H. Lee
16 March 2015

Name: ______SOLUTIONS______________________

I have followed the rules set forth in the Stanford Honor Code. __________________________
Signature
Guidelines: Must read!
1. Closed book, but two 8.5 x 11 sheets (four sides total) of your own notes are allowed.
2. You may use a calculator, but no devices with an active network connection of any kind.
3. Show all your work and reasoning on the exam in order to receive full or partial credit.
4. Do not unstaple the exam. If you need to continue your solution on the back of a page,
indicate where the work is located in order to receive credit.
5. The 3 hours go by fast (because youre having so much fun); budget and use your time wisely!

Score
Problem

Points

25

25

25

25

Total

100

Score

1. Networks and sources [25 points]

Consider the following network:

Note that only one of the three current sources in the network is independent. The other two are
current-controlled.
(a) [4 pts.] Write the node-voltage equation at node a. There is no need to simplify or solve it
(yet). Express your answer in terms of resistances, of course, when appropriate (e.g., your
equation at node a should not contain the variable i1).

The directive to express in terms of resistances where appropriate is intended to produce a

system of equations that are readily solved.
Node equation at node a:
Va Va Vb
V
+
i b = 0
1k
2k
2k

(b) [4 pts.] Write the node-voltage equation at node b. There is no need to simplify or solve it
(yet). Again, express your answer in terms of resistances where appropriate.

Node equation at node b:

Vb
V Va Va
+ b

=0
2k
2k
4k

(c) [5 pts.] Solve the node-voltage equations from parts (a) and (b) for the node voltages
Va and Vb. Assume that i = 1mA for the independent current source.

Solution: Add the two equations together and solve for Va: Va = (4/3) volt.
Then substitute into either equation and solve for Vb: Vb = 1V.

(d) [5 pts.] Define a resistance Ri = v/i, with the variables as shown on the schematic. From
your results in part (c), find Ri in k for this circuit. Note that we continue to assume that
i = 1mA, as in part (c). If you couldnt solve (c), you may assume, with reduced credit,
that Va = 1.5V and Vb = 0.75V for this part.

Solution: Note that v is the same as Va, which we already know = (4/3)V. Since i is given as
1mA, the answer is just (4/3)k.

(e) [7 pts.] Calculate the power dissipated in each of the six elements in this circuit and enter
your answers into the table. Also find the sum of the powers of all the elements. Use the
passive sign convention. If you couldnt solve part (c), you may again assume, with
reduced credit, that Va = 1.5V and Vb = 0.75V.

4/3
2/3
16/9
1/18
1/2
1/3
Zero

2. Op-amp circuits [25 points]

Consider the following op-amp circuit:

R2

R1

You may assume that the op-amp is ideal, except for the following limitations: The magnitude of
the op-amps output current cannot exceed 30mA, and the magnitude of the output voltage
cannot exceed 5V.

(a) [3 pts.] Find the numerical value of the voltage gain, vout /vs, for output magnitudes less
than 5V.

vout /vs = R2/R1 = 1

(b) [3 pts.] Find the numerical value of the output current io in mA for vout = 5V. Note that the
answer to part (a) is not needed to answer this part.

io =

vout
5V
=
R2 1k

io =
5

5mA

(c) [5 pts.] Find the numerical value of the voltage gain, vout /vs, for the new op-amp circuit
shown below. Once again, you may assume that both op-amps are operating within their
linear range.

Solution: Write KCL at the inverting input terminal of the first op-amp. Also note that 1/5 the
output voltage is the voltage at the inverting input of the second op-amp. That is also the voltage
at the output of the first op-amp, thanks to the golden rules of ideal op-amp analysis. When the
dust settles, you will find that the gain is 5/2.

vout /vs = 5/2

R5
R2
R1

R4
R3

(d) [4 pts.] For vout = 1V, find the numerical value of the output current of the 2nd op amp, io2,
in mA. Note that you do not need the answer to part (c) for this part.

Solution: The op-amp output current is simply the sum of the currents through R5 (which has
one end connected to a virtual ground), and through (R3 + R4) (which has one end connected to
actual ground). So, the output current is simply 0.4mA.

io2 =
6

0.4mA

(e) [5 pts.] Suppose we now connect a 100 load resistor between the output and ground, as
shown below. Find the new value of the output current of the 2nd op amp when vout = 1V.
If you couldnt solve part (d), you can use 0.6mA as the output current with no load
resistor.
R5
R2
R1

RL

R4

R3

Solution: All that changes here is the addition of the current through RL, which is 1V/100 =
10mA. So the total current is 10.4mA.

io2 =

10.4mA

(f) [5 pts.] For the circuit of part (e), plot the output voltage vout vs. the input voltage
vs. If you couldnt solve part (e), you can assume, with reduced credit, that io = 17mA
when vout = 1V.

Solution: Either the output voltage or output current could hit its limit first. At a 5V output, the
current through just the 100 ohm resistor would be 50mA, so the 30mA current limit strikes first.
Solving for the output voltage that leads to a 30mA total current through the three resistive
branches gives us about 2.88V. The plot then looks like this:
2.88V
Slope = 5/2
2.88V

3. MOSFET common-source amplifier [25 points]

+
vOUT

nCox = 90A/V2, W = 2m, L = 0.1m, VA = 5V, Vt = 0.25V.

R1 = 180k, R2 = 180k, Rsig = 10k, RD = 15k, and RL = 5k
The capacitances are of infinite value, meaning that they are so large that they appear as
essentially short-circuits at all signal frequencies. Signal means not DC.
(a) [5 pts.] What value of RS gives us a DC drain voltage VD = 3.5V? Neglect Early voltage
VA (i.e., set it equal to infinity), but only for this part.

Solution: The 3.5V drain voltage tells us that the drain current is 100A. Solving the drain
current equation in saturation then yields the overdrive voltage as 1/3V, so VGS is 0.583V. Since
VG is 2.5V, the voltage at the source must be (2.5-0.583)V = 1.917V. Dividing that by the 100A
current yields about 19.2k.

RS = 19.2k.

(b) [6 pts.] Draw the small-signal model for the entire amplifier circuit, including the signal
source, its resistance Rsig, and the load resistance. Accommodate the effects of finite
Early voltage VA and provide numerical values for all elements. If you couldnt solve
part (a), you may assume, with reduced credit, that RS = 2k and ID = 200A (incorrect
answers) for this part.

Solution: The value of VA is given as 5V. At a drain current of 100A, the corresponding ro is
50k. The transistors transconductance, gm, is 2ID/Vov = 0.6mS. All capacitors are
shorted, and the supply voltage is set to zero, as is standard for ss analysis.

Rsig

vs

R1||R2

gmvgs

ro||RD||RL

(c) [5 pts.] What are the values of the amplifiers input resistance Ri and output resistance Ro,
(with these resistances defined as on the schematic)? Again, if you couldnt solve (a), you
may assume, with reduced credit, that RS = 2k and ID = 200A (incorrect answers) for
this part.

Solution: We see that Rias defined on the schematicis just R1||R2, or 90k. The output
resistance Ro (again, as defined on the schematic) is just RD||ro, or 15k||50k =
11.54k.

Ri = 90k

Ro = 11.54k

(d) [3 pts.] What is the small-signal gain, vout/vs?

Solution: The gain from gate to drain is just gm(RD||ro||RL) = 2.09. Multiply this value by the
gain from signal source to gate (0.9) to get the overall gain, 1.88.

vout /vs = 1.88

(e) [6 pts.] Due to a manufacturing error, the capacitor in parallel with RS is inadvertently
omitted. What is the small-signal gain, vout/vs, in that case?

Solution: The gain must go down. If we wiggle the gate, the source will sort of follow it, so only
a fraction of the wiggling will become vgs to excite the transconductance,
The ss model looks like the following for this case:
supernode
Rsig

vs

R1||R2

gmvgs

RD||RL

vsource

RS

Break up a problem into pieces if you can. Here, first solve for the gain from source to drain,
then from gate to source. We already know the gain from signal input to gate (its 0.9); multiply
all three together to get the final answer.
Use the supernode concept for the first derivation. Because the drain current is (minus) the
source current, the voltage ratio is merely the resistance ratio: vout/vsource = (RD||RL)/RS.
Figuring out the gain from gate to source is made easier by the derivation weve just done. First
write KCL for current entering the source node (we use conductances for compactness here):
g s v source + g m v gs + g o (vout v source ) = 0. Now substitute for vsource (in three places) using the
equation above, remembering that vgs = vgate vsource. Solve the resulting equation for vsource/vgate,
then finally vout/vs:
v source
g m RS
v
g m ( RD || RL )(0.9)
=
out =
.
v gate 1 + g m RS + g o ( RL + RS )
v s 1 + g m RS + g o ( R L + RS )
vout /vs = 0.15 or so

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4. Frequency response, time response, Bode plots and first-order circuits [25 points]
Consider the following three circuits, A1, A2 and A3:

High-freq gain
= R2/R1

A1

Gain goes
as 1/

A2

Low-freq gain
= R2/R1

A3

(a) [2 pts.] Which of the circuits above possesses a frequency response that best matches the
following Bode plot of gain magnitude (in dB) vs. log of frequency?

Answer: ___A2______________________

(b) [2 pts.] Repeat for the following Bode plot:

Answer: ___A1______________________

(c) [2 pts.] Repeat for the following Bode plot:

Answer: ___A3______________________

(d) [3 pts.] Now suppose that circuit A2 is driven by the following voltage step:

5V
1s

11

t(s)

The output voltage of A2 is at zero until t = 1s. Sketch the output voltage as a function of time
for t > 0, given that R = 1k and C = 1nF. Assume for now that the op-amp is truly ideal:

Solution: The negative-feedback connection allows us to apply the golden rules. The input
current is thus vin/R, all of which must go into the capacitor. The capacitor current is just dV/dt,
where V is the capacitor voltage, which in turn is minus the output voltage. So, vout is (minus) the
integral of current, divided by RC (= 1s). That gives us a negative-going linear ramp of slope =
5V per microsecond.
A common mistake was to apply the universal exponential solution without calculating the
final voltage across the capacitor (infinity), and without calculating the resistance facing the
capacitor (infinity). Randomly assuming that the only resistor you happen to see must be the R in
RC is dangerous (and here, just plain wrong). If youre not prepared to be the capacitor, use the
approach in the first paragraph above.
(e) [3 pts.] Now suppose that A2 is driven with a 1.25MHz, 5V-amplitude square wave:
0.8s

5V

5V

t(s)

If we are given that the output of the amplifier is +1V at t = 0, sketch the output voltage of the
amplifier as a function of time for t > 0. Note that the answer to part (d) is not needed here.

Solution: The op-amp circuit is merely an inverting integrator, so the output voltage must be a
triangle wave. When the input voltage is negative, the output ramps up. In each 400ns half-cycle,
the triangle wave has a slope of either plus or minus 5V/s, so it covers 2V. If we start at 1V, we
go up to 3V, then back to 1V, then back to 3V, etc.
3V
1V

(f) [3 pts.] The following op-amp circuit is our old friend, the Schmitt trigger.

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The op-amp is ideal except for the output voltage being limited by +/ 5V supply voltages (not
shown). If the ratio R1/R2 is 0.2, sketch the output voltage vs. input voltage. Indicate on your
sketch, with arrows, the path along which the output varies as the input varies. Clearly label the
value of the trip points (i.e., the values of input voltage at which the output voltage changes).

Solution: This is a positive-feedback circuit, so the golden rules do not apply. Instead, use the
brass rules in which you assume that the output voltage is pinned at either the positive or
negative supply voltage, and work backwards to find the input voltage consistent with that
assumption. Here you find that the output stays at +5V unless the input is brought below 1V,
and that the output stays at 5V unless the input is brought above +1V.
5V
1V

1V

5V
(g) [6 pts.] Sketch the steady-state output voltages V1 and V2 as a function of time for the
following circuit. Assume that both op-amps are perfectly ideal, except that the maximum
output voltage magnitude is limited to 5V. You do not need the results of part (f) here,
but it may be useful to have them:

Solution: This circuit is a combination of a Schmitt trigger and an integrator. In either output
state for the former, the output of the latter is a linear ramp. Because the integrator inverts, the
loop chases itself, and we get a square wave from the Schmitt and a triangle wave out of the
inverter. The triangle wave must have a peak-to-peak value equal to the hysteresis width of the
Schmitt. You know the slope of the triangle wave, so you can compute how long it takes to cross
the hysteresis zone. That gives us a 1.25MHz output for both op-amps.
This circuit is the core of the first function generator, developed by Wavetek in the early 1960s.
As mentioned in lecture, one of the founders, Joel Naive (rhymes with wave), was a Stanford
grad. The other founder, Joe Deavenport (pronounced davenport) designed the circuit. A later
version included a squisher to convert a triangle wave into a sorta sinewave. The next part
examines the core idea behind the squisher.

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(h) [4 pts.] Some simple signal generators create an approximation to a sinusoidal output by
squishing a triangle waves peaks. This part of the problem explores one possible
strategy to implementing a squisher circuit:

Assume that the diodes are ideal (i.e., not exponential), with an abrupt on-off boundary at 0.5V
(instead of the more usual 0.7V, say). Let all three resistors be of the same value (e.g., 1k,
although the particular value doesnt matter here). If the input voltage Vin is a 1V-amplitude
triangle wave, sketch the output voltage, Vsquish, as a function of time for one full cycle.

Solution: For Vin smaller than the turn-on voltage of the diodes, the diodes arent turned on
(yes, not profound, but important). So Vsquish = Vin for all |Vin| < 0.5V.
For |Vin| larger than 0.5V, D1 or D2 is on (but never both), depending on polarity. When one of
these diodes is on, it has a 0.5V drop across it, not 0V! A substantial number of students mixed
this up, acknowledging the 0.5V turn-on threshold, but then promptly treating the diode as
having zero voltage across it when on. You cannot switch models within the same problem!
Once a diode is on, the output voltage rises at half the rate as the input (a 50% voltage divider
kicks in). So as the input varies from 0.5V to 1V, the output varies from 0.5V to 0.75V.
Squishing is accomplished.

Already, the waveform doesnt look too terrible. Better still, a real diodes exponential
characteristic softens the sharp corners. A couple more diodes, biased to turn on and provide
additional attenuation at the right places, can deliver a surprisingly good approximation to a sine.
Distortion levels well below 1% are readily achieved. EE101A concepts remarkably led to the
founding of a highly profitable company.
Make sure that you wrote your name legibly on the first page, and be sure to enjoy Spring break!
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