Scribd
Upload
120 views8 pages

CS1007 Microprocessor and Interfacing 2014 15

The document provides a course plan for the Microprocessor & Interfacing course offered in the third semester. It includes: - The course code, title, semester and timings. - A detailed timetable assigning sections, faculty and timings for lectures across 10 sections on weekdays. - Details of 9 faculty members teaching the course including office hours and email IDs. - References and prerequisites for the course. - 5 expected outcomes covering understanding of 8085, 8086, interfacing circuits, communication and 8051 microcontroller. - A session-wise plan listing 45 topics to be taught over the semester relating to various microprocessors, interfacing and communication.

Uploaded by

unscr
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
120 views8 pages

CS1007 Microprocessor and Interfacing 2014 15

The document provides a course plan for the Microprocessor & Interfacing course offered in the third semester. It includes: - The course code, title, semester and timings. - A detailed timetable assigning sections, faculty and timings for lectures across 10 sections on weekdays. - Details of 9 faculty members teaching the course including office hours and email IDs. - References and prerequisites for the course. - 5 expected outcomes covering understanding of 8085, 8086, interfacing circuits, communication and 8051 microcontroller. - A session-wise plan listing 45 topics to be taught over the semester relating to various microprocessors, interfacing and communication.

Uploaded by

unscr
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

FACULTY OF ENGINEERING AND TECHNOLOGY

DEPARTMENT OF CSE
COURSE PLAN
Course Code
Course Title
Semester
Course Time

: CS1007
: MICROPROCESSOR & INTERFACING
: III
: JULY DEC 2014

Day

A
Hour

Timing

Hour

B
Timin
g
2.203.10

SECTION
C
Hour

Timing

2.20-3.10

2.20-3.10

D
Hour

Timing

E
Hour

Timing

11.2512.15

9.35-10.25

10.3511.25

9.35-10.25
2

4,6

11.2512.15,
2.20-3.10

9.3510.25

11.2512.15
5

9.35-10.25

11.2512.15

8.45-9.35,
11.25-12.15
1,4

Day

F
Hour

Timing

Monday

Tuesday

SECTION
H

G
Hour

Timin
g
1.302.20

Hour

Timing

Hour

3.10-4.00

8.45-9.35

J
Timing

Hour

Timing

9.35-10.25

11.2512.15

8.45-9.35

9.35-10.25

8.45-9.35
9.3510.25
Wednesday

Thursday

8.45-9.35

8.45-9.35

9.3510.25
Friday

1.30-2.20

1.30-2.20
2

9.35-10.25

Day
Hour
Monday

Tuesday

K
Timing

Hour

L
Timing

Hour
1

SECTION
M
Timing
8.45-9.35

11.25-12.15

10.35-11.25
Wednesday

11.25-12.15,
3.10-4.00
Thursday

9.35-10.25

Friday

2.20-3.10

1.30-2.20

9.35-10.25

FACULTY DETAILS
Sec. Name
A C.Jayavarthini
B Vathana.D
C Vaishnavi Moorthy
D Anitha.J
E Ida Seraphim.B
F Karthikeyan.M
G Sowmiya.B
H Girija.S
I
Sowmiya.T

Office hr
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00
8.00-4.00

4,7

Mail id
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]

Nithya Kalyani.A

8.00-4.00

[email protected]

K
L
M

Irene Beril Yazhini.P


Prathiba.J
Saranya.S S

8.00-4.00
8.00-4.00
8.00-4.00

[email protected]
[email protected]
[email protected]

TEXT BOOK
1. Ray A K, K M Bhurchandi, Advanced Microprocessor & Peripherals, Tata McGraw, Hill, Second
Edition, 2012.
REFERENCES
1. Soumitra Kumar Mandal, Microprocessor & Microcontrollers, TataMcGraw Hill, Second Edition, 2012.
2. Barry B. Brey, The Intel Microprocessor8086/8088, 80186, Pearson Education, Eighth Edition, 2009.
3. Uma Rao, Andhe Pallavi, The 8051Microcontrollers, Pearson Education, Second Impression, 2011.
4. Krishna Kant, Microprocessors & Microcontrollers, PHI Learning Private Limited, Eighth Printing, 2011.
5. http://nptel.iitm.ac.in/courses/
Web resources
1. www.emu8086.com
2. www.cpu-world.com
3. www.hobbyprojects.com
4. www.8052.com
Pre-requisite
Objectives :

NIL

1. To study the Architecture of 8085 microprocessors


2. To study the Architecture of 8086 and 8088 microprocessors
3. To learn the design aspects of I/O and Memory Interfacing circuits
4. To study about communication and bus interfacing
5. To study the Architecture of 8051 microcontroller
Assessment Details :
Cycle Test I

10

Surprise Test I

5 Marks

Cycle Test II

10

Marks

Attendance

Marks

Model Exam

20

Marks

Marks

Total = 50 Marks

Test Schedule :
S.No.
1
2
3

DATE
As per Calendar
As per Calendar
As per Calendar

TEST
Cycle Test - I
Cycle Test - II
Model Exam

TOPICS
Unit I & II
Unit III & IV
All 5 units

DURATION
2 periods
2 periods
3 Hrs

Outcomes :
Students who have successfully completed this course will have full understanding of the following concepts.

Course outcome
To learn about
Microprocessor 8085 Architecture & Instructions
Microprocessor 8086 & 8088 Architecture &
Instructions
design aspects of I/O and Memory Interfacing
circuits
communication and bus interfacing
8051 microcontroller

Program outcome

An ability to understand the basic functioning of


8085 and do programs
An ability to understand the basic functioning of
8086, 8088 and do programs
An ability to design memory systems, and do
programs for communication and peripheral
interfacing
An ability to understand the basic functioning of
8051 microcontroller

Detailed Session Plan :


INTEL 8085 ARCHITECTURE
Introduction to 8085 - 8085 architecture - Pin Details - Addressing Modes -Instruction Set and Assembler Directives Instruction Timing Diagram Assembly Language Programming with 8085.

Sessi
on
No.

Topics to be covered

Time
(min)

Testing Method

Ref

Teaching
Method

Introduction to 8085 and its architecture

50

R4

BB/PP

Discussion
Quiz

Pin Details, Addressing modes

50

R4

BB/PP

Quiz

R4
3

Instruction Set

50

R4

BB/PP

Quiz

Instruction Timing Diagram

50

R4

BB/PP

Quiz

Assembly Language Programming with


8085.

50

R4

BB/PP

Quiz

Assembly Language Programming with


8085.

50

R4

BB/PP

Discussion
Objective type test

Programming with 8085.

50

R4

BB/PP

Discussion
Objective type test

INTEL 8086/8088 ARCHITECTURE


Introduction to 8086/8088-8086/8088 Architecture - Pin Details Addressing Modes - Instruction Set and Assembler
Directives - Assembly Language Programming with 8086/8088-Basic Peripherals and their interfacing with 8086/8088 Semiconductor Memory interfacing-Dynamic RAM Interfacing.

8
9

Introduction to 8086/8088 architecture


Pin Details Addressing Modes

50
50

T1
T1

BB/PP
BB/PP

Discussion
Discussion, Quiz

10

Instruction Set

50

T1

BB/PP

11

Instruction Set

50

T1

BB/PP

Discussion
Comparative Study
Comparative Study

12

Assembler Directives

50

T1

BB/PP

Quiz

13

Assembly Language Programming with


50
8086/8088
Assembly Language Programming with
50
8086/8088
Basic Peripherals and their interfacing with 50
8086/8088

T1

BB/PP

Quiz

T1

BB/PP

Quiz, Assignment

T1

BB/PP

Quiz
Group discussion

14
15

16

Semiconductor Memory interfacing

50

T1

BB/PP

17

Dynamic RAM Interfacing

50

T1

BB/PP

Quiz
Group discussion
Quiz
Group discussion

I/O and MEMORY INTERFACING USING 8085/8086


Interrupt of the 8085 Microprocessor- Interrupt of 8086/8087 Microprocessor,Programmable Interrupt Controller 8259A
Architecture - Command Words of 8259 - Operating modes, Interfacing I/O Ports - PIO 8255 Architecture - Modes of
Operation Programmable Interval Timer 8253 Architecture - Operating modes.
Interrupt of the 8085 Microprocessor,
18
BB/PP
Quiz
50
T1

Group discussion
50

T1

BB

Discussion

50

T1

BB/PP

Discussion, Quiz

21

Interrupt of 8086/8087 Microprocessor


Programmable Interrupt Controller 8259A
Architecture
Command Words of 8259

50

T1

BB/PP

22

Operating modes

50

T1

BB/PP

Discussion
Comparative Study
Comparative Study

23

Interfacing I/O Ports

50

T1

BB/PP

Quiz

24

PIO 8255

50

T1

BB/PP

Quiz

25

Modes of Operation

50

T1

BB/PP

Quiz, Assignment

26

Programmable Interval Timer 8253 Architecture 50

T1

BB/PP

27

Programmable Interval Timer 8253 Architecture 50

T1

BB/PP

28

Operating modes

T1

BB/PP

Quiz
Group discussion
Quiz
Group discussion
Quiz
Group discussion

19
20

50

COMMUNICATION AND BUS INTERFACING WITH 8085/8086\


Introduction - Serial Communication Interface 8251, DMA Controller 8237 -Architecture-Register organization - DMA
Operation, Keyboard and Display I/O Interface 8279 - Architecture - Modes of Operation - Command Words of 8279 CRT Controller 8275 - Analog to Digital Interfacing Architecture - Bus Interface - UART 8250.
Introduction
29
BB/PP
Quiz
50
T1

Group discussion
30
31

Serial Communication Interface 8251


DMA Controller 8237 Architecture

50

T1

BB

Discussion

50

T1

BB/PP

Discussion, Quiz

32

Register organization - DMA Operation

50

T1

BB/PP

33

50

T1

BB/PP

34

Keyboard and Display I/O Interface 8279


Architecture
Command Words of 8279

Discussion
Comparative Study
Comparative Study

50

T1

BB/PP

Quiz

35

CRT Controller 8275

50

T1

BB/PP

Quiz

36

Analog to Digital Interfacing Architecture

50

T1

BB/PP

Quiz, Assignment

37

Bus Interface - UART 8250

50

T1

BB/PP

Quiz
Group discussion

MICROCONTROLLERS 8051
Introduction - Architecture of 8051 Microcontroller - Memory organization - Pindiagram of 8051 Microcontroller Addressing Modes - Instruction set -Timers/counters - serial Communication- assembly Language programs Applications of Microcontrollers.
Introduction - Architecture of 8051
38
BB/PP
Quiz
50
T1
Microcontroller
Group discussion
Memory organization , Pindiagram of 8051
39
Microcontroller
50
T1
BB
Discussion
Addressing Modes
40
50
BB/PP
Discussion, Quiz
T1

41

Instruction set

50

T1

BB/PP

42

Timers/counters

50

T1

BB/PP

Discussion
Comparative Study
Comparative Study

50

T1

BB/PP

Quiz

50

T1

BB/PP

Quiz

50

T1

BB/PP

Quiz, Assignment

43
serial Communication

44
assembly Language programs

45
Applications of Microcontrollers

BB Black Board
PP Power Point

Prepared by

Approved by

Mrs.C. Jayavardhini,AP/CSE

HOD/CSE

You might also like